1262569Simp/* 2262569Simp * Copyright 2013 Pavel Machek <pavel@denx.de> 3262569Simp * 4262569Simp * The code contained herein is licensed under the GNU General Public 5262569Simp * License V2. 6262569Simp */ 7262569Simp 8262569Simp/dts-v1/; 9262569Simp#include "imx6q.dtsi" 10262569Simp 11262569Simp/ { 12262569Simp model = "MicroSys sbc6x board"; 13262569Simp compatible = "microsys,sbc6x", "fsl,imx6q"; 14262569Simp 15262569Simp memory { 16262569Simp reg = <0x10000000 0x80000000>; 17262569Simp }; 18262569Simp}; 19262569Simp 20270864Simp 21262569Simp&fec { 22262569Simp pinctrl-names = "default"; 23270864Simp pinctrl-0 = <&pinctrl_enet>; 24262569Simp phy-mode = "rgmii"; 25262569Simp status = "okay"; 26262569Simp}; 27262569Simp 28270864Simp&iomuxc { 29270864Simp imx6q-sbc6x { 30270864Simp pinctrl_enet: enetgrp { 31270864Simp fsl,pins = < 32270864Simp MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 33270864Simp MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 34270864Simp MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 35270864Simp MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 36270864Simp MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 37270864Simp MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 38270864Simp MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 39270864Simp MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 40270864Simp MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 41270864Simp MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 42270864Simp MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 43270864Simp MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 44270864Simp MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 45270864Simp MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 46270864Simp MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 47270864Simp MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 48270864Simp >; 49270864Simp }; 50270864Simp 51270864Simp pinctrl_uart1: uart1grp { 52270864Simp fsl,pins = < 53270864Simp MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 54270864Simp MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 55270864Simp >; 56270864Simp }; 57270864Simp 58270864Simp pinctrl_usbotg: usbotggrp { 59270864Simp fsl,pins = < 60270864Simp MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 61270864Simp >; 62270864Simp }; 63270864Simp 64270864Simp pinctrl_usdhc3: usdhc3grp { 65270864Simp fsl,pins = < 66270864Simp MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 67270864Simp MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 68270864Simp MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 69270864Simp MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 70270864Simp MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 71270864Simp MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 72270864Simp >; 73270864Simp }; 74270864Simp }; 75270864Simp}; 76270864Simp 77262569Simp&uart1 { 78262569Simp pinctrl-names = "default"; 79270864Simp pinctrl-0 = <&pinctrl_uart1>; 80262569Simp status = "okay"; 81262569Simp}; 82262569Simp 83262569Simp&usbotg { 84262569Simp pinctrl-names = "default"; 85270864Simp pinctrl-0 = <&pinctrl_usbotg>; 86262569Simp disable-over-current; 87262569Simp status = "okay"; 88262569Simp}; 89262569Simp 90262569Simp&usdhc3 { 91262569Simp pinctrl-names = "default"; 92270864Simp pinctrl-0 = <&pinctrl_usdhc3>; 93262569Simp status = "okay"; 94262569Simp}; 95