imx6dl.dtsi revision 262569
1262569Simp
2262569Simp/*
3262569Simp * Copyright 2013 Freescale Semiconductor, Inc.
4262569Simp *
5262569Simp * This program is free software; you can redistribute it and/or modify
6262569Simp * it under the terms of the GNU General Public License version 2 as
7262569Simp * published by the Free Software Foundation.
8262569Simp *
9262569Simp */
10262569Simp
11262569Simp#include "imx6dl-pinfunc.h"
12262569Simp#include "imx6qdl.dtsi"
13262569Simp
14262569Simp/ {
15262569Simp	cpus {
16262569Simp		#address-cells = <1>;
17262569Simp		#size-cells = <0>;
18262569Simp
19262569Simp		cpu@0 {
20262569Simp			compatible = "arm,cortex-a9";
21262569Simp			device_type = "cpu";
22262569Simp			reg = <0>;
23262569Simp			next-level-cache = <&L2>;
24262569Simp		};
25262569Simp
26262569Simp		cpu@1 {
27262569Simp			compatible = "arm,cortex-a9";
28262569Simp			device_type = "cpu";
29262569Simp			reg = <1>;
30262569Simp			next-level-cache = <&L2>;
31262569Simp		};
32262569Simp	};
33262569Simp
34262569Simp	soc {
35262569Simp		ocram: sram@00900000 {
36262569Simp			compatible = "mmio-sram";
37262569Simp			reg = <0x00900000 0x20000>;
38262569Simp			clocks = <&clks 142>;
39262569Simp		};
40262569Simp
41262569Simp		aips1: aips-bus@02000000 {
42262569Simp			iomuxc: iomuxc@020e0000 {
43262569Simp				compatible = "fsl,imx6dl-iomuxc";
44262569Simp			};
45262569Simp
46262569Simp			pxp: pxp@020f0000 {
47262569Simp				reg = <0x020f0000 0x4000>;
48262569Simp				interrupts = <0 98 0x04>;
49262569Simp			};
50262569Simp
51262569Simp			epdc: epdc@020f4000 {
52262569Simp				reg = <0x020f4000 0x4000>;
53262569Simp				interrupts = <0 97 0x04>;
54262569Simp			};
55262569Simp
56262569Simp			lcdif: lcdif@020f8000 {
57262569Simp				reg = <0x020f8000 0x4000>;
58262569Simp				interrupts = <0 39 0x04>;
59262569Simp			};
60262569Simp		};
61262569Simp
62262569Simp		aips2: aips-bus@02100000 {
63262569Simp			i2c4: i2c@021f8000 {
64262569Simp				#address-cells = <1>;
65262569Simp				#size-cells = <0>;
66262569Simp				compatible = "fsl,imx1-i2c";
67262569Simp				reg = <0x021f8000 0x4000>;
68262569Simp				interrupts = <0 35 0x04>;
69262569Simp				status = "disabled";
70262569Simp			};
71262569Simp		};
72262569Simp	};
73262569Simp};
74262569Simp
75262569Simp&ldb {
76262569Simp	clocks = <&clks 33>, <&clks 34>,
77262569Simp		 <&clks 39>, <&clks 40>,
78262569Simp		 <&clks 135>, <&clks 136>;
79262569Simp	clock-names = "di0_pll", "di1_pll",
80262569Simp		      "di0_sel", "di1_sel",
81262569Simp		      "di0", "di1";
82262569Simp
83262569Simp	lvds-channel@0 {
84262569Simp		crtcs = <&ipu1 0>, <&ipu1 1>;
85262569Simp	};
86262569Simp
87262569Simp	lvds-channel@1 {
88262569Simp		crtcs = <&ipu1 0>, <&ipu1 1>;
89262569Simp	};
90262569Simp};
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