1262569Simp/* 2262569Simp * Copyright 2011 Freescale Semiconductor, Inc. 3262569Simp * Copyright 2011 Linaro Ltd. 4262569Simp * 5262569Simp * The code contained herein is licensed under the GNU General Public 6262569Simp * License. You may obtain a copy of the GNU General Public License 7262569Simp * Version 2 or later at the following locations: 8262569Simp * 9262569Simp * http://www.opensource.org/licenses/gpl-license.html 10262569Simp * http://www.gnu.org/copyleft/gpl.html 11262569Simp */ 12262569Simp 13262569Simp#include "skeleton.dtsi" 14262569Simp#include "imx53-pinfunc.h" 15270864Simp#include <dt-bindings/clock/imx5-clock.h> 16270864Simp#include <dt-bindings/gpio/gpio.h> 17270864Simp#include <dt-bindings/input/input.h> 18262569Simp 19262569Simp/ { 20262569Simp aliases { 21270864Simp ethernet0 = &fec; 22262569Simp gpio0 = &gpio1; 23262569Simp gpio1 = &gpio2; 24262569Simp gpio2 = &gpio3; 25262569Simp gpio3 = &gpio4; 26262569Simp gpio4 = &gpio5; 27262569Simp gpio5 = &gpio6; 28262569Simp gpio6 = &gpio7; 29262569Simp i2c0 = &i2c1; 30262569Simp i2c1 = &i2c2; 31262569Simp i2c2 = &i2c3; 32270864Simp mmc0 = &esdhc1; 33270864Simp mmc1 = &esdhc2; 34270864Simp mmc2 = &esdhc3; 35270864Simp mmc3 = &esdhc4; 36262569Simp serial0 = &uart1; 37262569Simp serial1 = &uart2; 38262569Simp serial2 = &uart3; 39262569Simp serial3 = &uart4; 40262569Simp serial4 = &uart5; 41262569Simp spi0 = &ecspi1; 42262569Simp spi1 = &ecspi2; 43262569Simp spi2 = &cspi; 44262569Simp }; 45262569Simp 46262569Simp cpus { 47262569Simp #address-cells = <1>; 48262569Simp #size-cells = <0>; 49284090Sian cpu0: cpu@0 { 50262569Simp device_type = "cpu"; 51262569Simp compatible = "arm,cortex-a8"; 52262569Simp reg = <0x0>; 53284090Sian clocks = <&clks IMX5_CLK_ARM>; 54284090Sian clock-latency = <61036>; 55284090Sian voltage-tolerance = <5>; 56284090Sian operating-points = < 57284090Sian /* kHz */ 58284090Sian 166666 850000 59284090Sian 400000 900000 60284090Sian 800000 1050000 61284090Sian 1000000 1200000 62284090Sian 1200000 1300000 63284090Sian >; 64262569Simp }; 65262569Simp }; 66262569Simp 67270864Simp display-subsystem { 68270864Simp compatible = "fsl,imx-display-subsystem"; 69270864Simp ports = <&ipu_di0>, <&ipu_di1>; 70270864Simp }; 71270864Simp 72262569Simp tzic: tz-interrupt-controller@0fffc000 { 73262569Simp compatible = "fsl,imx53-tzic", "fsl,tzic"; 74262569Simp interrupt-controller; 75262569Simp #interrupt-cells = <1>; 76262569Simp reg = <0x0fffc000 0x4000>; 77262569Simp }; 78262569Simp 79262569Simp clocks { 80262569Simp #address-cells = <1>; 81262569Simp #size-cells = <0>; 82262569Simp 83262569Simp ckil { 84262569Simp compatible = "fsl,imx-ckil", "fixed-clock"; 85270864Simp #clock-cells = <0>; 86262569Simp clock-frequency = <32768>; 87262569Simp }; 88262569Simp 89262569Simp ckih1 { 90262569Simp compatible = "fsl,imx-ckih1", "fixed-clock"; 91270864Simp #clock-cells = <0>; 92262569Simp clock-frequency = <22579200>; 93262569Simp }; 94262569Simp 95262569Simp ckih2 { 96262569Simp compatible = "fsl,imx-ckih2", "fixed-clock"; 97270864Simp #clock-cells = <0>; 98262569Simp clock-frequency = <0>; 99262569Simp }; 100262569Simp 101262569Simp osc { 102262569Simp compatible = "fsl,imx-osc", "fixed-clock"; 103270864Simp #clock-cells = <0>; 104262569Simp clock-frequency = <24000000>; 105262569Simp }; 106262569Simp }; 107262569Simp 108262569Simp soc { 109262569Simp #address-cells = <1>; 110262569Simp #size-cells = <1>; 111262569Simp compatible = "simple-bus"; 112262569Simp interrupt-parent = <&tzic>; 113262569Simp ranges; 114262569Simp 115270864Simp sata: sata@10000000 { 116270864Simp compatible = "fsl,imx53-ahci"; 117270864Simp reg = <0x10000000 0x1000>; 118270864Simp interrupts = <28>; 119270864Simp clocks = <&clks IMX5_CLK_SATA_GATE>, 120270864Simp <&clks IMX5_CLK_SATA_REF>, 121270864Simp <&clks IMX5_CLK_AHB>; 122270864Simp clock-names = "sata", "sata_ref", "ahb"; 123270864Simp status = "disabled"; 124270864Simp }; 125270864Simp 126262569Simp ipu: ipu@18000000 { 127270864Simp #address-cells = <1>; 128270864Simp #size-cells = <0>; 129262569Simp compatible = "fsl,imx53-ipu"; 130270864Simp reg = <0x18000000 0x08000000>; 131262569Simp interrupts = <11 10>; 132270864Simp clocks = <&clks IMX5_CLK_IPU_GATE>, 133270864Simp <&clks IMX5_CLK_IPU_DI0_GATE>, 134270864Simp <&clks IMX5_CLK_IPU_DI1_GATE>; 135262569Simp clock-names = "bus", "di0", "di1"; 136262569Simp resets = <&src 2>; 137270864Simp 138270864Simp ipu_di0: port@2 { 139270864Simp #address-cells = <1>; 140270864Simp #size-cells = <0>; 141270864Simp reg = <2>; 142270864Simp 143270864Simp ipu_di0_disp0: endpoint@0 { 144270864Simp reg = <0>; 145270864Simp }; 146270864Simp 147270864Simp ipu_di0_lvds0: endpoint@1 { 148270864Simp reg = <1>; 149270864Simp remote-endpoint = <&lvds0_in>; 150270864Simp }; 151270864Simp }; 152270864Simp 153270864Simp ipu_di1: port@3 { 154270864Simp #address-cells = <1>; 155270864Simp #size-cells = <0>; 156270864Simp reg = <3>; 157270864Simp 158270864Simp ipu_di1_disp1: endpoint@0 { 159270864Simp reg = <0>; 160270864Simp }; 161270864Simp 162270864Simp ipu_di1_lvds1: endpoint@1 { 163270864Simp reg = <1>; 164270864Simp remote-endpoint = <&lvds1_in>; 165270864Simp }; 166270864Simp 167270864Simp ipu_di1_tve: endpoint@2 { 168270864Simp reg = <2>; 169270864Simp remote-endpoint = <&tve_in>; 170270864Simp }; 171270864Simp }; 172262569Simp }; 173262569Simp 174262569Simp aips@50000000 { /* AIPS1 */ 175262569Simp compatible = "fsl,aips-bus", "simple-bus"; 176262569Simp #address-cells = <1>; 177262569Simp #size-cells = <1>; 178262569Simp reg = <0x50000000 0x10000000>; 179262569Simp ranges; 180262569Simp 181262569Simp spba@50000000 { 182262569Simp compatible = "fsl,spba-bus", "simple-bus"; 183262569Simp #address-cells = <1>; 184262569Simp #size-cells = <1>; 185262569Simp reg = <0x50000000 0x40000>; 186262569Simp ranges; 187262569Simp 188262569Simp esdhc1: esdhc@50004000 { 189262569Simp compatible = "fsl,imx53-esdhc"; 190262569Simp reg = <0x50004000 0x4000>; 191262569Simp interrupts = <1>; 192270864Simp clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, 193270864Simp <&clks IMX5_CLK_DUMMY>, 194270864Simp <&clks IMX5_CLK_ESDHC1_PER_GATE>; 195262569Simp clock-names = "ipg", "ahb", "per"; 196262569Simp bus-width = <4>; 197262569Simp status = "disabled"; 198262569Simp }; 199262569Simp 200262569Simp esdhc2: esdhc@50008000 { 201262569Simp compatible = "fsl,imx53-esdhc"; 202262569Simp reg = <0x50008000 0x4000>; 203262569Simp interrupts = <2>; 204270864Simp clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, 205270864Simp <&clks IMX5_CLK_DUMMY>, 206270864Simp <&clks IMX5_CLK_ESDHC2_PER_GATE>; 207262569Simp clock-names = "ipg", "ahb", "per"; 208262569Simp bus-width = <4>; 209262569Simp status = "disabled"; 210262569Simp }; 211262569Simp 212262569Simp uart3: serial@5000c000 { 213262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 214262569Simp reg = <0x5000c000 0x4000>; 215262569Simp interrupts = <33>; 216270864Simp clocks = <&clks IMX5_CLK_UART3_IPG_GATE>, 217270864Simp <&clks IMX5_CLK_UART3_PER_GATE>; 218262569Simp clock-names = "ipg", "per"; 219262569Simp status = "disabled"; 220262569Simp }; 221262569Simp 222262569Simp ecspi1: ecspi@50010000 { 223262569Simp #address-cells = <1>; 224262569Simp #size-cells = <0>; 225262569Simp compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 226262569Simp reg = <0x50010000 0x4000>; 227262569Simp interrupts = <36>; 228270864Simp clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, 229270864Simp <&clks IMX5_CLK_ECSPI1_PER_GATE>; 230262569Simp clock-names = "ipg", "per"; 231262569Simp status = "disabled"; 232262569Simp }; 233262569Simp 234262569Simp ssi2: ssi@50014000 { 235284090Sian #sound-dai-cells = <0>; 236270864Simp compatible = "fsl,imx53-ssi", 237270864Simp "fsl,imx51-ssi", 238270864Simp "fsl,imx21-ssi"; 239262569Simp reg = <0x50014000 0x4000>; 240262569Simp interrupts = <30>; 241284090Sian clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>, 242284090Sian <&clks IMX5_CLK_SSI2_ROOT_GATE>; 243284090Sian clock-names = "ipg", "baud"; 244262569Simp dmas = <&sdma 24 1 0>, 245262569Simp <&sdma 25 1 0>; 246262569Simp dma-names = "rx", "tx"; 247262569Simp fsl,fifo-depth = <15>; 248262569Simp status = "disabled"; 249262569Simp }; 250262569Simp 251262569Simp esdhc3: esdhc@50020000 { 252262569Simp compatible = "fsl,imx53-esdhc"; 253262569Simp reg = <0x50020000 0x4000>; 254262569Simp interrupts = <3>; 255270864Simp clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>, 256270864Simp <&clks IMX5_CLK_DUMMY>, 257270864Simp <&clks IMX5_CLK_ESDHC3_PER_GATE>; 258262569Simp clock-names = "ipg", "ahb", "per"; 259262569Simp bus-width = <4>; 260262569Simp status = "disabled"; 261262569Simp }; 262262569Simp 263262569Simp esdhc4: esdhc@50024000 { 264262569Simp compatible = "fsl,imx53-esdhc"; 265262569Simp reg = <0x50024000 0x4000>; 266262569Simp interrupts = <4>; 267270864Simp clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>, 268270864Simp <&clks IMX5_CLK_DUMMY>, 269270864Simp <&clks IMX5_CLK_ESDHC4_PER_GATE>; 270262569Simp clock-names = "ipg", "ahb", "per"; 271262569Simp bus-width = <4>; 272262569Simp status = "disabled"; 273262569Simp }; 274262569Simp }; 275262569Simp 276270864Simp aipstz1: bridge@53f00000 { 277270864Simp compatible = "fsl,imx53-aipstz"; 278270864Simp reg = <0x53f00000 0x60>; 279270864Simp }; 280270864Simp 281262569Simp usbphy0: usbphy@0 { 282262569Simp compatible = "usb-nop-xceiv"; 283270864Simp clocks = <&clks IMX5_CLK_USB_PHY1_GATE>; 284262569Simp clock-names = "main_clk"; 285262569Simp status = "okay"; 286262569Simp }; 287262569Simp 288262569Simp usbphy1: usbphy@1 { 289262569Simp compatible = "usb-nop-xceiv"; 290270864Simp clocks = <&clks IMX5_CLK_USB_PHY2_GATE>; 291262569Simp clock-names = "main_clk"; 292262569Simp status = "okay"; 293262569Simp }; 294262569Simp 295262569Simp usbotg: usb@53f80000 { 296262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 297262569Simp reg = <0x53f80000 0x0200>; 298262569Simp interrupts = <18>; 299270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 300262569Simp fsl,usbmisc = <&usbmisc 0>; 301262569Simp fsl,usbphy = <&usbphy0>; 302262569Simp status = "disabled"; 303262569Simp }; 304262569Simp 305262569Simp usbh1: usb@53f80200 { 306262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 307262569Simp reg = <0x53f80200 0x0200>; 308262569Simp interrupts = <14>; 309270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 310262569Simp fsl,usbmisc = <&usbmisc 1>; 311262569Simp fsl,usbphy = <&usbphy1>; 312262569Simp status = "disabled"; 313262569Simp }; 314262569Simp 315262569Simp usbh2: usb@53f80400 { 316262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 317262569Simp reg = <0x53f80400 0x0200>; 318262569Simp interrupts = <16>; 319270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 320262569Simp fsl,usbmisc = <&usbmisc 2>; 321262569Simp status = "disabled"; 322262569Simp }; 323262569Simp 324262569Simp usbh3: usb@53f80600 { 325262569Simp compatible = "fsl,imx53-usb", "fsl,imx27-usb"; 326262569Simp reg = <0x53f80600 0x0200>; 327262569Simp interrupts = <17>; 328270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 329262569Simp fsl,usbmisc = <&usbmisc 3>; 330262569Simp status = "disabled"; 331262569Simp }; 332262569Simp 333262569Simp usbmisc: usbmisc@53f80800 { 334262569Simp #index-cells = <1>; 335262569Simp compatible = "fsl,imx53-usbmisc"; 336262569Simp reg = <0x53f80800 0x200>; 337270864Simp clocks = <&clks IMX5_CLK_USBOH3_GATE>; 338262569Simp }; 339262569Simp 340262569Simp gpio1: gpio@53f84000 { 341262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 342262569Simp reg = <0x53f84000 0x4000>; 343262569Simp interrupts = <50 51>; 344262569Simp gpio-controller; 345262569Simp #gpio-cells = <2>; 346262569Simp interrupt-controller; 347262569Simp #interrupt-cells = <2>; 348262569Simp }; 349262569Simp 350262569Simp gpio2: gpio@53f88000 { 351262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 352262569Simp reg = <0x53f88000 0x4000>; 353262569Simp interrupts = <52 53>; 354262569Simp gpio-controller; 355262569Simp #gpio-cells = <2>; 356262569Simp interrupt-controller; 357262569Simp #interrupt-cells = <2>; 358262569Simp }; 359262569Simp 360262569Simp gpio3: gpio@53f8c000 { 361262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 362262569Simp reg = <0x53f8c000 0x4000>; 363262569Simp interrupts = <54 55>; 364262569Simp gpio-controller; 365262569Simp #gpio-cells = <2>; 366262569Simp interrupt-controller; 367262569Simp #interrupt-cells = <2>; 368262569Simp }; 369262569Simp 370262569Simp gpio4: gpio@53f90000 { 371262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 372262569Simp reg = <0x53f90000 0x4000>; 373262569Simp interrupts = <56 57>; 374262569Simp gpio-controller; 375262569Simp #gpio-cells = <2>; 376262569Simp interrupt-controller; 377262569Simp #interrupt-cells = <2>; 378262569Simp }; 379262569Simp 380270864Simp kpp: kpp@53f94000 { 381270864Simp compatible = "fsl,imx53-kpp", "fsl,imx21-kpp"; 382270864Simp reg = <0x53f94000 0x4000>; 383270864Simp interrupts = <60>; 384270864Simp clocks = <&clks IMX5_CLK_DUMMY>; 385270864Simp status = "disabled"; 386270864Simp }; 387270864Simp 388262569Simp wdog1: wdog@53f98000 { 389262569Simp compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 390262569Simp reg = <0x53f98000 0x4000>; 391262569Simp interrupts = <58>; 392270864Simp clocks = <&clks IMX5_CLK_DUMMY>; 393262569Simp }; 394262569Simp 395262569Simp wdog2: wdog@53f9c000 { 396262569Simp compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; 397262569Simp reg = <0x53f9c000 0x4000>; 398262569Simp interrupts = <59>; 399270864Simp clocks = <&clks IMX5_CLK_DUMMY>; 400262569Simp status = "disabled"; 401262569Simp }; 402262569Simp 403262569Simp gpt: timer@53fa0000 { 404262569Simp compatible = "fsl,imx53-gpt", "fsl,imx31-gpt"; 405262569Simp reg = <0x53fa0000 0x4000>; 406262569Simp interrupts = <39>; 407270864Simp clocks = <&clks IMX5_CLK_GPT_IPG_GATE>, 408270864Simp <&clks IMX5_CLK_GPT_HF_GATE>; 409262569Simp clock-names = "ipg", "per"; 410262569Simp }; 411262569Simp 412262569Simp iomuxc: iomuxc@53fa8000 { 413262569Simp compatible = "fsl,imx53-iomuxc"; 414262569Simp reg = <0x53fa8000 0x4000>; 415262569Simp }; 416262569Simp 417262569Simp gpr: iomuxc-gpr@53fa8000 { 418262569Simp compatible = "fsl,imx53-iomuxc-gpr", "syscon"; 419262569Simp reg = <0x53fa8000 0xc>; 420262569Simp }; 421262569Simp 422262569Simp ldb: ldb@53fa8008 { 423262569Simp #address-cells = <1>; 424262569Simp #size-cells = <0>; 425262569Simp compatible = "fsl,imx53-ldb"; 426262569Simp reg = <0x53fa8008 0x4>; 427262569Simp gpr = <&gpr>; 428270864Simp clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, 429270864Simp <&clks IMX5_CLK_LDB_DI1_SEL>, 430270864Simp <&clks IMX5_CLK_IPU_DI0_SEL>, 431270864Simp <&clks IMX5_CLK_IPU_DI1_SEL>, 432270864Simp <&clks IMX5_CLK_LDB_DI0_GATE>, 433270864Simp <&clks IMX5_CLK_LDB_DI1_GATE>; 434262569Simp clock-names = "di0_pll", "di1_pll", 435262569Simp "di0_sel", "di1_sel", 436262569Simp "di0", "di1"; 437262569Simp status = "disabled"; 438262569Simp 439262569Simp lvds-channel@0 { 440284090Sian #address-cells = <1>; 441284090Sian #size-cells = <0>; 442262569Simp reg = <0>; 443262569Simp status = "disabled"; 444270864Simp 445284090Sian port@0 { 446284090Sian reg = <0>; 447284090Sian 448270864Simp lvds0_in: endpoint { 449270864Simp remote-endpoint = <&ipu_di0_lvds0>; 450270864Simp }; 451270864Simp }; 452262569Simp }; 453262569Simp 454262569Simp lvds-channel@1 { 455284090Sian #address-cells = <1>; 456284090Sian #size-cells = <0>; 457262569Simp reg = <1>; 458262569Simp status = "disabled"; 459270864Simp 460284090Sian port@1 { 461284090Sian reg = <1>; 462284090Sian 463270864Simp lvds1_in: endpoint { 464270864Simp remote-endpoint = <&ipu_di1_lvds1>; 465270864Simp }; 466270864Simp }; 467262569Simp }; 468262569Simp }; 469262569Simp 470262569Simp pwm1: pwm@53fb4000 { 471262569Simp #pwm-cells = <2>; 472262569Simp compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; 473262569Simp reg = <0x53fb4000 0x4000>; 474270864Simp clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, 475270864Simp <&clks IMX5_CLK_PWM1_HF_GATE>; 476262569Simp clock-names = "ipg", "per"; 477262569Simp interrupts = <61>; 478262569Simp }; 479262569Simp 480262569Simp pwm2: pwm@53fb8000 { 481262569Simp #pwm-cells = <2>; 482262569Simp compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; 483262569Simp reg = <0x53fb8000 0x4000>; 484270864Simp clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>, 485270864Simp <&clks IMX5_CLK_PWM2_HF_GATE>; 486262569Simp clock-names = "ipg", "per"; 487262569Simp interrupts = <94>; 488262569Simp }; 489262569Simp 490262569Simp uart1: serial@53fbc000 { 491262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 492262569Simp reg = <0x53fbc000 0x4000>; 493262569Simp interrupts = <31>; 494270864Simp clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, 495270864Simp <&clks IMX5_CLK_UART1_PER_GATE>; 496262569Simp clock-names = "ipg", "per"; 497262569Simp status = "disabled"; 498262569Simp }; 499262569Simp 500262569Simp uart2: serial@53fc0000 { 501262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 502262569Simp reg = <0x53fc0000 0x4000>; 503262569Simp interrupts = <32>; 504270864Simp clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, 505270864Simp <&clks IMX5_CLK_UART2_PER_GATE>; 506262569Simp clock-names = "ipg", "per"; 507262569Simp status = "disabled"; 508262569Simp }; 509262569Simp 510262569Simp can1: can@53fc8000 { 511262569Simp compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 512262569Simp reg = <0x53fc8000 0x4000>; 513262569Simp interrupts = <82>; 514270864Simp clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, 515270864Simp <&clks IMX5_CLK_CAN1_SERIAL_GATE>; 516262569Simp clock-names = "ipg", "per"; 517262569Simp status = "disabled"; 518262569Simp }; 519262569Simp 520262569Simp can2: can@53fcc000 { 521262569Simp compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 522262569Simp reg = <0x53fcc000 0x4000>; 523262569Simp interrupts = <83>; 524270864Simp clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>, 525270864Simp <&clks IMX5_CLK_CAN2_SERIAL_GATE>; 526262569Simp clock-names = "ipg", "per"; 527262569Simp status = "disabled"; 528262569Simp }; 529262569Simp 530262569Simp src: src@53fd0000 { 531262569Simp compatible = "fsl,imx53-src", "fsl,imx51-src"; 532262569Simp reg = <0x53fd0000 0x4000>; 533262569Simp #reset-cells = <1>; 534262569Simp }; 535262569Simp 536262569Simp clks: ccm@53fd4000{ 537262569Simp compatible = "fsl,imx53-ccm"; 538262569Simp reg = <0x53fd4000 0x4000>; 539262569Simp interrupts = <0 71 0x04 0 72 0x04>; 540262569Simp #clock-cells = <1>; 541262569Simp }; 542262569Simp 543262569Simp gpio5: gpio@53fdc000 { 544262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 545262569Simp reg = <0x53fdc000 0x4000>; 546262569Simp interrupts = <103 104>; 547262569Simp gpio-controller; 548262569Simp #gpio-cells = <2>; 549262569Simp interrupt-controller; 550262569Simp #interrupt-cells = <2>; 551262569Simp }; 552262569Simp 553262569Simp gpio6: gpio@53fe0000 { 554262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 555262569Simp reg = <0x53fe0000 0x4000>; 556262569Simp interrupts = <105 106>; 557262569Simp gpio-controller; 558262569Simp #gpio-cells = <2>; 559262569Simp interrupt-controller; 560262569Simp #interrupt-cells = <2>; 561262569Simp }; 562262569Simp 563262569Simp gpio7: gpio@53fe4000 { 564262569Simp compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; 565262569Simp reg = <0x53fe4000 0x4000>; 566262569Simp interrupts = <107 108>; 567262569Simp gpio-controller; 568262569Simp #gpio-cells = <2>; 569262569Simp interrupt-controller; 570262569Simp #interrupt-cells = <2>; 571262569Simp }; 572262569Simp 573262569Simp i2c3: i2c@53fec000 { 574262569Simp #address-cells = <1>; 575262569Simp #size-cells = <0>; 576262569Simp compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 577262569Simp reg = <0x53fec000 0x4000>; 578262569Simp interrupts = <64>; 579270864Simp clocks = <&clks IMX5_CLK_I2C3_GATE>; 580262569Simp status = "disabled"; 581262569Simp }; 582262569Simp 583262569Simp uart4: serial@53ff0000 { 584262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 585262569Simp reg = <0x53ff0000 0x4000>; 586262569Simp interrupts = <13>; 587270864Simp clocks = <&clks IMX5_CLK_UART4_IPG_GATE>, 588270864Simp <&clks IMX5_CLK_UART4_PER_GATE>; 589262569Simp clock-names = "ipg", "per"; 590262569Simp status = "disabled"; 591262569Simp }; 592262569Simp }; 593262569Simp 594262569Simp aips@60000000 { /* AIPS2 */ 595262569Simp compatible = "fsl,aips-bus", "simple-bus"; 596262569Simp #address-cells = <1>; 597262569Simp #size-cells = <1>; 598262569Simp reg = <0x60000000 0x10000000>; 599262569Simp ranges; 600262569Simp 601270864Simp aipstz2: bridge@63f00000 { 602270864Simp compatible = "fsl,imx53-aipstz"; 603270864Simp reg = <0x63f00000 0x60>; 604270864Simp }; 605270864Simp 606262569Simp iim: iim@63f98000 { 607262569Simp compatible = "fsl,imx53-iim", "fsl,imx27-iim"; 608262569Simp reg = <0x63f98000 0x4000>; 609262569Simp interrupts = <69>; 610270864Simp clocks = <&clks IMX5_CLK_IIM_GATE>; 611262569Simp }; 612262569Simp 613262569Simp uart5: serial@63f90000 { 614262569Simp compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 615262569Simp reg = <0x63f90000 0x4000>; 616262569Simp interrupts = <86>; 617270864Simp clocks = <&clks IMX5_CLK_UART5_IPG_GATE>, 618270864Simp <&clks IMX5_CLK_UART5_PER_GATE>; 619262569Simp clock-names = "ipg", "per"; 620262569Simp status = "disabled"; 621262569Simp }; 622262569Simp 623262569Simp owire: owire@63fa4000 { 624262569Simp compatible = "fsl,imx53-owire", "fsl,imx21-owire"; 625262569Simp reg = <0x63fa4000 0x4000>; 626270864Simp clocks = <&clks IMX5_CLK_OWIRE_GATE>; 627262569Simp status = "disabled"; 628262569Simp }; 629262569Simp 630262569Simp ecspi2: ecspi@63fac000 { 631262569Simp #address-cells = <1>; 632262569Simp #size-cells = <0>; 633262569Simp compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; 634262569Simp reg = <0x63fac000 0x4000>; 635262569Simp interrupts = <37>; 636270864Simp clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, 637270864Simp <&clks IMX5_CLK_ECSPI2_PER_GATE>; 638262569Simp clock-names = "ipg", "per"; 639262569Simp status = "disabled"; 640262569Simp }; 641262569Simp 642262569Simp sdma: sdma@63fb0000 { 643262569Simp compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; 644262569Simp reg = <0x63fb0000 0x4000>; 645262569Simp interrupts = <6>; 646270864Simp clocks = <&clks IMX5_CLK_SDMA_GATE>, 647270864Simp <&clks IMX5_CLK_SDMA_GATE>; 648262569Simp clock-names = "ipg", "ahb"; 649262569Simp #dma-cells = <3>; 650262569Simp fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; 651262569Simp }; 652262569Simp 653262569Simp cspi: cspi@63fc0000 { 654262569Simp #address-cells = <1>; 655262569Simp #size-cells = <0>; 656262569Simp compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; 657262569Simp reg = <0x63fc0000 0x4000>; 658262569Simp interrupts = <38>; 659270864Simp clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>, 660270864Simp <&clks IMX5_CLK_CSPI_IPG_GATE>; 661262569Simp clock-names = "ipg", "per"; 662262569Simp status = "disabled"; 663262569Simp }; 664262569Simp 665262569Simp i2c2: i2c@63fc4000 { 666262569Simp #address-cells = <1>; 667262569Simp #size-cells = <0>; 668262569Simp compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 669262569Simp reg = <0x63fc4000 0x4000>; 670262569Simp interrupts = <63>; 671270864Simp clocks = <&clks IMX5_CLK_I2C2_GATE>; 672262569Simp status = "disabled"; 673262569Simp }; 674262569Simp 675262569Simp i2c1: i2c@63fc8000 { 676262569Simp #address-cells = <1>; 677262569Simp #size-cells = <0>; 678262569Simp compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; 679262569Simp reg = <0x63fc8000 0x4000>; 680262569Simp interrupts = <62>; 681270864Simp clocks = <&clks IMX5_CLK_I2C1_GATE>; 682262569Simp status = "disabled"; 683262569Simp }; 684262569Simp 685262569Simp ssi1: ssi@63fcc000 { 686284090Sian #sound-dai-cells = <0>; 687270864Simp compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", 688270864Simp "fsl,imx21-ssi"; 689262569Simp reg = <0x63fcc000 0x4000>; 690262569Simp interrupts = <29>; 691284090Sian clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>, 692284090Sian <&clks IMX5_CLK_SSI1_ROOT_GATE>; 693284090Sian clock-names = "ipg", "baud"; 694262569Simp dmas = <&sdma 28 0 0>, 695262569Simp <&sdma 29 0 0>; 696262569Simp dma-names = "rx", "tx"; 697262569Simp fsl,fifo-depth = <15>; 698262569Simp status = "disabled"; 699262569Simp }; 700262569Simp 701262569Simp audmux: audmux@63fd0000 { 702262569Simp compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; 703262569Simp reg = <0x63fd0000 0x4000>; 704262569Simp status = "disabled"; 705262569Simp }; 706262569Simp 707262569Simp nfc: nand@63fdb000 { 708262569Simp compatible = "fsl,imx53-nand"; 709262569Simp reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; 710262569Simp interrupts = <8>; 711270864Simp clocks = <&clks IMX5_CLK_NFC_GATE>; 712262569Simp status = "disabled"; 713262569Simp }; 714262569Simp 715262569Simp ssi3: ssi@63fe8000 { 716284090Sian #sound-dai-cells = <0>; 717270864Simp compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", 718270864Simp "fsl,imx21-ssi"; 719262569Simp reg = <0x63fe8000 0x4000>; 720262569Simp interrupts = <96>; 721284090Sian clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>, 722284090Sian <&clks IMX5_CLK_SSI3_ROOT_GATE>; 723284090Sian clock-names = "ipg", "baud"; 724262569Simp dmas = <&sdma 46 0 0>, 725262569Simp <&sdma 47 0 0>; 726262569Simp dma-names = "rx", "tx"; 727262569Simp fsl,fifo-depth = <15>; 728262569Simp status = "disabled"; 729262569Simp }; 730262569Simp 731262569Simp fec: ethernet@63fec000 { 732262569Simp compatible = "fsl,imx53-fec", "fsl,imx25-fec"; 733262569Simp reg = <0x63fec000 0x4000>; 734262569Simp interrupts = <87>; 735270864Simp clocks = <&clks IMX5_CLK_FEC_GATE>, 736270864Simp <&clks IMX5_CLK_FEC_GATE>, 737270864Simp <&clks IMX5_CLK_FEC_GATE>; 738262569Simp clock-names = "ipg", "ahb", "ptp"; 739262569Simp status = "disabled"; 740262569Simp }; 741262569Simp 742262569Simp tve: tve@63ff0000 { 743262569Simp compatible = "fsl,imx53-tve"; 744262569Simp reg = <0x63ff0000 0x1000>; 745262569Simp interrupts = <92>; 746270864Simp clocks = <&clks IMX5_CLK_TVE_GATE>, 747270864Simp <&clks IMX5_CLK_IPU_DI1_SEL>; 748262569Simp clock-names = "tve", "di_sel"; 749262569Simp status = "disabled"; 750270864Simp 751270864Simp port { 752270864Simp tve_in: endpoint { 753270864Simp remote-endpoint = <&ipu_di1_tve>; 754270864Simp }; 755270864Simp }; 756262569Simp }; 757262569Simp 758262569Simp vpu: vpu@63ff4000 { 759284090Sian compatible = "fsl,imx53-vpu", "cnm,coda7541"; 760262569Simp reg = <0x63ff4000 0x1000>; 761262569Simp interrupts = <9>; 762270864Simp clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>, 763270864Simp <&clks IMX5_CLK_VPU_GATE>; 764262569Simp clock-names = "per", "ahb"; 765270864Simp resets = <&src 1>; 766262569Simp iram = <&ocram>; 767262569Simp }; 768284090Sian 769284090Sian sahara: crypto@63ff8000 { 770284090Sian compatible = "fsl,imx53-sahara"; 771284090Sian reg = <0x63ff8000 0x4000>; 772284090Sian interrupts = <19 20>; 773284090Sian clocks = <&clks IMX5_CLK_SAHARA_IPG_GATE>, 774284090Sian <&clks IMX5_CLK_SAHARA_IPG_GATE>; 775284090Sian clock-names = "ipg", "ahb"; 776284090Sian }; 777262569Simp }; 778262569Simp 779262569Simp ocram: sram@f8000000 { 780262569Simp compatible = "mmio-sram"; 781262569Simp reg = <0xf8000000 0x20000>; 782270864Simp clocks = <&clks IMX5_CLK_OCRAM>; 783262569Simp }; 784284090Sian 785284090Sian pmu { 786284090Sian compatible = "arm,cortex-a8-pmu"; 787284090Sian interrupts = <77>; 788284090Sian }; 789262569Simp }; 790262569Simp}; 791