1270866Simp/* 2270866Simp * Copyright 2011 Freescale Semiconductor, Inc. 3270866Simp * Copyright 2011 Linaro Ltd. 4270866Simp * 5270866Simp * The code contained herein is licensed under the GNU General Public 6270866Simp * License. You may obtain a copy of the GNU General Public License 7270866Simp * Version 2 or later at the following locations: 8270866Simp * 9270866Simp * http://www.opensource.org/licenses/gpl-license.html 10270866Simp * http://www.gnu.org/copyleft/gpl.html 11270866Simp */ 12270866Simp 13270866Simp#include "imx53.dtsi" 14270866Simp 15270866Simp/ { 16270866Simp chosen { 17270866Simp stdout-path = &uart1; 18270866Simp }; 19270866Simp 20270866Simp memory { 21270866Simp reg = <0x70000000 0x20000000>, 22270866Simp <0xb0000000 0x20000000>; 23270866Simp }; 24270866Simp 25270866Simp display0: display@di0 { 26270866Simp compatible = "fsl,imx-parallel-display"; 27270866Simp interface-pix-fmt = "rgb565"; 28270866Simp pinctrl-names = "default"; 29270866Simp pinctrl-0 = <&pinctrl_ipu_disp0>; 30270866Simp status = "disabled"; 31270866Simp display-timings { 32270866Simp claawvga { 33270866Simp native-mode; 34270866Simp clock-frequency = <27000000>; 35270866Simp hactive = <800>; 36270866Simp vactive = <480>; 37270866Simp hback-porch = <40>; 38270866Simp hfront-porch = <60>; 39270866Simp vback-porch = <10>; 40270866Simp vfront-porch = <10>; 41270866Simp hsync-len = <20>; 42270866Simp vsync-len = <10>; 43270866Simp hsync-active = <0>; 44270866Simp vsync-active = <0>; 45270866Simp de-active = <1>; 46270866Simp pixelclk-active = <0>; 47270866Simp }; 48270866Simp }; 49270866Simp 50270866Simp port { 51270866Simp display0_in: endpoint { 52270866Simp remote-endpoint = <&ipu_di0_disp0>; 53270866Simp }; 54270866Simp }; 55270866Simp }; 56270866Simp 57270866Simp gpio-keys { 58270866Simp compatible = "gpio-keys"; 59270866Simp 60270866Simp power { 61270866Simp label = "Power Button"; 62270866Simp gpios = <&gpio1 8 0>; 63270866Simp linux,code = <116>; /* KEY_POWER */ 64270866Simp }; 65270866Simp 66270866Simp volume-up { 67270866Simp label = "Volume Up"; 68270866Simp gpios = <&gpio2 14 0>; 69270866Simp linux,code = <115>; /* KEY_VOLUMEUP */ 70270866Simp gpio-key,wakeup; 71270866Simp }; 72270866Simp 73270866Simp volume-down { 74270866Simp label = "Volume Down"; 75270866Simp gpios = <&gpio2 15 0>; 76270866Simp linux,code = <114>; /* KEY_VOLUMEDOWN */ 77270866Simp gpio-key,wakeup; 78270866Simp }; 79270866Simp }; 80270866Simp 81270866Simp leds { 82270866Simp compatible = "gpio-leds"; 83270866Simp pinctrl-names = "default"; 84270866Simp pinctrl-0 = <&led_pin_gpio7_7>; 85270866Simp 86270866Simp user { 87270866Simp label = "Heartbeat"; 88270866Simp gpios = <&gpio7 7 0>; 89270866Simp linux,default-trigger = "heartbeat"; 90270866Simp }; 91270866Simp }; 92270866Simp 93270866Simp regulators { 94270866Simp compatible = "simple-bus"; 95270866Simp #address-cells = <1>; 96270866Simp #size-cells = <0>; 97270866Simp 98270866Simp reg_3p2v: regulator@0 { 99270866Simp compatible = "regulator-fixed"; 100270866Simp reg = <0>; 101270866Simp regulator-name = "3P2V"; 102270866Simp regulator-min-microvolt = <3200000>; 103270866Simp regulator-max-microvolt = <3200000>; 104270866Simp regulator-always-on; 105270866Simp }; 106270866Simp 107270866Simp reg_usb_vbus: regulator@1 { 108270866Simp compatible = "regulator-fixed"; 109270866Simp reg = <1>; 110270866Simp regulator-name = "usb_vbus"; 111270866Simp regulator-min-microvolt = <5000000>; 112270866Simp regulator-max-microvolt = <5000000>; 113270866Simp gpio = <&gpio7 8 0>; 114270866Simp enable-active-high; 115270866Simp }; 116270866Simp }; 117270866Simp 118270866Simp sound { 119270866Simp compatible = "fsl,imx53-qsb-sgtl5000", 120270866Simp "fsl,imx-audio-sgtl5000"; 121270866Simp model = "imx53-qsb-sgtl5000"; 122270866Simp ssi-controller = <&ssi2>; 123270866Simp audio-codec = <&sgtl5000>; 124270866Simp audio-routing = 125270866Simp "MIC_IN", "Mic Jack", 126270866Simp "Mic Jack", "Mic Bias", 127270866Simp "Headphone Jack", "HP_OUT"; 128270866Simp mux-int-port = <2>; 129270866Simp mux-ext-port = <5>; 130270866Simp }; 131270866Simp}; 132270866Simp 133270866Simp&esdhc1 { 134270866Simp pinctrl-names = "default"; 135270866Simp pinctrl-0 = <&pinctrl_esdhc1>; 136270866Simp status = "okay"; 137270866Simp}; 138270866Simp 139270866Simp&ipu_di0_disp0 { 140270866Simp remote-endpoint = <&display0_in>; 141270866Simp}; 142270866Simp 143270866Simp&ssi2 { 144270866Simp status = "okay"; 145270866Simp}; 146270866Simp 147270866Simp&esdhc3 { 148270866Simp pinctrl-names = "default"; 149270866Simp pinctrl-0 = <&pinctrl_esdhc3>; 150270866Simp cd-gpios = <&gpio3 11 0>; 151270866Simp wp-gpios = <&gpio3 12 0>; 152270866Simp bus-width = <8>; 153270866Simp status = "okay"; 154270866Simp}; 155270866Simp 156270866Simp&iomuxc { 157270866Simp pinctrl-names = "default"; 158270866Simp pinctrl-0 = <&pinctrl_hog>; 159270866Simp 160270866Simp imx53-qsb { 161270866Simp pinctrl_hog: hoggrp { 162270866Simp fsl,pins = < 163270866Simp MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK 0x80000000 164270866Simp MX53_PAD_GPIO_8__GPIO1_8 0x80000000 165270866Simp MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 166270866Simp MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 167270866Simp MX53_PAD_EIM_DA11__GPIO3_11 0x80000000 168270866Simp MX53_PAD_EIM_DA12__GPIO3_12 0x80000000 169270866Simp MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 170270866Simp MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 171270866Simp MX53_PAD_GPIO_16__GPIO7_11 0x80000000 172270866Simp >; 173270866Simp }; 174270866Simp 175270866Simp led_pin_gpio7_7: led_gpio7_7@0 { 176270866Simp fsl,pins = < 177270866Simp MX53_PAD_PATA_DA_1__GPIO7_7 0x80000000 178270866Simp >; 179270866Simp }; 180270866Simp 181270866Simp pinctrl_audmux: audmuxgrp { 182270866Simp fsl,pins = < 183270866Simp MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC 0x80000000 184270866Simp MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD 0x80000000 185270866Simp MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS 0x80000000 186270866Simp MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD 0x80000000 187270866Simp >; 188270866Simp }; 189270866Simp 190270866Simp pinctrl_esdhc1: esdhc1grp { 191270866Simp fsl,pins = < 192270866Simp MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 193270866Simp MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 194270866Simp MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 195270866Simp MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 196270866Simp MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 197270866Simp MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 198270866Simp >; 199270866Simp }; 200270866Simp 201270866Simp pinctrl_esdhc3: esdhc3grp { 202270866Simp fsl,pins = < 203270866Simp MX53_PAD_PATA_DATA8__ESDHC3_DAT0 0x1d5 204270866Simp MX53_PAD_PATA_DATA9__ESDHC3_DAT1 0x1d5 205270866Simp MX53_PAD_PATA_DATA10__ESDHC3_DAT2 0x1d5 206270866Simp MX53_PAD_PATA_DATA11__ESDHC3_DAT3 0x1d5 207270866Simp MX53_PAD_PATA_DATA0__ESDHC3_DAT4 0x1d5 208270866Simp MX53_PAD_PATA_DATA1__ESDHC3_DAT5 0x1d5 209270866Simp MX53_PAD_PATA_DATA2__ESDHC3_DAT6 0x1d5 210270866Simp MX53_PAD_PATA_DATA3__ESDHC3_DAT7 0x1d5 211270866Simp MX53_PAD_PATA_RESET_B__ESDHC3_CMD 0x1d5 212270866Simp MX53_PAD_PATA_IORDY__ESDHC3_CLK 0x1d5 213270866Simp >; 214270866Simp }; 215270866Simp 216270866Simp pinctrl_fec: fecgrp { 217270866Simp fsl,pins = < 218270866Simp MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 219270866Simp MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 220270866Simp MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 221270866Simp MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 222270866Simp MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 223270866Simp MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 224270866Simp MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 225270866Simp MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 226270866Simp MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 227270866Simp MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 228270866Simp >; 229270866Simp }; 230270866Simp 231270866Simp pinctrl_i2c1: i2c1grp { 232270866Simp fsl,pins = < 233270866Simp MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000 234270866Simp MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000 235270866Simp >; 236270866Simp }; 237270866Simp 238270866Simp pinctrl_i2c2: i2c2grp { 239270866Simp fsl,pins = < 240270866Simp MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 241270866Simp MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 242270866Simp >; 243270866Simp }; 244270866Simp 245270866Simp pinctrl_ipu_disp0: ipudisp0grp { 246270866Simp fsl,pins = < 247270866Simp MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK 0x5 248270866Simp MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5 249270866Simp MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5 250270866Simp MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5 251270866Simp MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5 252270866Simp MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5 253270866Simp MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5 254270866Simp MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5 255270866Simp MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5 256270866Simp MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5 257270866Simp MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5 258270866Simp MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 0x5 259270866Simp MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 0x5 260270866Simp MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 0x5 261270866Simp MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 0x5 262270866Simp MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 0x5 263270866Simp MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 0x5 264270866Simp MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 0x5 265270866Simp MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 0x5 266270866Simp MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 0x5 267270866Simp MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 0x5 268270866Simp MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 0x5 269270866Simp MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 0x5 270270866Simp MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 0x5 271270866Simp MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 0x5 272270866Simp MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 0x5 273270866Simp MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 0x5 274270866Simp MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 0x5 275270866Simp >; 276270866Simp }; 277270866Simp 278270866Simp pinctrl_vga_sync: vgasync-grp { 279270866Simp fsl,pins = < 280270866Simp /* VGA_HSYNC, VSYNC with max drive strength */ 281270866Simp MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6 282270866Simp MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6 283270866Simp >; 284270866Simp }; 285270866Simp 286270866Simp pinctrl_uart1: uart1grp { 287270866Simp fsl,pins = < 288270866Simp MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4 289270866Simp MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4 290270866Simp >; 291270866Simp }; 292270866Simp }; 293270866Simp}; 294270866Simp 295270866Simp&tve { 296270866Simp pinctrl-names = "default"; 297270866Simp pinctrl-0 = <&pinctrl_vga_sync>; 298270866Simp fsl,tve-mode = "vga"; 299270866Simp fsl,hsync-pin = <4>; 300270866Simp fsl,vsync-pin = <6>; 301270866Simp status = "okay"; 302270866Simp}; 303270866Simp 304270866Simp&uart1 { 305270866Simp pinctrl-names = "default"; 306270866Simp pinctrl-0 = <&pinctrl_uart1>; 307270866Simp status = "okay"; 308270866Simp}; 309270866Simp 310270866Simp&i2c2 { 311270866Simp pinctrl-names = "default"; 312270866Simp pinctrl-0 = <&pinctrl_i2c2>; 313270866Simp status = "okay"; 314270866Simp 315270866Simp sgtl5000: codec@0a { 316270866Simp compatible = "fsl,sgtl5000"; 317270866Simp reg = <0x0a>; 318270866Simp VDDA-supply = <®_3p2v>; 319270866Simp VDDIO-supply = <®_3p2v>; 320270866Simp clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>; 321270866Simp }; 322270866Simp}; 323270866Simp 324270866Simp&i2c1 { 325270866Simp pinctrl-names = "default"; 326270866Simp pinctrl-0 = <&pinctrl_i2c1>; 327270866Simp status = "okay"; 328270866Simp 329270866Simp accelerometer: mma8450@1c { 330270866Simp compatible = "fsl,mma8450"; 331270866Simp reg = <0x1c>; 332270866Simp }; 333270866Simp}; 334270866Simp 335270866Simp&audmux { 336270866Simp pinctrl-names = "default"; 337270866Simp pinctrl-0 = <&pinctrl_audmux>; 338270866Simp status = "okay"; 339270866Simp}; 340270866Simp 341270866Simp&fec { 342270866Simp pinctrl-names = "default"; 343270866Simp pinctrl-0 = <&pinctrl_fec>; 344270866Simp phy-mode = "rmii"; 345270866Simp phy-reset-gpios = <&gpio7 6 0>; 346270866Simp status = "okay"; 347270866Simp}; 348270866Simp 349270866Simp&sata { 350270866Simp status = "okay"; 351270866Simp}; 352270866Simp 353270866Simp&vpu { 354270866Simp status = "okay"; 355270866Simp}; 356270866Simp 357270866Simp&usbh1 { 358270866Simp vbus-supply = <®_usb_vbus>; 359270866Simp phy_type = "utmi"; 360270866Simp status = "okay"; 361270866Simp}; 362270866Simp 363270866Simp&usbotg { 364270866Simp dr_mode = "peripheral"; 365270866Simp status = "okay"; 366270866Simp}; 367