imx53-mba53.dts revision 270864
1262569Simp/* 2262569Simp * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix 3262569Simp * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix 4262569Simp * 5262569Simp * The code contained herein is licensed under the GNU General Public 6262569Simp * License. You may obtain a copy of the GNU General Public License 7262569Simp * Version 2 or later at the following locations: 8262569Simp * 9262569Simp * http://www.opensource.org/licenses/gpl-license.html 10262569Simp * http://www.gnu.org/copyleft/gpl.html 11262569Simp */ 12262569Simp 13262569Simp/dts-v1/; 14262569Simp#include "imx53-tqma53.dtsi" 15262569Simp 16262569Simp/ { 17262569Simp model = "TQ MBa53 starter kit"; 18262569Simp compatible = "tq,mba53", "tq,tqma53", "fsl,imx53"; 19262569Simp 20262569Simp chosen { 21262569Simp stdout-path = &uart2; 22262569Simp }; 23262569Simp 24262569Simp backlight { 25262569Simp compatible = "pwm-backlight"; 26262569Simp pwms = <&pwm2 0 50000>; 27262569Simp brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>; 28262569Simp default-brightness-level = <10>; 29262569Simp enable-gpios = <&gpio7 7 0>; 30262569Simp power-supply = <®_backlight>; 31262569Simp }; 32262569Simp 33262569Simp disp1: display@disp1 { 34262569Simp compatible = "fsl,imx-parallel-display"; 35262569Simp pinctrl-names = "default"; 36262569Simp pinctrl-0 = <&pinctrl_disp1_1>; 37262569Simp interface-pix-fmt = "rgb24"; 38262569Simp status = "disabled"; 39262569Simp 40262569Simp port { 41262569Simp display1_in: endpoint { 42262569Simp remote-endpoint = <&ipu_di1_disp1>; 43262569Simp }; 44262569Simp }; 45262569Simp }; 46262569Simp 47262569Simp regulators { 48262569Simp compatible = "simple-bus"; 49262569Simp #address-cells = <1>; 50262569Simp #size-cells = <0>; 51262569Simp 52262569Simp reg_backlight: regulator@0 { 53262569Simp compatible = "regulator-fixed"; 54262569Simp reg = <0>; 55262569Simp regulator-name = "lcd-supply"; 56262569Simp gpio = <&gpio2 5 0>; 57262569Simp startup-delay-us = <5000>; 58262569Simp }; 59262569Simp 60262569Simp reg_3p2v: regulator@1 { 61262569Simp compatible = "regulator-fixed"; 62262569Simp reg = <1>; 63262569Simp regulator-name = "3P2V"; 64262569Simp regulator-min-microvolt = <3200000>; 65262569Simp regulator-max-microvolt = <3200000>; 66262569Simp regulator-always-on; 67262569Simp }; 68262569Simp }; 69262569Simp 70262569Simp sound { 71262569Simp compatible = "tq,imx53-mba53-sgtl5000", 72262569Simp "fsl,imx-audio-sgtl5000"; 73262569Simp model = "imx53-mba53-sgtl5000"; 74262569Simp ssi-controller = <&ssi2>; 75262569Simp audio-codec = <&codec>; 76262569Simp audio-routing = 77262569Simp "MIC_IN", "Mic Jack", 78262569Simp "Mic Jack", "Mic Bias", 79262569Simp "Headphone Jack", "HP_OUT"; 80262569Simp mux-int-port = <2>; 81262569Simp mux-ext-port = <5>; 82262569Simp }; 83262569Simp}; 84262569Simp 85262569Simp&ldb { 86262569Simp pinctrl-names = "default"; 87262569Simp pinctrl-0 = <&pinctrl_lvds1_1>; 88262569Simp status = "disabled"; 89262569Simp}; 90262569Simp 91262569Simp&iomuxc { 92262569Simp lvds1 { 93262569Simp pinctrl_lvds1_1: lvds1-grp1 { 94262569Simp fsl,pins = < 95262569Simp MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 96262569Simp MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 97262569Simp MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 98262569Simp MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 99262569Simp MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 100262569Simp >; 101262569Simp }; 102262569Simp 103262569Simp pinctrl_lvds1_2: lvds1-grp2 { 104262569Simp fsl,pins = < 105262569Simp MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000 106262569Simp MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000 107262569Simp MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000 108262569Simp MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000 109262569Simp MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000 110262569Simp >; 111262569Simp }; 112262569Simp }; 113262569Simp 114262569Simp disp1 { 115262569Simp pinctrl_disp1_1: disp1-grp1 { 116262569Simp fsl,pins = < 117262569Simp MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */ 118262569Simp MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x80000000 /* DISP1_DRDY */ 119262569Simp MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x80000000 /* DISP1_HSYNC */ 120262569Simp MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x80000000 /* DISP1_VSYNC */ 121262569Simp MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000 122262569Simp MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000 123262569Simp MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000 124262569Simp MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000 125262569Simp MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000 126262569Simp MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000 127262569Simp MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000 128262569Simp MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000 129262569Simp MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000 130262569Simp MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000 131262569Simp MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000 132262569Simp MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000 133262569Simp MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000 134262569Simp MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000 135262569Simp MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x80000000 136262569Simp MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x80000000 137262569Simp MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x80000000 138262569Simp MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x80000000 139262569Simp MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x80000000 140262569Simp MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x80000000 141262569Simp MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x80000000 142262569Simp MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x80000000 143262569Simp MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x80000000 144262569Simp MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x80000000 145262569Simp >; 146262569Simp }; 147262569Simp }; 148262569Simp 149262569Simp tve { 150262569Simp pinctrl_vga_sync_1: vgasync-grp1 { 151262569Simp fsl,pins = < 152262569Simp /* VGA_VSYNC, HSYNC with max drive strength */ 153262569Simp MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0xe6 154262569Simp MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0xe6 155262569Simp >; 156262569Simp }; 157262569Simp }; 158262569Simp}; 159262569Simp 160262569Simp&ipu_di1_disp1 { 161262569Simp remote-endpoint = <&display1_in>; 162262569Simp}; 163262569Simp 164262569Simp&cspi { 165262569Simp status = "okay"; 166262569Simp}; 167262569Simp 168262569Simp&audmux { 169262569Simp status = "okay"; 170262569Simp pinctrl-names = "default"; 171262569Simp pinctrl-0 = <&pinctrl_audmux>; 172262569Simp}; 173262569Simp 174262569Simp&i2c2 { 175262569Simp codec: sgtl5000@a { 176262569Simp compatible = "fsl,sgtl5000"; 177262569Simp reg = <0x0a>; 178262569Simp clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>; 179262569Simp VDDA-supply = <®_3p2v>; 180262569Simp VDDIO-supply = <®_3p2v>; 181262569Simp }; 182262569Simp 183262569Simp expander: pca9554@20 { 184262569Simp compatible = "pca9554"; 185262569Simp reg = <0x20>; 186262569Simp interrupts = <109>; 187262569Simp #gpio-cells = <2>; 188262569Simp gpio-controller; 189262569Simp }; 190262569Simp 191262569Simp sensor2: lm75@49 { 192262569Simp compatible = "lm75"; 193262569Simp reg = <0x49>; 194262569Simp }; 195262569Simp}; 196262569Simp 197262569Simp&fec { 198262569Simp phy-reset-gpios = <&gpio7 6 0>; 199262569Simp status = "okay"; 200262569Simp}; 201262569Simp 202262569Simp&esdhc2 { 203262569Simp status = "okay"; 204262569Simp}; 205262569Simp 206262569Simp&uart3 { 207262569Simp status = "okay"; 208262569Simp}; 209262569Simp 210262569Simp&ecspi1 { 211262569Simp status = "okay"; 212262569Simp}; 213262569Simp 214262569Simp&usbotg { 215262569Simp dr_mode = "host"; 216262569Simp status = "okay"; 217262569Simp}; 218262569Simp 219262569Simp&usbh1 { 220262569Simp status = "okay"; 221262569Simp}; 222262569Simp 223262569Simp&uart1 { 224262569Simp status = "okay"; 225262569Simp}; 226262569Simp 227262569Simp&ssi2 { 228262569Simp status = "okay"; 229262569Simp}; 230262569Simp 231262569Simp&uart2 { 232262569Simp status = "okay"; 233262569Simp}; 234262569Simp 235262569Simp&can1 { 236262569Simp status = "okay"; 237262569Simp}; 238262569Simp 239262569Simp&can2 { 240262569Simp status = "okay"; 241262569Simp}; 242262569Simp 243262569Simp&i2c3 { 244262569Simp status = "okay"; 245262569Simp}; 246262569Simp 247262569Simp&tve { 248262569Simp pinctrl-names = "default"; 249262569Simp pinctrl-0 = <&pinctrl_vga_sync_1>; 250262569Simp ddc-i2c-bus = <&i2c3>; 251262569Simp fsl,tve-mode = "vga"; 252262569Simp fsl,hsync-pin = <4>; 253262569Simp fsl,vsync-pin = <6>; 254262569Simp status = "okay"; 255262569Simp}; 256262569Simp