1262569Simp/* 2262569Simp * Copyright 2011 Freescale Semiconductor, Inc. 3262569Simp * Copyright 2011 Linaro Ltd. 4262569Simp * 5262569Simp * The code contained herein is licensed under the GNU General Public 6262569Simp * License. You may obtain a copy of the GNU General Public License 7262569Simp * Version 2 or later at the following locations: 8262569Simp * 9262569Simp * http://www.opensource.org/licenses/gpl-license.html 10262569Simp * http://www.gnu.org/copyleft/gpl.html 11262569Simp */ 12262569Simp 13262569Simp/dts-v1/; 14262569Simp#include "imx53.dtsi" 15262569Simp 16262569Simp/ { 17262569Simp model = "Freescale i.MX53 Automotive Reference Design Board"; 18262569Simp compatible = "fsl,imx53-ard", "fsl,imx53"; 19262569Simp 20262569Simp memory { 21262569Simp reg = <0x70000000 0x40000000>; 22262569Simp }; 23262569Simp 24262569Simp eim-cs1@f4000000 { 25262569Simp #address-cells = <1>; 26262569Simp #size-cells = <1>; 27262569Simp compatible = "fsl,eim-bus", "simple-bus"; 28262569Simp reg = <0xf4000000 0x3ff0000>; 29262569Simp ranges; 30262569Simp 31262569Simp lan9220@f4000000 { 32262569Simp compatible = "smsc,lan9220", "smsc,lan9115"; 33262569Simp reg = <0xf4000000 0x2000000>; 34262569Simp phy-mode = "mii"; 35262569Simp interrupt-parent = <&gpio2>; 36262569Simp interrupts = <31 0x8>; 37262569Simp reg-io-width = <4>; 38262569Simp /* 39262569Simp * VDD33A and VDDVARIO of LAN9220 are supplied by 40262569Simp * SW4_3V3 of LTC3589. Before the regulator driver 41262569Simp * for this PMIC is available, we use a fixed dummy 42262569Simp * 3V3 regulator to get LAN9220 driver probing work. 43262569Simp */ 44262569Simp vdd33a-supply = <®_3p3v>; 45262569Simp vddvario-supply = <®_3p3v>; 46262569Simp smsc,irq-push-pull; 47262569Simp }; 48262569Simp }; 49262569Simp 50262569Simp regulators { 51262569Simp compatible = "simple-bus"; 52270864Simp #address-cells = <1>; 53270864Simp #size-cells = <0>; 54262569Simp 55270864Simp reg_3p3v: regulator@0 { 56262569Simp compatible = "regulator-fixed"; 57270864Simp reg = <0>; 58262569Simp regulator-name = "3P3V"; 59262569Simp regulator-min-microvolt = <3300000>; 60262569Simp regulator-max-microvolt = <3300000>; 61262569Simp regulator-always-on; 62262569Simp }; 63262569Simp }; 64262569Simp 65262569Simp gpio-keys { 66262569Simp compatible = "gpio-keys"; 67262569Simp 68262569Simp home { 69262569Simp label = "Home"; 70262569Simp gpios = <&gpio5 10 0>; 71262569Simp linux,code = <102>; /* KEY_HOME */ 72262569Simp gpio-key,wakeup; 73262569Simp }; 74262569Simp 75262569Simp back { 76262569Simp label = "Back"; 77262569Simp gpios = <&gpio5 11 0>; 78262569Simp linux,code = <158>; /* KEY_BACK */ 79262569Simp gpio-key,wakeup; 80262569Simp }; 81262569Simp 82262569Simp program { 83262569Simp label = "Program"; 84262569Simp gpios = <&gpio5 12 0>; 85262569Simp linux,code = <362>; /* KEY_PROGRAM */ 86262569Simp gpio-key,wakeup; 87262569Simp }; 88262569Simp 89262569Simp volume-up { 90262569Simp label = "Volume Up"; 91262569Simp gpios = <&gpio5 13 0>; 92262569Simp linux,code = <115>; /* KEY_VOLUMEUP */ 93262569Simp }; 94262569Simp 95262569Simp volume-down { 96262569Simp label = "Volume Down"; 97262569Simp gpios = <&gpio4 0 0>; 98262569Simp linux,code = <114>; /* KEY_VOLUMEDOWN */ 99262569Simp }; 100262569Simp }; 101262569Simp}; 102262569Simp 103262569Simp&esdhc1 { 104262569Simp pinctrl-names = "default"; 105270864Simp pinctrl-0 = <&pinctrl_esdhc1>; 106262569Simp cd-gpios = <&gpio1 1 0>; 107262569Simp wp-gpios = <&gpio1 9 0>; 108262569Simp status = "okay"; 109262569Simp}; 110262569Simp 111262569Simp&iomuxc { 112262569Simp pinctrl-names = "default"; 113262569Simp pinctrl-0 = <&pinctrl_hog>; 114262569Simp 115270864Simp imx53-ard { 116262569Simp pinctrl_hog: hoggrp { 117262569Simp fsl,pins = < 118262569Simp MX53_PAD_GPIO_1__GPIO1_1 0x80000000 119262569Simp MX53_PAD_GPIO_9__GPIO1_9 0x80000000 120262569Simp MX53_PAD_EIM_EB3__GPIO2_31 0x80000000 121262569Simp MX53_PAD_GPIO_10__GPIO4_0 0x80000000 122262569Simp MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000 123262569Simp MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000 124262569Simp MX53_PAD_DISP0_DAT18__GPIO5_12 0x80000000 125262569Simp MX53_PAD_DISP0_DAT19__GPIO5_13 0x80000000 126262569Simp MX53_PAD_EIM_D16__EMI_WEIM_D_16 0x80000000 127262569Simp MX53_PAD_EIM_D17__EMI_WEIM_D_17 0x80000000 128262569Simp MX53_PAD_EIM_D18__EMI_WEIM_D_18 0x80000000 129262569Simp MX53_PAD_EIM_D19__EMI_WEIM_D_19 0x80000000 130262569Simp MX53_PAD_EIM_D20__EMI_WEIM_D_20 0x80000000 131262569Simp MX53_PAD_EIM_D21__EMI_WEIM_D_21 0x80000000 132262569Simp MX53_PAD_EIM_D22__EMI_WEIM_D_22 0x80000000 133262569Simp MX53_PAD_EIM_D23__EMI_WEIM_D_23 0x80000000 134262569Simp MX53_PAD_EIM_D24__EMI_WEIM_D_24 0x80000000 135262569Simp MX53_PAD_EIM_D25__EMI_WEIM_D_25 0x80000000 136262569Simp MX53_PAD_EIM_D26__EMI_WEIM_D_26 0x80000000 137262569Simp MX53_PAD_EIM_D27__EMI_WEIM_D_27 0x80000000 138262569Simp MX53_PAD_EIM_D28__EMI_WEIM_D_28 0x80000000 139262569Simp MX53_PAD_EIM_D29__EMI_WEIM_D_29 0x80000000 140262569Simp MX53_PAD_EIM_D30__EMI_WEIM_D_30 0x80000000 141262569Simp MX53_PAD_EIM_D31__EMI_WEIM_D_31 0x80000000 142262569Simp MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 0x80000000 143262569Simp MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 0x80000000 144262569Simp MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 0x80000000 145262569Simp MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 0x80000000 146262569Simp MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 0x80000000 147262569Simp MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 0x80000000 148262569Simp MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 0x80000000 149262569Simp MX53_PAD_EIM_OE__EMI_WEIM_OE 0x80000000 150262569Simp MX53_PAD_EIM_RW__EMI_WEIM_RW 0x80000000 151262569Simp MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 0x80000000 152262569Simp >; 153262569Simp }; 154270864Simp 155270864Simp pinctrl_esdhc1: esdhc1grp { 156270864Simp fsl,pins = < 157270864Simp MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 158270864Simp MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 159270864Simp MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 160270864Simp MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 161270864Simp MX53_PAD_PATA_DATA8__ESDHC1_DAT4 0x1d5 162270864Simp MX53_PAD_PATA_DATA9__ESDHC1_DAT5 0x1d5 163270864Simp MX53_PAD_PATA_DATA10__ESDHC1_DAT6 0x1d5 164270864Simp MX53_PAD_PATA_DATA11__ESDHC1_DAT7 0x1d5 165270864Simp MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 166270864Simp MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 167270864Simp >; 168270864Simp }; 169270864Simp 170270864Simp pinctrl_uart1: uart1grp { 171270864Simp fsl,pins = < 172270864Simp MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 173270864Simp MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 174270864Simp >; 175270864Simp }; 176262569Simp }; 177262569Simp}; 178262569Simp 179262569Simp&uart1 { 180262569Simp pinctrl-names = "default"; 181270864Simp pinctrl-0 = <&pinctrl_uart1>; 182262569Simp status = "okay"; 183262569Simp}; 184