imx51-apf51dev.dts revision 284090
1262569Simp/* 2262569Simp * Copyright 2013 Armadeus Systems - <support@armadeus.com> 3262569Simp * 4262569Simp * The code contained herein is licensed under the GNU General Public 5262569Simp * License. You may obtain a copy of the GNU General Public License 6262569Simp * Version 2 or later at the following locations: 7262569Simp * 8262569Simp * http://www.opensource.org/licenses/gpl-license.html 9262569Simp * http://www.gnu.org/copyleft/gpl.html 10262569Simp */ 11262569Simp 12262569Simp/* APF51Dev is a docking board for the APF51 SOM */ 13262569Simp#include "imx51-apf51.dts" 14262569Simp 15262569Simp/ { 16262569Simp model = "Armadeus Systems APF51Dev docking/development board"; 17262569Simp compatible = "armadeus,imx51-apf51dev", "armadeus,imx51-apf51", "fsl,imx51"; 18262569Simp 19284090Sian backlight@bl1{ 20284090Sian pinctrl-names = "default"; 21284090Sian pinctrl-0 = <&pinctrl_backlight>; 22284090Sian compatible = "gpio-backlight"; 23284090Sian gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; 24284090Sian default-on; 25284090Sian }; 26284090Sian 27262569Simp display@di1 { 28262569Simp compatible = "fsl,imx-parallel-display"; 29262569Simp interface-pix-fmt = "bgr666"; 30262569Simp pinctrl-names = "default"; 31270864Simp pinctrl-0 = <&pinctrl_ipu_disp1>; 32262569Simp 33262569Simp display-timings { 34262569Simp lw700 { 35262569Simp native-mode; 36262569Simp clock-frequency = <33000033>; 37262569Simp hactive = <800>; 38262569Simp vactive = <480>; 39262569Simp hback-porch = <96>; 40262569Simp hfront-porch = <96>; 41262569Simp vback-porch = <20>; 42262569Simp vfront-porch = <21>; 43262569Simp hsync-len = <64>; 44262569Simp vsync-len = <4>; 45262569Simp hsync-active = <1>; 46262569Simp vsync-active = <1>; 47262569Simp de-active = <1>; 48262569Simp pixelclk-active = <0>; 49262569Simp }; 50262569Simp }; 51270864Simp 52270864Simp port { 53270864Simp display_in: endpoint { 54270864Simp remote-endpoint = <&ipu_di0_disp0>; 55270864Simp }; 56270864Simp }; 57262569Simp }; 58262569Simp 59262569Simp gpio-keys { 60262569Simp compatible = "gpio-keys"; 61262569Simp 62262569Simp user-key { 63262569Simp label = "user"; 64270864Simp gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 65262569Simp linux,code = <256>; /* BTN_0 */ 66262569Simp }; 67262569Simp }; 68262569Simp 69262569Simp leds { 70262569Simp compatible = "gpio-leds"; 71262569Simp 72262569Simp user { 73262569Simp label = "Heartbeat"; 74270864Simp gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 75262569Simp linux,default-trigger = "heartbeat"; 76262569Simp }; 77262569Simp }; 78262569Simp}; 79262569Simp 80262569Simp&ecspi1 { 81262569Simp pinctrl-names = "default"; 82270864Simp pinctrl-0 = <&pinctrl_ecspi1>; 83262569Simp fsl,spi-num-chipselects = <2>; 84270864Simp cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>, 85270864Simp <&gpio4 25 GPIO_ACTIVE_HIGH>; 86262569Simp status = "okay"; 87262569Simp}; 88262569Simp 89262569Simp&ecspi2 { 90262569Simp pinctrl-names = "default"; 91270864Simp pinctrl-0 = <&pinctrl_ecspi2>; 92262569Simp fsl,spi-num-chipselects = <2>; 93270864Simp cs-gpios = <&gpio3 28 GPIO_ACTIVE_LOW>, 94270864Simp <&gpio3 27 GPIO_ACTIVE_LOW>; 95262569Simp status = "okay"; 96262569Simp}; 97262569Simp 98262569Simp&esdhc1 { 99262569Simp pinctrl-names = "default"; 100270864Simp pinctrl-0 = <&pinctrl_esdhc1>; 101270864Simp cd-gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; 102262569Simp bus-width = <4>; 103262569Simp status = "okay"; 104262569Simp}; 105262569Simp 106262569Simp&esdhc2 { 107262569Simp pinctrl-names = "default"; 108270864Simp pinctrl-0 = <&pinctrl_esdhc2>; 109262569Simp bus-width = <4>; 110262569Simp non-removable; 111262569Simp status = "okay"; 112262569Simp}; 113262569Simp 114262569Simp&i2c2 { 115262569Simp pinctrl-names = "default"; 116270864Simp pinctrl-0 = <&pinctrl_i2c2>; 117262569Simp status = "okay"; 118262569Simp}; 119262569Simp 120262569Simp&iomuxc { 121262569Simp pinctrl-names = "default"; 122262569Simp pinctrl-0 = <&pinctrl_hog>; 123262569Simp 124270864Simp imx51-apf51dev { 125284090Sian pinctrl_backlight: bl1grp { 126284090Sian fsl,pins = < 127284090Sian MX51_PAD_DI1_D1_CS__GPIO3_4 0x1F5 128284090Sian >; 129284090Sian }; 130284090Sian 131262569Simp pinctrl_hog: hoggrp { 132262569Simp fsl,pins = < 133262569Simp MX51_PAD_EIM_EB2__GPIO2_22 0x0C5 134262569Simp MX51_PAD_EIM_EB3__GPIO2_23 0x0C5 135262569Simp MX51_PAD_EIM_CS4__GPIO2_29 0x100 136262569Simp MX51_PAD_NANDF_D13__GPIO3_27 0x0C5 137262569Simp MX51_PAD_NANDF_D12__GPIO3_28 0x0C5 138262569Simp MX51_PAD_CSPI1_SS0__GPIO4_24 0x0C5 139262569Simp MX51_PAD_CSPI1_SS1__GPIO4_25 0x0C5 140262569Simp MX51_PAD_GPIO1_2__GPIO1_2 0x0C5 141262569Simp MX51_PAD_GPIO1_3__GPIO1_3 0x0C5 142262569Simp >; 143262569Simp }; 144270864Simp 145270864Simp pinctrl_ecspi1: ecspi1grp { 146270864Simp fsl,pins = < 147270864Simp MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185 148270864Simp MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185 149270864Simp MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185 150270864Simp >; 151270864Simp }; 152270864Simp 153270864Simp pinctrl_ecspi2: ecspi2grp { 154270864Simp fsl,pins = < 155270864Simp MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185 156270864Simp MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185 157270864Simp MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185 158270864Simp >; 159270864Simp }; 160270864Simp 161270864Simp pinctrl_esdhc1: esdhc1grp { 162270864Simp fsl,pins = < 163270864Simp MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5 164270864Simp MX51_PAD_SD1_CLK__SD1_CLK 0x20d5 165270864Simp MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5 166270864Simp MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 167270864Simp MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 168270864Simp MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 169270864Simp >; 170270864Simp }; 171270864Simp 172270864Simp pinctrl_esdhc2: esdhc2grp { 173270864Simp fsl,pins = < 174270864Simp MX51_PAD_SD2_CMD__SD2_CMD 0x400020d5 175270864Simp MX51_PAD_SD2_CLK__SD2_CLK 0x20d5 176270864Simp MX51_PAD_SD2_DATA0__SD2_DATA0 0x20d5 177270864Simp MX51_PAD_SD2_DATA1__SD2_DATA1 0x20d5 178270864Simp MX51_PAD_SD2_DATA2__SD2_DATA2 0x20d5 179270864Simp MX51_PAD_SD2_DATA3__SD2_DATA3 0x20d5 180270864Simp >; 181270864Simp }; 182270864Simp 183270864Simp pinctrl_i2c2: i2c2grp { 184270864Simp fsl,pins = < 185270864Simp MX51_PAD_EIM_D27__I2C2_SCL 0x400001ed 186270864Simp MX51_PAD_EIM_D24__I2C2_SDA 0x400001ed 187270864Simp >; 188270864Simp }; 189270864Simp 190270864Simp pinctrl_ipu_disp1: ipudisp1grp { 191270864Simp fsl,pins = < 192270864Simp MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5 193270864Simp MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5 194270864Simp MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5 195270864Simp MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5 196270864Simp MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5 197270864Simp MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5 198270864Simp MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5 199270864Simp MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5 200270864Simp MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5 201270864Simp MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5 202270864Simp MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5 203270864Simp MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5 204270864Simp MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5 205270864Simp MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5 206270864Simp MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5 207270864Simp MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5 208270864Simp MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5 209270864Simp MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5 210270864Simp MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5 211270864Simp MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5 212270864Simp MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5 213270864Simp MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5 214270864Simp MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5 215270864Simp MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5 216270864Simp MX51_PAD_DI1_PIN2__DI1_PIN2 0x5 217270864Simp MX51_PAD_DI1_PIN3__DI1_PIN3 0x5 218270864Simp >; 219270864Simp }; 220262569Simp }; 221262569Simp}; 222270864Simp 223270864Simp&ipu_di0_disp0 { 224270864Simp remote-endpoint = <&display_in>; 225270864Simp}; 226