at91sam9rl.dtsi revision 273714 
1/*
2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
3 *
4 *  Copyright (C) 2014 Alexandre Belloni <alexandre.belloni@free-electrons.com>
5 *
6 * Licensed under GPLv2 or later.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/clock/at91.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/gpio/gpio.h>
14#include <dt-bindings/pwm/pwm.h>
15
16/ {
17	model = "Atmel AT91SAM9RL family SoC";
18	compatible = "atmel,at91sam9rl", "atmel,at91sam9";
19	interrupt-parent = <&aic>;
20
21	aliases {
22		serial0 = &dbgu;
23		serial1 = &usart0;
24		serial2 = &usart1;
25		serial3 = &usart2;
26		serial4 = &usart3;
27		gpio0 = &pioA;
28		gpio1 = &pioB;
29		gpio2 = &pioC;
30		gpio3 = &pioD;
31		tcb0 = &tcb0;
32		i2c0 = &i2c0;
33		i2c1 = &i2c1;
34		ssc0 = &ssc0;
35		ssc1 = &ssc1;
36		pwm0 = &pwm0;
37	};
38
39	cpus {
40		#address-cells = <0>;
41		#size-cells = <0>;
42
43		cpu {
44			compatible = "arm,arm926ej-s";
45			device_type = "cpu";
46		};
47	};
48
49	memory {
50		reg = <0x20000000 0x04000000>;
51	};
52
53	clocks {
54		slow_xtal: slow_xtal {
55			compatible = "fixed-clock";
56			#clock-cells = <0>;
57			clock-frequency = <0>;
58		};
59
60		main_xtal: main_xtal {
61			compatible = "fixed-clock";
62			#clock-cells = <0>;
63			clock-frequency = <0>;
64		};
65
66		adc_op_clk: adc_op_clk{
67			compatible = "fixed-clock";
68			#clock-cells = <0>;
69			clock-frequency = <1000000>;
70		};
71	};
72
73	ahb {
74		compatible = "simple-bus";
75		#address-cells = <1>;
76		#size-cells = <1>;
77		ranges;
78
79		fb0: fb@00500000 {
80			compatible = "atmel,at91sam9rl-lcdc";
81			reg = <0x00500000 0x1000>;
82			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
83			pinctrl-names = "default";
84			pinctrl-0 = <&pinctrl_fb>;
85			clocks = <&lcd_clk>, <&lcd_clk>;
86			clock-names = "hclk", "lcdc_clk";
87			status = "disabled";
88		};
89
90		nand0: nand@40000000 {
91			compatible = "atmel,at91rm9200-nand";
92			#address-cells = <1>;
93			#size-cells = <1>;
94			reg = <0x40000000 0x10000000>,
95			      <0xffffe800 0x200>;
96			atmel,nand-addr-offset = <21>;
97			atmel,nand-cmd-offset = <22>;
98			atmel,nand-has-dma;
99			pinctrl-names = "default";
100			pinctrl-0 = <&pinctrl_nand>;
101			gpios = <&pioD 17 GPIO_ACTIVE_HIGH>,
102				<&pioB 6 GPIO_ACTIVE_HIGH>,
103				<0>;
104			status = "disabled";
105		};
106
107		apb {
108			compatible = "simple-bus";
109			#address-cells = <1>;
110			#size-cells = <1>;
111			ranges;
112
113			tcb0: timer@fffa0000 {
114				compatible = "atmel,at91rm9200-tcb";
115				reg = <0xfffa0000 0x100>;
116				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
117					     <17 IRQ_TYPE_LEVEL_HIGH 0>,
118					     <18 IRQ_TYPE_LEVEL_HIGH 0>;
119				clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>;
120				clock-names = "t0_clk", "t1_clk", "t2_clk";
121			};
122
123			mmc0: mmc@fffa4000 {
124				compatible = "atmel,hsmci";
125				reg = <0xfffa4000 0x600>;
126				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
127				#address-cells = <1>;
128				#size-cells = <0>;
129				pinctrl-names = "default";
130				clocks = <&mci0_clk>;
131				clock-names = "mci_clk";
132				status = "disabled";
133			};
134
135			i2c0: i2c@fffa8000 {
136				compatible = "atmel,at91sam9260-i2c";
137				reg = <0xfffa8000 0x100>;
138				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
139				#address-cells = <1>;
140				#size-cells = <0>;
141				clocks = <&twi0_clk>;
142				status = "disabled";
143			};
144
145			i2c1: i2c@fffac000 {
146				compatible = "atmel,at91sam9260-i2c";
147				reg = <0xfffac000 0x100>;
148				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
149				#address-cells = <1>;
150				#size-cells = <0>;
151				status = "disabled";
152			};
153
154			usart0: serial@fffb0000 {
155				compatible = "atmel,at91sam9260-usart";
156				reg = <0xfffb0000 0x200>;
157				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
158				atmel,use-dma-rx;
159				atmel,use-dma-tx;
160				pinctrl-names = "default";
161				pinctrl-0 = <&pinctrl_usart0>;
162				clocks = <&usart0_clk>;
163				clock-names = "usart";
164				status = "disabled";
165			};
166
167			usart1: serial@fffb4000 {
168				compatible = "atmel,at91sam9260-usart";
169				reg = <0xfffb4000 0x200>;
170				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
171				atmel,use-dma-rx;
172				atmel,use-dma-tx;
173				pinctrl-names = "default";
174				pinctrl-0 = <&pinctrl_usart1>;
175				clocks = <&usart1_clk>;
176				clock-names = "usart";
177				status = "disabled";
178			};
179
180			usart2: serial@fffb8000 {
181				compatible = "atmel,at91sam9260-usart";
182				reg = <0xfffb8000 0x200>;
183				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
184				atmel,use-dma-rx;
185				atmel,use-dma-tx;
186				pinctrl-names = "default";
187				pinctrl-0 = <&pinctrl_usart2>;
188				clocks = <&usart2_clk>;
189				clock-names = "usart";
190				status = "disabled";
191			};
192
193			usart3: serial@fffbc000 {
194				compatible = "atmel,at91sam9260-usart";
195				reg = <0xfffbc000 0x200>;
196				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
197				atmel,use-dma-rx;
198				atmel,use-dma-tx;
199				pinctrl-names = "default";
200				pinctrl-0 = <&pinctrl_usart3>;
201				clocks = <&usart3_clk>;
202				clock-names = "usart";
203				status = "disabled";
204			};
205
206			ssc0: ssc@fffc0000 {
207				compatible = "atmel,at91rm9200-ssc";
208				reg = <0xfffc0000 0x4000>;
209				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
210				pinctrl-names = "default";
211				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
212				status = "disabled";
213			};
214
215			ssc1: ssc@fffc4000 {
216				compatible = "atmel,at91rm9200-ssc";
217				reg = <0xfffc4000 0x4000>;
218				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
219				pinctrl-names = "default";
220				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
221				status = "disabled";
222			};
223
224			pwm0: pwm@fffc8000 {
225				compatible = "atmel,at91sam9rl-pwm";
226				reg = <0xfffc8000 0x300>;
227				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
228				#pwm-cells = <3>;
229				clocks = <&pwm_clk>;
230				clock-names = "pwm_clk";
231				status = "disabled";
232			};
233
234			spi0: spi@fffcc000 {
235				#address-cells = <1>;
236				#size-cells = <0>;
237				compatible = "atmel,at91rm9200-spi";
238				reg = <0xfffcc000 0x200>;
239				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
240				pinctrl-names = "default";
241				pinctrl-0 = <&pinctrl_spi0>;
242				clocks = <&spi0_clk>;
243				clock-names = "spi_clk";
244				status = "disabled";
245			};
246
247			adc0: adc@fffd0000 {
248				#address-cells = <1>;
249				#size-cells = <0>;
250				compatible = "atmel,at91sam9rl-adc";
251				reg = <0xfffd0000 0x100>;
252				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
253				clocks = <&adc_clk>, <&adc_op_clk>;
254				clock-names = "adc_clk", "adc_op_clk";
255				atmel,adc-use-external-triggers;
256				atmel,adc-channels-used = <0x3f>;
257				atmel,adc-vref = <3300>;
258				atmel,adc-startup-time = <40>;
259				atmel,adc-res = <8 10>;
260				atmel,adc-res-names = "lowres", "highres";
261				atmel,adc-use-res = "highres";
262
263				trigger@0 {
264					reg = <0>;
265					trigger-name = "timer-counter-0";
266					trigger-value = <0x1>;
267				};
268				trigger@1 {
269					reg = <1>;
270					trigger-name = "timer-counter-1";
271					trigger-value = <0x3>;
272				};
273
274				trigger@2 {
275					reg = <2>;
276					trigger-name = "timer-counter-2";
277					trigger-value = <0x5>;
278				};
279
280				trigger@3 {
281					reg = <3>;
282					trigger-name = "external";
283					trigger-value = <0x13>;
284					trigger-external;
285				};
286			};
287
288			usb0: gadget@fffd4000 {
289				#address-cells = <1>;
290				#size-cells = <0>;
291				compatible = "atmel,at91sam9rl-udc";
292				reg = <0x00600000 0x100000>,
293				      <0xfffd4000 0x4000>;
294				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
295				clocks = <&udphs_clk>, <&utmi>;
296				clock-names = "pclk", "hclk";
297				status = "disabled";
298
299				ep0 {
300					reg = <0>;
301					atmel,fifo-size = <64>;
302					atmel,nb-banks = <1>;
303				};
304
305				ep1 {
306					reg = <1>;
307					atmel,fifo-size = <1024>;
308					atmel,nb-banks = <2>;
309					atmel,can-dma;
310					atmel,can-isoc;
311				};
312
313				ep2 {
314					reg = <2>;
315					atmel,fifo-size = <1024>;
316					atmel,nb-banks = <2>;
317					atmel,can-dma;
318					atmel,can-isoc;
319				};
320
321				ep3 {
322					reg = <3>;
323					atmel,fifo-size = <1024>;
324					atmel,nb-banks = <3>;
325					atmel,can-dma;
326				};
327
328				ep4 {
329					reg = <4>;
330					atmel,fifo-size = <1024>;
331					atmel,nb-banks = <3>;
332					atmel,can-dma;
333				};
334
335				ep5 {
336					reg = <5>;
337					atmel,fifo-size = <1024>;
338					atmel,nb-banks = <3>;
339					atmel,can-dma;
340					atmel,can-isoc;
341				};
342
343				ep6 {
344					reg = <6>;
345					atmel,fifo-size = <1024>;
346					atmel,nb-banks = <3>;
347					atmel,can-dma;
348					atmel,can-isoc;
349				};
350			};
351
352			dma0: dma-controller@ffffe600 {
353				compatible = "atmel,at91sam9rl-dma";
354				reg = <0xffffe600 0x200>;
355				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
356				#dma-cells = <2>;
357				clocks = <&dma0_clk>;
358				clock-names = "dma_clk";
359			};
360
361			ramc0: ramc@ffffea00 {
362				compatible = "atmel,at91sam9260-sdramc";
363				reg = <0xffffea00 0x200>;
364			};
365
366			aic: interrupt-controller@fffff000 {
367				#interrupt-cells = <3>;
368				compatible = "atmel,at91rm9200-aic";
369				interrupt-controller;
370				reg = <0xfffff000 0x200>;
371				atmel,external-irqs = <31>;
372			};
373
374			dbgu: serial@fffff200 {
375				compatible = "atmel,at91sam9260-usart";
376				reg = <0xfffff200 0x200>;
377				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
378				pinctrl-names = "default";
379				pinctrl-0 = <&pinctrl_dbgu>;
380				clocks = <&mck>;
381				clock-names = "usart";
382				status = "disabled";
383			};
384
385			pinctrl@fffff400 {
386				#address-cells = <1>;
387				#size-cells = <1>;
388				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
389				ranges = <0xfffff400 0xfffff400 0x800>;
390
391				atmel,mux-mask =
392					/*    A         B     */
393					<0xffffffff 0xe05c6738>,  /* pioA */
394					<0xffffffff 0x0000c780>,  /* pioB */
395					<0xffffffff 0xe3ffff0e>,  /* pioC */
396					<0x003fffff 0x0001ff3c>;  /* pioD */
397
398				/* shared pinctrl settings */
399				adc0 {
400					pinctrl_adc0_ts: adc0_ts-0 {
401						atmel,pins =
402							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
403							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
404							<AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
405							<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
406					};
407
408					pinctrl_adc0_ad0: adc0_ad0-0 {
409						atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
410					};
411
412					pinctrl_adc0_ad1: adc0_ad1-0 {
413						atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
414					};
415
416					pinctrl_adc0_ad2: adc0_ad2-0 {
417						atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
418					};
419
420					pinctrl_adc0_ad3: adc0_ad3-0 {
421						atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
422					};
423
424					pinctrl_adc0_ad4: adc0_ad4-0 {
425						atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
426					};
427
428					pinctrl_adc0_ad5: adc0_ad5-0 {
429						atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
430					};
431
432					pinctrl_adc0_adtrg: adc0_adtrg-0 {
433						atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
434					};
435				};
436
437				dbgu {
438					pinctrl_dbgu: dbgu-0 {
439						atmel,pins =
440							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
441							<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
442					};
443				};
444
445				fb {
446					pinctrl_fb: fb-0 {
447						atmel,pins =
448							<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
449							<AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
450							<AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
451							<AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
452							<AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
453							<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
454							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
455							<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
456							<AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
457							<AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
458							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
459							<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
460							<AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
461							<AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
462							<AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
463							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
464							<AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
465							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
466							<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
467							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
468							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
469					};
470				};
471
472				i2c_gpio0 {
473					pinctrl_i2c_gpio0: i2c_gpio0-0 {
474						atmel,pins =
475							<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
476							<AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
477					};
478				};
479
480				i2c_gpio1 {
481					pinctrl_i2c_gpio1: i2c_gpio1-0 {
482						atmel,pins =
483							<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
484							<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
485					};
486				};
487
488				mmc0 {
489					pinctrl_mmc0_clk: mmc0_clk-0 {
490						atmel,pins =
491							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
492					};
493
494					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
495						atmel,pins =
496							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
497							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
498					};
499
500					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
501						atmel,pins =
502							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
503							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
504							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
505					};
506				};
507
508				nand {
509					pinctrl_nand: nand-0 {
510						atmel,pins =
511							<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
512							<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
513					};
514
515					pinctrl_nand0_ale_cle: nand_ale_cle-0 {
516						atmel,pins =
517							<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
518							<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
519					};
520
521					pinctrl_nand0_oe_we: nand_oe_we-0 {
522						atmel,pins =
523							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
524							<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
525					};
526
527					pinctrl_nand0_cs: nand_cs-0 {
528						atmel,pins =
529							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
530					};
531				};
532
533				pwm0 {
534					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
535						atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
536					};
537
538					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
539						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
540					};
541
542					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
543						atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
544					};
545
546					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
547						atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
548					};
549
550					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
551						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
552					};
553
554					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
555						atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
556					};
557
558					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
559						atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
560					};
561
562					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
563						atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
564					};
565
566					pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
567						atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
568					};
569
570					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
571						atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
572					};
573
574					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
575						atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
576					};
577				};
578
579				spi0 {
580					pinctrl_spi0: spi0-0 {
581						atmel,pins =
582							<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
583							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
584							<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
585					};
586				};
587
588				ssc0 {
589					pinctrl_ssc0_tx: ssc0_tx-0 {
590						atmel,pins =
591							<AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
592							<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
593							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
594					};
595
596					pinctrl_ssc0_rx: ssc0_rx-0 {
597						atmel,pins =
598							<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
599							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
600							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
601					};
602				};
603
604				ssc1 {
605					pinctrl_ssc1_tx: ssc1_tx-0 {
606						atmel,pins =
607							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
608							<AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
609							<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
610					};
611
612					pinctrl_ssc1_rx: ssc1_rx-0 {
613						atmel,pins =
614							<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
615							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
616							<AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
617					};
618				};
619
620				tcb0 {
621					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
622						atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
623					};
624
625					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
626						atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
627					};
628
629					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
630						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
631					};
632
633					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
634						atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
635					};
636
637					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
638						atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
639					};
640
641					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
642						atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
643					};
644
645					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
646						atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
647					};
648
649					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
650						atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
651					};
652
653					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
654						atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
655					};
656				};
657
658				usart0 {
659					pinctrl_usart0: usart0-0 {
660						atmel,pins =
661							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
662							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
663					};
664
665					pinctrl_usart0_rts: usart0_rts-0 {
666						atmel,pins =
667							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
668					};
669
670					pinctrl_usart0_cts: usart0_cts-0 {
671						atmel,pins =
672							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
673					};
674
675					pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
676						atmel,pins =
677							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
678							<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
679					};
680
681					pinctrl_usart0_dcd: usart0_dcd-0 {
682						atmel,pins =
683							<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
684					};
685
686					pinctrl_usart0_ri: usart0_ri-0 {
687						atmel,pins =
688							<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
689					};
690
691					pinctrl_usart0_sck: usart0_sck-0 {
692						atmel,pins =
693							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
694					};
695				};
696
697				usart1 {
698					pinctrl_usart1: usart1-0 {
699						atmel,pins =
700							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
701							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
702					};
703
704					pinctrl_usart1_rts: usart1_rts-0 {
705						atmel,pins =
706							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
707					};
708
709					pinctrl_usart1_cts: usart1_cts-0 {
710						atmel,pins =
711							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
712					};
713
714					pinctrl_usart1_sck: usart1_sck-0 {
715						atmel,pins =
716							<AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
717					};
718				};
719
720				usart2 {
721					pinctrl_usart2: usart2-0 {
722						atmel,pins =
723							<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
724							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
725					};
726
727					pinctrl_usart2_rts: usart2_rts-0 {
728						atmel,pins =
729							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
730					};
731
732					pinctrl_usart2_cts: usart2_cts-0 {
733						atmel,pins =
734							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
735					};
736
737					pinctrl_usart2_sck: usart2_sck-0 {
738						atmel,pins =
739							<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
740					};
741				};
742
743				usart3 {
744					pinctrl_usart3: usart3-0 {
745						atmel,pins =
746							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
747							<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
748					};
749
750					pinctrl_usart3_rts: usart3_rts-0 {
751						atmel,pins =
752							<AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
753					};
754
755					pinctrl_usart3_cts: usart3_cts-0 {
756						atmel,pins =
757							<AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
758					};
759
760					pinctrl_usart3_sck: usart3_sck-0 {
761						atmel,pins =
762							<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
763					};
764				};
765
766				pioA: gpio@fffff400 {
767					compatible = "atmel,at91rm9200-gpio";
768					reg = <0xfffff400 0x200>;
769					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
770					#gpio-cells = <2>;
771					gpio-controller;
772					interrupt-controller;
773					#interrupt-cells = <2>;
774					clocks = <&pioA_clk>;
775				};
776
777				pioB: gpio@fffff600 {
778					compatible = "atmel,at91rm9200-gpio";
779					reg = <0xfffff600 0x200>;
780					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
781					#gpio-cells = <2>;
782					gpio-controller;
783					interrupt-controller;
784					#interrupt-cells = <2>;
785					clocks = <&pioB_clk>;
786				};
787
788				pioC: gpio@fffff800 {
789					compatible = "atmel,at91rm9200-gpio";
790					reg = <0xfffff800 0x200>;
791					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
792					#gpio-cells = <2>;
793					gpio-controller;
794					interrupt-controller;
795					#interrupt-cells = <2>;
796					clocks = <&pioC_clk>;
797				};
798
799				pioD: gpio@fffffa00 {
800					compatible = "atmel,at91rm9200-gpio";
801					reg = <0xfffffa00 0x200>;
802					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
803					#gpio-cells = <2>;
804					gpio-controller;
805					interrupt-controller;
806					#interrupt-cells = <2>;
807					clocks = <&pioD_clk>;
808				};
809			};
810
811			pmc: pmc@fffffc00 {
812				compatible = "atmel,at91sam9g45-pmc";
813				reg = <0xfffffc00 0x100>;
814				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
815				interrupt-controller;
816				#address-cells = <1>;
817				#size-cells = <0>;
818				#interrupt-cells = <1>;
819
820				main: mainck {
821					compatible = "atmel,at91rm9200-clk-main";
822					#clock-cells = <0>;
823					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
824					clocks = <&main_xtal>;
825				};
826
827				plla: pllack {
828					compatible = "atmel,at91rm9200-clk-pll";
829					#clock-cells = <0>;
830					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
831					clocks = <&main>;
832					reg = <0>;
833					atmel,clk-input-range = <1000000 32000000>;
834					#atmel,pll-clk-output-range-cells = <3>;
835					atmel,pll-clk-output-ranges = <80000000 200000000 0>,
836								<190000000 240000000 2>;
837				};
838
839				utmi: utmick {
840					compatible = "atmel,at91sam9x5-clk-utmi";
841					#clock-cells = <0>;
842					interrupt-parent = <&pmc>;
843					interrupts = <AT91_PMC_LOCKU>;
844					clocks = <&main>;
845				};
846
847				mck: masterck {
848					compatible = "atmel,at91rm9200-clk-master";
849					#clock-cells = <0>;
850					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
851					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>;
852					atmel,clk-output-range = <0 94000000>;
853					atmel,clk-divisors = <1 2 4 0>;
854				};
855
856				prog: progck {
857					compatible = "atmel,at91rm9200-clk-programmable";
858					#address-cells = <1>;
859					#size-cells = <0>;
860					interrupt-parent = <&pmc>;
861					clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>;
862
863					prog0: prog0 {
864						#clock-cells = <0>;
865						reg = <0>;
866						interrupts = <AT91_PMC_PCKRDY(0)>;
867					};
868
869					prog1: prog1 {
870						#clock-cells = <0>;
871						reg = <1>;
872						interrupts = <AT91_PMC_PCKRDY(1)>;
873					};
874				};
875
876				systemck {
877					compatible = "atmel,at91rm9200-clk-system";
878					#address-cells = <1>;
879					#size-cells = <0>;
880
881					pck0: pck0 {
882						#clock-cells = <0>;
883						reg = <8>;
884						clocks = <&prog0>;
885					};
886
887					pck1: pck1 {
888						#clock-cells = <0>;
889						reg = <9>;
890						clocks = <&prog1>;
891					};
892
893				};
894
895				periphck {
896					compatible = "atmel,at91rm9200-clk-peripheral";
897					#address-cells = <1>;
898					#size-cells = <0>;
899					clocks = <&mck>;
900
901					pioA_clk: pioA_clk {
902						#clock-cells = <0>;
903						reg = <2>;
904					};
905
906					pioB_clk: pioB_clk {
907						#clock-cells = <0>;
908						reg = <3>;
909					};
910
911					pioC_clk: pioC_clk {
912						#clock-cells = <0>;
913						reg = <4>;
914					};
915
916					pioD_clk: pioD_clk {
917						#clock-cells = <0>;
918						reg = <5>;
919					};
920
921					usart0_clk: usart0_clk {
922						#clock-cells = <0>;
923						reg = <6>;
924					};
925
926					usart1_clk: usart1_clk {
927						#clock-cells = <0>;
928						reg = <7>;
929					};
930
931					usart2_clk: usart2_clk {
932						#clock-cells = <0>;
933						reg = <8>;
934					};
935
936					usart3_clk: usart3_clk {
937						#clock-cells = <0>;
938						reg = <9>;
939					};
940
941					mci0_clk: mci0_clk {
942						#clock-cells = <0>;
943						reg = <10>;
944					};
945
946					twi0_clk: twi0_clk {
947						#clock-cells = <0>;
948						reg = <11>;
949					};
950
951					twi1_clk: twi1_clk {
952						#clock-cells = <0>;
953						reg = <12>;
954					};
955
956					spi0_clk: spi0_clk {
957						#clock-cells = <0>;
958						reg = <13>;
959					};
960
961					ssc0_clk: ssc0_clk {
962						#clock-cells = <0>;
963						reg = <14>;
964					};
965
966					ssc1_clk: ssc1_clk {
967						#clock-cells = <0>;
968						reg = <15>;
969					};
970
971					tc0_clk: tc0_clk {
972						#clock-cells = <0>;
973						reg = <16>;
974					};
975
976					tc1_clk: tc1_clk {
977						#clock-cells = <0>;
978						reg = <17>;
979					};
980
981					tc2_clk: tc2_clk {
982						#clock-cells = <0>;
983						reg = <18>;
984					};
985
986					pwm_clk: pwm_clk {
987						#clock-cells = <0>;
988						reg = <19>;
989					};
990
991					adc_clk: adc_clk {
992						#clock-cells = <0>;
993						reg = <20>;
994					};
995
996					dma0_clk: dma0_clk {
997						#clock-cells = <0>;
998						reg = <21>;
999					};
1000
1001					udphs_clk: udphs_clk {
1002						#clock-cells = <0>;
1003						reg = <22>;
1004					};
1005
1006					lcd_clk: lcd_clk {
1007						#clock-cells = <0>;
1008						reg = <23>;
1009					};
1010				};
1011			};
1012
1013			rstc@fffffd00 {
1014				compatible = "atmel,at91sam9260-rstc";
1015				reg = <0xfffffd00 0x10>;
1016			};
1017
1018			shdwc@fffffd10 {
1019				compatible = "atmel,at91sam9260-shdwc";
1020				reg = <0xfffffd10 0x10>;
1021			};
1022
1023			pit: timer@fffffd30 {
1024				compatible = "atmel,at91sam9260-pit";
1025				reg = <0xfffffd30 0xf>;
1026				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1027				clocks = <&mck>;
1028			};
1029
1030			watchdog@fffffd40 {
1031				compatible = "atmel,at91sam9260-wdt";
1032				reg = <0xfffffd40 0x10>;
1033				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
1034				status = "disabled";
1035			};
1036
1037			sckc@fffffd50 {
1038				compatible = "atmel,at91sam9x5-sckc";
1039				reg = <0xfffffd50 0x4>;
1040
1041				slow_osc: slow_osc {
1042					compatible = "atmel,at91sam9x5-clk-slow-osc";
1043					#clock-cells = <0>;
1044					atmel,startup-time-usec = <1200000>;
1045					clocks = <&slow_xtal>;
1046				};
1047
1048				slow_rc_osc: slow_rc_osc {
1049					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
1050					#clock-cells = <0>;
1051					atmel,startup-time-usec = <75>;
1052					clock-frequency = <32768>;
1053					clock-accuracy = <50000000>;
1054				};
1055
1056				clk32k: slck {
1057					compatible = "atmel,at91sam9x5-clk-slow";
1058					#clock-cells = <0>;
1059					clocks = <&slow_rc_osc &slow_osc>;
1060				};
1061			};
1062		};
1063	};
1064
1065	i2c@0 {
1066		compatible = "i2c-gpio";
1067		gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
1068			<&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
1069		i2c-gpio,sda-open-drain;
1070		i2c-gpio,scl-open-drain;
1071		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
1072		#address-cells = <1>;
1073		#size-cells = <0>;
1074		pinctrl-names = "default";
1075		pinctrl-0 = <&pinctrl_i2c_gpio0>;
1076		status = "disabled";
1077	};
1078
1079	i2c@1 {
1080		compatible = "i2c-gpio";
1081		gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
1082			<&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
1083		i2c-gpio,sda-open-drain;
1084		i2c-gpio,scl-open-drain;
1085		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
1086		#address-cells = <1>;
1087		#size-cells = <0>;
1088		pinctrl-names = "default";
1089		pinctrl-0 = <&pinctrl_i2c_gpio1>;
1090		status = "disabled";
1091	};
1092};
1093