at91sam9263.dtsi revision 271143 
1/*
2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3 *
4 *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 *
6 * Licensed under GPLv2 only.
7 */
8
9#include "skeleton.dtsi"
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/clock/at91.h>
14
15/ {
16	model = "Atmel AT91SAM9263 family SoC";
17	compatible = "atmel,at91sam9263";
18	interrupt-parent = <&aic>;
19
20	aliases {
21		serial0 = &dbgu;
22		serial1 = &usart0;
23		serial2 = &usart1;
24		serial3 = &usart2;
25		gpio0 = &pioA;
26		gpio1 = &pioB;
27		gpio2 = &pioC;
28		gpio3 = &pioD;
29		gpio4 = &pioE;
30		tcb0 = &tcb0;
31		i2c0 = &i2c0;
32		ssc0 = &ssc0;
33		ssc1 = &ssc1;
34		pwm0 = &pwm0;
35	};
36
37	cpus {
38		#address-cells = <0>;
39		#size-cells = <0>;
40
41		cpu {
42			compatible = "arm,arm926ej-s";
43			device_type = "cpu";
44		};
45	};
46
47	memory {
48		reg = <0x20000000 0x08000000>;
49	};
50
51	clocks {
52		main_xtal: main_xtal {
53			compatible = "fixed-clock";
54			#clock-cells = <0>;
55			clock-frequency = <0>;
56		};
57
58		slow_xtal: slow_xtal {
59			compatible = "fixed-clock";
60			#clock-cells = <0>;
61			clock-frequency = <0>;
62		};
63	};
64
65	ahb {
66		compatible = "simple-bus";
67		#address-cells = <1>;
68		#size-cells = <1>;
69		ranges;
70
71		apb {
72			compatible = "simple-bus";
73			#address-cells = <1>;
74			#size-cells = <1>;
75			ranges;
76
77			aic: interrupt-controller@fffff000 {
78				#interrupt-cells = <3>;
79				compatible = "atmel,at91rm9200-aic";
80				interrupt-controller;
81				reg = <0xfffff000 0x200>;
82				atmel,external-irqs = <30 31>;
83			};
84
85			pmc: pmc@fffffc00 {
86				compatible = "atmel,at91rm9200-pmc";
87				reg = <0xfffffc00 0x100>;
88				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
89				interrupt-controller;
90				#address-cells = <1>;
91				#size-cells = <0>;
92				#interrupt-cells = <1>;
93
94				main_osc: main_osc {
95					compatible = "atmel,at91rm9200-clk-main-osc";
96					#clock-cells = <0>;
97					interrupts-extended = <&pmc AT91_PMC_MOSCS>;
98					clocks = <&main_xtal>;
99				};
100
101				main: mainck {
102					compatible = "atmel,at91rm9200-clk-main";
103					#clock-cells = <0>;
104					clocks = <&main_osc>;
105				};
106
107				plla: pllack {
108					compatible = "atmel,at91rm9200-clk-pll";
109					#clock-cells = <0>;
110					interrupts-extended = <&pmc AT91_PMC_LOCKA>;
111					clocks = <&main>;
112					reg = <0>;
113					atmel,clk-input-range = <1000000 32000000>;
114					#atmel,pll-clk-output-range-cells = <4>;
115					atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
116								<190000000 240000000 2 1>;
117				};
118
119				pllb: pllbck {
120					compatible = "atmel,at91rm9200-clk-pll";
121					#clock-cells = <0>;
122					interrupts-extended = <&pmc AT91_PMC_LOCKB>;
123					clocks = <&main>;
124					reg = <1>;
125					atmel,clk-input-range = <1000000 5000000>;
126					#atmel,pll-clk-output-range-cells = <4>;
127					atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
128				};
129
130				mck: masterck {
131					compatible = "atmel,at91rm9200-clk-master";
132					#clock-cells = <0>;
133					interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
134					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
135					atmel,clk-output-range = <0 120000000>;
136					atmel,clk-divisors = <1 2 4 0>;
137				};
138
139				usb: usbck {
140					compatible = "atmel,at91rm9200-clk-usb";
141					#clock-cells = <0>;
142					atmel,clk-divisors = <1 2 4 0>;
143					clocks = <&pllb>;
144				};
145
146				prog: progck {
147					compatible = "atmel,at91rm9200-clk-programmable";
148					#address-cells = <1>;
149					#size-cells = <0>;
150					interrupt-parent = <&pmc>;
151					clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
152
153					prog0: prog0 {
154						#clock-cells = <0>;
155						reg = <0>;
156						interrupts = <AT91_PMC_PCKRDY(0)>;
157					};
158
159					prog1: prog1 {
160						#clock-cells = <0>;
161						reg = <1>;
162						interrupts = <AT91_PMC_PCKRDY(1)>;
163					};
164
165					prog2: prog2 {
166						#clock-cells = <0>;
167						reg = <2>;
168						interrupts = <AT91_PMC_PCKRDY(2)>;
169					};
170
171					prog3: prog3 {
172						#clock-cells = <0>;
173						reg = <3>;
174						interrupts = <AT91_PMC_PCKRDY(3)>;
175					};
176				};
177
178				systemck {
179					compatible = "atmel,at91rm9200-clk-system";
180					#address-cells = <1>;
181					#size-cells = <0>;
182
183					uhpck: uhpck {
184						#clock-cells = <0>;
185						reg = <6>;
186						clocks = <&usb>;
187					};
188
189					udpck: udpck {
190						#clock-cells = <0>;
191						reg = <7>;
192						clocks = <&usb>;
193					};
194
195					pck0: pck0 {
196						#clock-cells = <0>;
197						reg = <8>;
198						clocks = <&prog0>;
199					};
200
201					pck1: pck1 {
202						#clock-cells = <0>;
203						reg = <9>;
204						clocks = <&prog1>;
205					};
206
207					pck2: pck2 {
208						#clock-cells = <0>;
209						reg = <10>;
210						clocks = <&prog2>;
211					};
212
213					pck3: pck3 {
214						#clock-cells = <0>;
215						reg = <11>;
216						clocks = <&prog3>;
217					};
218				};
219
220				periphck {
221					compatible = "atmel,at91rm9200-clk-peripheral";
222					#address-cells = <1>;
223					#size-cells = <0>;
224					clocks = <&mck>;
225
226					pioA_clk: pioA_clk {
227						#clock-cells = <0>;
228						reg = <2>;
229					};
230
231					pioB_clk: pioB_clk {
232						#clock-cells = <0>;
233						reg = <3>;
234					};
235
236					pioCDE_clk: pioCDE_clk {
237						#clock-cells = <0>;
238						reg = <4>;
239					};
240
241					usart0_clk: usart0_clk {
242						#clock-cells = <0>;
243						reg = <7>;
244					};
245
246					usart1_clk: usart1_clk {
247						#clock-cells = <0>;
248						reg = <8>;
249					};
250
251					usart2_clk: usart2_clk {
252						#clock-cells = <0>;
253						reg = <9>;
254					};
255
256					mci0_clk: mci0_clk {
257						#clock-cells = <0>;
258						reg = <10>;
259					};
260
261					mci1_clk: mci1_clk {
262						#clock-cells = <0>;
263						reg = <11>;
264					};
265
266					can_clk: can_clk {
267						#clock-cells = <0>;
268						reg = <12>;
269					};
270
271					twi0_clk: twi0_clk {
272						#clock-cells = <0>;
273						reg = <13>;
274					};
275
276					spi0_clk: spi0_clk {
277						#clock-cells = <0>;
278						reg = <14>;
279					};
280
281					spi1_clk: spi1_clk {
282						#clock-cells = <0>;
283						reg = <15>;
284					};
285
286					ssc0_clk: ssc0_clk {
287						#clock-cells = <0>;
288						reg = <16>;
289					};
290
291					ssc1_clk: ssc1_clk {
292						#clock-cells = <0>;
293						reg = <17>;
294					};
295
296					ac91_clk: ac97_clk {
297						#clock-cells = <0>;
298						reg = <18>;
299					};
300
301					tcb_clk: tcb_clk {
302						#clock-cells = <0>;
303						reg = <19>;
304					};
305
306					pwm_clk: pwm_clk {
307						#clock-cells = <0>;
308						reg = <20>;
309					};
310
311					macb0_clk: macb0_clk {
312						#clock-cells = <0>;
313						reg = <21>;
314					};
315
316					g2de_clk: g2de_clk {
317						#clock-cells = <0>;
318						reg = <23>;
319					};
320
321					udc_clk: udc_clk {
322						#clock-cells = <0>;
323						reg = <24>;
324					};
325
326					isi_clk: isi_clk {
327						#clock-cells = <0>;
328						reg = <25>;
329					};
330
331					lcd_clk: lcd_clk {
332						#clock-cells = <0>;
333						reg = <26>;
334					};
335
336					dma_clk: dma_clk {
337						#clock-cells = <0>;
338						reg = <27>;
339					};
340
341					ohci_clk: ohci_clk {
342						#clock-cells = <0>;
343						reg = <29>;
344					};
345				};
346			};
347
348			ramc: ramc@ffffe200 {
349				compatible = "atmel,at91sam9260-sdramc";
350				reg = <0xffffe200 0x200
351				       0xffffe800 0x200>;
352			};
353
354			pit: timer@fffffd30 {
355				compatible = "atmel,at91sam9260-pit";
356				reg = <0xfffffd30 0xf>;
357				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
358				clocks = <&mck>;
359			};
360
361			tcb0: timer@fff7c000 {
362				compatible = "atmel,at91rm9200-tcb";
363				reg = <0xfff7c000 0x100>;
364				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
365				clocks = <&tcb_clk>;
366				clock-names = "t0_clk";
367			};
368
369			rstc@fffffd00 {
370				compatible = "atmel,at91sam9260-rstc";
371				reg = <0xfffffd00 0x10>;
372			};
373
374			shdwc@fffffd10 {
375				compatible = "atmel,at91sam9260-shdwc";
376				reg = <0xfffffd10 0x10>;
377			};
378
379			pinctrl@fffff200 {
380				#address-cells = <1>;
381				#size-cells = <1>;
382				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
383				ranges = <0xfffff200 0xfffff200 0xa00>;
384
385				atmel,mux-mask = <
386				      /*    A         B     */
387				       0xfffffffb 0xffffe07f  /* pioA */
388				       0x0007ffff 0x39072fff  /* pioB */
389				       0xffffffff 0x3ffffff8  /* pioC */
390				       0xfffffbff 0xffffffff  /* pioD */
391				       0xffe00fff 0xfbfcff00  /* pioE */
392				      >;
393
394				/* shared pinctrl settings */
395				dbgu {
396					pinctrl_dbgu: dbgu-0 {
397						atmel,pins =
398							<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC30 periph A */
399							 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PC31 periph with pullup */
400					};
401				};
402
403				usart0 {
404					pinctrl_usart0: usart0-0 {
405						atmel,pins =
406							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA26 periph A with pullup */
407							 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA27 periph A */
408					};
409
410					pinctrl_usart0_rts: usart0_rts-0 {
411						atmel,pins =
412							<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA28 periph A */
413					};
414
415					pinctrl_usart0_cts: usart0_cts-0 {
416						atmel,pins =
417							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA29 periph A */
418					};
419				};
420
421				usart1 {
422					pinctrl_usart1: usart1-0 {
423						atmel,pins =
424							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PD0 periph A with pullup */
425							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD1 periph A */
426					};
427
428					pinctrl_usart1_rts: usart1_rts-0 {
429						atmel,pins =
430							<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD7 periph B */
431					};
432
433					pinctrl_usart1_cts: usart1_cts-0 {
434						atmel,pins =
435							<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD8 periph B */
436					};
437				};
438
439				usart2 {
440					pinctrl_usart2: usart2-0 {
441						atmel,pins =
442							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PD2 periph A with pullup */
443							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PD3 periph A */
444					};
445
446					pinctrl_usart2_rts: usart2_rts-0 {
447						atmel,pins =
448							<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD5 periph B */
449					};
450
451					pinctrl_usart2_cts: usart2_cts-0 {
452						atmel,pins =
453							<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD6 periph B */
454					};
455				};
456
457				nand {
458					pinctrl_nand: nand-0 {
459						atmel,pins =
460							<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP	/* PA22 gpio RDY pin pull_up*/
461							 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;	/* PD15 gpio enable pin pull_up */
462					};
463				};
464
465				macb {
466					pinctrl_macb_rmii: macb_rmii-0 {
467						atmel,pins =
468							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
469							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE21 periph A */
470							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE23 periph A */
471							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE24 periph A */
472							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE25 periph A */
473							 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE26 periph A */
474							 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE27 periph A */
475							 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE28 periph A */
476							 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE29 periph A */
477							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
478					};
479
480					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
481						atmel,pins =
482							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC20 periph B */
483							 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC21 periph B */
484							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC22 periph B */
485							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC23 periph B */
486							 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC24 periph B */
487							 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
488							 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC27 periph B */
489							 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PE22 periph B */
490					};
491				};
492
493				mmc0 {
494					pinctrl_mmc0_clk: mmc0_clk-0 {
495						atmel,pins =
496							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA12 periph A */
497					};
498
499					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
500						atmel,pins =
501							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
502							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA0 periph A with pullup */
503					};
504
505					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
506						atmel,pins =
507							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
508							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
509							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
510					};
511
512					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
513						atmel,pins =
514							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
515							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA17 periph A with pullup */
516					};
517
518					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
519						atmel,pins =
520							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
521							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
522							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
523					};
524				};
525
526				mmc1 {
527					pinctrl_mmc1_clk: mmc1_clk-0 {
528						atmel,pins =
529							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA6 periph A */
530					};
531
532					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
533						atmel,pins =
534							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
535							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA8 periph A with pullup */
536					};
537
538					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
539						atmel,pins =
540							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA9 periph A with pullup */
541							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA10 periph A with pullup */
542							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA11 periph A with pullup */
543					};
544
545					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
546						atmel,pins =
547							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA21 periph A with pullup */
548							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA22 periph A with pullup */
549					};
550
551					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
552						atmel,pins =
553							<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA23 periph A with pullup */
554							 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
555							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA25 periph A with pullup */
556					};
557				};
558
559				ssc0 {
560					pinctrl_ssc0_tx: ssc0_tx-0 {
561						atmel,pins =
562							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB0 periph B */
563							 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB1 periph B */
564							 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
565					};
566
567					pinctrl_ssc0_rx: ssc0_rx-0 {
568						atmel,pins =
569							<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB3 periph B */
570							 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B */
571							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B */
572					};
573				};
574
575				ssc1 {
576					pinctrl_ssc1_tx: ssc1_tx-0 {
577						atmel,pins =
578							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
579							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
580							 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB8 periph A */
581					};
582
583					pinctrl_ssc1_rx: ssc1_rx-0 {
584						atmel,pins =
585							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
586							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB10 periph A */
587							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB11 periph A */
588					};
589				};
590
591				spi0 {
592					pinctrl_spi0: spi0-0 {
593						atmel,pins =
594							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA0 periph B SPI0_MISO pin */
595							 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA1 periph B SPI0_MOSI pin */
596							 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA2 periph B SPI0_SPCK pin */
597					};
598				};
599
600				spi1 {
601					pinctrl_spi1: spi1-0 {
602						atmel,pins =
603							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A SPI1_MISO pin */
604							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A SPI1_MOSI pin */
605							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A SPI1_SPCK pin */
606					};
607				};
608
609				tcb0 {
610					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
611						atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
612					};
613
614					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
615						atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
616					};
617
618					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
619						atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
620					};
621
622					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
623						atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
624					};
625
626					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
627						atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
628					};
629
630					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
631						atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
632					};
633
634					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
635						atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
636					};
637
638					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
639						atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
640					};
641
642					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
643						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
644					};
645				};
646
647				fb {
648					pinctrl_fb: fb-0 {
649						atmel,pins =
650							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC1 periph A */
651							 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC2 periph A */
652							 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC3 periph A */
653							 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB9 periph B */
654							 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC6 periph A */
655							 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC7 periph A */
656							 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC8 periph A */
657							 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC9 periph A */
658							 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC10 periph A */
659							 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC11 periph A */
660							 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC14 periph A */
661							 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC15 periph A */
662							 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC16 periph A */
663							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC12 periph B */
664							 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC18 periph A */
665							 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC19 periph A */
666							 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC22 periph A */
667							 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC23 periph A */
668							 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC24 periph A */
669							 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC17 periph B */
670							 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC26 periph A */
671							 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PC27 periph A */
672					};
673				};
674
675				pioA: gpio@fffff200 {
676					compatible = "atmel,at91rm9200-gpio";
677					reg = <0xfffff200 0x200>;
678					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
679					#gpio-cells = <2>;
680					gpio-controller;
681					interrupt-controller;
682					#interrupt-cells = <2>;
683					clocks = <&pioA_clk>;
684				};
685
686				pioB: gpio@fffff400 {
687					compatible = "atmel,at91rm9200-gpio";
688					reg = <0xfffff400 0x200>;
689					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
690					#gpio-cells = <2>;
691					gpio-controller;
692					interrupt-controller;
693					#interrupt-cells = <2>;
694					clocks = <&pioB_clk>;
695				};
696
697				pioC: gpio@fffff600 {
698					compatible = "atmel,at91rm9200-gpio";
699					reg = <0xfffff600 0x200>;
700					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
701					#gpio-cells = <2>;
702					gpio-controller;
703					interrupt-controller;
704					#interrupt-cells = <2>;
705					clocks = <&pioCDE_clk>;
706				};
707
708				pioD: gpio@fffff800 {
709					compatible = "atmel,at91rm9200-gpio";
710					reg = <0xfffff800 0x200>;
711					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
712					#gpio-cells = <2>;
713					gpio-controller;
714					interrupt-controller;
715					#interrupt-cells = <2>;
716					clocks = <&pioCDE_clk>;
717				};
718
719				pioE: gpio@fffffa00 {
720					compatible = "atmel,at91rm9200-gpio";
721					reg = <0xfffffa00 0x200>;
722					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
723					#gpio-cells = <2>;
724					gpio-controller;
725					interrupt-controller;
726					#interrupt-cells = <2>;
727					clocks = <&pioCDE_clk>;
728				};
729			};
730
731			dbgu: serial@ffffee00 {
732				compatible = "atmel,at91sam9260-usart";
733				reg = <0xffffee00 0x200>;
734				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
735				pinctrl-names = "default";
736				pinctrl-0 = <&pinctrl_dbgu>;
737				clocks = <&mck>;
738				clock-names = "usart";
739				status = "disabled";
740			};
741
742			usart0: serial@fff8c000 {
743				compatible = "atmel,at91sam9260-usart";
744				reg = <0xfff8c000 0x200>;
745				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
746				atmel,use-dma-rx;
747				atmel,use-dma-tx;
748				pinctrl-names = "default";
749				pinctrl-0 = <&pinctrl_usart0>;
750				clocks = <&usart0_clk>;
751				clock-names = "usart";
752				status = "disabled";
753			};
754
755			usart1: serial@fff90000 {
756				compatible = "atmel,at91sam9260-usart";
757				reg = <0xfff90000 0x200>;
758				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
759				atmel,use-dma-rx;
760				atmel,use-dma-tx;
761				pinctrl-names = "default";
762				pinctrl-0 = <&pinctrl_usart1>;
763				clocks = <&usart1_clk>;
764				clock-names = "usart";
765				status = "disabled";
766			};
767
768			usart2: serial@fff94000 {
769				compatible = "atmel,at91sam9260-usart";
770				reg = <0xfff94000 0x200>;
771				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
772				atmel,use-dma-rx;
773				atmel,use-dma-tx;
774				pinctrl-names = "default";
775				pinctrl-0 = <&pinctrl_usart2>;
776				clocks = <&usart2_clk>;
777				clock-names = "usart";
778				status = "disabled";
779			};
780
781			ssc0: ssc@fff98000 {
782				compatible = "atmel,at91rm9200-ssc";
783				reg = <0xfff98000 0x4000>;
784				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
785				pinctrl-names = "default";
786				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
787				clocks = <&ssc0_clk>;
788				clock-names = "pclk";
789				status = "disabled";
790			};
791
792			ssc1: ssc@fff9c000 {
793				compatible = "atmel,at91rm9200-ssc";
794				reg = <0xfff9c000 0x4000>;
795				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
796				pinctrl-names = "default";
797				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
798				clocks = <&ssc1_clk>;
799				clock-names = "pclk";
800				status = "disabled";
801			};
802
803			macb0: ethernet@fffbc000 {
804				compatible = "cdns,at32ap7000-macb", "cdns,macb";
805				reg = <0xfffbc000 0x100>;
806				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
807				pinctrl-names = "default";
808				pinctrl-0 = <&pinctrl_macb_rmii>;
809				clocks = <&macb0_clk>, <&macb0_clk>;
810				clock-names = "hclk", "pclk";
811				status = "disabled";
812			};
813
814			usb1: gadget@fff78000 {
815				compatible = "atmel,at91rm9200-udc";
816				reg = <0xfff78000 0x4000>;
817				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
818				clocks = <&udc_clk>, <&udpck>;
819				clock-names = "pclk", "hclk";
820				status = "disabled";
821			};
822
823			i2c0: i2c@fff88000 {
824				compatible = "atmel,at91sam9260-i2c";
825				reg = <0xfff88000 0x100>;
826				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
827				#address-cells = <1>;
828				#size-cells = <0>;
829				clocks = <&twi0_clk>;
830				status = "disabled";
831			};
832
833			mmc0: mmc@fff80000 {
834				compatible = "atmel,hsmci";
835				reg = <0xfff80000 0x600>;
836				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
837				#address-cells = <1>;
838				#size-cells = <0>;
839				clocks = <&mci0_clk>;
840				clock-names = "mci_clk";
841				status = "disabled";
842			};
843
844			mmc1: mmc@fff84000 {
845				compatible = "atmel,hsmci";
846				reg = <0xfff84000 0x600>;
847				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
848				#address-cells = <1>;
849				#size-cells = <0>;
850				clocks = <&mci1_clk>;
851				clock-names = "mci_clk";
852				status = "disabled";
853			};
854
855			watchdog@fffffd40 {
856				compatible = "atmel,at91sam9260-wdt";
857				reg = <0xfffffd40 0x10>;
858				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
859				atmel,watchdog-type = "hardware";
860				atmel,reset-type = "all";
861				atmel,dbg-halt;
862				atmel,idle-halt;
863				status = "disabled";
864			};
865
866			spi0: spi@fffa4000 {
867				#address-cells = <1>;
868				#size-cells = <0>;
869				compatible = "atmel,at91rm9200-spi";
870				reg = <0xfffa4000 0x200>;
871				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
872				pinctrl-names = "default";
873				pinctrl-0 = <&pinctrl_spi0>;
874				clocks = <&spi0_clk>;
875				clock-names = "spi_clk";
876				status = "disabled";
877			};
878
879			spi1: spi@fffa8000 {
880				#address-cells = <1>;
881				#size-cells = <0>;
882				compatible = "atmel,at91rm9200-spi";
883				reg = <0xfffa8000 0x200>;
884				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
885				pinctrl-names = "default";
886				pinctrl-0 = <&pinctrl_spi1>;
887				clocks = <&spi1_clk>;
888				clock-names = "spi_clk";
889				status = "disabled";
890			};
891
892			pwm0: pwm@fffb8000 {
893				compatible = "atmel,at91sam9rl-pwm";
894				reg = <0xfffb8000 0x300>;
895				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
896				#pwm-cells = <3>;
897				clocks = <&pwm_clk>;
898				clock-names = "pwm_clk";
899				status = "disabled";
900			};
901		};
902
903		fb0: fb@0x00700000 {
904			compatible = "atmel,at91sam9263-lcdc";
905			reg = <0x00700000 0x1000>;
906			interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
907			pinctrl-names = "default";
908			pinctrl-0 = <&pinctrl_fb>;
909			status = "disabled";
910		};
911
912		nand0: nand@40000000 {
913			compatible = "atmel,at91rm9200-nand";
914			#address-cells = <1>;
915			#size-cells = <1>;
916			reg = <0x40000000 0x10000000
917			       0xffffe000 0x200
918			      >;
919			atmel,nand-addr-offset = <21>;
920			atmel,nand-cmd-offset = <22>;
921			pinctrl-names = "default";
922			pinctrl-0 = <&pinctrl_nand>;
923			gpios = <&pioA 22 GPIO_ACTIVE_HIGH
924				 &pioD 15 GPIO_ACTIVE_HIGH
925				 0
926				>;
927			status = "disabled";
928		};
929
930		usb0: ohci@00a00000 {
931			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
932			reg = <0x00a00000 0x100000>;
933			interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
934			clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
935			clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
936			status = "disabled";
937		};
938	};
939
940	i2c@0 {
941		compatible = "i2c-gpio";
942		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
943			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
944			>;
945		i2c-gpio,sda-open-drain;
946		i2c-gpio,scl-open-drain;
947		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
948		#address-cells = <1>;
949		#size-cells = <0>;
950		status = "disabled";
951	};
952};
953