at91sam9263.dtsi revision 262573
1/* 2 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 3 * 4 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5 * 6 * Licensed under GPLv2 only. 7 */ 8 9#include "skeleton.dtsi" 10#include <dt-bindings/pinctrl/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13 14/ { 15 model = "Atmel AT91SAM9263 family SoC"; 16 compatible = "atmel,at91sam9263"; 17 interrupt-parent = <&aic>; 18 19 aliases { 20 serial0 = &dbgu; 21 serial1 = &usart0; 22 serial2 = &usart1; 23 serial3 = &usart2; 24 gpio0 = &pioA; 25 gpio1 = &pioB; 26 gpio2 = &pioC; 27 gpio3 = &pioD; 28 gpio4 = &pioE; 29 tcb0 = &tcb0; 30 i2c0 = &i2c0; 31 ssc0 = &ssc0; 32 ssc1 = &ssc1; 33 pwm0 = &pwm0; 34 }; 35 cpus { 36 #address-cells = <0>; 37 #size-cells = <0>; 38 39 cpu { 40 compatible = "arm,arm926ej-s"; 41 device_type = "cpu"; 42 }; 43 }; 44 45 memory { 46 reg = <0x20000000 0x08000000>; 47 }; 48 49 ahb { 50 compatible = "simple-bus"; 51 #address-cells = <1>; 52 #size-cells = <1>; 53 ranges; 54 55 apb { 56 compatible = "simple-bus"; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 ranges; 60 61 aic: interrupt-controller@fffff000 { 62 #interrupt-cells = <3>; 63 compatible = "atmel,at91rm9200-aic"; 64 interrupt-controller; 65 reg = <0xfffff000 0x200>; 66 atmel,external-irqs = <30 31>; 67 }; 68 69 pmc: pmc@fffffc00 { 70 compatible = "atmel,at91rm9200-pmc"; 71 reg = <0xfffffc00 0x100>; 72 }; 73 74 ramc: ramc@ffffe200 { 75 compatible = "atmel,at91sam9260-sdramc"; 76 reg = <0xffffe200 0x200 77 0xffffe800 0x200>; 78 }; 79 80 pit: timer@fffffd30 { 81 compatible = "atmel,at91sam9260-pit"; 82 reg = <0xfffffd30 0xf>; 83 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 84 }; 85 86 tcb0: timer@fff7c000 { 87 compatible = "atmel,at91rm9200-tcb"; 88 reg = <0xfff7c000 0x100>; 89 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 90 }; 91 92 rstc@fffffd00 { 93 compatible = "atmel,at91sam9260-rstc"; 94 reg = <0xfffffd00 0x10>; 95 }; 96 97 shdwc@fffffd10 { 98 compatible = "atmel,at91sam9260-shdwc"; 99 reg = <0xfffffd10 0x10>; 100 }; 101 102 pinctrl@fffff200 { 103 #address-cells = <1>; 104 #size-cells = <1>; 105 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 106 ranges = <0xfffff200 0xfffff200 0xa00>; 107 108 atmel,mux-mask = < 109 /* A B */ 110 0xfffffffb 0xffffe07f /* pioA */ 111 0x0007ffff 0x39072fff /* pioB */ 112 0xffffffff 0x3ffffff8 /* pioC */ 113 0xfffffbff 0xffffffff /* pioD */ 114 0xffe00fff 0xfbfcff00 /* pioE */ 115 >; 116 117 /* shared pinctrl settings */ 118 dbgu { 119 pinctrl_dbgu: dbgu-0 { 120 atmel,pins = 121 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */ 122 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */ 123 }; 124 }; 125 126 usart0 { 127 pinctrl_usart0: usart0-0 { 128 atmel,pins = 129 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ 130 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ 131 }; 132 133 pinctrl_usart0_rts: usart0_rts-0 { 134 atmel,pins = 135 <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ 136 }; 137 138 pinctrl_usart0_cts: usart0_cts-0 { 139 atmel,pins = 140 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ 141 }; 142 }; 143 144 usart1 { 145 pinctrl_usart1: usart1-0 { 146 atmel,pins = 147 <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ 148 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ 149 }; 150 151 pinctrl_usart1_rts: usart1_rts-0 { 152 atmel,pins = 153 <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ 154 }; 155 156 pinctrl_usart1_cts: usart1_cts-0 { 157 atmel,pins = 158 <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ 159 }; 160 }; 161 162 usart2 { 163 pinctrl_usart2: usart2-0 { 164 atmel,pins = 165 <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ 166 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ 167 }; 168 169 pinctrl_usart2_rts: usart2_rts-0 { 170 atmel,pins = 171 <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ 172 }; 173 174 pinctrl_usart2_cts: usart2_cts-0 { 175 atmel,pins = 176 <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ 177 }; 178 }; 179 180 nand { 181 pinctrl_nand: nand-0 { 182 atmel,pins = 183 <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ 184 AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ 185 }; 186 }; 187 188 macb { 189 pinctrl_macb_rmii: macb_rmii-0 { 190 atmel,pins = 191 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 192 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 193 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 194 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 195 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 196 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 197 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 198 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 199 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 200 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 201 }; 202 203 pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 204 atmel,pins = 205 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ 206 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ 207 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ 208 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ 209 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ 210 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 211 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ 212 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ 213 }; 214 }; 215 216 mmc0 { 217 pinctrl_mmc0_clk: mmc0_clk-0 { 218 atmel,pins = 219 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ 220 }; 221 222 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 223 atmel,pins = 224 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 225 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ 226 }; 227 228 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 229 atmel,pins = 230 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 231 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 232 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 233 }; 234 235 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 236 atmel,pins = 237 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 238 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ 239 }; 240 241 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 242 atmel,pins = 243 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 244 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 245 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 246 }; 247 }; 248 249 mmc1 { 250 pinctrl_mmc1_clk: mmc1_clk-0 { 251 atmel,pins = 252 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ 253 }; 254 255 pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 256 atmel,pins = 257 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 258 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ 259 }; 260 261 pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 262 atmel,pins = 263 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ 264 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ 265 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ 266 }; 267 268 pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 269 atmel,pins = 270 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ 271 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ 272 }; 273 274 pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 275 atmel,pins = 276 <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ 277 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 278 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ 279 }; 280 }; 281 282 ssc0 { 283 pinctrl_ssc0_tx: ssc0_tx-0 { 284 atmel,pins = 285 <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ 286 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ 287 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ 288 }; 289 290 pinctrl_ssc0_rx: ssc0_rx-0 { 291 atmel,pins = 292 <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ 293 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ 294 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ 295 }; 296 }; 297 298 ssc1 { 299 pinctrl_ssc1_tx: ssc1_tx-0 { 300 atmel,pins = 301 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 302 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 303 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ 304 }; 305 306 pinctrl_ssc1_rx: ssc1_rx-0 { 307 atmel,pins = 308 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 309 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ 310 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 311 }; 312 }; 313 314 spi0 { 315 pinctrl_spi0: spi0-0 { 316 atmel,pins = 317 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ 318 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ 319 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ 320 }; 321 }; 322 323 spi1 { 324 pinctrl_spi1: spi1-0 { 325 atmel,pins = 326 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ 327 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ 328 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ 329 }; 330 }; 331 332 tcb0 { 333 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 334 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 335 }; 336 337 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 338 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 339 }; 340 341 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 342 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 343 }; 344 345 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 346 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 347 }; 348 349 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 350 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 351 }; 352 353 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 354 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 355 }; 356 357 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 358 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 359 }; 360 361 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 362 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 363 }; 364 365 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 366 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 367 }; 368 }; 369 370 fb { 371 pinctrl_fb: fb-0 { 372 atmel,pins = 373 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ 374 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ 375 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ 376 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ 377 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ 378 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ 379 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ 380 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ 381 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ 382 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ 383 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ 384 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ 385 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ 386 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ 387 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ 388 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ 389 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ 390 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ 391 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ 392 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ 393 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ 394 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ 395 }; 396 }; 397 398 pioA: gpio@fffff200 { 399 compatible = "atmel,at91rm9200-gpio"; 400 reg = <0xfffff200 0x200>; 401 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 402 #gpio-cells = <2>; 403 gpio-controller; 404 interrupt-controller; 405 #interrupt-cells = <2>; 406 }; 407 408 pioB: gpio@fffff400 { 409 compatible = "atmel,at91rm9200-gpio"; 410 reg = <0xfffff400 0x200>; 411 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 412 #gpio-cells = <2>; 413 gpio-controller; 414 interrupt-controller; 415 #interrupt-cells = <2>; 416 }; 417 418 pioC: gpio@fffff600 { 419 compatible = "atmel,at91rm9200-gpio"; 420 reg = <0xfffff600 0x200>; 421 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 422 #gpio-cells = <2>; 423 gpio-controller; 424 interrupt-controller; 425 #interrupt-cells = <2>; 426 }; 427 428 pioD: gpio@fffff800 { 429 compatible = "atmel,at91rm9200-gpio"; 430 reg = <0xfffff800 0x200>; 431 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 432 #gpio-cells = <2>; 433 gpio-controller; 434 interrupt-controller; 435 #interrupt-cells = <2>; 436 }; 437 438 pioE: gpio@fffffa00 { 439 compatible = "atmel,at91rm9200-gpio"; 440 reg = <0xfffffa00 0x200>; 441 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 442 #gpio-cells = <2>; 443 gpio-controller; 444 interrupt-controller; 445 #interrupt-cells = <2>; 446 }; 447 }; 448 449 dbgu: serial@ffffee00 { 450 compatible = "atmel,at91sam9260-usart"; 451 reg = <0xffffee00 0x200>; 452 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 453 pinctrl-names = "default"; 454 pinctrl-0 = <&pinctrl_dbgu>; 455 status = "disabled"; 456 }; 457 458 usart0: serial@fff8c000 { 459 compatible = "atmel,at91sam9260-usart"; 460 reg = <0xfff8c000 0x200>; 461 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 462 atmel,use-dma-rx; 463 atmel,use-dma-tx; 464 pinctrl-names = "default"; 465 pinctrl-0 = <&pinctrl_usart0>; 466 status = "disabled"; 467 }; 468 469 usart1: serial@fff90000 { 470 compatible = "atmel,at91sam9260-usart"; 471 reg = <0xfff90000 0x200>; 472 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 473 atmel,use-dma-rx; 474 atmel,use-dma-tx; 475 pinctrl-names = "default"; 476 pinctrl-0 = <&pinctrl_usart1>; 477 status = "disabled"; 478 }; 479 480 usart2: serial@fff94000 { 481 compatible = "atmel,at91sam9260-usart"; 482 reg = <0xfff94000 0x200>; 483 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 484 atmel,use-dma-rx; 485 atmel,use-dma-tx; 486 pinctrl-names = "default"; 487 pinctrl-0 = <&pinctrl_usart2>; 488 status = "disabled"; 489 }; 490 491 ssc0: ssc@fff98000 { 492 compatible = "atmel,at91rm9200-ssc"; 493 reg = <0xfff98000 0x4000>; 494 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 495 pinctrl-names = "default"; 496 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 497 status = "disabled"; 498 }; 499 500 ssc1: ssc@fff9c000 { 501 compatible = "atmel,at91rm9200-ssc"; 502 reg = <0xfff9c000 0x4000>; 503 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 504 pinctrl-names = "default"; 505 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 506 status = "disabled"; 507 }; 508 509 macb0: ethernet@fffbc000 { 510 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 511 reg = <0xfffbc000 0x100>; 512 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 513 pinctrl-names = "default"; 514 pinctrl-0 = <&pinctrl_macb_rmii>; 515 status = "disabled"; 516 }; 517 518 usb1: gadget@fff78000 { 519 compatible = "atmel,at91rm9200-udc"; 520 reg = <0xfff78000 0x4000>; 521 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 522 status = "disabled"; 523 }; 524 525 i2c0: i2c@fff88000 { 526 compatible = "atmel,at91sam9260-i2c"; 527 reg = <0xfff88000 0x100>; 528 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 529 #address-cells = <1>; 530 #size-cells = <0>; 531 status = "disabled"; 532 }; 533 534 mmc0: mmc@fff80000 { 535 compatible = "atmel,hsmci"; 536 reg = <0xfff80000 0x600>; 537 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 538 #address-cells = <1>; 539 #size-cells = <0>; 540 status = "disabled"; 541 }; 542 543 mmc1: mmc@fff84000 { 544 compatible = "atmel,hsmci"; 545 reg = <0xfff84000 0x600>; 546 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 547 #address-cells = <1>; 548 #size-cells = <0>; 549 status = "disabled"; 550 }; 551 552 watchdog@fffffd40 { 553 compatible = "atmel,at91sam9260-wdt"; 554 reg = <0xfffffd40 0x10>; 555 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 556 atmel,watchdog-type = "hardware"; 557 atmel,reset-type = "all"; 558 atmel,dbg-halt; 559 atmel,idle-halt; 560 status = "disabled"; 561 }; 562 563 spi0: spi@fffa4000 { 564 #address-cells = <1>; 565 #size-cells = <0>; 566 compatible = "atmel,at91rm9200-spi"; 567 reg = <0xfffa4000 0x200>; 568 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 569 pinctrl-names = "default"; 570 pinctrl-0 = <&pinctrl_spi0>; 571 status = "disabled"; 572 }; 573 574 spi1: spi@fffa8000 { 575 #address-cells = <1>; 576 #size-cells = <0>; 577 compatible = "atmel,at91rm9200-spi"; 578 reg = <0xfffa8000 0x200>; 579 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; 580 pinctrl-names = "default"; 581 pinctrl-0 = <&pinctrl_spi1>; 582 status = "disabled"; 583 }; 584 585 pwm0: pwm@fffb8000 { 586 compatible = "atmel,at91sam9rl-pwm"; 587 reg = <0xfffb8000 0x300>; 588 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; 589 #pwm-cells = <3>; 590 status = "disabled"; 591 }; 592 }; 593 594 fb0: fb@0x00700000 { 595 compatible = "atmel,at91sam9263-lcdc"; 596 reg = <0x00700000 0x1000>; 597 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; 598 pinctrl-names = "default"; 599 pinctrl-0 = <&pinctrl_fb>; 600 status = "disabled"; 601 }; 602 603 nand0: nand@40000000 { 604 compatible = "atmel,at91rm9200-nand"; 605 #address-cells = <1>; 606 #size-cells = <1>; 607 reg = <0x40000000 0x10000000 608 0xffffe000 0x200 609 >; 610 atmel,nand-addr-offset = <21>; 611 atmel,nand-cmd-offset = <22>; 612 pinctrl-names = "default"; 613 pinctrl-0 = <&pinctrl_nand>; 614 gpios = <&pioA 22 GPIO_ACTIVE_HIGH 615 &pioD 15 GPIO_ACTIVE_HIGH 616 0 617 >; 618 status = "disabled"; 619 }; 620 621 usb0: ohci@00a00000 { 622 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 623 reg = <0x00a00000 0x100000>; 624 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; 625 status = "disabled"; 626 }; 627 }; 628 629 i2c@0 { 630 compatible = "i2c-gpio"; 631 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ 632 &pioB 5 GPIO_ACTIVE_HIGH /* scl */ 633 >; 634 i2c-gpio,sda-open-drain; 635 i2c-gpio,scl-open-drain; 636 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 637 #address-cells = <1>; 638 #size-cells = <0>; 639 status = "disabled"; 640 }; 641}; 642