1262569Simp/* 2262569Simp * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 3262569Simp * 4262569Simp * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 5262569Simp * 6262569Simp * Licensed under GPLv2 only. 7262569Simp */ 8262569Simp 9262569Simp#include "skeleton.dtsi" 10262569Simp#include <dt-bindings/pinctrl/at91.h> 11262569Simp#include <dt-bindings/interrupt-controller/irq.h> 12262569Simp#include <dt-bindings/gpio/gpio.h> 13270864Simp#include <dt-bindings/clock/at91.h> 14262569Simp 15262569Simp/ { 16262569Simp model = "Atmel AT91SAM9263 family SoC"; 17262569Simp compatible = "atmel,at91sam9263"; 18262569Simp interrupt-parent = <&aic>; 19262569Simp 20262569Simp aliases { 21262569Simp serial0 = &dbgu; 22262569Simp serial1 = &usart0; 23262569Simp serial2 = &usart1; 24262569Simp serial3 = &usart2; 25262569Simp gpio0 = &pioA; 26262569Simp gpio1 = &pioB; 27262569Simp gpio2 = &pioC; 28262569Simp gpio3 = &pioD; 29262569Simp gpio4 = &pioE; 30262569Simp tcb0 = &tcb0; 31262569Simp i2c0 = &i2c0; 32262569Simp ssc0 = &ssc0; 33262569Simp ssc1 = &ssc1; 34262569Simp pwm0 = &pwm0; 35262569Simp }; 36270864Simp 37262569Simp cpus { 38262569Simp #address-cells = <0>; 39262569Simp #size-cells = <0>; 40262569Simp 41262569Simp cpu { 42262569Simp compatible = "arm,arm926ej-s"; 43262569Simp device_type = "cpu"; 44262569Simp }; 45262569Simp }; 46262569Simp 47262569Simp memory { 48262569Simp reg = <0x20000000 0x08000000>; 49262569Simp }; 50262569Simp 51270864Simp clocks { 52270864Simp main_xtal: main_xtal { 53270864Simp compatible = "fixed-clock"; 54270864Simp #clock-cells = <0>; 55270864Simp clock-frequency = <0>; 56270864Simp }; 57270864Simp 58270864Simp slow_xtal: slow_xtal { 59270864Simp compatible = "fixed-clock"; 60270864Simp #clock-cells = <0>; 61270864Simp clock-frequency = <0>; 62270864Simp }; 63270864Simp }; 64270864Simp 65284090Sian sram0: sram@00300000 { 66284090Sian compatible = "mmio-sram"; 67284090Sian reg = <0x00300000 0x14000>; 68284090Sian }; 69284090Sian 70284090Sian sram1: sram@00500000 { 71284090Sian compatible = "mmio-sram"; 72284090Sian reg = <0x00300000 0x4000>; 73284090Sian }; 74284090Sian 75262569Simp ahb { 76262569Simp compatible = "simple-bus"; 77262569Simp #address-cells = <1>; 78262569Simp #size-cells = <1>; 79262569Simp ranges; 80262569Simp 81262569Simp apb { 82262569Simp compatible = "simple-bus"; 83262569Simp #address-cells = <1>; 84262569Simp #size-cells = <1>; 85262569Simp ranges; 86262569Simp 87262569Simp aic: interrupt-controller@fffff000 { 88262569Simp #interrupt-cells = <3>; 89262569Simp compatible = "atmel,at91rm9200-aic"; 90262569Simp interrupt-controller; 91262569Simp reg = <0xfffff000 0x200>; 92262569Simp atmel,external-irqs = <30 31>; 93262569Simp }; 94262569Simp 95262569Simp pmc: pmc@fffffc00 { 96262569Simp compatible = "atmel,at91rm9200-pmc"; 97262569Simp reg = <0xfffffc00 0x100>; 98270864Simp interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 99270864Simp interrupt-controller; 100270864Simp #address-cells = <1>; 101270864Simp #size-cells = <0>; 102270864Simp #interrupt-cells = <1>; 103270864Simp 104270864Simp main_osc: main_osc { 105270864Simp compatible = "atmel,at91rm9200-clk-main-osc"; 106270864Simp #clock-cells = <0>; 107270864Simp interrupts-extended = <&pmc AT91_PMC_MOSCS>; 108270864Simp clocks = <&main_xtal>; 109270864Simp }; 110270864Simp 111270864Simp main: mainck { 112270864Simp compatible = "atmel,at91rm9200-clk-main"; 113270864Simp #clock-cells = <0>; 114270864Simp clocks = <&main_osc>; 115270864Simp }; 116270864Simp 117270864Simp plla: pllack { 118270864Simp compatible = "atmel,at91rm9200-clk-pll"; 119270864Simp #clock-cells = <0>; 120270864Simp interrupts-extended = <&pmc AT91_PMC_LOCKA>; 121270864Simp clocks = <&main>; 122270864Simp reg = <0>; 123270864Simp atmel,clk-input-range = <1000000 32000000>; 124270864Simp #atmel,pll-clk-output-range-cells = <4>; 125270864Simp atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 126270864Simp <190000000 240000000 2 1>; 127270864Simp }; 128270864Simp 129270864Simp pllb: pllbck { 130270864Simp compatible = "atmel,at91rm9200-clk-pll"; 131270864Simp #clock-cells = <0>; 132270864Simp interrupts-extended = <&pmc AT91_PMC_LOCKB>; 133270864Simp clocks = <&main>; 134270864Simp reg = <1>; 135284090Sian atmel,clk-input-range = <1000000 32000000>; 136270864Simp #atmel,pll-clk-output-range-cells = <4>; 137284090Sian atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 138284090Sian <190000000 240000000 2 1>; 139270864Simp }; 140270864Simp 141270864Simp mck: masterck { 142270864Simp compatible = "atmel,at91rm9200-clk-master"; 143270864Simp #clock-cells = <0>; 144270864Simp interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 145270864Simp clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 146270864Simp atmel,clk-output-range = <0 120000000>; 147270864Simp atmel,clk-divisors = <1 2 4 0>; 148270864Simp }; 149270864Simp 150270864Simp usb: usbck { 151270864Simp compatible = "atmel,at91rm9200-clk-usb"; 152270864Simp #clock-cells = <0>; 153270864Simp atmel,clk-divisors = <1 2 4 0>; 154270864Simp clocks = <&pllb>; 155270864Simp }; 156270864Simp 157270864Simp prog: progck { 158270864Simp compatible = "atmel,at91rm9200-clk-programmable"; 159270864Simp #address-cells = <1>; 160270864Simp #size-cells = <0>; 161270864Simp interrupt-parent = <&pmc>; 162270864Simp clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 163270864Simp 164270864Simp prog0: prog0 { 165270864Simp #clock-cells = <0>; 166270864Simp reg = <0>; 167270864Simp interrupts = <AT91_PMC_PCKRDY(0)>; 168270864Simp }; 169270864Simp 170270864Simp prog1: prog1 { 171270864Simp #clock-cells = <0>; 172270864Simp reg = <1>; 173270864Simp interrupts = <AT91_PMC_PCKRDY(1)>; 174270864Simp }; 175270864Simp 176270864Simp prog2: prog2 { 177270864Simp #clock-cells = <0>; 178270864Simp reg = <2>; 179270864Simp interrupts = <AT91_PMC_PCKRDY(2)>; 180270864Simp }; 181270864Simp 182270864Simp prog3: prog3 { 183270864Simp #clock-cells = <0>; 184270864Simp reg = <3>; 185270864Simp interrupts = <AT91_PMC_PCKRDY(3)>; 186270864Simp }; 187270864Simp }; 188270864Simp 189270864Simp systemck { 190270864Simp compatible = "atmel,at91rm9200-clk-system"; 191270864Simp #address-cells = <1>; 192270864Simp #size-cells = <0>; 193270864Simp 194270864Simp uhpck: uhpck { 195270864Simp #clock-cells = <0>; 196270864Simp reg = <6>; 197270864Simp clocks = <&usb>; 198270864Simp }; 199270864Simp 200270864Simp udpck: udpck { 201270864Simp #clock-cells = <0>; 202270864Simp reg = <7>; 203270864Simp clocks = <&usb>; 204270864Simp }; 205270864Simp 206270864Simp pck0: pck0 { 207270864Simp #clock-cells = <0>; 208270864Simp reg = <8>; 209270864Simp clocks = <&prog0>; 210270864Simp }; 211270864Simp 212270864Simp pck1: pck1 { 213270864Simp #clock-cells = <0>; 214270864Simp reg = <9>; 215270864Simp clocks = <&prog1>; 216270864Simp }; 217270864Simp 218270864Simp pck2: pck2 { 219270864Simp #clock-cells = <0>; 220270864Simp reg = <10>; 221270864Simp clocks = <&prog2>; 222270864Simp }; 223270864Simp 224270864Simp pck3: pck3 { 225270864Simp #clock-cells = <0>; 226270864Simp reg = <11>; 227270864Simp clocks = <&prog3>; 228270864Simp }; 229270864Simp }; 230270864Simp 231270864Simp periphck { 232270864Simp compatible = "atmel,at91rm9200-clk-peripheral"; 233270864Simp #address-cells = <1>; 234270864Simp #size-cells = <0>; 235270864Simp clocks = <&mck>; 236270864Simp 237270864Simp pioA_clk: pioA_clk { 238270864Simp #clock-cells = <0>; 239270864Simp reg = <2>; 240270864Simp }; 241270864Simp 242270864Simp pioB_clk: pioB_clk { 243270864Simp #clock-cells = <0>; 244270864Simp reg = <3>; 245270864Simp }; 246270864Simp 247270864Simp pioCDE_clk: pioCDE_clk { 248270864Simp #clock-cells = <0>; 249270864Simp reg = <4>; 250270864Simp }; 251270864Simp 252270864Simp usart0_clk: usart0_clk { 253270864Simp #clock-cells = <0>; 254270864Simp reg = <7>; 255270864Simp }; 256270864Simp 257270864Simp usart1_clk: usart1_clk { 258270864Simp #clock-cells = <0>; 259270864Simp reg = <8>; 260270864Simp }; 261270864Simp 262270864Simp usart2_clk: usart2_clk { 263270864Simp #clock-cells = <0>; 264270864Simp reg = <9>; 265270864Simp }; 266270864Simp 267270864Simp mci0_clk: mci0_clk { 268270864Simp #clock-cells = <0>; 269270864Simp reg = <10>; 270270864Simp }; 271270864Simp 272270864Simp mci1_clk: mci1_clk { 273270864Simp #clock-cells = <0>; 274270864Simp reg = <11>; 275270864Simp }; 276270864Simp 277270864Simp can_clk: can_clk { 278270864Simp #clock-cells = <0>; 279270864Simp reg = <12>; 280270864Simp }; 281270864Simp 282270864Simp twi0_clk: twi0_clk { 283270864Simp #clock-cells = <0>; 284270864Simp reg = <13>; 285270864Simp }; 286270864Simp 287270864Simp spi0_clk: spi0_clk { 288270864Simp #clock-cells = <0>; 289270864Simp reg = <14>; 290270864Simp }; 291270864Simp 292270864Simp spi1_clk: spi1_clk { 293270864Simp #clock-cells = <0>; 294270864Simp reg = <15>; 295270864Simp }; 296270864Simp 297270864Simp ssc0_clk: ssc0_clk { 298270864Simp #clock-cells = <0>; 299270864Simp reg = <16>; 300270864Simp }; 301270864Simp 302270864Simp ssc1_clk: ssc1_clk { 303270864Simp #clock-cells = <0>; 304270864Simp reg = <17>; 305270864Simp }; 306270864Simp 307284090Sian ac97_clk: ac97_clk { 308270864Simp #clock-cells = <0>; 309270864Simp reg = <18>; 310270864Simp }; 311270864Simp 312270864Simp tcb_clk: tcb_clk { 313270864Simp #clock-cells = <0>; 314270864Simp reg = <19>; 315270864Simp }; 316270864Simp 317270864Simp pwm_clk: pwm_clk { 318270864Simp #clock-cells = <0>; 319270864Simp reg = <20>; 320270864Simp }; 321270864Simp 322270864Simp macb0_clk: macb0_clk { 323270864Simp #clock-cells = <0>; 324270864Simp reg = <21>; 325270864Simp }; 326270864Simp 327270864Simp g2de_clk: g2de_clk { 328270864Simp #clock-cells = <0>; 329270864Simp reg = <23>; 330270864Simp }; 331270864Simp 332270864Simp udc_clk: udc_clk { 333270864Simp #clock-cells = <0>; 334270864Simp reg = <24>; 335270864Simp }; 336270864Simp 337270864Simp isi_clk: isi_clk { 338270864Simp #clock-cells = <0>; 339270864Simp reg = <25>; 340270864Simp }; 341270864Simp 342270864Simp lcd_clk: lcd_clk { 343270864Simp #clock-cells = <0>; 344270864Simp reg = <26>; 345270864Simp }; 346270864Simp 347270864Simp dma_clk: dma_clk { 348270864Simp #clock-cells = <0>; 349270864Simp reg = <27>; 350270864Simp }; 351270864Simp 352270864Simp ohci_clk: ohci_clk { 353270864Simp #clock-cells = <0>; 354270864Simp reg = <29>; 355270864Simp }; 356270864Simp }; 357262569Simp }; 358262569Simp 359284090Sian ramc0: ramc@ffffe200 { 360262569Simp compatible = "atmel,at91sam9260-sdramc"; 361284090Sian reg = <0xffffe200 0x200>; 362262569Simp }; 363262569Simp 364284090Sian ramc1: ramc@ffffe800 { 365284090Sian compatible = "atmel,at91sam9260-sdramc"; 366284090Sian reg = <0xffffe800 0x200>; 367284090Sian }; 368284090Sian 369262569Simp pit: timer@fffffd30 { 370262569Simp compatible = "atmel,at91sam9260-pit"; 371262569Simp reg = <0xfffffd30 0xf>; 372262569Simp interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 373270864Simp clocks = <&mck>; 374262569Simp }; 375262569Simp 376262569Simp tcb0: timer@fff7c000 { 377262569Simp compatible = "atmel,at91rm9200-tcb"; 378262569Simp reg = <0xfff7c000 0x100>; 379262569Simp interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 380270864Simp clocks = <&tcb_clk>; 381270864Simp clock-names = "t0_clk"; 382262569Simp }; 383262569Simp 384262569Simp rstc@fffffd00 { 385262569Simp compatible = "atmel,at91sam9260-rstc"; 386262569Simp reg = <0xfffffd00 0x10>; 387262569Simp }; 388262569Simp 389262569Simp shdwc@fffffd10 { 390262569Simp compatible = "atmel,at91sam9260-shdwc"; 391262569Simp reg = <0xfffffd10 0x10>; 392262569Simp }; 393262569Simp 394262569Simp pinctrl@fffff200 { 395262569Simp #address-cells = <1>; 396262569Simp #size-cells = <1>; 397262569Simp compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 398262569Simp ranges = <0xfffff200 0xfffff200 0xa00>; 399262569Simp 400262569Simp atmel,mux-mask = < 401262569Simp /* A B */ 402262569Simp 0xfffffffb 0xffffe07f /* pioA */ 403262569Simp 0x0007ffff 0x39072fff /* pioB */ 404262569Simp 0xffffffff 0x3ffffff8 /* pioC */ 405262569Simp 0xfffffbff 0xffffffff /* pioD */ 406262569Simp 0xffe00fff 0xfbfcff00 /* pioE */ 407262569Simp >; 408262569Simp 409262569Simp /* shared pinctrl settings */ 410262569Simp dbgu { 411262569Simp pinctrl_dbgu: dbgu-0 { 412262569Simp atmel,pins = 413262569Simp <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */ 414262569Simp AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */ 415262569Simp }; 416262569Simp }; 417262569Simp 418262569Simp usart0 { 419262569Simp pinctrl_usart0: usart0-0 { 420262569Simp atmel,pins = 421262569Simp <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */ 422262569Simp AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */ 423262569Simp }; 424262569Simp 425262569Simp pinctrl_usart0_rts: usart0_rts-0 { 426262569Simp atmel,pins = 427262569Simp <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */ 428262569Simp }; 429262569Simp 430262569Simp pinctrl_usart0_cts: usart0_cts-0 { 431262569Simp atmel,pins = 432262569Simp <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */ 433262569Simp }; 434262569Simp }; 435262569Simp 436262569Simp usart1 { 437262569Simp pinctrl_usart1: usart1-0 { 438262569Simp atmel,pins = 439262569Simp <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */ 440262569Simp AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */ 441262569Simp }; 442262569Simp 443262569Simp pinctrl_usart1_rts: usart1_rts-0 { 444262569Simp atmel,pins = 445262569Simp <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */ 446262569Simp }; 447262569Simp 448262569Simp pinctrl_usart1_cts: usart1_cts-0 { 449262569Simp atmel,pins = 450262569Simp <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */ 451262569Simp }; 452262569Simp }; 453262569Simp 454262569Simp usart2 { 455262569Simp pinctrl_usart2: usart2-0 { 456262569Simp atmel,pins = 457262569Simp <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */ 458262569Simp AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */ 459262569Simp }; 460262569Simp 461262569Simp pinctrl_usart2_rts: usart2_rts-0 { 462262569Simp atmel,pins = 463262569Simp <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */ 464262569Simp }; 465262569Simp 466262569Simp pinctrl_usart2_cts: usart2_cts-0 { 467262569Simp atmel,pins = 468262569Simp <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */ 469262569Simp }; 470262569Simp }; 471262569Simp 472262569Simp nand { 473262569Simp pinctrl_nand: nand-0 { 474262569Simp atmel,pins = 475262569Simp <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/ 476262569Simp AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */ 477262569Simp }; 478262569Simp }; 479262569Simp 480262569Simp macb { 481262569Simp pinctrl_macb_rmii: macb_rmii-0 { 482262569Simp atmel,pins = 483262569Simp <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 484262569Simp AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */ 485262569Simp AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */ 486262569Simp AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */ 487262569Simp AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */ 488262569Simp AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */ 489262569Simp AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */ 490262569Simp AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */ 491262569Simp AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */ 492262569Simp AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */ 493262569Simp }; 494262569Simp 495262569Simp pinctrl_macb_rmii_mii: macb_rmii_mii-0 { 496262569Simp atmel,pins = 497262569Simp <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */ 498262569Simp AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */ 499262569Simp AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */ 500262569Simp AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */ 501262569Simp AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */ 502262569Simp AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */ 503262569Simp AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */ 504262569Simp AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */ 505262569Simp }; 506262569Simp }; 507262569Simp 508262569Simp mmc0 { 509262569Simp pinctrl_mmc0_clk: mmc0_clk-0 { 510262569Simp atmel,pins = 511262569Simp <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */ 512262569Simp }; 513262569Simp 514262569Simp pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 515262569Simp atmel,pins = 516262569Simp <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */ 517262569Simp AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */ 518262569Simp }; 519262569Simp 520262569Simp pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 521262569Simp atmel,pins = 522262569Simp <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */ 523262569Simp AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */ 524262569Simp AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */ 525262569Simp }; 526262569Simp 527262569Simp pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 { 528262569Simp atmel,pins = 529262569Simp <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */ 530262569Simp AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */ 531262569Simp }; 532262569Simp 533262569Simp pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 { 534262569Simp atmel,pins = 535262569Simp <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */ 536262569Simp AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */ 537262569Simp AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */ 538262569Simp }; 539262569Simp }; 540262569Simp 541262569Simp mmc1 { 542262569Simp pinctrl_mmc1_clk: mmc1_clk-0 { 543262569Simp atmel,pins = 544262569Simp <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */ 545262569Simp }; 546262569Simp 547262569Simp pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 { 548262569Simp atmel,pins = 549262569Simp <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */ 550262569Simp AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */ 551262569Simp }; 552262569Simp 553262569Simp pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 { 554262569Simp atmel,pins = 555262569Simp <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */ 556262569Simp AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */ 557262569Simp AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */ 558262569Simp }; 559262569Simp 560262569Simp pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 { 561262569Simp atmel,pins = 562262569Simp <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */ 563262569Simp AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */ 564262569Simp }; 565262569Simp 566262569Simp pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 { 567262569Simp atmel,pins = 568262569Simp <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */ 569262569Simp AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */ 570262569Simp AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */ 571262569Simp }; 572262569Simp }; 573262569Simp 574262569Simp ssc0 { 575262569Simp pinctrl_ssc0_tx: ssc0_tx-0 { 576262569Simp atmel,pins = 577262569Simp <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */ 578262569Simp AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */ 579262569Simp AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */ 580262569Simp }; 581262569Simp 582262569Simp pinctrl_ssc0_rx: ssc0_rx-0 { 583262569Simp atmel,pins = 584262569Simp <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */ 585262569Simp AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */ 586262569Simp AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */ 587262569Simp }; 588262569Simp }; 589262569Simp 590262569Simp ssc1 { 591262569Simp pinctrl_ssc1_tx: ssc1_tx-0 { 592262569Simp atmel,pins = 593262569Simp <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */ 594262569Simp AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */ 595262569Simp AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */ 596262569Simp }; 597262569Simp 598262569Simp pinctrl_ssc1_rx: ssc1_rx-0 { 599262569Simp atmel,pins = 600262569Simp <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */ 601262569Simp AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */ 602262569Simp AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */ 603262569Simp }; 604262569Simp }; 605262569Simp 606262569Simp spi0 { 607262569Simp pinctrl_spi0: spi0-0 { 608262569Simp atmel,pins = 609262569Simp <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */ 610262569Simp AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */ 611262569Simp AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */ 612262569Simp }; 613262569Simp }; 614262569Simp 615262569Simp spi1 { 616262569Simp pinctrl_spi1: spi1-0 { 617262569Simp atmel,pins = 618262569Simp <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */ 619262569Simp AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */ 620262569Simp AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */ 621262569Simp }; 622262569Simp }; 623262569Simp 624262569Simp tcb0 { 625262569Simp pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 626262569Simp atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 627262569Simp }; 628262569Simp 629262569Simp pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 630262569Simp atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 631262569Simp }; 632262569Simp 633262569Simp pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 634262569Simp atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 635262569Simp }; 636262569Simp 637262569Simp pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 638262569Simp atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 639262569Simp }; 640262569Simp 641262569Simp pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 642262569Simp atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 643262569Simp }; 644262569Simp 645262569Simp pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 646262569Simp atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 647262569Simp }; 648262569Simp 649262569Simp pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 650262569Simp atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 651262569Simp }; 652262569Simp 653262569Simp pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 654262569Simp atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 655262569Simp }; 656262569Simp 657262569Simp pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 658262569Simp atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 659262569Simp }; 660262569Simp }; 661262569Simp 662262569Simp fb { 663262569Simp pinctrl_fb: fb-0 { 664262569Simp atmel,pins = 665262569Simp <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */ 666262569Simp AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */ 667262569Simp AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */ 668262569Simp AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */ 669262569Simp AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */ 670262569Simp AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */ 671262569Simp AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */ 672262569Simp AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */ 673262569Simp AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */ 674262569Simp AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */ 675262569Simp AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */ 676262569Simp AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */ 677262569Simp AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */ 678262569Simp AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */ 679262569Simp AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */ 680262569Simp AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */ 681262569Simp AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */ 682262569Simp AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */ 683262569Simp AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */ 684262569Simp AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */ 685262569Simp AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */ 686262569Simp AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */ 687262569Simp }; 688262569Simp }; 689262569Simp 690284090Sian can { 691284090Sian pinctrl_can_rx_tx: can_rx_tx { 692284090Sian atmel,pins = 693284090Sian <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* CANRX, conflicts with IRQ0 */ 694284090Sian AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */ 695284090Sian }; 696284090Sian }; 697284090Sian 698284090Sian ac97 { 699284090Sian pinctrl_ac97: ac97-0 { 700284090Sian atmel,pins = 701284090Sian <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A AC97FS pin */ 702284090Sian AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A AC97CK pin */ 703284090Sian AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A AC97TX pin */ 704284090Sian AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A AC97RX pin */ 705284090Sian }; 706284090Sian }; 707284090Sian 708262569Simp pioA: gpio@fffff200 { 709262569Simp compatible = "atmel,at91rm9200-gpio"; 710262569Simp reg = <0xfffff200 0x200>; 711262569Simp interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 712262569Simp #gpio-cells = <2>; 713262569Simp gpio-controller; 714262569Simp interrupt-controller; 715262569Simp #interrupt-cells = <2>; 716270864Simp clocks = <&pioA_clk>; 717262569Simp }; 718262569Simp 719262569Simp pioB: gpio@fffff400 { 720262569Simp compatible = "atmel,at91rm9200-gpio"; 721262569Simp reg = <0xfffff400 0x200>; 722262569Simp interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 723262569Simp #gpio-cells = <2>; 724262569Simp gpio-controller; 725262569Simp interrupt-controller; 726262569Simp #interrupt-cells = <2>; 727270864Simp clocks = <&pioB_clk>; 728262569Simp }; 729262569Simp 730262569Simp pioC: gpio@fffff600 { 731262569Simp compatible = "atmel,at91rm9200-gpio"; 732262569Simp reg = <0xfffff600 0x200>; 733262569Simp interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 734262569Simp #gpio-cells = <2>; 735262569Simp gpio-controller; 736262569Simp interrupt-controller; 737262569Simp #interrupt-cells = <2>; 738270864Simp clocks = <&pioCDE_clk>; 739262569Simp }; 740262569Simp 741262569Simp pioD: gpio@fffff800 { 742262569Simp compatible = "atmel,at91rm9200-gpio"; 743262569Simp reg = <0xfffff800 0x200>; 744262569Simp interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 745262569Simp #gpio-cells = <2>; 746262569Simp gpio-controller; 747262569Simp interrupt-controller; 748262569Simp #interrupt-cells = <2>; 749270864Simp clocks = <&pioCDE_clk>; 750262569Simp }; 751262569Simp 752262569Simp pioE: gpio@fffffa00 { 753262569Simp compatible = "atmel,at91rm9200-gpio"; 754262569Simp reg = <0xfffffa00 0x200>; 755262569Simp interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 756262569Simp #gpio-cells = <2>; 757262569Simp gpio-controller; 758262569Simp interrupt-controller; 759262569Simp #interrupt-cells = <2>; 760270864Simp clocks = <&pioCDE_clk>; 761262569Simp }; 762262569Simp }; 763262569Simp 764262569Simp dbgu: serial@ffffee00 { 765262569Simp compatible = "atmel,at91sam9260-usart"; 766262569Simp reg = <0xffffee00 0x200>; 767262569Simp interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 768262569Simp pinctrl-names = "default"; 769262569Simp pinctrl-0 = <&pinctrl_dbgu>; 770270864Simp clocks = <&mck>; 771270864Simp clock-names = "usart"; 772262569Simp status = "disabled"; 773262569Simp }; 774262569Simp 775262569Simp usart0: serial@fff8c000 { 776262569Simp compatible = "atmel,at91sam9260-usart"; 777262569Simp reg = <0xfff8c000 0x200>; 778262569Simp interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 779262569Simp atmel,use-dma-rx; 780262569Simp atmel,use-dma-tx; 781262569Simp pinctrl-names = "default"; 782262569Simp pinctrl-0 = <&pinctrl_usart0>; 783270864Simp clocks = <&usart0_clk>; 784270864Simp clock-names = "usart"; 785262569Simp status = "disabled"; 786262569Simp }; 787262569Simp 788262569Simp usart1: serial@fff90000 { 789262569Simp compatible = "atmel,at91sam9260-usart"; 790262569Simp reg = <0xfff90000 0x200>; 791262569Simp interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 792262569Simp atmel,use-dma-rx; 793262569Simp atmel,use-dma-tx; 794262569Simp pinctrl-names = "default"; 795262569Simp pinctrl-0 = <&pinctrl_usart1>; 796270864Simp clocks = <&usart1_clk>; 797270864Simp clock-names = "usart"; 798262569Simp status = "disabled"; 799262569Simp }; 800262569Simp 801262569Simp usart2: serial@fff94000 { 802262569Simp compatible = "atmel,at91sam9260-usart"; 803262569Simp reg = <0xfff94000 0x200>; 804262569Simp interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 805262569Simp atmel,use-dma-rx; 806262569Simp atmel,use-dma-tx; 807262569Simp pinctrl-names = "default"; 808262569Simp pinctrl-0 = <&pinctrl_usart2>; 809270864Simp clocks = <&usart2_clk>; 810270864Simp clock-names = "usart"; 811262569Simp status = "disabled"; 812262569Simp }; 813262569Simp 814262569Simp ssc0: ssc@fff98000 { 815262569Simp compatible = "atmel,at91rm9200-ssc"; 816262569Simp reg = <0xfff98000 0x4000>; 817262569Simp interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 818262569Simp pinctrl-names = "default"; 819262569Simp pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 820270864Simp clocks = <&ssc0_clk>; 821270864Simp clock-names = "pclk"; 822262569Simp status = "disabled"; 823262569Simp }; 824262569Simp 825262569Simp ssc1: ssc@fff9c000 { 826262569Simp compatible = "atmel,at91rm9200-ssc"; 827262569Simp reg = <0xfff9c000 0x4000>; 828262569Simp interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>; 829262569Simp pinctrl-names = "default"; 830262569Simp pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 831270864Simp clocks = <&ssc1_clk>; 832270864Simp clock-names = "pclk"; 833262569Simp status = "disabled"; 834262569Simp }; 835262569Simp 836284090Sian ac97: sound@fffa0000 { 837284090Sian compatible = "atmel,at91sam9263-ac97c"; 838284090Sian reg = <0xfffa0000 0x4000>; 839284090Sian interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>; 840284090Sian pinctrl-names = "default"; 841284090Sian pinctrl-0 = <&pinctrl_ac97>; 842284090Sian clocks = <&ac97_clk>; 843284090Sian clock-names = "ac97_clk"; 844284090Sian status = "disabled"; 845284090Sian }; 846284090Sian 847262569Simp macb0: ethernet@fffbc000 { 848262569Simp compatible = "cdns,at32ap7000-macb", "cdns,macb"; 849262569Simp reg = <0xfffbc000 0x100>; 850262569Simp interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 851262569Simp pinctrl-names = "default"; 852262569Simp pinctrl-0 = <&pinctrl_macb_rmii>; 853270864Simp clocks = <&macb0_clk>, <&macb0_clk>; 854270864Simp clock-names = "hclk", "pclk"; 855262569Simp status = "disabled"; 856262569Simp }; 857262569Simp 858262569Simp usb1: gadget@fff78000 { 859262569Simp compatible = "atmel,at91rm9200-udc"; 860262569Simp reg = <0xfff78000 0x4000>; 861262569Simp interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 862270864Simp clocks = <&udc_clk>, <&udpck>; 863270864Simp clock-names = "pclk", "hclk"; 864262569Simp status = "disabled"; 865262569Simp }; 866262569Simp 867262569Simp i2c0: i2c@fff88000 { 868262569Simp compatible = "atmel,at91sam9260-i2c"; 869262569Simp reg = <0xfff88000 0x100>; 870262569Simp interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>; 871262569Simp #address-cells = <1>; 872262569Simp #size-cells = <0>; 873270864Simp clocks = <&twi0_clk>; 874262569Simp status = "disabled"; 875262569Simp }; 876262569Simp 877262569Simp mmc0: mmc@fff80000 { 878262569Simp compatible = "atmel,hsmci"; 879262569Simp reg = <0xfff80000 0x600>; 880262569Simp interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 881284090Sian pinctrl-names = "default"; 882262569Simp #address-cells = <1>; 883262569Simp #size-cells = <0>; 884270864Simp clocks = <&mci0_clk>; 885270864Simp clock-names = "mci_clk"; 886262569Simp status = "disabled"; 887262569Simp }; 888262569Simp 889262569Simp mmc1: mmc@fff84000 { 890262569Simp compatible = "atmel,hsmci"; 891262569Simp reg = <0xfff84000 0x600>; 892262569Simp interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>; 893284090Sian pinctrl-names = "default"; 894262569Simp #address-cells = <1>; 895262569Simp #size-cells = <0>; 896270864Simp clocks = <&mci1_clk>; 897270864Simp clock-names = "mci_clk"; 898262569Simp status = "disabled"; 899262569Simp }; 900262569Simp 901262569Simp watchdog@fffffd40 { 902262569Simp compatible = "atmel,at91sam9260-wdt"; 903262569Simp reg = <0xfffffd40 0x10>; 904262569Simp interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 905262569Simp atmel,watchdog-type = "hardware"; 906262569Simp atmel,reset-type = "all"; 907262569Simp atmel,dbg-halt; 908262569Simp atmel,idle-halt; 909262569Simp status = "disabled"; 910262569Simp }; 911262569Simp 912262569Simp spi0: spi@fffa4000 { 913262569Simp #address-cells = <1>; 914262569Simp #size-cells = <0>; 915262569Simp compatible = "atmel,at91rm9200-spi"; 916262569Simp reg = <0xfffa4000 0x200>; 917262569Simp interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>; 918262569Simp pinctrl-names = "default"; 919262569Simp pinctrl-0 = <&pinctrl_spi0>; 920270864Simp clocks = <&spi0_clk>; 921270864Simp clock-names = "spi_clk"; 922262569Simp status = "disabled"; 923262569Simp }; 924262569Simp 925262569Simp spi1: spi@fffa8000 { 926262569Simp #address-cells = <1>; 927262569Simp #size-cells = <0>; 928262569Simp compatible = "atmel,at91rm9200-spi"; 929262569Simp reg = <0xfffa8000 0x200>; 930262569Simp interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>; 931262569Simp pinctrl-names = "default"; 932262569Simp pinctrl-0 = <&pinctrl_spi1>; 933270864Simp clocks = <&spi1_clk>; 934270864Simp clock-names = "spi_clk"; 935262569Simp status = "disabled"; 936262569Simp }; 937262569Simp 938262569Simp pwm0: pwm@fffb8000 { 939262569Simp compatible = "atmel,at91sam9rl-pwm"; 940262569Simp reg = <0xfffb8000 0x300>; 941262569Simp interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>; 942262569Simp #pwm-cells = <3>; 943270864Simp clocks = <&pwm_clk>; 944270864Simp clock-names = "pwm_clk"; 945262569Simp status = "disabled"; 946262569Simp }; 947284090Sian 948284090Sian can: can@fffac000 { 949284090Sian compatible = "atmel,at91sam9263-can"; 950284090Sian reg = <0xfffac000 0x300>; 951284090Sian interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 952284090Sian pinctrl-names = "default"; 953284090Sian pinctrl-0 = <&pinctrl_can_rx_tx>; 954284090Sian clocks = <&can_clk>; 955284090Sian clock-names = "can_clk"; 956284090Sian }; 957284090Sian 958284090Sian rtc@fffffd20 { 959284090Sian compatible = "atmel,at91sam9260-rtt"; 960284090Sian reg = <0xfffffd20 0x10>; 961284090Sian interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 962284090Sian clocks = <&slow_xtal>; 963284090Sian status = "disabled"; 964284090Sian }; 965284090Sian 966284090Sian rtc@fffffd50 { 967284090Sian compatible = "atmel,at91sam9260-rtt"; 968284090Sian reg = <0xfffffd50 0x10>; 969284090Sian interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 970284090Sian clocks = <&slow_xtal>; 971284090Sian status = "disabled"; 972284090Sian }; 973284090Sian 974284090Sian gpbr: syscon@fffffd60 { 975284090Sian compatible = "atmel,at91sam9260-gpbr", "syscon"; 976284090Sian reg = <0xfffffd60 0x50>; 977284090Sian status = "disabled"; 978284090Sian }; 979262569Simp }; 980262569Simp 981262569Simp fb0: fb@0x00700000 { 982262569Simp compatible = "atmel,at91sam9263-lcdc"; 983262569Simp reg = <0x00700000 0x1000>; 984262569Simp interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>; 985262569Simp pinctrl-names = "default"; 986262569Simp pinctrl-0 = <&pinctrl_fb>; 987284090Sian clocks = <&lcd_clk>, <&lcd_clk>; 988284090Sian clock-names = "lcdc_clk", "hclk"; 989262569Simp status = "disabled"; 990262569Simp }; 991262569Simp 992262569Simp nand0: nand@40000000 { 993262569Simp compatible = "atmel,at91rm9200-nand"; 994262569Simp #address-cells = <1>; 995262569Simp #size-cells = <1>; 996262569Simp reg = <0x40000000 0x10000000 997262569Simp 0xffffe000 0x200 998262569Simp >; 999262569Simp atmel,nand-addr-offset = <21>; 1000262569Simp atmel,nand-cmd-offset = <22>; 1001262569Simp pinctrl-names = "default"; 1002262569Simp pinctrl-0 = <&pinctrl_nand>; 1003262569Simp gpios = <&pioA 22 GPIO_ACTIVE_HIGH 1004262569Simp &pioD 15 GPIO_ACTIVE_HIGH 1005262569Simp 0 1006262569Simp >; 1007262569Simp status = "disabled"; 1008262569Simp }; 1009262569Simp 1010262569Simp usb0: ohci@00a00000 { 1011262569Simp compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1012262569Simp reg = <0x00a00000 0x100000>; 1013262569Simp interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>; 1014270864Simp clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>; 1015270864Simp clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck"; 1016262569Simp status = "disabled"; 1017262569Simp }; 1018262569Simp }; 1019262569Simp 1020262569Simp i2c@0 { 1021262569Simp compatible = "i2c-gpio"; 1022262569Simp gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */ 1023262569Simp &pioB 5 GPIO_ACTIVE_HIGH /* scl */ 1024262569Simp >; 1025262569Simp i2c-gpio,sda-open-drain; 1026262569Simp i2c-gpio,scl-open-drain; 1027262569Simp i2c-gpio,delay-us = <2>; /* ~100 kHz */ 1028262569Simp #address-cells = <1>; 1029262569Simp #size-cells = <0>; 1030262569Simp status = "disabled"; 1031262569Simp }; 1032262569Simp}; 1033