if_urtw.c revision 244650
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 244650 2012-12-24 10:10:18Z hselasky $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_arp.h> 40#include <net/ethernet.h> 41#include <net/if_dl.h> 42#include <net/if_media.h> 43#include <net/if_types.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/in_systm.h> 48#include <netinet/in_var.h> 49#include <netinet/if_ether.h> 50#include <netinet/ip.h> 51#endif 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_regdomain.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 64static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 65#ifdef URTW_DEBUG 66int urtw_debug = 0; 67SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW | CTLFLAG_TUN, &urtw_debug, 0, 68 "control debugging printfs"); 69TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 80 URTW_DEBUG_ANY = 0xffffffff 81}; 82#define DPRINTF(sc, m, fmt, ...) do { \ 83 if (sc->sc_debug & (m)) \ 84 printf(fmt, __VA_ARGS__); \ 85} while (0) 86#else 87#define DPRINTF(sc, m, fmt, ...) do { \ 88 (void) sc; \ 89} while (0) 90#endif 91static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 92SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW | CTLFLAG_TUN, 93 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 94TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode); 95 96/* recognized device vendors/products */ 97#define urtw_lookup(v, p) \ 98 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 99#define URTW_DEV_B(v,p) \ 100 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 101#define URTW_DEV_L(v,p) \ 102 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 103#define URTW_REV_RTL8187B 0 104#define URTW_REV_RTL8187L 1 105static const STRUCT_USB_HOST_ID urtw_devs[] = { 106 URTW_DEV_B(NETGEAR, WG111V3), 107 URTW_DEV_B(REALTEK, RTL8187B_0), 108 URTW_DEV_B(REALTEK, RTL8187B_1), 109 URTW_DEV_B(REALTEK, RTL8187B_2), 110 URTW_DEV_B(SITECOMEU, WL168V4), 111 URTW_DEV_L(ASUS, P5B_WIFI), 112 URTW_DEV_L(BELKIN, F5D7050E), 113 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 114 URTW_DEV_L(NETGEAR, WG111V2), 115 URTW_DEV_L(REALTEK, RTL8187), 116 URTW_DEV_L(SITECOMEU, WL168V1), 117 URTW_DEV_L(SURECOM, EP9001G2A), 118 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 122 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 124 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 125#undef URTW_DEV_L 126#undef URTW_DEV_B 127}; 128 129#define urtw_read8_m(sc, val, data) do { \ 130 error = urtw_read8_c(sc, val, data); \ 131 if (error != 0) \ 132 goto fail; \ 133} while (0) 134#define urtw_write8_m(sc, val, data) do { \ 135 error = urtw_write8_c(sc, val, data); \ 136 if (error != 0) \ 137 goto fail; \ 138} while (0) 139#define urtw_read16_m(sc, val, data) do { \ 140 error = urtw_read16_c(sc, val, data); \ 141 if (error != 0) \ 142 goto fail; \ 143} while (0) 144#define urtw_write16_m(sc, val, data) do { \ 145 error = urtw_write16_c(sc, val, data); \ 146 if (error != 0) \ 147 goto fail; \ 148} while (0) 149#define urtw_read32_m(sc, val, data) do { \ 150 error = urtw_read32_c(sc, val, data); \ 151 if (error != 0) \ 152 goto fail; \ 153} while (0) 154#define urtw_write32_m(sc, val, data) do { \ 155 error = urtw_write32_c(sc, val, data); \ 156 if (error != 0) \ 157 goto fail; \ 158} while (0) 159#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 160 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 161 if (error != 0) \ 162 goto fail; \ 163} while (0) 164#define urtw_8187_write_phy_cck(sc, val, data) do { \ 165 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 166 if (error != 0) \ 167 goto fail; \ 168} while (0) 169#define urtw_8225_write(sc, val, data) do { \ 170 error = urtw_8225_write_c(sc, val, data); \ 171 if (error != 0) \ 172 goto fail; \ 173} while (0) 174 175struct urtw_pair { 176 uint32_t reg; 177 uint32_t val; 178}; 179 180static uint8_t urtw_8225_agc[] = { 181 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 182 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 183 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 184 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 185 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 186 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 187 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 188 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 189 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 190 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 191 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 192 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 193}; 194 195static uint8_t urtw_8225z2_agc[] = { 196 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 197 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 198 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 199 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 200 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 201 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 202 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 203 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 204 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 205 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 206 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 207 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 208}; 209 210static uint32_t urtw_8225_channel[] = { 211 0x0000, /* dummy channel 0 */ 212 0x085c, /* 1 */ 213 0x08dc, /* 2 */ 214 0x095c, /* 3 */ 215 0x09dc, /* 4 */ 216 0x0a5c, /* 5 */ 217 0x0adc, /* 6 */ 218 0x0b5c, /* 7 */ 219 0x0bdc, /* 8 */ 220 0x0c5c, /* 9 */ 221 0x0cdc, /* 10 */ 222 0x0d5c, /* 11 */ 223 0x0ddc, /* 12 */ 224 0x0e5c, /* 13 */ 225 0x0f72, /* 14 */ 226}; 227 228static uint8_t urtw_8225_gain[] = { 229 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 230 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 231 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 232 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 233 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 234 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 235 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 236}; 237 238static struct urtw_pair urtw_8225_rf_part1[] = { 239 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 240 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 241 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 242 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 243}; 244 245static struct urtw_pair urtw_8225_rf_part2[] = { 246 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 247 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 248 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 249 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 250 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 251 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 252 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 253 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 254 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 255 { 0x27, 0x88 } 256}; 257 258static struct urtw_pair urtw_8225_rf_part3[] = { 259 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 260 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 261 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 262 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 263 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 264 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 265 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 266}; 267 268static uint16_t urtw_8225_rxgain[] = { 269 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 270 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 271 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 272 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 273 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 274 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 275 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 276 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 277 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 278 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 279 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 280 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 281}; 282 283static uint8_t urtw_8225_threshold[] = { 284 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 285}; 286 287static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 288 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 289}; 290 291static uint8_t urtw_8225_txpwr_cck[] = { 292 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 293 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 294 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 295 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 296 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 297 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 298}; 299 300static uint8_t urtw_8225_txpwr_cck_ch14[] = { 301 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 302 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 303 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 304 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 305 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 306 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 307}; 308 309static uint8_t urtw_8225_txpwr_ofdm[]={ 310 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 311}; 312 313static uint8_t urtw_8225v2_gain_bg[]={ 314 0x23, 0x15, 0xa5, /* -82-1dbm */ 315 0x23, 0x15, 0xb5, /* -82-2dbm */ 316 0x23, 0x15, 0xc5, /* -82-3dbm */ 317 0x33, 0x15, 0xc5, /* -78dbm */ 318 0x43, 0x15, 0xc5, /* -74dbm */ 319 0x53, 0x15, 0xc5, /* -70dbm */ 320 0x63, 0x15, 0xc5, /* -66dbm */ 321}; 322 323static struct urtw_pair urtw_8225v2_rf_part1[] = { 324 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 325 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 326 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 327 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 328}; 329 330static struct urtw_pair urtw_8225v2b_rf_part0[] = { 331 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 332 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 333 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 334 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 335}; 336 337static struct urtw_pair urtw_8225v2b_rf_part1[] = { 338 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 339 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 340 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 341 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 342 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 343 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 344 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 345 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 346 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 347 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 348 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 349 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 350 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 351 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 352 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 353 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 354 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 355 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 356 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 357 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 358 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 359 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 360 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 361 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 362 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 363 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 364 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 365 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 366 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 367 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 368 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 369}; 370 371static struct urtw_pair urtw_8225v2_rf_part2[] = { 372 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 373 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 374 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 375 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 376 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 377 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 378 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 379 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 380 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 381 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 382}; 383 384static struct urtw_pair urtw_8225v2b_rf_part2[] = { 385 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 386 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 387 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 388 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 389 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 390 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 391 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 392 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 393 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 394 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 395 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 396 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 397 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 398 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 399 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 400}; 401 402static struct urtw_pair urtw_8225v2_rf_part3[] = { 403 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 404 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 405 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 406 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 407 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 408 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 409 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 410 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 411}; 412 413static uint16_t urtw_8225v2_rxgain[] = { 414 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 415 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 416 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 417 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 418 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 419 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 420 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 421 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 422 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 423 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 424 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 425 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 426}; 427 428static uint16_t urtw_8225v2b_rxgain[] = { 429 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 430 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 431 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 432 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 433 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 434 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 435 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 436 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 437 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 438 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 439 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 440 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 441}; 442 443static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 444 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 445 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 446 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 447 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 448 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 449 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 450}; 451 452static uint8_t urtw_8225v2_txpwr_cck[] = { 453 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 454}; 455 456static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 457 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 458}; 459 460static uint8_t urtw_8225v2b_txpwr_cck[] = { 461 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 462 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 463 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 464 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 465}; 466 467static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 468 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 469 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 470 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 471 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 472}; 473 474static struct urtw_pair urtw_ratetable[] = { 475 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 476 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 477 { 96, 10 }, { 108, 11 } 478}; 479 480static const uint8_t urtw_8187b_reg_table[][3] = { 481 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 482 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 483 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 484 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 485 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 486 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 487 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 488 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 489 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 490 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 491 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 492 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 493 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 494 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 495 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 496 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 497 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 498 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 499 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 500 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 501 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 502 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 503 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 504 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 505 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 506 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 507 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 508 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 509 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 510 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 511 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 512}; 513 514static usb_callback_t urtw_bulk_rx_callback; 515static usb_callback_t urtw_bulk_tx_callback; 516static usb_callback_t urtw_bulk_tx_status_callback; 517 518static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 519 [URTW_8187B_BULK_RX] = { 520 .type = UE_BULK, 521 .endpoint = 0x83, 522 .direction = UE_DIR_IN, 523 .bufsize = MCLBYTES, 524 .flags = { 525 .ext_buffer = 1, 526 .pipe_bof = 1, 527 .short_xfer_ok = 1 528 }, 529 .callback = urtw_bulk_rx_callback 530 }, 531 [URTW_8187B_BULK_TX_STATUS] = { 532 .type = UE_BULK, 533 .endpoint = 0x89, 534 .direction = UE_DIR_IN, 535 .bufsize = sizeof(uint64_t), 536 .flags = { 537 .pipe_bof = 1, 538 .short_xfer_ok = 1 539 }, 540 .callback = urtw_bulk_tx_status_callback 541 }, 542 [URTW_8187B_BULK_TX_BE] = { 543 .type = UE_BULK, 544 .endpoint = URTW_8187B_TXPIPE_BE, 545 .direction = UE_DIR_OUT, 546 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 547 .flags = { 548 .force_short_xfer = 1, 549 .pipe_bof = 1, 550 }, 551 .callback = urtw_bulk_tx_callback, 552 .timeout = URTW_DATA_TIMEOUT 553 }, 554 [URTW_8187B_BULK_TX_BK] = { 555 .type = UE_BULK, 556 .endpoint = URTW_8187B_TXPIPE_BK, 557 .direction = UE_DIR_OUT, 558 .bufsize = URTW_TX_MAXSIZE, 559 .flags = { 560 .ext_buffer = 1, 561 .force_short_xfer = 1, 562 .pipe_bof = 1, 563 }, 564 .callback = urtw_bulk_tx_callback, 565 .timeout = URTW_DATA_TIMEOUT 566 }, 567 [URTW_8187B_BULK_TX_VI] = { 568 .type = UE_BULK, 569 .endpoint = URTW_8187B_TXPIPE_VI, 570 .direction = UE_DIR_OUT, 571 .bufsize = URTW_TX_MAXSIZE, 572 .flags = { 573 .ext_buffer = 1, 574 .force_short_xfer = 1, 575 .pipe_bof = 1, 576 }, 577 .callback = urtw_bulk_tx_callback, 578 .timeout = URTW_DATA_TIMEOUT 579 }, 580 [URTW_8187B_BULK_TX_VO] = { 581 .type = UE_BULK, 582 .endpoint = URTW_8187B_TXPIPE_VO, 583 .direction = UE_DIR_OUT, 584 .bufsize = URTW_TX_MAXSIZE, 585 .flags = { 586 .ext_buffer = 1, 587 .force_short_xfer = 1, 588 .pipe_bof = 1, 589 }, 590 .callback = urtw_bulk_tx_callback, 591 .timeout = URTW_DATA_TIMEOUT 592 }, 593 [URTW_8187B_BULK_TX_EP12] = { 594 .type = UE_BULK, 595 .endpoint = 0xc, 596 .direction = UE_DIR_OUT, 597 .bufsize = URTW_TX_MAXSIZE, 598 .flags = { 599 .ext_buffer = 1, 600 .force_short_xfer = 1, 601 .pipe_bof = 1, 602 }, 603 .callback = urtw_bulk_tx_callback, 604 .timeout = URTW_DATA_TIMEOUT 605 } 606}; 607 608static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 609 [URTW_8187L_BULK_RX] = { 610 .type = UE_BULK, 611 .endpoint = 0x81, 612 .direction = UE_DIR_IN, 613 .bufsize = MCLBYTES, 614 .flags = { 615 .ext_buffer = 1, 616 .pipe_bof = 1, 617 .short_xfer_ok = 1 618 }, 619 .callback = urtw_bulk_rx_callback 620 }, 621 [URTW_8187L_BULK_TX_LOW] = { 622 .type = UE_BULK, 623 .endpoint = 0x2, 624 .direction = UE_DIR_OUT, 625 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 626 .flags = { 627 .force_short_xfer = 1, 628 .pipe_bof = 1, 629 }, 630 .callback = urtw_bulk_tx_callback, 631 .timeout = URTW_DATA_TIMEOUT 632 }, 633 [URTW_8187L_BULK_TX_NORMAL] = { 634 .type = UE_BULK, 635 .endpoint = 0x3, 636 .direction = UE_DIR_OUT, 637 .bufsize = URTW_TX_MAXSIZE, 638 .flags = { 639 .ext_buffer = 1, 640 .force_short_xfer = 1, 641 .pipe_bof = 1, 642 }, 643 .callback = urtw_bulk_tx_callback, 644 .timeout = URTW_DATA_TIMEOUT 645 }, 646}; 647 648static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 649 const char [IFNAMSIZ], int, enum ieee80211_opmode, 650 int, const uint8_t [IEEE80211_ADDR_LEN], 651 const uint8_t [IEEE80211_ADDR_LEN]); 652static void urtw_vap_delete(struct ieee80211vap *); 653static void urtw_init(void *); 654static void urtw_stop(struct ifnet *, int); 655static void urtw_stop_locked(struct ifnet *, int); 656static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 657static void urtw_start(struct ifnet *); 658static int urtw_alloc_rx_data_list(struct urtw_softc *); 659static int urtw_alloc_tx_data_list(struct urtw_softc *); 660static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 661 const struct ieee80211_bpf_params *); 662static void urtw_scan_start(struct ieee80211com *); 663static void urtw_scan_end(struct ieee80211com *); 664static void urtw_set_channel(struct ieee80211com *); 665static void urtw_update_mcast(struct ifnet *); 666static int urtw_tx_start(struct urtw_softc *, 667 struct ieee80211_node *, struct mbuf *, 668 struct urtw_data *, int); 669static int urtw_newstate(struct ieee80211vap *, 670 enum ieee80211_state, int); 671static void urtw_led_ch(void *); 672static void urtw_ledtask(void *, int); 673static void urtw_watchdog(void *); 674static void urtw_set_multi(void *); 675static int urtw_isbmode(uint16_t); 676static uint16_t urtw_rate2rtl(uint32_t); 677static uint16_t urtw_rtl2rate(uint32_t); 678static usb_error_t urtw_set_rate(struct urtw_softc *); 679static usb_error_t urtw_update_msr(struct urtw_softc *); 680static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 681static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 682static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 683static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 684static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 685static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 686static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 687static usb_error_t urtw_eprom_ck(struct urtw_softc *); 688static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 689 int); 690static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 691 uint32_t *); 692static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 693static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 694static usb_error_t urtw_get_macaddr(struct urtw_softc *); 695static usb_error_t urtw_get_txpwr(struct urtw_softc *); 696static usb_error_t urtw_get_rfchip(struct urtw_softc *); 697static usb_error_t urtw_led_init(struct urtw_softc *); 698static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 699static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 700static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 701 uint32_t); 702static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 703 uint8_t, uint32_t); 704static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 705 uint32_t); 706static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 707static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 708static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 709 uint16_t); 710static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 711 uint16_t *); 712static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 713 uint32_t *); 714static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 715static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 716static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 717static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 718static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 719static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 720static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 721static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 722static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 723static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 724static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 725static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 726static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 727static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 728static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 729static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 730static usb_error_t urtw_intr_enable(struct urtw_softc *); 731static usb_error_t urtw_intr_disable(struct urtw_softc *); 732static usb_error_t urtw_reset(struct urtw_softc *); 733static usb_error_t urtw_led_on(struct urtw_softc *, int); 734static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 735static usb_error_t urtw_led_blink(struct urtw_softc *); 736static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 737static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 738static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 739static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 740static usb_error_t urtw_rx_setconf(struct urtw_softc *); 741static usb_error_t urtw_rx_enable(struct urtw_softc *); 742static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 743static void urtw_free_tx_data_list(struct urtw_softc *); 744static void urtw_free_rx_data_list(struct urtw_softc *); 745static void urtw_free_data_list(struct urtw_softc *, 746 struct urtw_data data[], int, int); 747static usb_error_t urtw_adapter_start(struct urtw_softc *); 748static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 749static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 750static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 751static usb_error_t urtw_do_request(struct urtw_softc *, 752 struct usb_device_request *, void *); 753static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 754static usb_error_t urtw_led_off(struct urtw_softc *, int); 755static void urtw_abort_xfers(struct urtw_softc *); 756static struct urtw_data * 757 urtw_getbuf(struct urtw_softc *sc); 758static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 759 uint8_t); 760static void urtw_updateslot(struct ifnet *); 761static void urtw_updateslottask(void *, int); 762static void urtw_sysctl_node(struct urtw_softc *); 763 764static int 765urtw_match(device_t dev) 766{ 767 struct usb_attach_arg *uaa = device_get_ivars(dev); 768 769 if (uaa->usb_mode != USB_MODE_HOST) 770 return (ENXIO); 771 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 772 return (ENXIO); 773 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 774 return (ENXIO); 775 776 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 777} 778 779static int 780urtw_attach(device_t dev) 781{ 782 const struct usb_config *setup_start; 783 int ret = ENXIO; 784 struct urtw_softc *sc = device_get_softc(dev); 785 struct usb_attach_arg *uaa = device_get_ivars(dev); 786 struct ieee80211com *ic; 787 struct ifnet *ifp; 788 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 789 uint16_t n_setup; 790 uint32_t data; 791 usb_error_t error; 792 793 device_set_usb_desc(dev); 794 795 sc->sc_dev = dev; 796 sc->sc_udev = uaa->device; 797 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 798 sc->sc_flags |= URTW_RTL8187B; 799#ifdef URTW_DEBUG 800 sc->sc_debug = urtw_debug; 801#endif 802 803 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 804 MTX_DEF); 805 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 806 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 807 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 808 callout_init(&sc->sc_watchdog_ch, 0); 809 810 if (sc->sc_flags & URTW_RTL8187B) { 811 setup_start = urtw_8187b_usbconfig; 812 n_setup = URTW_8187B_N_XFERS; 813 } else { 814 setup_start = urtw_8187l_usbconfig; 815 n_setup = URTW_8187L_N_XFERS; 816 } 817 818 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 819 setup_start, n_setup, sc, &sc->sc_mtx); 820 if (error) { 821 device_printf(dev, "could not allocate USB transfers, " 822 "err=%s\n", usbd_errstr(error)); 823 ret = ENXIO; 824 goto fail0; 825 } 826 827 if (sc->sc_flags & URTW_RTL8187B) { 828 sc->sc_tx_dma_buf = 829 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 830 URTW_8187B_BULK_TX_BE], 0); 831 } else { 832 sc->sc_tx_dma_buf = 833 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 834 URTW_8187L_BULK_TX_LOW], 0); 835 } 836 837 URTW_LOCK(sc); 838 839 urtw_read32_m(sc, URTW_RX, &data); 840 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 841 URTW_EEPROM_93C46; 842 843 error = urtw_get_rfchip(sc); 844 if (error != 0) 845 goto fail; 846 error = urtw_get_macaddr(sc); 847 if (error != 0) 848 goto fail; 849 error = urtw_get_txpwr(sc); 850 if (error != 0) 851 goto fail; 852 error = urtw_led_init(sc); 853 if (error != 0) 854 goto fail; 855 856 URTW_UNLOCK(sc); 857 858 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 859 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 860 sc->sc_currate = 3; 861 sc->sc_preamble_mode = urtw_preamble_mode; 862 863 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 864 if (ifp == NULL) { 865 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 866 ret = ENOMEM; 867 goto fail1; 868 } 869 870 ifp->if_softc = sc; 871 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 872 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 873 ifp->if_init = urtw_init; 874 ifp->if_ioctl = urtw_ioctl; 875 ifp->if_start = urtw_start; 876 /* XXX URTW_TX_DATA_LIST_COUNT */ 877 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 878 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 879 IFQ_SET_READY(&ifp->if_snd); 880 881 ic = ifp->if_l2com; 882 ic->ic_ifp = ifp; 883 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 884 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 885 886 /* set device capabilities */ 887 ic->ic_caps = 888 IEEE80211_C_STA | /* station mode */ 889 IEEE80211_C_MONITOR | /* monitor mode supported */ 890 IEEE80211_C_TXPMGT | /* tx power management */ 891 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 892 IEEE80211_C_SHSLOT | /* short slot time supported */ 893 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 894 IEEE80211_C_WPA; /* 802.11i */ 895 896 bands = 0; 897 setbit(&bands, IEEE80211_MODE_11B); 898 setbit(&bands, IEEE80211_MODE_11G); 899 ieee80211_init_channels(ic, NULL, &bands); 900 901 ieee80211_ifattach(ic, sc->sc_bssid); 902 ic->ic_raw_xmit = urtw_raw_xmit; 903 ic->ic_scan_start = urtw_scan_start; 904 ic->ic_scan_end = urtw_scan_end; 905 ic->ic_set_channel = urtw_set_channel; 906 ic->ic_updateslot = urtw_updateslot; 907 ic->ic_vap_create = urtw_vap_create; 908 ic->ic_vap_delete = urtw_vap_delete; 909 ic->ic_update_mcast = urtw_update_mcast; 910 911 ieee80211_radiotap_attach(ic, 912 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 913 URTW_TX_RADIOTAP_PRESENT, 914 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 915 URTW_RX_RADIOTAP_PRESENT); 916 917 urtw_sysctl_node(sc); 918 919 if (bootverbose) 920 ieee80211_announce(ic); 921 return (0); 922 923fail: URTW_UNLOCK(sc); 924fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 925 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 926fail0: 927 return (ret); 928} 929 930static int 931urtw_detach(device_t dev) 932{ 933 struct urtw_softc *sc = device_get_softc(dev); 934 struct ifnet *ifp = sc->sc_ifp; 935 struct ieee80211com *ic = ifp->if_l2com; 936 937 if (!device_is_attached(dev)) 938 return (0); 939 940 urtw_stop(ifp, 1); 941 ieee80211_draintask(ic, &sc->sc_updateslot_task); 942 ieee80211_draintask(ic, &sc->sc_led_task); 943 944 usb_callout_drain(&sc->sc_led_ch); 945 callout_drain(&sc->sc_watchdog_ch); 946 947 ieee80211_ifdetach(ic); 948 949 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 950 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 951 952 urtw_free_tx_data_list(sc); 953 urtw_free_rx_data_list(sc); 954 955 if_free(ifp); 956 mtx_destroy(&sc->sc_mtx); 957 958 return (0); 959} 960 961static void 962urtw_free_tx_data_list(struct urtw_softc *sc) 963{ 964 965 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 966} 967 968static void 969urtw_free_rx_data_list(struct urtw_softc *sc) 970{ 971 972 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 973} 974 975static void 976urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 977 int fillmbuf) 978{ 979 int i; 980 981 for (i = 0; i < ndata; i++) { 982 struct urtw_data *dp = &data[i]; 983 984 if (fillmbuf == 1) { 985 if (dp->m != NULL) { 986 m_freem(dp->m); 987 dp->m = NULL; 988 dp->buf = NULL; 989 } 990 } else { 991 dp->buf = NULL; 992 } 993 if (dp->ni != NULL) { 994 ieee80211_free_node(dp->ni); 995 dp->ni = NULL; 996 } 997 } 998} 999 1000static struct ieee80211vap * 1001urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1002 enum ieee80211_opmode opmode, int flags, 1003 const uint8_t bssid[IEEE80211_ADDR_LEN], 1004 const uint8_t mac[IEEE80211_ADDR_LEN]) 1005{ 1006 struct urtw_vap *uvp; 1007 struct ieee80211vap *vap; 1008 1009 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1010 return (NULL); 1011 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 1012 M_80211_VAP, M_NOWAIT | M_ZERO); 1013 if (uvp == NULL) 1014 return (NULL); 1015 vap = &uvp->vap; 1016 /* enable s/w bmiss handling for sta mode */ 1017 ieee80211_vap_setup(ic, vap, name, unit, opmode, 1018 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 1019 1020 /* override state transition machine */ 1021 uvp->newstate = vap->iv_newstate; 1022 vap->iv_newstate = urtw_newstate; 1023 1024 /* complete setup */ 1025 ieee80211_vap_attach(vap, ieee80211_media_change, 1026 ieee80211_media_status); 1027 ic->ic_opmode = opmode; 1028 return (vap); 1029} 1030 1031static void 1032urtw_vap_delete(struct ieee80211vap *vap) 1033{ 1034 struct urtw_vap *uvp = URTW_VAP(vap); 1035 1036 ieee80211_vap_detach(vap); 1037 free(uvp, M_80211_VAP); 1038} 1039 1040static void 1041urtw_init_locked(void *arg) 1042{ 1043 int ret; 1044 struct urtw_softc *sc = arg; 1045 struct ifnet *ifp = sc->sc_ifp; 1046 usb_error_t error; 1047 1048 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1049 urtw_stop_locked(ifp, 0); 1050 1051 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1052 urtw_adapter_start(sc); 1053 if (error != 0) 1054 goto fail; 1055 1056 /* reset softc variables */ 1057 sc->sc_txtimer = 0; 1058 1059 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1060 ret = urtw_alloc_rx_data_list(sc); 1061 if (ret != 0) 1062 goto fail; 1063 ret = urtw_alloc_tx_data_list(sc); 1064 if (ret != 0) 1065 goto fail; 1066 sc->sc_flags |= URTW_INIT_ONCE; 1067 } 1068 1069 error = urtw_rx_enable(sc); 1070 if (error != 0) 1071 goto fail; 1072 error = urtw_tx_enable(sc); 1073 if (error != 0) 1074 goto fail; 1075 1076 if (sc->sc_flags & URTW_RTL8187B) 1077 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1078 1079 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1080 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1081 1082 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1083fail: 1084 return; 1085} 1086 1087static void 1088urtw_init(void *arg) 1089{ 1090 struct urtw_softc *sc = arg; 1091 1092 URTW_LOCK(sc); 1093 urtw_init_locked(arg); 1094 URTW_UNLOCK(sc); 1095} 1096 1097static usb_error_t 1098urtw_adapter_start_b(struct urtw_softc *sc) 1099{ 1100#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1101 uint8_t data8; 1102 usb_error_t error; 1103 1104 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1105 if (error) 1106 goto fail; 1107 1108 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1109 urtw_write8_m(sc, URTW_CONFIG3, 1110 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1111 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1112 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1113 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1114 1115 urtw_write8_m(sc, 0x61, 0x10); 1116 urtw_read8_m(sc, 0x62, &data8); 1117 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1118 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1119 1120 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1121 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1122 urtw_write8_m(sc, URTW_CONFIG3, data8); 1123 1124 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1125 if (error) 1126 goto fail; 1127 1128 error = urtw_8187b_cmd_reset(sc); 1129 if (error) 1130 goto fail; 1131 1132 error = sc->sc_rf_init(sc); 1133 if (error != 0) 1134 goto fail; 1135 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1136 1137 /* fix RTL8187B RX stall */ 1138 error = urtw_intr_enable(sc); 1139 if (error) 1140 goto fail; 1141 1142 error = urtw_write8e(sc, 0x41, 0xf4); 1143 if (error) 1144 goto fail; 1145 error = urtw_write8e(sc, 0x40, 0x00); 1146 if (error) 1147 goto fail; 1148 error = urtw_write8e(sc, 0x42, 0x00); 1149 if (error) 1150 goto fail; 1151 error = urtw_write8e(sc, 0x42, 0x01); 1152 if (error) 1153 goto fail; 1154 error = urtw_write8e(sc, 0x40, 0x0f); 1155 if (error) 1156 goto fail; 1157 error = urtw_write8e(sc, 0x42, 0x00); 1158 if (error) 1159 goto fail; 1160 error = urtw_write8e(sc, 0x42, 0x01); 1161 if (error) 1162 goto fail; 1163 1164 urtw_read8_m(sc, 0xdb, &data8); 1165 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1166 urtw_write16_m(sc, 0x372, 0x59fa); 1167 urtw_write16_m(sc, 0x374, 0x59d2); 1168 urtw_write16_m(sc, 0x376, 0x59d2); 1169 urtw_write16_m(sc, 0x378, 0x19fa); 1170 urtw_write16_m(sc, 0x37a, 0x19fa); 1171 urtw_write16_m(sc, 0x37c, 0x00d0); 1172 urtw_write8_m(sc, 0x61, 0); 1173 1174 urtw_write8_m(sc, 0x180, 0x0f); 1175 urtw_write8_m(sc, 0x183, 0x03); 1176 urtw_write8_m(sc, 0xda, 0x10); 1177 urtw_write8_m(sc, 0x24d, 0x08); 1178 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1179 1180 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1181fail: 1182 return (error); 1183#undef N 1184} 1185 1186static usb_error_t 1187urtw_adapter_start(struct urtw_softc *sc) 1188{ 1189 usb_error_t error; 1190 1191 error = urtw_reset(sc); 1192 if (error) 1193 goto fail; 1194 1195 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1196 urtw_write8_m(sc, URTW_GPIO, 0); 1197 1198 /* for led */ 1199 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1200 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1201 if (error != 0) 1202 goto fail; 1203 1204 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1205 if (error) 1206 goto fail; 1207 /* applying MAC address again. */ 1208 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1209 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1210 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1211 if (error) 1212 goto fail; 1213 1214 error = urtw_update_msr(sc); 1215 if (error) 1216 goto fail; 1217 1218 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1219 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1220 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1221 error = urtw_set_rate(sc); 1222 if (error != 0) 1223 goto fail; 1224 1225 error = sc->sc_rf_init(sc); 1226 if (error != 0) 1227 goto fail; 1228 if (sc->sc_rf_set_sens != NULL) 1229 sc->sc_rf_set_sens(sc, sc->sc_sens); 1230 1231 /* XXX correct? to call write16 */ 1232 urtw_write16_m(sc, URTW_PSR, 1); 1233 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1234 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1235 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1236 /* XXX correct? to call write16 */ 1237 urtw_write16_m(sc, URTW_PSR, 0); 1238 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1239 1240 error = urtw_intr_enable(sc); 1241 if (error != 0) 1242 goto fail; 1243 1244fail: 1245 return (error); 1246} 1247 1248static usb_error_t 1249urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1250{ 1251 uint8_t data; 1252 usb_error_t error; 1253 1254 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1255 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1256 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1257 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1258fail: 1259 return (error); 1260} 1261 1262static usb_error_t 1263urtw_8187b_cmd_reset(struct urtw_softc *sc) 1264{ 1265 int i; 1266 uint8_t data8; 1267 usb_error_t error; 1268 1269 /* XXX the code can be duplicate with urtw_reset(). */ 1270 urtw_read8_m(sc, URTW_CMD, &data8); 1271 data8 = (data8 & 0x2) | URTW_CMD_RST; 1272 urtw_write8_m(sc, URTW_CMD, data8); 1273 1274 for (i = 0; i < 20; i++) { 1275 usb_pause_mtx(&sc->sc_mtx, 2); 1276 urtw_read8_m(sc, URTW_CMD, &data8); 1277 if (!(data8 & URTW_CMD_RST)) 1278 break; 1279 } 1280 if (i >= 20) { 1281 device_printf(sc->sc_dev, "reset timeout\n"); 1282 goto fail; 1283 } 1284fail: 1285 return (error); 1286} 1287 1288static usb_error_t 1289urtw_do_request(struct urtw_softc *sc, 1290 struct usb_device_request *req, void *data) 1291{ 1292 usb_error_t err; 1293 int ntries = 10; 1294 1295 URTW_ASSERT_LOCKED(sc); 1296 1297 while (ntries--) { 1298 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1299 req, data, 0, NULL, 250 /* ms */); 1300 if (err == 0) 1301 break; 1302 1303 DPRINTF(sc, URTW_DEBUG_INIT, 1304 "Control request failed, %s (retrying)\n", 1305 usbd_errstr(err)); 1306 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1307 } 1308 return (err); 1309} 1310 1311static void 1312urtw_stop_locked(struct ifnet *ifp, int disable) 1313{ 1314 struct urtw_softc *sc = ifp->if_softc; 1315 uint8_t data8; 1316 usb_error_t error; 1317 1318 (void)disable; 1319 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1320 1321 error = urtw_intr_disable(sc); 1322 if (error) 1323 goto fail; 1324 urtw_read8_m(sc, URTW_CMD, &data8); 1325 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1326 urtw_write8_m(sc, URTW_CMD, data8); 1327 1328 error = sc->sc_rf_stop(sc); 1329 if (error != 0) 1330 goto fail; 1331 1332 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1333 if (error) 1334 goto fail; 1335 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1336 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1337 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1338 if (error) 1339 goto fail; 1340fail: 1341 if (error) 1342 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1343 usbd_errstr(error)); 1344 1345 usb_callout_stop(&sc->sc_led_ch); 1346 callout_stop(&sc->sc_watchdog_ch); 1347 1348 urtw_abort_xfers(sc); 1349} 1350 1351static void 1352urtw_stop(struct ifnet *ifp, int disable) 1353{ 1354 struct urtw_softc *sc = ifp->if_softc; 1355 1356 URTW_LOCK(sc); 1357 urtw_stop_locked(ifp, disable); 1358 URTW_UNLOCK(sc); 1359} 1360 1361static void 1362urtw_abort_xfers(struct urtw_softc *sc) 1363{ 1364 int i, max; 1365 1366 URTW_ASSERT_LOCKED(sc); 1367 1368 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1369 URTW_8187L_N_XFERS; 1370 1371 /* abort any pending transfers */ 1372 for (i = 0; i < max; i++) 1373 usbd_transfer_stop(sc->sc_xfer[i]); 1374} 1375 1376static int 1377urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1378{ 1379 struct urtw_softc *sc = ifp->if_softc; 1380 struct ieee80211com *ic = ifp->if_l2com; 1381 struct ifreq *ifr = (struct ifreq *) data; 1382 int error = 0, startall = 0; 1383 1384 switch (cmd) { 1385 case SIOCSIFFLAGS: 1386 if (ifp->if_flags & IFF_UP) { 1387 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1388 if ((ifp->if_flags ^ sc->sc_if_flags) & 1389 (IFF_ALLMULTI | IFF_PROMISC)) 1390 urtw_set_multi(sc); 1391 } else { 1392 urtw_init(ifp->if_softc); 1393 startall = 1; 1394 } 1395 } else { 1396 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1397 urtw_stop(ifp, 1); 1398 } 1399 sc->sc_if_flags = ifp->if_flags; 1400 if (startall) 1401 ieee80211_start_all(ic); 1402 break; 1403 case SIOCGIFMEDIA: 1404 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1405 break; 1406 case SIOCGIFADDR: 1407 error = ether_ioctl(ifp, cmd, data); 1408 break; 1409 default: 1410 error = EINVAL; 1411 break; 1412 } 1413 1414 return (error); 1415} 1416 1417static void 1418urtw_start(struct ifnet *ifp) 1419{ 1420 struct urtw_data *bf; 1421 struct urtw_softc *sc = ifp->if_softc; 1422 struct ieee80211_node *ni; 1423 struct mbuf *m; 1424 1425 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1426 return; 1427 1428 URTW_LOCK(sc); 1429 for (;;) { 1430 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1431 if (m == NULL) 1432 break; 1433 bf = urtw_getbuf(sc); 1434 if (bf == NULL) { 1435 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1436 break; 1437 } 1438 1439 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1440 m->m_pkthdr.rcvif = NULL; 1441 1442 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1443 ifp->if_oerrors++; 1444 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1445 ieee80211_free_node(ni); 1446 break; 1447 } 1448 1449 sc->sc_txtimer = 5; 1450 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1451 } 1452 URTW_UNLOCK(sc); 1453} 1454 1455static int 1456urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1457 int ndata, int maxsz, void *dma_buf) 1458{ 1459 int i, error; 1460 1461 for (i = 0; i < ndata; i++) { 1462 struct urtw_data *dp = &data[i]; 1463 1464 dp->sc = sc; 1465 if (dma_buf == NULL) { 1466 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1467 if (dp->m == NULL) { 1468 device_printf(sc->sc_dev, 1469 "could not allocate rx mbuf\n"); 1470 error = ENOMEM; 1471 goto fail; 1472 } 1473 dp->buf = mtod(dp->m, uint8_t *); 1474 } else { 1475 dp->m = NULL; 1476 dp->buf = ((uint8_t *)dma_buf) + 1477 (i * maxsz); 1478 } 1479 dp->ni = NULL; 1480 } 1481 return (0); 1482 1483fail: urtw_free_data_list(sc, data, ndata, 1); 1484 return (error); 1485} 1486 1487static int 1488urtw_alloc_rx_data_list(struct urtw_softc *sc) 1489{ 1490 int error, i; 1491 1492 error = urtw_alloc_data_list(sc, 1493 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1494 MCLBYTES, NULL /* mbufs */); 1495 if (error != 0) 1496 return (error); 1497 1498 STAILQ_INIT(&sc->sc_rx_active); 1499 STAILQ_INIT(&sc->sc_rx_inactive); 1500 1501 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1502 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1503 1504 return (0); 1505} 1506 1507static int 1508urtw_alloc_tx_data_list(struct urtw_softc *sc) 1509{ 1510 int error, i; 1511 1512 error = urtw_alloc_data_list(sc, 1513 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1514 sc->sc_tx_dma_buf /* no mbufs */); 1515 if (error != 0) 1516 return (error); 1517 1518 STAILQ_INIT(&sc->sc_tx_active); 1519 STAILQ_INIT(&sc->sc_tx_inactive); 1520 STAILQ_INIT(&sc->sc_tx_pending); 1521 1522 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1523 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1524 next); 1525 1526 return (0); 1527} 1528 1529static int 1530urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1531 const struct ieee80211_bpf_params *params) 1532{ 1533 struct ieee80211com *ic = ni->ni_ic; 1534 struct ifnet *ifp = ic->ic_ifp; 1535 struct urtw_data *bf; 1536 struct urtw_softc *sc = ifp->if_softc; 1537 1538 /* prevent management frames from being sent if we're not ready */ 1539 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1540 m_freem(m); 1541 ieee80211_free_node(ni); 1542 return ENETDOWN; 1543 } 1544 URTW_LOCK(sc); 1545 bf = urtw_getbuf(sc); 1546 if (bf == NULL) { 1547 ieee80211_free_node(ni); 1548 m_freem(m); 1549 URTW_UNLOCK(sc); 1550 return (ENOBUFS); /* XXX */ 1551 } 1552 1553 ifp->if_opackets++; 1554 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1555 ieee80211_free_node(ni); 1556 ifp->if_oerrors++; 1557 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1558 URTW_UNLOCK(sc); 1559 return (EIO); 1560 } 1561 URTW_UNLOCK(sc); 1562 1563 sc->sc_txtimer = 5; 1564 return (0); 1565} 1566 1567static void 1568urtw_scan_start(struct ieee80211com *ic) 1569{ 1570 1571 /* XXX do nothing? */ 1572} 1573 1574static void 1575urtw_scan_end(struct ieee80211com *ic) 1576{ 1577 1578 /* XXX do nothing? */ 1579} 1580 1581static void 1582urtw_set_channel(struct ieee80211com *ic) 1583{ 1584 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1585 struct ifnet *ifp = sc->sc_ifp; 1586 uint32_t data, orig; 1587 usb_error_t error; 1588 1589 /* 1590 * if the user set a channel explicitly using ifconfig(8) this function 1591 * can be called earlier than we're expected that in some cases the 1592 * initialization would be failed if setting a channel is called before 1593 * the init have done. 1594 */ 1595 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1596 return; 1597 1598 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1599 return; 1600 1601 URTW_LOCK(sc); 1602 1603 /* 1604 * during changing th channel we need to temporarily be disable 1605 * TX. 1606 */ 1607 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1608 data = orig & ~URTW_TX_LOOPBACK_MASK; 1609 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1610 1611 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1612 if (error != 0) 1613 goto fail; 1614 usb_pause_mtx(&sc->sc_mtx, 10); 1615 urtw_write32_m(sc, URTW_TX_CONF, orig); 1616 1617 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1618 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1619 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1620 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1621 1622fail: 1623 URTW_UNLOCK(sc); 1624 1625 sc->sc_curchan = ic->ic_curchan; 1626 1627 if (error != 0) 1628 device_printf(sc->sc_dev, "could not change the channel\n"); 1629} 1630 1631static void 1632urtw_update_mcast(struct ifnet *ifp) 1633{ 1634 1635 /* XXX do nothing? */ 1636} 1637 1638static int 1639urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1640 struct urtw_data *data, int prior) 1641{ 1642 struct ifnet *ifp = sc->sc_ifp; 1643 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1644 struct ieee80211_key *k; 1645 const struct ieee80211_txparam *tp; 1646 struct ieee80211com *ic = ifp->if_l2com; 1647 struct ieee80211vap *vap = ni->ni_vap; 1648 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1649 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1650 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1651 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1652 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1653 }; 1654 struct usb_xfer *xfer; 1655 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, 1656 pkttime = 0, txdur = 0, isshort = 0, xferlen; 1657 uint16_t acktime, rtstime, ctstime; 1658 uint32_t flags; 1659 usb_error_t error; 1660 1661 URTW_ASSERT_LOCKED(sc); 1662 1663 /* 1664 * Software crypto. 1665 */ 1666 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1667 k = ieee80211_crypto_encap(ni, m0); 1668 if (k == NULL) { 1669 device_printf(sc->sc_dev, 1670 "ieee80211_crypto_encap returns NULL.\n"); 1671 /* XXX we don't expect the fragmented frames */ 1672 m_freem(m0); 1673 return (ENOBUFS); 1674 } 1675 1676 /* in case packet header moved, reset pointer */ 1677 wh = mtod(m0, struct ieee80211_frame *); 1678 } 1679 1680 if (ieee80211_radiotap_active_vap(vap)) { 1681 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1682 1683 /* XXX Are variables correct? */ 1684 tap->wt_flags = 0; 1685 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1686 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1687 1688 ieee80211_radiotap_tx(vap, m0); 1689 } 1690 1691 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_MGT || 1692 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_CTL) { 1693 tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)]; 1694 rate = tp->mgmtrate; 1695 } else { 1696 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1697 /* for data frames */ 1698 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1699 rate = tp->mcastrate; 1700 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1701 rate = tp->ucastrate; 1702 else 1703 rate = urtw_rtl2rate(sc->sc_currate); 1704 } 1705 1706 sc->sc_stats.txrates[sc->sc_currate]++; 1707 1708 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1709 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1710 IEEE80211_CRC_LEN, rate, 0, 0); 1711 else { 1712 acktime = urtw_compute_txtime(14, 2,0, 0); 1713 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1714 rtsenable = 1; 1715 ctsenable = 0; 1716 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1717 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1718 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1719 IEEE80211_CRC_LEN, rate, 0, isshort); 1720 rtsdur = ctstime + pkttime + acktime + 1721 3 * URTW_ASIFS_TIME; 1722 txdur = rtstime + rtsdur; 1723 } else { 1724 rtsenable = ctsenable = rtsdur = 0; 1725 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1726 IEEE80211_CRC_LEN, rate, 0, isshort); 1727 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1728 } 1729 1730 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1731 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1732 IEEE80211_CRC_LEN, rate, 0, isshort) + 1733 3 * URTW_ASIFS_TIME + 1734 2 * acktime; 1735 else 1736 dur = URTW_ASIFS_TIME + acktime; 1737 } 1738 *(uint16_t *)wh->i_dur = htole16(dur); 1739 1740 xferlen = m0->m_pkthdr.len; 1741 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1742 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1743 xferlen += 1; 1744 1745 memset(data->buf, 0, URTW_TX_MAXSIZE); 1746 flags = m0->m_pkthdr.len & 0xfff; 1747 flags |= URTW_TX_FLAG_NO_ENC; 1748 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1749 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1750 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1751 (sc->sc_currate != 0)) 1752 flags |= URTW_TX_FLAG_SPLCP; 1753 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1754 flags |= URTW_TX_FLAG_MOREFRAG; 1755 1756 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1757 1758 if (sc->sc_flags & URTW_RTL8187B) { 1759 struct urtw_8187b_txhdr *tx; 1760 1761 tx = (struct urtw_8187b_txhdr *)data->buf; 1762 if (ctsenable) 1763 flags |= URTW_TX_FLAG_CTS; 1764 if (rtsenable) { 1765 flags |= URTW_TX_FLAG_RTS; 1766 flags |= (urtw_rate2rtl(11) & 0xf) << 1767 URTW_TX_FLAG_RTSRATE_SHIFT; 1768 tx->rtsdur = rtsdur; 1769 } 1770 tx->flag = htole32(flags); 1771 tx->txdur = txdur; 1772 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1773 IEEE80211_FC0_TYPE_MGT && 1774 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1775 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1776 tx->retry = 1; 1777 else 1778 tx->retry = URTW_TX_MAXRETRY; 1779 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1780 } else { 1781 struct urtw_8187l_txhdr *tx; 1782 1783 tx = (struct urtw_8187l_txhdr *)data->buf; 1784 if (rtsenable) { 1785 flags |= URTW_TX_FLAG_RTS; 1786 tx->rtsdur = rtsdur; 1787 } 1788 flags |= (urtw_rate2rtl(11) & 0xf) << URTW_TX_FLAG_RTSRATE_SHIFT; 1789 tx->flag = htole32(flags); 1790 tx->retry = 3; /* CW minimum */ 1791 tx->retry = 7 << 4; /* CW maximum */ 1792 tx->retry = URTW_TX_MAXRETRY << 8; /* retry limitation */ 1793 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1794 } 1795 1796 data->buflen = xferlen; 1797 data->ni = ni; 1798 data->m = m0; 1799 1800 if (sc->sc_flags & URTW_RTL8187B) { 1801 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1802 case IEEE80211_FC0_TYPE_CTL: 1803 case IEEE80211_FC0_TYPE_MGT: 1804 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1805 break; 1806 default: 1807 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1808 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1809 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1810 break; 1811 } 1812 } else 1813 xfer = (prior == URTW_PRIORITY_LOW) ? 1814 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1815 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1816 1817 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1818 usbd_transfer_start(xfer); 1819 1820 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1821 if (error != 0) 1822 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1823 error); 1824 return (0); 1825} 1826 1827static int 1828urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1829{ 1830 struct ieee80211com *ic = vap->iv_ic; 1831 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1832 struct urtw_vap *uvp = URTW_VAP(vap); 1833 struct ieee80211_node *ni; 1834 usb_error_t error = 0; 1835 1836 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1837 ieee80211_state_name[vap->iv_state], 1838 ieee80211_state_name[nstate]); 1839 1840 sc->sc_state = nstate; 1841 1842 IEEE80211_UNLOCK(ic); 1843 URTW_LOCK(sc); 1844 usb_callout_stop(&sc->sc_led_ch); 1845 callout_stop(&sc->sc_watchdog_ch); 1846 1847 switch (nstate) { 1848 case IEEE80211_S_INIT: 1849 case IEEE80211_S_SCAN: 1850 case IEEE80211_S_AUTH: 1851 case IEEE80211_S_ASSOC: 1852 break; 1853 case IEEE80211_S_RUN: 1854 ni = ieee80211_ref_node(vap->iv_bss); 1855 /* setting bssid. */ 1856 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1857 urtw_write16_m(sc, URTW_BSSID + 4, 1858 ((uint16_t *)ni->ni_bssid)[2]); 1859 urtw_update_msr(sc); 1860 /* XXX maybe the below would be incorrect. */ 1861 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1862 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1863 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1864 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1865 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1866 if (error != 0) 1867 device_printf(sc->sc_dev, 1868 "could not control LED (%d)\n", error); 1869 ieee80211_free_node(ni); 1870 break; 1871 default: 1872 break; 1873 } 1874fail: 1875 URTW_UNLOCK(sc); 1876 IEEE80211_LOCK(ic); 1877 return (uvp->newstate(vap, nstate, arg)); 1878} 1879 1880static void 1881urtw_watchdog(void *arg) 1882{ 1883 struct urtw_softc *sc = arg; 1884 struct ifnet *ifp = sc->sc_ifp; 1885 1886 if (sc->sc_txtimer > 0) { 1887 if (--sc->sc_txtimer == 0) { 1888 device_printf(sc->sc_dev, "device timeout\n"); 1889 ifp->if_oerrors++; 1890 return; 1891 } 1892 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1893 } 1894} 1895 1896static void 1897urtw_set_multi(void *arg) 1898{ 1899 struct urtw_softc *sc = arg; 1900 struct ifnet *ifp = sc->sc_ifp; 1901 1902 if (!(ifp->if_flags & IFF_UP)) 1903 return; 1904 1905 /* 1906 * XXX don't know how to set a device. Lack of docs. Just try to set 1907 * IFF_ALLMULTI flag here. 1908 */ 1909 ifp->if_flags |= IFF_ALLMULTI; 1910} 1911 1912static usb_error_t 1913urtw_set_rate(struct urtw_softc *sc) 1914{ 1915 int i, basic_rate, min_rr_rate, max_rr_rate; 1916 uint16_t data; 1917 usb_error_t error; 1918 1919 basic_rate = urtw_rate2rtl(48); 1920 min_rr_rate = urtw_rate2rtl(12); 1921 max_rr_rate = urtw_rate2rtl(48); 1922 1923 urtw_write8_m(sc, URTW_RESP_RATE, 1924 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1925 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1926 1927 urtw_read16_m(sc, URTW_BRSR, &data); 1928 data &= ~URTW_BRSR_MBR_8185; 1929 1930 for (i = 0; i <= basic_rate; i++) 1931 data |= (1 << i); 1932 1933 urtw_write16_m(sc, URTW_BRSR, data); 1934fail: 1935 return (error); 1936} 1937 1938static uint16_t 1939urtw_rate2rtl(uint32_t rate) 1940{ 1941#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1942 int i; 1943 1944 for (i = 0; i < N(urtw_ratetable); i++) { 1945 if (rate == urtw_ratetable[i].reg) 1946 return urtw_ratetable[i].val; 1947 } 1948 1949 return (3); 1950#undef N 1951} 1952 1953static uint16_t 1954urtw_rtl2rate(uint32_t rate) 1955{ 1956#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 1957 int i; 1958 1959 for (i = 0; i < N(urtw_ratetable); i++) { 1960 if (rate == urtw_ratetable[i].val) 1961 return urtw_ratetable[i].reg; 1962 } 1963 1964 return (0); 1965#undef N 1966} 1967 1968static usb_error_t 1969urtw_update_msr(struct urtw_softc *sc) 1970{ 1971 struct ifnet *ifp = sc->sc_ifp; 1972 struct ieee80211com *ic = ifp->if_l2com; 1973 uint8_t data; 1974 usb_error_t error; 1975 1976 urtw_read8_m(sc, URTW_MSR, &data); 1977 data &= ~URTW_MSR_LINK_MASK; 1978 1979 if (sc->sc_state == IEEE80211_S_RUN) { 1980 switch (ic->ic_opmode) { 1981 case IEEE80211_M_STA: 1982 case IEEE80211_M_MONITOR: 1983 data |= URTW_MSR_LINK_STA; 1984 if (sc->sc_flags & URTW_RTL8187B) 1985 data |= URTW_MSR_LINK_ENEDCA; 1986 break; 1987 case IEEE80211_M_IBSS: 1988 data |= URTW_MSR_LINK_ADHOC; 1989 break; 1990 case IEEE80211_M_HOSTAP: 1991 data |= URTW_MSR_LINK_HOSTAP; 1992 break; 1993 default: 1994 panic("unsupported operation mode 0x%x\n", 1995 ic->ic_opmode); 1996 /* never reach */ 1997 } 1998 } else 1999 data |= URTW_MSR_LINK_NONE; 2000 2001 urtw_write8_m(sc, URTW_MSR, data); 2002fail: 2003 return (error); 2004} 2005 2006static usb_error_t 2007urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2008{ 2009 struct usb_device_request req; 2010 usb_error_t error; 2011 2012 URTW_ASSERT_LOCKED(sc); 2013 2014 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2015 req.bRequest = URTW_8187_GETREGS_REQ; 2016 USETW(req.wValue, (val & 0xff) | 0xff00); 2017 USETW(req.wIndex, (val >> 8) & 0x3); 2018 USETW(req.wLength, sizeof(uint8_t)); 2019 2020 error = urtw_do_request(sc, &req, data); 2021 return (error); 2022} 2023 2024static usb_error_t 2025urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2026{ 2027 struct usb_device_request req; 2028 usb_error_t error; 2029 2030 URTW_ASSERT_LOCKED(sc); 2031 2032 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2033 req.bRequest = URTW_8187_GETREGS_REQ; 2034 USETW(req.wValue, (val & 0xff) | 0xff00); 2035 USETW(req.wIndex, (val >> 8) & 0x3); 2036 USETW(req.wLength, sizeof(uint16_t)); 2037 2038 error = urtw_do_request(sc, &req, data); 2039 return (error); 2040} 2041 2042static usb_error_t 2043urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2044{ 2045 struct usb_device_request req; 2046 usb_error_t error; 2047 2048 URTW_ASSERT_LOCKED(sc); 2049 2050 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2051 req.bRequest = URTW_8187_GETREGS_REQ; 2052 USETW(req.wValue, (val & 0xff) | 0xff00); 2053 USETW(req.wIndex, (val >> 8) & 0x3); 2054 USETW(req.wLength, sizeof(uint32_t)); 2055 2056 error = urtw_do_request(sc, &req, data); 2057 return (error); 2058} 2059 2060static usb_error_t 2061urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2062{ 2063 struct usb_device_request req; 2064 2065 URTW_ASSERT_LOCKED(sc); 2066 2067 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2068 req.bRequest = URTW_8187_SETREGS_REQ; 2069 USETW(req.wValue, (val & 0xff) | 0xff00); 2070 USETW(req.wIndex, (val >> 8) & 0x3); 2071 USETW(req.wLength, sizeof(uint8_t)); 2072 2073 return (urtw_do_request(sc, &req, &data)); 2074} 2075 2076static usb_error_t 2077urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2078{ 2079 struct usb_device_request req; 2080 2081 URTW_ASSERT_LOCKED(sc); 2082 2083 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2084 req.bRequest = URTW_8187_SETREGS_REQ; 2085 USETW(req.wValue, (val & 0xff) | 0xff00); 2086 USETW(req.wIndex, (val >> 8) & 0x3); 2087 USETW(req.wLength, sizeof(uint16_t)); 2088 2089 return (urtw_do_request(sc, &req, &data)); 2090} 2091 2092static usb_error_t 2093urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2094{ 2095 struct usb_device_request req; 2096 2097 URTW_ASSERT_LOCKED(sc); 2098 2099 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2100 req.bRequest = URTW_8187_SETREGS_REQ; 2101 USETW(req.wValue, (val & 0xff) | 0xff00); 2102 USETW(req.wIndex, (val >> 8) & 0x3); 2103 USETW(req.wLength, sizeof(uint32_t)); 2104 2105 return (urtw_do_request(sc, &req, &data)); 2106} 2107 2108static usb_error_t 2109urtw_get_macaddr(struct urtw_softc *sc) 2110{ 2111 uint32_t data; 2112 usb_error_t error; 2113 2114 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2115 if (error != 0) 2116 goto fail; 2117 sc->sc_bssid[0] = data & 0xff; 2118 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2119 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2120 if (error != 0) 2121 goto fail; 2122 sc->sc_bssid[2] = data & 0xff; 2123 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2124 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2125 if (error != 0) 2126 goto fail; 2127 sc->sc_bssid[4] = data & 0xff; 2128 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2129fail: 2130 return (error); 2131} 2132 2133static usb_error_t 2134urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2135{ 2136#define URTW_READCMD_LEN 3 2137 int addrlen, i; 2138 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2139 usb_error_t error; 2140 2141 /* NB: make sure the buffer is initialized */ 2142 *data = 0; 2143 2144 /* enable EPROM programming */ 2145 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2146 DELAY(URTW_EPROM_DELAY); 2147 2148 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2149 if (error != 0) 2150 goto fail; 2151 error = urtw_eprom_ck(sc); 2152 if (error != 0) 2153 goto fail; 2154 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2155 if (error != 0) 2156 goto fail; 2157 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2158 addrlen = 8; 2159 addrstr[0] = addr & (1 << 7); 2160 addrstr[1] = addr & (1 << 6); 2161 addrstr[2] = addr & (1 << 5); 2162 addrstr[3] = addr & (1 << 4); 2163 addrstr[4] = addr & (1 << 3); 2164 addrstr[5] = addr & (1 << 2); 2165 addrstr[6] = addr & (1 << 1); 2166 addrstr[7] = addr & (1 << 0); 2167 } else { 2168 addrlen=6; 2169 addrstr[0] = addr & (1 << 5); 2170 addrstr[1] = addr & (1 << 4); 2171 addrstr[2] = addr & (1 << 3); 2172 addrstr[3] = addr & (1 << 2); 2173 addrstr[4] = addr & (1 << 1); 2174 addrstr[5] = addr & (1 << 0); 2175 } 2176 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2177 if (error != 0) 2178 goto fail; 2179 2180 error = urtw_eprom_writebit(sc, 0); 2181 if (error != 0) 2182 goto fail; 2183 2184 for (i = 0; i < 16; i++) { 2185 error = urtw_eprom_ck(sc); 2186 if (error != 0) 2187 goto fail; 2188 error = urtw_eprom_readbit(sc, &data16); 2189 if (error != 0) 2190 goto fail; 2191 2192 (*data) |= (data16 << (15 - i)); 2193 } 2194 2195 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2196 if (error != 0) 2197 goto fail; 2198 error = urtw_eprom_ck(sc); 2199 if (error != 0) 2200 goto fail; 2201 2202 /* now disable EPROM programming */ 2203 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2204fail: 2205 return (error); 2206#undef URTW_READCMD_LEN 2207} 2208 2209static usb_error_t 2210urtw_eprom_cs(struct urtw_softc *sc, int able) 2211{ 2212 uint8_t data; 2213 usb_error_t error; 2214 2215 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2216 if (able == URTW_EPROM_ENABLE) 2217 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2218 else 2219 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2220 DELAY(URTW_EPROM_DELAY); 2221fail: 2222 return (error); 2223} 2224 2225static usb_error_t 2226urtw_eprom_ck(struct urtw_softc *sc) 2227{ 2228 uint8_t data; 2229 usb_error_t error; 2230 2231 /* masking */ 2232 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2233 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2234 DELAY(URTW_EPROM_DELAY); 2235 /* unmasking */ 2236 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2237 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2238 DELAY(URTW_EPROM_DELAY); 2239fail: 2240 return (error); 2241} 2242 2243static usb_error_t 2244urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2245{ 2246 uint8_t data8; 2247 usb_error_t error; 2248 2249 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2250 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2251 DELAY(URTW_EPROM_DELAY); 2252 2253fail: 2254 return (error); 2255} 2256 2257static usb_error_t 2258urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2259{ 2260 uint8_t data; 2261 usb_error_t error; 2262 2263 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2264 if (bit != 0) 2265 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2266 else 2267 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2268 DELAY(URTW_EPROM_DELAY); 2269fail: 2270 return (error); 2271} 2272 2273static usb_error_t 2274urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2275{ 2276 int i = 0; 2277 usb_error_t error = 0; 2278 2279 for (i = 0; i < buflen; i++) { 2280 error = urtw_eprom_writebit(sc, buf[i]); 2281 if (error != 0) 2282 goto fail; 2283 error = urtw_eprom_ck(sc); 2284 if (error != 0) 2285 goto fail; 2286 } 2287fail: 2288 return (error); 2289} 2290 2291 2292static usb_error_t 2293urtw_get_txpwr(struct urtw_softc *sc) 2294{ 2295 int i, j; 2296 uint32_t data; 2297 usb_error_t error; 2298 2299 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2300 if (error != 0) 2301 goto fail; 2302 sc->sc_txpwr_cck_base = data & 0xf; 2303 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2304 2305 for (i = 1, j = 0; i < 6; i += 2, j++) { 2306 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2307 if (error != 0) 2308 goto fail; 2309 sc->sc_txpwr_cck[i] = data & 0xf; 2310 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2311 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2312 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2313 } 2314 for (i = 1, j = 0; i < 4; i += 2, j++) { 2315 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2316 if (error != 0) 2317 goto fail; 2318 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2319 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2320 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2321 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2322 } 2323 if (sc->sc_flags & URTW_RTL8187B) { 2324 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2325 if (error != 0) 2326 goto fail; 2327 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2328 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2329 error = urtw_eprom_read32(sc, 0x0a, &data); 2330 if (error != 0) 2331 goto fail; 2332 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2333 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2334 error = urtw_eprom_read32(sc, 0x1c, &data); 2335 if (error != 0) 2336 goto fail; 2337 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2338 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2339 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2340 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2341 } else { 2342 for (i = 1, j = 0; i < 4; i += 2, j++) { 2343 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2344 &data); 2345 if (error != 0) 2346 goto fail; 2347 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2348 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2349 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2350 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2351 } 2352 } 2353fail: 2354 return (error); 2355} 2356 2357 2358static usb_error_t 2359urtw_get_rfchip(struct urtw_softc *sc) 2360{ 2361 int ret; 2362 uint8_t data8; 2363 uint32_t data; 2364 usb_error_t error; 2365 2366 if (sc->sc_flags & URTW_RTL8187B) { 2367 urtw_read8_m(sc, 0xe1, &data8); 2368 switch (data8) { 2369 case 0: 2370 sc->sc_flags |= URTW_RTL8187B_REV_B; 2371 break; 2372 case 1: 2373 sc->sc_flags |= URTW_RTL8187B_REV_D; 2374 break; 2375 case 2: 2376 sc->sc_flags |= URTW_RTL8187B_REV_E; 2377 break; 2378 default: 2379 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2380 sc->sc_flags |= URTW_RTL8187B_REV_B; 2381 break; 2382 } 2383 } else { 2384 urtw_read32_m(sc, URTW_TX_CONF, &data); 2385 switch (data & URTW_TX_HWMASK) { 2386 case URTW_TX_R8187vD_B: 2387 sc->sc_flags |= URTW_RTL8187B; 2388 break; 2389 case URTW_TX_R8187vD: 2390 break; 2391 default: 2392 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2393 data & URTW_TX_HWMASK); 2394 break; 2395 } 2396 } 2397 2398 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2399 if (error != 0) 2400 goto fail; 2401 switch (data & 0xff) { 2402 case URTW_EPROM_RFCHIPID_RTL8225U: 2403 error = urtw_8225_isv2(sc, &ret); 2404 if (error != 0) 2405 goto fail; 2406 if (ret == 0) { 2407 sc->sc_rf_init = urtw_8225_rf_init; 2408 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2409 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2410 sc->sc_rf_stop = urtw_8225_rf_stop; 2411 } else { 2412 sc->sc_rf_init = urtw_8225v2_rf_init; 2413 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2414 sc->sc_rf_stop = urtw_8225_rf_stop; 2415 } 2416 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2417 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2418 break; 2419 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2420 sc->sc_rf_init = urtw_8225v2b_rf_init; 2421 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2422 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2423 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2424 sc->sc_rf_stop = urtw_8225_rf_stop; 2425 break; 2426 default: 2427 panic("unsupported RF chip %d\n", data & 0xff); 2428 /* never reach */ 2429 } 2430 2431 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2432 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2433 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2434 "rtl8225z2", 2435 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2436 (data8 == 1) ? "d" : "e") : "none"); 2437 2438fail: 2439 return (error); 2440} 2441 2442 2443static usb_error_t 2444urtw_led_init(struct urtw_softc *sc) 2445{ 2446 uint32_t rev; 2447 usb_error_t error; 2448 2449 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2450 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2451 if (error != 0) 2452 goto fail; 2453 2454 switch (rev & URTW_EPROM_CID_MASK) { 2455 case URTW_EPROM_CID_ALPHA0: 2456 sc->sc_strategy = URTW_SW_LED_MODE1; 2457 break; 2458 case URTW_EPROM_CID_SERCOMM_PS: 2459 sc->sc_strategy = URTW_SW_LED_MODE3; 2460 break; 2461 case URTW_EPROM_CID_HW_LED: 2462 sc->sc_strategy = URTW_HW_LED; 2463 break; 2464 case URTW_EPROM_CID_RSVD0: 2465 case URTW_EPROM_CID_RSVD1: 2466 default: 2467 sc->sc_strategy = URTW_SW_LED_MODE0; 2468 break; 2469 } 2470 2471 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2472 2473fail: 2474 return (error); 2475} 2476 2477 2478static usb_error_t 2479urtw_8225_rf_init(struct urtw_softc *sc) 2480{ 2481#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2482 int i; 2483 uint16_t data; 2484 usb_error_t error; 2485 2486 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2487 if (error) 2488 goto fail; 2489 2490 error = urtw_8225_usb_init(sc); 2491 if (error) 2492 goto fail; 2493 2494 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2495 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2496 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2497 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2498 2499 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2500 if (error) 2501 goto fail; 2502 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2503 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2504 if (error) 2505 goto fail; 2506 2507 error = urtw_8185_rf_pins_enable(sc); 2508 if (error) 2509 goto fail; 2510 usb_pause_mtx(&sc->sc_mtx, 1000); 2511 2512 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2513 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2514 urtw_8225_rf_part1[i].val); 2515 usb_pause_mtx(&sc->sc_mtx, 1); 2516 } 2517 usb_pause_mtx(&sc->sc_mtx, 100); 2518 urtw_8225_write(sc, 2519 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2520 usb_pause_mtx(&sc->sc_mtx, 200); 2521 urtw_8225_write(sc, 2522 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2523 usb_pause_mtx(&sc->sc_mtx, 200); 2524 urtw_8225_write(sc, 2525 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2526 2527 for (i = 0; i < 95; i++) { 2528 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2529 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2530 } 2531 2532 urtw_8225_write(sc, 2533 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2534 urtw_8225_write(sc, 2535 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2536 2537 for (i = 0; i < 128; i++) { 2538 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2539 usb_pause_mtx(&sc->sc_mtx, 1); 2540 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2541 usb_pause_mtx(&sc->sc_mtx, 1); 2542 } 2543 2544 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2545 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2546 urtw_8225_rf_part2[i].val); 2547 usb_pause_mtx(&sc->sc_mtx, 1); 2548 } 2549 2550 error = urtw_8225_setgain(sc, 4); 2551 if (error) 2552 goto fail; 2553 2554 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2555 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2556 urtw_8225_rf_part3[i].val); 2557 usb_pause_mtx(&sc->sc_mtx, 1); 2558 } 2559 2560 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2561 2562 error = urtw_8225_set_txpwrlvl(sc, 1); 2563 if (error) 2564 goto fail; 2565 2566 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2567 usb_pause_mtx(&sc->sc_mtx, 1); 2568 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2569 usb_pause_mtx(&sc->sc_mtx, 1); 2570 2571 /* TX ant A, 0x0 for B */ 2572 error = urtw_8185_tx_antenna(sc, 0x3); 2573 if (error) 2574 goto fail; 2575 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2576 2577 error = urtw_8225_rf_set_chan(sc, 1); 2578fail: 2579 return (error); 2580#undef N 2581} 2582 2583static usb_error_t 2584urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2585{ 2586 usb_error_t error = 0; 2587 2588 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2589fail: 2590 return (error); 2591} 2592 2593static usb_error_t 2594urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2595{ 2596 usb_error_t error; 2597 2598 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2599 usb_pause_mtx(&sc->sc_mtx, 1); 2600fail: 2601 return (error); 2602} 2603 2604static usb_error_t 2605urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2606{ 2607 2608 data = data & 0xff; 2609 return urtw_8187_write_phy(sc, addr, data); 2610} 2611 2612static usb_error_t 2613urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2614{ 2615 2616 data = data & 0xff; 2617 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2618} 2619 2620static usb_error_t 2621urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2622{ 2623 uint32_t phyw; 2624 usb_error_t error; 2625 2626 phyw = ((data << 8) | (addr | 0x80)); 2627 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2628 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2629 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2630 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2631 usb_pause_mtx(&sc->sc_mtx, 1); 2632fail: 2633 return (error); 2634} 2635 2636static usb_error_t 2637urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2638{ 2639 usb_error_t error; 2640 2641 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2642 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2643 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2644 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2645fail: 2646 return (error); 2647} 2648 2649static usb_error_t 2650urtw_8225_usb_init(struct urtw_softc *sc) 2651{ 2652 uint8_t data; 2653 usb_error_t error; 2654 2655 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2656 urtw_write8_m(sc, URTW_GPIO, 0); 2657 error = urtw_read8e(sc, 0x53, &data); 2658 if (error) 2659 goto fail; 2660 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2661 if (error) 2662 goto fail; 2663 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2664 urtw_write8_m(sc, URTW_GPIO, 0x20); 2665 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2666 2667 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2668 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2669 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2670 2671 usb_pause_mtx(&sc->sc_mtx, 500); 2672fail: 2673 return (error); 2674} 2675 2676static usb_error_t 2677urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2678{ 2679 uint16_t d80, d82, d84; 2680 usb_error_t error; 2681 2682 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2683 d80 &= URTW_RF_PINS_MAGIC1; 2684 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2685 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2686 d84 &= URTW_RF_PINS_MAGIC2; 2687 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2688 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2689 DELAY(10); 2690 2691 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2692 DELAY(2); 2693 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2694 DELAY(10); 2695 2696 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2697 if (error != 0) 2698 goto fail; 2699 2700 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2701 DELAY(10); 2702 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2703 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2704 usb_pause_mtx(&sc->sc_mtx, 2); 2705fail: 2706 return (error); 2707} 2708 2709static usb_error_t 2710urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2711 uint16_t *data) 2712{ 2713 uint8_t buf[2]; 2714 uint16_t data16; 2715 struct usb_device_request req; 2716 usb_error_t error = 0; 2717 2718 data16 = *data; 2719 2720 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2721 req.bRequest = URTW_8187_SETREGS_REQ; 2722 USETW(req.wValue, addr); 2723 USETW(req.wIndex, index); 2724 USETW(req.wLength, sizeof(uint16_t)); 2725 buf[0] = (data16 & 0x00ff); 2726 buf[1] = (data16 & 0xff00) >> 8; 2727 2728 error = urtw_do_request(sc, &req, buf); 2729 2730 return (error); 2731} 2732 2733static usb_error_t 2734urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2735{ 2736 usb_error_t error; 2737 2738 error = urtw_8225_set_txpwrlvl(sc, chan); 2739 if (error) 2740 goto fail; 2741 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2742 usb_pause_mtx(&sc->sc_mtx, 10); 2743fail: 2744 return (error); 2745} 2746 2747static usb_error_t 2748urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2749{ 2750 usb_error_t error; 2751 2752 if (sens < 0 || sens > 6) 2753 return -1; 2754 2755 if (sens > 4) 2756 urtw_8225_write(sc, 2757 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2758 else 2759 urtw_8225_write(sc, 2760 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2761 2762 sens = 6 - sens; 2763 error = urtw_8225_setgain(sc, sens); 2764 if (error) 2765 goto fail; 2766 2767 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2768 2769fail: 2770 return (error); 2771} 2772 2773static usb_error_t 2774urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2775{ 2776 int i, idx, set; 2777 uint8_t *cck_pwltable; 2778 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2779 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2780 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2781 usb_error_t error; 2782 2783 cck_pwrlvl_max = 11; 2784 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2785 ofdm_pwrlvl_min = 10; 2786 2787 /* CCK power setting */ 2788 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2789 idx = cck_pwrlvl % 6; 2790 set = cck_pwrlvl / 6; 2791 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2792 urtw_8225_txpwr_cck; 2793 2794 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2795 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2796 for (i = 0; i < 8; i++) { 2797 urtw_8187_write_phy_cck(sc, 0x44 + i, 2798 cck_pwltable[idx * 8 + i]); 2799 } 2800 usb_pause_mtx(&sc->sc_mtx, 1); 2801 2802 /* OFDM power setting */ 2803 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2804 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2805 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2806 2807 idx = ofdm_pwrlvl % 6; 2808 set = ofdm_pwrlvl / 6; 2809 2810 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2811 if (error) 2812 goto fail; 2813 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2814 urtw_8187_write_phy_ofdm(sc, 6, 0); 2815 urtw_8187_write_phy_ofdm(sc, 8, 0); 2816 2817 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2818 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2819 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2820 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2821 usb_pause_mtx(&sc->sc_mtx, 1); 2822fail: 2823 return (error); 2824} 2825 2826 2827static usb_error_t 2828urtw_8225_rf_stop(struct urtw_softc *sc) 2829{ 2830 uint8_t data; 2831 usb_error_t error; 2832 2833 urtw_8225_write(sc, 0x4, 0x1f); 2834 2835 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2836 if (error) 2837 goto fail; 2838 2839 urtw_read8_m(sc, URTW_CONFIG3, &data); 2840 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2841 if (sc->sc_flags & URTW_RTL8187B) { 2842 urtw_write32_m(sc, URTW_ANAPARAM2, 2843 URTW_8187B_8225_ANAPARAM2_OFF); 2844 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2845 urtw_write32_m(sc, URTW_ANAPARAM3, 2846 URTW_8187B_8225_ANAPARAM3_OFF); 2847 } else { 2848 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2849 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2850 } 2851 2852 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2853 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2854 if (error) 2855 goto fail; 2856 2857fail: 2858 return (error); 2859} 2860 2861static usb_error_t 2862urtw_8225v2_rf_init(struct urtw_softc *sc) 2863{ 2864#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 2865 int i; 2866 uint16_t data; 2867 uint32_t data32; 2868 usb_error_t error; 2869 2870 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2871 if (error) 2872 goto fail; 2873 2874 error = urtw_8225_usb_init(sc); 2875 if (error) 2876 goto fail; 2877 2878 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2879 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2880 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2881 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2882 2883 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2884 if (error) 2885 goto fail; 2886 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2887 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2888 if (error) 2889 goto fail; 2890 2891 error = urtw_8185_rf_pins_enable(sc); 2892 if (error) 2893 goto fail; 2894 2895 usb_pause_mtx(&sc->sc_mtx, 500); 2896 2897 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2898 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2899 urtw_8225v2_rf_part1[i].val); 2900 } 2901 usb_pause_mtx(&sc->sc_mtx, 50); 2902 2903 urtw_8225_write(sc, 2904 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2905 2906 for (i = 0; i < 95; i++) { 2907 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2908 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2909 urtw_8225v2_rxgain[i]); 2910 } 2911 2912 urtw_8225_write(sc, 2913 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2914 urtw_8225_write(sc, 2915 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2916 urtw_8225_write(sc, 2917 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2918 urtw_8225_write(sc, 2919 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2920 usb_pause_mtx(&sc->sc_mtx, 100); 2921 urtw_8225_write(sc, 2922 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2923 usb_pause_mtx(&sc->sc_mtx, 100); 2924 2925 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2926 if (error != 0) 2927 goto fail; 2928 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2929 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2930 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2931 urtw_8225_write(sc, 2932 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2933 usb_pause_mtx(&sc->sc_mtx, 100); 2934 urtw_8225_write(sc, 2935 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2936 usb_pause_mtx(&sc->sc_mtx, 50); 2937 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2938 if (error != 0) 2939 goto fail; 2940 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2941 device_printf(sc->sc_dev, "RF calibration failed\n"); 2942 } 2943 usb_pause_mtx(&sc->sc_mtx, 100); 2944 2945 urtw_8225_write(sc, 2946 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2947 for (i = 0; i < 128; i++) { 2948 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2949 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2950 } 2951 2952 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 2953 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2954 urtw_8225v2_rf_part2[i].val); 2955 } 2956 2957 error = urtw_8225v2_setgain(sc, 4); 2958 if (error) 2959 goto fail; 2960 2961 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 2962 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2963 urtw_8225v2_rf_part3[i].val); 2964 } 2965 2966 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2967 2968 error = urtw_8225v2_set_txpwrlvl(sc, 1); 2969 if (error) 2970 goto fail; 2971 2972 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2973 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2974 2975 /* TX ant A, 0x0 for B */ 2976 error = urtw_8185_tx_antenna(sc, 0x3); 2977 if (error) 2978 goto fail; 2979 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2980 2981 error = urtw_8225_rf_set_chan(sc, 1); 2982fail: 2983 return (error); 2984#undef N 2985} 2986 2987static usb_error_t 2988urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2989{ 2990 usb_error_t error; 2991 2992 error = urtw_8225v2_set_txpwrlvl(sc, chan); 2993 if (error) 2994 goto fail; 2995 2996 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2997 usb_pause_mtx(&sc->sc_mtx, 10); 2998fail: 2999 return (error); 3000} 3001 3002static usb_error_t 3003urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3004{ 3005 int i; 3006 int16_t bit; 3007 uint8_t rlen = 12, wlen = 6; 3008 uint16_t o1, o2, o3, tmp; 3009 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3010 uint32_t mask = 0x80000000, value = 0; 3011 usb_error_t error; 3012 3013 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3014 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3015 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3016 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3017 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3018 o1 &= ~URTW_RF_PINS_MAGIC4; 3019 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3020 DELAY(5); 3021 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3022 DELAY(5); 3023 3024 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3025 bit = ((d2w & mask) != 0) ? 1 : 0; 3026 3027 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3028 DELAY(2); 3029 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3030 URTW_BB_HOST_BANG_CLK); 3031 DELAY(2); 3032 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3033 URTW_BB_HOST_BANG_CLK); 3034 DELAY(2); 3035 mask = mask >> 1; 3036 if (i == 2) 3037 break; 3038 bit = ((d2w & mask) != 0) ? 1 : 0; 3039 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3040 URTW_BB_HOST_BANG_CLK); 3041 DELAY(2); 3042 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3043 URTW_BB_HOST_BANG_CLK); 3044 DELAY(2); 3045 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3046 DELAY(1); 3047 } 3048 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3049 URTW_BB_HOST_BANG_CLK); 3050 DELAY(2); 3051 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3052 DELAY(2); 3053 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3054 DELAY(2); 3055 3056 mask = 0x800; 3057 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3058 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3059 o1 | URTW_BB_HOST_BANG_RW); 3060 DELAY(2); 3061 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3062 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3063 DELAY(2); 3064 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3065 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3066 DELAY(2); 3067 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3068 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3069 DELAY(2); 3070 3071 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3072 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3073 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3074 o1 | URTW_BB_HOST_BANG_RW); 3075 DELAY(2); 3076 } 3077 3078 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3079 URTW_BB_HOST_BANG_RW); 3080 DELAY(2); 3081 3082 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3083 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3084 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3085 3086 if (data != NULL) 3087 *data = value; 3088fail: 3089 return (error); 3090} 3091 3092 3093static usb_error_t 3094urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3095{ 3096 int i; 3097 uint8_t *cck_pwrtable; 3098 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3099 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3100 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3101 usb_error_t error; 3102 3103 /* CCK power setting */ 3104 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3105 cck_pwrlvl += sc->sc_txpwr_cck_base; 3106 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3107 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3108 urtw_8225v2_txpwr_cck; 3109 3110 for (i = 0; i < 8; i++) 3111 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3112 3113 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3114 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3115 usb_pause_mtx(&sc->sc_mtx, 1); 3116 3117 /* OFDM power setting */ 3118 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3119 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3120 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3121 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3122 3123 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3124 if (error) 3125 goto fail; 3126 3127 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3128 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3129 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3130 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3131 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3132 3133 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3134 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3135 usb_pause_mtx(&sc->sc_mtx, 1); 3136fail: 3137 return (error); 3138} 3139 3140static usb_error_t 3141urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3142{ 3143 uint8_t *gainp; 3144 usb_error_t error; 3145 3146 /* XXX for A? */ 3147 gainp = urtw_8225v2_gain_bg; 3148 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3149 usb_pause_mtx(&sc->sc_mtx, 1); 3150 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3151 usb_pause_mtx(&sc->sc_mtx, 1); 3152 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3153 usb_pause_mtx(&sc->sc_mtx, 1); 3154 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3155 usb_pause_mtx(&sc->sc_mtx, 1); 3156fail: 3157 return (error); 3158} 3159 3160static usb_error_t 3161urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3162{ 3163 uint32_t data; 3164 usb_error_t error; 3165 3166 *ret = 1; 3167 3168 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3169 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3170 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3171 usb_pause_mtx(&sc->sc_mtx, 500); 3172 3173 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3174 URTW_8225_ADDR_0_DATA_MAGIC1); 3175 3176 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3177 if (error != 0) 3178 goto fail; 3179 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3180 *ret = 0; 3181 else { 3182 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3183 if (error != 0) 3184 goto fail; 3185 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3186 *ret = 0; 3187 } 3188 3189 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3190 URTW_8225_ADDR_0_DATA_MAGIC2); 3191fail: 3192 return (error); 3193} 3194 3195static usb_error_t 3196urtw_8225v2b_rf_init(struct urtw_softc *sc) 3197{ 3198#define N(a) ((int)(sizeof(a) / sizeof((a)[0]))) 3199 int i; 3200 uint8_t data8; 3201 usb_error_t error; 3202 3203 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3204 if (error) 3205 goto fail; 3206 3207 /* 3208 * initialize extra registers on 8187 3209 */ 3210 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3211 3212 /* retry limit */ 3213 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3214 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3215 urtw_write8_m(sc, URTW_CW_CONF, data8); 3216 3217 /* TX AGC */ 3218 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3219 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3220 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3221 3222 /* Auto Rate Fallback Control */ 3223#define URTW_ARFR 0x1e0 3224 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3225 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3226 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3227 data8 | URTW_RATE_FALLBACK_ENABLE); 3228 3229 urtw_read8_m(sc, URTW_MSR, &data8); 3230 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3231 urtw_read8_m(sc, URTW_MSR, &data8); 3232 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3233 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3234 3235 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3236 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3237#define URTW_FEMR_FOR_8187B 0x1d4 3238 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3239 3240 /* led type */ 3241 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3242 data8 = (data8 & 0x3f) | 0x80; 3243 urtw_write8_m(sc, URTW_CONFIG1, data8); 3244 3245 /* applying MAC address again. */ 3246 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 3247 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 3248 3249 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3250 if (error) 3251 goto fail; 3252 3253 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3254 3255 /* 3256 * MAC configuration 3257 */ 3258 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3259 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3260 urtw_8225v2b_rf_part1[i].val); 3261 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3262 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3263 urtw_write32_m(sc, 0x1f0, 0); 3264 urtw_write32_m(sc, 0x1f4, 0); 3265 urtw_write8_m(sc, 0x1f8, 0); 3266 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3267 3268#define URTW_RFSW_CTRL 0x272 3269 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3270 3271 /* 3272 * initialize PHY 3273 */ 3274 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3275 if (error) 3276 goto fail; 3277 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3278 urtw_write8_m(sc, URTW_CONFIG3, 3279 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3280 3281 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3282 if (error) 3283 goto fail; 3284 3285 /* setup RFE initial timing */ 3286 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3287 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3288 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3289 usb_pause_mtx(&sc->sc_mtx, 1100); 3290 3291 for (i = 0; i < N(urtw_8225v2b_rf_part0); i++) { 3292 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3293 urtw_8225v2b_rf_part0[i].val); 3294 usb_pause_mtx(&sc->sc_mtx, 1); 3295 } 3296 urtw_8225_write(sc, 0x00, 0x01b7); 3297 3298 for (i = 0; i < 95; i++) { 3299 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3300 usb_pause_mtx(&sc->sc_mtx, 1); 3301 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3302 urtw_8225v2b_rxgain[i]); 3303 usb_pause_mtx(&sc->sc_mtx, 1); 3304 } 3305 3306 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3307 usb_pause_mtx(&sc->sc_mtx, 1); 3308 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3309 usb_pause_mtx(&sc->sc_mtx, 1); 3310 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3311 usb_pause_mtx(&sc->sc_mtx, 1); 3312 usb_pause_mtx(&sc->sc_mtx, 3000); 3313 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3314 usb_pause_mtx(&sc->sc_mtx, 2000); 3315 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3316 usb_pause_mtx(&sc->sc_mtx, 1); 3317 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3318 usb_pause_mtx(&sc->sc_mtx, 1); 3319 3320 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3321 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3322 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3323 3324 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3325 for (i = 0; i < 128; i++) { 3326 uint32_t addr, data; 3327 3328 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3329 addr = ((i + 0x80) << 8) | 0x0000008e; 3330 3331 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3332 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3333 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3334 } 3335 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3336 3337 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3338 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3339 3340 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3341 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3342 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3343 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3344 3345 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3346 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3347 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3348 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3349 3350fail: 3351 return (error); 3352#undef N 3353} 3354 3355static usb_error_t 3356urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3357{ 3358 usb_error_t error; 3359 3360 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3361 if (error) 3362 goto fail; 3363 3364 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3365 usb_pause_mtx(&sc->sc_mtx, 10); 3366fail: 3367 return (error); 3368} 3369 3370static usb_error_t 3371urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3372{ 3373 int i; 3374 uint8_t *cck_pwrtable; 3375 uint8_t cck_pwrlvl_max = 15; 3376 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3377 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3378 usb_error_t error; 3379 3380 /* CCK power setting */ 3381 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3382 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3383 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3384 cck_pwrlvl += sc->sc_txpwr_cck_base; 3385 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3386 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3387 urtw_8225v2b_txpwr_cck; 3388 3389 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3390 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3391 ((cck_pwrlvl <= 11) ? 8 : 16); 3392 else 3393 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3394 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3395 3396 for (i = 0; i < 8; i++) 3397 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3398 3399 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3400 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3401 usb_pause_mtx(&sc->sc_mtx, 1); 3402 3403 /* OFDM power setting */ 3404 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3405 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3406 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3407 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3408 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3409 3410 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3411 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3412 3413 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3414 if (ofdm_pwrlvl <= 11) { 3415 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3416 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3417 } else { 3418 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3419 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3420 } 3421 } else { 3422 if (ofdm_pwrlvl <= 11) { 3423 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3424 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3425 } else if (ofdm_pwrlvl <= 17) { 3426 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3427 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3428 } else { 3429 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3430 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3431 } 3432 } 3433 usb_pause_mtx(&sc->sc_mtx, 1); 3434fail: 3435 return (error); 3436} 3437 3438static usb_error_t 3439urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3440{ 3441 struct usb_device_request req; 3442 usb_error_t error; 3443 3444 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3445 req.bRequest = URTW_8187_GETREGS_REQ; 3446 USETW(req.wValue, val | 0xfe00); 3447 USETW(req.wIndex, 0); 3448 USETW(req.wLength, sizeof(uint8_t)); 3449 3450 error = urtw_do_request(sc, &req, data); 3451 return (error); 3452} 3453 3454static usb_error_t 3455urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3456{ 3457 struct usb_device_request req; 3458 3459 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3460 req.bRequest = URTW_8187_SETREGS_REQ; 3461 USETW(req.wValue, val | 0xfe00); 3462 USETW(req.wIndex, 0); 3463 USETW(req.wLength, sizeof(uint8_t)); 3464 3465 return (urtw_do_request(sc, &req, &data)); 3466} 3467 3468static usb_error_t 3469urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3470{ 3471 uint8_t data; 3472 usb_error_t error; 3473 3474 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3475 if (error) 3476 goto fail; 3477 3478 urtw_read8_m(sc, URTW_CONFIG3, &data); 3479 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3480 urtw_write32_m(sc, URTW_ANAPARAM, val); 3481 urtw_read8_m(sc, URTW_CONFIG3, &data); 3482 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3483 3484 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3485 if (error) 3486 goto fail; 3487fail: 3488 return (error); 3489} 3490 3491static usb_error_t 3492urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3493{ 3494 uint8_t data; 3495 usb_error_t error; 3496 3497 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3498 if (error) 3499 goto fail; 3500 3501 urtw_read8_m(sc, URTW_CONFIG3, &data); 3502 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3503 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3504 urtw_read8_m(sc, URTW_CONFIG3, &data); 3505 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3506 3507 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3508 if (error) 3509 goto fail; 3510fail: 3511 return (error); 3512} 3513 3514static usb_error_t 3515urtw_intr_enable(struct urtw_softc *sc) 3516{ 3517 usb_error_t error; 3518 3519 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3520fail: 3521 return (error); 3522} 3523 3524static usb_error_t 3525urtw_intr_disable(struct urtw_softc *sc) 3526{ 3527 usb_error_t error; 3528 3529 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3530fail: 3531 return (error); 3532} 3533 3534static usb_error_t 3535urtw_reset(struct urtw_softc *sc) 3536{ 3537 uint8_t data; 3538 usb_error_t error; 3539 3540 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3541 if (error) 3542 goto fail; 3543 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3544 if (error) 3545 goto fail; 3546 3547 error = urtw_intr_disable(sc); 3548 if (error) 3549 goto fail; 3550 usb_pause_mtx(&sc->sc_mtx, 100); 3551 3552 error = urtw_write8e(sc, 0x18, 0x10); 3553 if (error != 0) 3554 goto fail; 3555 error = urtw_write8e(sc, 0x18, 0x11); 3556 if (error != 0) 3557 goto fail; 3558 error = urtw_write8e(sc, 0x18, 0x00); 3559 if (error != 0) 3560 goto fail; 3561 usb_pause_mtx(&sc->sc_mtx, 100); 3562 3563 urtw_read8_m(sc, URTW_CMD, &data); 3564 data = (data & 0x2) | URTW_CMD_RST; 3565 urtw_write8_m(sc, URTW_CMD, data); 3566 usb_pause_mtx(&sc->sc_mtx, 100); 3567 3568 urtw_read8_m(sc, URTW_CMD, &data); 3569 if (data & URTW_CMD_RST) { 3570 device_printf(sc->sc_dev, "reset timeout\n"); 3571 goto fail; 3572 } 3573 3574 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3575 if (error) 3576 goto fail; 3577 usb_pause_mtx(&sc->sc_mtx, 100); 3578 3579 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3580 if (error) 3581 goto fail; 3582 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3583 if (error) 3584 goto fail; 3585fail: 3586 return (error); 3587} 3588 3589static usb_error_t 3590urtw_led_ctl(struct urtw_softc *sc, int mode) 3591{ 3592 usb_error_t error = 0; 3593 3594 switch (sc->sc_strategy) { 3595 case URTW_SW_LED_MODE0: 3596 error = urtw_led_mode0(sc, mode); 3597 break; 3598 case URTW_SW_LED_MODE1: 3599 error = urtw_led_mode1(sc, mode); 3600 break; 3601 case URTW_SW_LED_MODE2: 3602 error = urtw_led_mode2(sc, mode); 3603 break; 3604 case URTW_SW_LED_MODE3: 3605 error = urtw_led_mode3(sc, mode); 3606 break; 3607 default: 3608 panic("unsupported LED mode %d\n", sc->sc_strategy); 3609 /* never reach */ 3610 } 3611 3612 return (error); 3613} 3614 3615static usb_error_t 3616urtw_led_mode0(struct urtw_softc *sc, int mode) 3617{ 3618 3619 switch (mode) { 3620 case URTW_LED_CTL_POWER_ON: 3621 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3622 break; 3623 case URTW_LED_CTL_TX: 3624 if (sc->sc_gpio_ledinprogress == 1) 3625 return (0); 3626 3627 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3628 sc->sc_gpio_blinktime = 2; 3629 break; 3630 case URTW_LED_CTL_LINK: 3631 sc->sc_gpio_ledstate = URTW_LED_ON; 3632 break; 3633 default: 3634 panic("unsupported LED mode 0x%x", mode); 3635 /* never reach */ 3636 } 3637 3638 switch (sc->sc_gpio_ledstate) { 3639 case URTW_LED_ON: 3640 if (sc->sc_gpio_ledinprogress != 0) 3641 break; 3642 urtw_led_on(sc, URTW_LED_GPIO); 3643 break; 3644 case URTW_LED_BLINK_NORMAL: 3645 if (sc->sc_gpio_ledinprogress != 0) 3646 break; 3647 sc->sc_gpio_ledinprogress = 1; 3648 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3649 URTW_LED_OFF : URTW_LED_ON; 3650 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3651 break; 3652 case URTW_LED_POWER_ON_BLINK: 3653 urtw_led_on(sc, URTW_LED_GPIO); 3654 usb_pause_mtx(&sc->sc_mtx, 100); 3655 urtw_led_off(sc, URTW_LED_GPIO); 3656 break; 3657 default: 3658 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3659 /* never reach */ 3660 } 3661 return (0); 3662} 3663 3664static usb_error_t 3665urtw_led_mode1(struct urtw_softc *sc, int mode) 3666{ 3667 3668 return (USB_ERR_INVAL); 3669} 3670 3671static usb_error_t 3672urtw_led_mode2(struct urtw_softc *sc, int mode) 3673{ 3674 3675 return (USB_ERR_INVAL); 3676} 3677 3678static usb_error_t 3679urtw_led_mode3(struct urtw_softc *sc, int mode) 3680{ 3681 3682 return (USB_ERR_INVAL); 3683} 3684 3685static usb_error_t 3686urtw_led_on(struct urtw_softc *sc, int type) 3687{ 3688 usb_error_t error; 3689 3690 if (type == URTW_LED_GPIO) { 3691 switch (sc->sc_gpio_ledpin) { 3692 case URTW_LED_PIN_GPIO0: 3693 urtw_write8_m(sc, URTW_GPIO, 0x01); 3694 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3695 break; 3696 default: 3697 panic("unsupported LED PIN type 0x%x", 3698 sc->sc_gpio_ledpin); 3699 /* never reach */ 3700 } 3701 } else { 3702 panic("unsupported LED type 0x%x", type); 3703 /* never reach */ 3704 } 3705 3706 sc->sc_gpio_ledon = 1; 3707fail: 3708 return (error); 3709} 3710 3711static usb_error_t 3712urtw_led_off(struct urtw_softc *sc, int type) 3713{ 3714 usb_error_t error; 3715 3716 if (type == URTW_LED_GPIO) { 3717 switch (sc->sc_gpio_ledpin) { 3718 case URTW_LED_PIN_GPIO0: 3719 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3720 urtw_write8_m(sc, 3721 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3722 break; 3723 default: 3724 panic("unsupported LED PIN type 0x%x", 3725 sc->sc_gpio_ledpin); 3726 /* never reach */ 3727 } 3728 } else { 3729 panic("unsupported LED type 0x%x", type); 3730 /* never reach */ 3731 } 3732 3733 sc->sc_gpio_ledon = 0; 3734 3735fail: 3736 return (error); 3737} 3738 3739static void 3740urtw_led_ch(void *arg) 3741{ 3742 struct urtw_softc *sc = arg; 3743 struct ifnet *ifp = sc->sc_ifp; 3744 struct ieee80211com *ic = ifp->if_l2com; 3745 3746 ieee80211_runtask(ic, &sc->sc_led_task); 3747} 3748 3749static void 3750urtw_ledtask(void *arg, int pending) 3751{ 3752 struct urtw_softc *sc = arg; 3753 3754 if (sc->sc_strategy != URTW_SW_LED_MODE0) 3755 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 3756 3757 URTW_LOCK(sc); 3758 urtw_led_blink(sc); 3759 URTW_UNLOCK(sc); 3760} 3761 3762static usb_error_t 3763urtw_led_blink(struct urtw_softc *sc) 3764{ 3765 uint8_t ing = 0; 3766 usb_error_t error; 3767 3768 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3769 error = urtw_led_on(sc, URTW_LED_GPIO); 3770 else 3771 error = urtw_led_off(sc, URTW_LED_GPIO); 3772 sc->sc_gpio_blinktime--; 3773 if (sc->sc_gpio_blinktime == 0) 3774 ing = 1; 3775 else { 3776 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3777 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3778 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3779 ing = 1; 3780 } 3781 if (ing == 1) { 3782 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3783 sc->sc_gpio_ledon == 0) 3784 error = urtw_led_on(sc, URTW_LED_GPIO); 3785 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3786 sc->sc_gpio_ledon == 1) 3787 error = urtw_led_off(sc, URTW_LED_GPIO); 3788 3789 sc->sc_gpio_blinktime = 0; 3790 sc->sc_gpio_ledinprogress = 0; 3791 return (0); 3792 } 3793 3794 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3795 URTW_LED_ON : URTW_LED_OFF; 3796 3797 switch (sc->sc_gpio_ledstate) { 3798 case URTW_LED_BLINK_NORMAL: 3799 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3800 break; 3801 default: 3802 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3803 /* never reach */ 3804 } 3805 return (0); 3806} 3807 3808static usb_error_t 3809urtw_rx_enable(struct urtw_softc *sc) 3810{ 3811 uint8_t data; 3812 usb_error_t error; 3813 3814 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3815 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3816 3817 error = urtw_rx_setconf(sc); 3818 if (error != 0) 3819 goto fail; 3820 3821 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3822 urtw_read8_m(sc, URTW_CMD, &data); 3823 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3824 } 3825fail: 3826 return (error); 3827} 3828 3829static usb_error_t 3830urtw_tx_enable(struct urtw_softc *sc) 3831{ 3832 uint8_t data8; 3833 uint32_t data; 3834 usb_error_t error; 3835 3836 if (sc->sc_flags & URTW_RTL8187B) { 3837 urtw_read32_m(sc, URTW_TX_CONF, &data); 3838 data &= ~URTW_TX_LOOPBACK_MASK; 3839 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3840 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3841 data &= ~URTW_TX_SWPLCPLEN; 3842 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3843 (7 << 8) | /* short retry limit */ 3844 (7 << 0) | /* long retry limit */ 3845 (7 << 21); /* MAX TX DMA */ 3846 urtw_write32_m(sc, URTW_TX_CONF, data); 3847 3848 urtw_read8_m(sc, URTW_MSR, &data8); 3849 data8 |= URTW_MSR_LINK_ENEDCA; 3850 urtw_write8_m(sc, URTW_MSR, data8); 3851 return (error); 3852 } 3853 3854 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3855 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3856 urtw_write8_m(sc, URTW_CW_CONF, data8); 3857 3858 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3859 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3860 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3861 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3862 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3863 3864 urtw_read32_m(sc, URTW_TX_CONF, &data); 3865 data &= ~URTW_TX_LOOPBACK_MASK; 3866 data |= URTW_TX_LOOPBACK_NONE; 3867 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3868 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3869 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3870 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3871 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3872 data &= ~URTW_TX_SWPLCPLEN; 3873 data |= URTW_TX_NOICV; 3874 urtw_write32_m(sc, URTW_TX_CONF, data); 3875 3876 urtw_read8_m(sc, URTW_CMD, &data8); 3877 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3878fail: 3879 return (error); 3880} 3881 3882static usb_error_t 3883urtw_rx_setconf(struct urtw_softc *sc) 3884{ 3885 struct ifnet *ifp = sc->sc_ifp; 3886 struct ieee80211com *ic = ifp->if_l2com; 3887 uint32_t data; 3888 usb_error_t error; 3889 3890 urtw_read32_m(sc, URTW_RX, &data); 3891 data = data &~ URTW_RX_FILTER_MASK; 3892 if (sc->sc_flags & URTW_RTL8187B) { 3893 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3894 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3895 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3896 URTW_RX_FIFO_THRESHOLD_NONE | 3897 URTW_MAX_RX_DMA_2048 | 3898 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3899 } else { 3900 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3901 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3902 3903 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3904 data = data | URTW_RX_FILTER_ICVERR; 3905 data = data | URTW_RX_FILTER_PWR; 3906 } 3907 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3908 data = data | URTW_RX_FILTER_CRCERR; 3909 3910 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3911 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3912 data = data | URTW_RX_FILTER_ALLMAC; 3913 } else { 3914 data = data | URTW_RX_FILTER_NICMAC; 3915 data = data | URTW_RX_CHECK_BSSID; 3916 } 3917 3918 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3919 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3920 URTW_RX_AUTORESETPHY; 3921 data = data &~ URTW_MAX_RX_DMA_MASK; 3922 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3923 } 3924 3925 urtw_write32_m(sc, URTW_RX, data); 3926fail: 3927 return (error); 3928} 3929 3930static struct mbuf * 3931urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3932 int8_t *nf_p) 3933{ 3934 int actlen, flen, rssi; 3935 struct ieee80211_frame *wh; 3936 struct mbuf *m, *mnew; 3937 struct urtw_softc *sc = data->sc; 3938 struct ifnet *ifp = sc->sc_ifp; 3939 struct ieee80211com *ic = ifp->if_l2com; 3940 uint8_t noise = 0, rate; 3941 3942 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3943 3944 if (actlen < (int)URTW_MIN_RXBUFSZ) { 3945 ifp->if_ierrors++; 3946 return (NULL); 3947 } 3948 3949 if (sc->sc_flags & URTW_RTL8187B) { 3950 struct urtw_8187b_rxhdr *rx; 3951 3952 rx = (struct urtw_8187b_rxhdr *)(data->buf + 3953 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 3954 flen = le32toh(rx->flag) & 0xfff; 3955 if (flen > actlen) { 3956 ifp->if_ierrors++; 3957 return (NULL); 3958 } 3959 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3960 /* XXX correct? */ 3961 rssi = rx->rssi & URTW_RX_RSSI_MASK; 3962 noise = rx->noise; 3963 } else { 3964 struct urtw_8187l_rxhdr *rx; 3965 3966 rx = (struct urtw_8187l_rxhdr *)(data->buf + 3967 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 3968 flen = le32toh(rx->flag) & 0xfff; 3969 if (flen > actlen) { 3970 ifp->if_ierrors++; 3971 return (NULL); 3972 } 3973 3974 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3975 /* XXX correct? */ 3976 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 3977 noise = rx->noise; 3978 } 3979 3980 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 3981 if (mnew == NULL) { 3982 ifp->if_ierrors++; 3983 return (NULL); 3984 } 3985 3986 m = data->m; 3987 data->m = mnew; 3988 data->buf = mtod(mnew, uint8_t *); 3989 3990 /* finalize mbuf */ 3991 m->m_pkthdr.rcvif = ifp; 3992 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 3993 3994 if (ieee80211_radiotap_active(ic)) { 3995 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3996 3997 /* XXX Are variables correct? */ 3998 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 3999 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4000 tap->wr_dbm_antsignal = (int8_t)rssi; 4001 } 4002 4003 wh = mtod(m, struct ieee80211_frame *); 4004 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4005 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4006 4007 *rssi_p = rssi; 4008 *nf_p = noise; /* XXX correct? */ 4009 4010 return (m); 4011} 4012 4013static void 4014urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4015{ 4016 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4017 struct ifnet *ifp = sc->sc_ifp; 4018 struct ieee80211com *ic = ifp->if_l2com; 4019 struct ieee80211_frame *wh; 4020 struct ieee80211_node *ni; 4021 struct mbuf *m = NULL; 4022 struct urtw_data *data; 4023 int8_t nf = -95; 4024 int rssi = 1; 4025 4026 URTW_ASSERT_LOCKED(sc); 4027 4028 switch (USB_GET_STATE(xfer)) { 4029 case USB_ST_TRANSFERRED: 4030 data = STAILQ_FIRST(&sc->sc_rx_active); 4031 if (data == NULL) 4032 goto setup; 4033 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4034 m = urtw_rxeof(xfer, data, &rssi, &nf); 4035 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4036 /* FALLTHROUGH */ 4037 case USB_ST_SETUP: 4038setup: 4039 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4040 if (data == NULL) { 4041 KASSERT(m == NULL, ("mbuf isn't NULL")); 4042 return; 4043 } 4044 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4045 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4046 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4047 usbd_xfer_max_len(xfer)); 4048 usbd_transfer_submit(xfer); 4049 4050 /* 4051 * To avoid LOR we should unlock our private mutex here to call 4052 * ieee80211_input() because here is at the end of a USB 4053 * callback and safe to unlock. 4054 */ 4055 URTW_UNLOCK(sc); 4056 if (m != NULL) { 4057 wh = mtod(m, struct ieee80211_frame *); 4058 ni = ieee80211_find_rxnode(ic, 4059 (struct ieee80211_frame_min *)wh); 4060 if (ni != NULL) { 4061 (void) ieee80211_input(ni, m, rssi, nf); 4062 /* node is no longer needed */ 4063 ieee80211_free_node(ni); 4064 } else 4065 (void) ieee80211_input_all(ic, m, rssi, nf); 4066 m = NULL; 4067 } 4068 URTW_LOCK(sc); 4069 break; 4070 default: 4071 /* needs it to the inactive queue due to a error. */ 4072 data = STAILQ_FIRST(&sc->sc_rx_active); 4073 if (data != NULL) { 4074 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4075 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4076 } 4077 if (error != USB_ERR_CANCELLED) { 4078 usbd_xfer_set_stall(xfer); 4079 ifp->if_ierrors++; 4080 goto setup; 4081 } 4082 break; 4083 } 4084} 4085 4086#define URTW_STATUS_TYPE_TXCLOSE 1 4087#define URTW_STATUS_TYPE_BEACON_INTR 0 4088 4089static void 4090urtw_txstatus_eof(struct usb_xfer *xfer) 4091{ 4092 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4093 struct ifnet *ifp = sc->sc_ifp; 4094 int actlen, type, pktretry, seq; 4095 uint64_t val; 4096 4097 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4098 4099 if (actlen != sizeof(uint64_t)) 4100 return; 4101 4102 val = le64toh(sc->sc_txstatus); 4103 type = (val >> 30) & 0x3; 4104 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4105 pktretry = val & 0xff; 4106 seq = (val >> 16) & 0xff; 4107 if (pktretry == URTW_TX_MAXRETRY) 4108 ifp->if_oerrors++; 4109 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4110 pktretry, seq); 4111 } 4112} 4113 4114static void 4115urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4116{ 4117 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4118 struct ifnet *ifp = sc->sc_ifp; 4119 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4120 4121 URTW_ASSERT_LOCKED(sc); 4122 4123 switch (USB_GET_STATE(xfer)) { 4124 case USB_ST_TRANSFERRED: 4125 urtw_txstatus_eof(xfer); 4126 /* FALLTHROUGH */ 4127 case USB_ST_SETUP: 4128setup: 4129 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4130 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4131 usbd_transfer_submit(xfer); 4132 break; 4133 default: 4134 if (error != USB_ERR_CANCELLED) { 4135 usbd_xfer_set_stall(xfer); 4136 ifp->if_ierrors++; 4137 goto setup; 4138 } 4139 break; 4140 } 4141} 4142 4143static void 4144urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4145{ 4146 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4147 struct ifnet *ifp = sc->sc_ifp; 4148 struct mbuf *m; 4149 4150 URTW_ASSERT_LOCKED(sc); 4151 4152 /* 4153 * Do any tx complete callback. Note this must be done before releasing 4154 * the node reference. 4155 */ 4156 if (data->m) { 4157 m = data->m; 4158 if (m->m_flags & M_TXCB) { 4159 /* XXX status? */ 4160 ieee80211_process_callback(data->ni, m, 0); 4161 } 4162 m_freem(m); 4163 data->m = NULL; 4164 } 4165 if (data->ni) { 4166 ieee80211_free_node(data->ni); 4167 data->ni = NULL; 4168 } 4169 sc->sc_txtimer = 0; 4170 ifp->if_opackets++; 4171 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4172} 4173 4174static void 4175urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4176{ 4177 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4178 struct ifnet *ifp = sc->sc_ifp; 4179 struct urtw_data *data; 4180 4181 URTW_ASSERT_LOCKED(sc); 4182 4183 switch (USB_GET_STATE(xfer)) { 4184 case USB_ST_TRANSFERRED: 4185 data = STAILQ_FIRST(&sc->sc_tx_active); 4186 if (data == NULL) 4187 goto setup; 4188 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4189 urtw_txeof(xfer, data); 4190 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4191 /* FALLTHROUGH */ 4192 case USB_ST_SETUP: 4193setup: 4194 data = STAILQ_FIRST(&sc->sc_tx_pending); 4195 if (data == NULL) { 4196 DPRINTF(sc, URTW_DEBUG_XMIT, 4197 "%s: empty pending queue\n", __func__); 4198 return; 4199 } 4200 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4201 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4202 4203 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4204 usbd_transfer_submit(xfer); 4205 4206 URTW_UNLOCK(sc); 4207 urtw_start(ifp); 4208 URTW_LOCK(sc); 4209 break; 4210 default: 4211 data = STAILQ_FIRST(&sc->sc_tx_active); 4212 if (data == NULL) 4213 goto setup; 4214 if (data->ni != NULL) { 4215 ieee80211_free_node(data->ni); 4216 data->ni = NULL; 4217 ifp->if_oerrors++; 4218 } 4219 if (error != USB_ERR_CANCELLED) { 4220 usbd_xfer_set_stall(xfer); 4221 goto setup; 4222 } 4223 break; 4224 } 4225} 4226 4227static struct urtw_data * 4228_urtw_getbuf(struct urtw_softc *sc) 4229{ 4230 struct urtw_data *bf; 4231 4232 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4233 if (bf != NULL) 4234 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4235 else 4236 bf = NULL; 4237 if (bf == NULL) 4238 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4239 "out of xmit buffers"); 4240 return (bf); 4241} 4242 4243static struct urtw_data * 4244urtw_getbuf(struct urtw_softc *sc) 4245{ 4246 struct urtw_data *bf; 4247 4248 URTW_ASSERT_LOCKED(sc); 4249 4250 bf = _urtw_getbuf(sc); 4251 if (bf == NULL) { 4252 struct ifnet *ifp = sc->sc_ifp; 4253 4254 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4255 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4256 } 4257 return (bf); 4258} 4259 4260static int 4261urtw_isbmode(uint16_t rate) 4262{ 4263 4264 return ((rate <= 22 && rate != 12 && rate != 18) || 4265 rate == 44) ? (1) : (0); 4266} 4267 4268static uint16_t 4269urtw_rate2dbps(uint16_t rate) 4270{ 4271 4272 switch(rate) { 4273 case 12: 4274 case 18: 4275 case 24: 4276 case 36: 4277 case 48: 4278 case 72: 4279 case 96: 4280 case 108: 4281 return (rate * 2); 4282 default: 4283 break; 4284 } 4285 return (24); 4286} 4287 4288static int 4289urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4290 uint8_t ismgt, uint8_t isshort) 4291{ 4292 uint16_t ceiling, frametime, n_dbps; 4293 4294 if (urtw_isbmode(rate)) { 4295 if (ismgt || !isshort || rate == 2) 4296 frametime = (uint16_t)(144 + 48 + 4297 (framelen * 8 / (rate / 2))); 4298 else 4299 frametime = (uint16_t)(72 + 24 + 4300 (framelen * 8 / (rate / 2))); 4301 if ((framelen * 8 % (rate / 2)) != 0) 4302 frametime++; 4303 } else { 4304 n_dbps = urtw_rate2dbps(rate); 4305 ceiling = (16 + 8 * framelen + 6) / n_dbps 4306 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4307 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4308 } 4309 return (frametime); 4310} 4311 4312/* 4313 * Callback from the 802.11 layer to update the 4314 * slot time based on the current setting. 4315 */ 4316static void 4317urtw_updateslot(struct ifnet *ifp) 4318{ 4319 struct urtw_softc *sc = ifp->if_softc; 4320 struct ieee80211com *ic = ifp->if_l2com; 4321 4322 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4323} 4324 4325static void 4326urtw_updateslottask(void *arg, int pending) 4327{ 4328 struct urtw_softc *sc = arg; 4329 struct ifnet *ifp = sc->sc_ifp; 4330 struct ieee80211com *ic = ifp->if_l2com; 4331 int error; 4332 4333 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 4334 return; 4335 4336 URTW_LOCK(sc); 4337 if (sc->sc_flags & URTW_RTL8187B) { 4338 urtw_write8_m(sc, URTW_SIFS, 0x22); 4339 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4340 urtw_write8_m(sc, URTW_SLOT, 0x9); 4341 else 4342 urtw_write8_m(sc, URTW_SLOT, 0x14); 4343 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4344 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4345 } else { 4346 urtw_write8_m(sc, URTW_SIFS, 0x22); 4347 if (sc->sc_state == IEEE80211_S_ASSOC && 4348 ic->ic_flags & IEEE80211_F_SHSLOT) 4349 urtw_write8_m(sc, URTW_SLOT, 0x9); 4350 else 4351 urtw_write8_m(sc, URTW_SLOT, 0x14); 4352 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4353 urtw_write8_m(sc, URTW_DIFS, 0x14); 4354 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4355 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4356 } else { 4357 urtw_write8_m(sc, URTW_DIFS, 0x24); 4358 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4359 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4360 } 4361 } 4362fail: 4363 URTW_UNLOCK(sc); 4364} 4365 4366static void 4367urtw_sysctl_node(struct urtw_softc *sc) 4368{ 4369#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4370 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4371 struct sysctl_ctx_list *ctx; 4372 struct sysctl_oid_list *child, *parent; 4373 struct sysctl_oid *tree; 4374 struct urtw_stats *stats = &sc->sc_stats; 4375 4376 ctx = device_get_sysctl_ctx(sc->sc_dev); 4377 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4378 4379 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4380 NULL, "URTW statistics"); 4381 parent = SYSCTL_CHILDREN(tree); 4382 4383 /* Tx statistics. */ 4384 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4385 NULL, "Tx MAC statistics"); 4386 child = SYSCTL_CHILDREN(tree); 4387 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4388 "1 Mbit/s"); 4389 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4390 "2 Mbit/s"); 4391 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4392 "5.5 Mbit/s"); 4393 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4394 "6 Mbit/s"); 4395 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4396 "9 Mbit/s"); 4397 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4398 "11 Mbit/s"); 4399 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4400 "12 Mbit/s"); 4401 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4402 "18 Mbit/s"); 4403 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4404 "24 Mbit/s"); 4405 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4406 "36 Mbit/s"); 4407 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4408 "48 Mbit/s"); 4409 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4410 "54 Mbit/s"); 4411#undef URTW_SYSCTL_STAT_ADD32 4412} 4413 4414static device_method_t urtw_methods[] = { 4415 DEVMETHOD(device_probe, urtw_match), 4416 DEVMETHOD(device_attach, urtw_attach), 4417 DEVMETHOD(device_detach, urtw_detach), 4418 DEVMETHOD_END 4419}; 4420static driver_t urtw_driver = { 4421 .name = "urtw", 4422 .methods = urtw_methods, 4423 .size = sizeof(struct urtw_softc) 4424}; 4425static devclass_t urtw_devclass; 4426 4427DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4428MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4429MODULE_DEPEND(urtw, usb, 1, 1, 1); 4430MODULE_VERSION(urtw, 1); 4431