if_urtw.c revision 197761
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 197761 2009-10-04 23:30:08Z weongyo $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_arp.h> 40#include <net/ethernet.h> 41#include <net/if_dl.h> 42#include <net/if_media.h> 43#include <net/if_types.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/in_systm.h> 48#include <netinet/in_var.h> 49#include <netinet/if_ether.h> 50#include <netinet/ip.h> 51#endif 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_regdomain.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 64SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 65#ifdef URTW_DEBUG 66int urtw_debug = 0; 67SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW, &urtw_debug, 0, 68 "control debugging printfs"); 69TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_ANY = 0xffffffff 80}; 81#define DPRINTF(sc, m, fmt, ...) do { \ 82 if (sc->sc_debug & (m)) \ 83 printf(fmt, __VA_ARGS__); \ 84} while (0) 85#else 86#define DPRINTF(sc, m, fmt, ...) do { \ 87 (void) sc; \ 88} while (0) 89#endif 90static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 91SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW, 92 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 93TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode); 94 95/* recognized device vendors/products */ 96#define urtw_lookup(v, p) \ 97 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 98#define URTW_DEV_B(v,p) \ 99 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 100#define URTW_DEV_L(v,p) \ 101 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 102#define URTW_REV_RTL8187B 0 103#define URTW_REV_RTL8187L 1 104static const struct usb_device_id urtw_devs[] = { 105 URTW_DEV_B(NETGEAR, WG111V3), 106 URTW_DEV_B(REALTEK, RTL8187B_0), 107 URTW_DEV_B(REALTEK, RTL8187B_1), 108 URTW_DEV_B(REALTEK, RTL8187B_2), 109 URTW_DEV_B(SITECOMEU, WL168V4), 110 URTW_DEV_L(ASUS, P5B_WIFI), 111 URTW_DEV_L(BELKIN, F5D7050E), 112 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 113 URTW_DEV_L(NETGEAR, WG111V2), 114 URTW_DEV_L(REALTEK, RTL8187), 115 URTW_DEV_L(SITECOMEU, WL168V1), 116 URTW_DEV_L(SURECOM, EP9001G2A), 117 { USB_VPI(0x1b75, 0x8187, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 122 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 124#undef URTW_DEV_L 125#undef URTW_DEV_B 126}; 127 128#define urtw_read8_m(sc, val, data) do { \ 129 error = urtw_read8_c(sc, val, data); \ 130 if (error != 0) \ 131 goto fail; \ 132} while (0) 133#define urtw_write8_m(sc, val, data) do { \ 134 error = urtw_write8_c(sc, val, data); \ 135 if (error != 0) \ 136 goto fail; \ 137} while (0) 138#define urtw_read16_m(sc, val, data) do { \ 139 error = urtw_read16_c(sc, val, data); \ 140 if (error != 0) \ 141 goto fail; \ 142} while (0) 143#define urtw_write16_m(sc, val, data) do { \ 144 error = urtw_write16_c(sc, val, data); \ 145 if (error != 0) \ 146 goto fail; \ 147} while (0) 148#define urtw_read32_m(sc, val, data) do { \ 149 error = urtw_read32_c(sc, val, data); \ 150 if (error != 0) \ 151 goto fail; \ 152} while (0) 153#define urtw_write32_m(sc, val, data) do { \ 154 error = urtw_write32_c(sc, val, data); \ 155 if (error != 0) \ 156 goto fail; \ 157} while (0) 158#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 159 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 160 if (error != 0) \ 161 goto fail; \ 162} while (0) 163#define urtw_8187_write_phy_cck(sc, val, data) do { \ 164 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 165 if (error != 0) \ 166 goto fail; \ 167} while (0) 168#define urtw_8225_write(sc, val, data) do { \ 169 error = urtw_8225_write_c(sc, val, data); \ 170 if (error != 0) \ 171 goto fail; \ 172} while (0) 173 174struct urtw_pair { 175 uint32_t reg; 176 uint32_t val; 177}; 178 179static uint8_t urtw_8225_agc[] = { 180 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 181 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 182 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 183 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 184 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 185 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 186 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 187 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 188 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 189 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 190 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 191 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 192}; 193 194static uint8_t urtw_8225z2_agc[] = { 195 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 196 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 197 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 198 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 199 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 200 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 201 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 202 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 203 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 204 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 205 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 206 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 207}; 208 209static uint32_t urtw_8225_channel[] = { 210 0x0000, /* dummy channel 0 */ 211 0x085c, /* 1 */ 212 0x08dc, /* 2 */ 213 0x095c, /* 3 */ 214 0x09dc, /* 4 */ 215 0x0a5c, /* 5 */ 216 0x0adc, /* 6 */ 217 0x0b5c, /* 7 */ 218 0x0bdc, /* 8 */ 219 0x0c5c, /* 9 */ 220 0x0cdc, /* 10 */ 221 0x0d5c, /* 11 */ 222 0x0ddc, /* 12 */ 223 0x0e5c, /* 13 */ 224 0x0f72, /* 14 */ 225}; 226 227static uint8_t urtw_8225_gain[] = { 228 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 229 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 230 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 231 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 232 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 233 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 234 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 235}; 236 237static struct urtw_pair urtw_8225_rf_part1[] = { 238 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 239 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 240 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 241 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 242}; 243 244static struct urtw_pair urtw_8225_rf_part2[] = { 245 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 246 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 247 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 248 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 249 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 250 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 251 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 252 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 253 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 254 { 0x27, 0x88 } 255}; 256 257static struct urtw_pair urtw_8225_rf_part3[] = { 258 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 259 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 260 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 261 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 262 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 263 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 264 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 265}; 266 267static uint16_t urtw_8225_rxgain[] = { 268 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 269 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 270 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 271 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 272 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 273 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 274 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 275 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 276 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 277 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 278 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 279 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 280}; 281 282static uint8_t urtw_8225_threshold[] = { 283 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 284}; 285 286static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 287 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 288}; 289 290static uint8_t urtw_8225_txpwr_cck[] = { 291 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 292 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 293 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 294 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 295 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 296 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 297}; 298 299static uint8_t urtw_8225_txpwr_cck_ch14[] = { 300 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 301 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 302 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 303 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 304 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 305 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 306}; 307 308static uint8_t urtw_8225_txpwr_ofdm[]={ 309 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 310}; 311 312static uint8_t urtw_8225v2_gain_bg[]={ 313 0x23, 0x15, 0xa5, /* -82-1dbm */ 314 0x23, 0x15, 0xb5, /* -82-2dbm */ 315 0x23, 0x15, 0xc5, /* -82-3dbm */ 316 0x33, 0x15, 0xc5, /* -78dbm */ 317 0x43, 0x15, 0xc5, /* -74dbm */ 318 0x53, 0x15, 0xc5, /* -70dbm */ 319 0x63, 0x15, 0xc5, /* -66dbm */ 320}; 321 322static struct urtw_pair urtw_8225v2_rf_part1[] = { 323 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 324 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 325 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 326 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 327}; 328 329static struct urtw_pair urtw_8225v2b_rf_part1[] = { 330 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 331 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 332 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 333 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 334}; 335 336static struct urtw_pair urtw_8225v2_rf_part2[] = { 337 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 338 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 339 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 340 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 341 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 342 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 343 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 344 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 345 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 346 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 347}; 348 349static struct urtw_pair urtw_8225v2b_rf_part2[] = { 350 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 351 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 352 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 353 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 354 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 355 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 356 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 357 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 358 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 359 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 360 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 361 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 362 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 363 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 364 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 365}; 366 367static struct urtw_pair urtw_8225v2_rf_part3[] = { 368 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 369 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 370 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 371 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 372 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 373 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 374 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 375 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 376}; 377 378static uint16_t urtw_8225v2_rxgain[] = { 379 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 380 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 381 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 382 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 383 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 384 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 385 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 386 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 387 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 388 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 389 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 390 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 391}; 392 393static uint16_t urtw_8225v2b_rxgain[] = { 394 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 395 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 396 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 397 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 398 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 399 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 400 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 401 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 402 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 403 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 404 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 405 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 406}; 407 408static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 409 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 410 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 411 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 412 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 413 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 414 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 415}; 416 417static uint8_t urtw_8225v2_txpwr_cck[] = { 418 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 419}; 420 421static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 422 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 423}; 424 425static uint8_t urtw_8225v2b_txpwr_cck[] = { 426 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 427 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 428 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 429 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 430}; 431 432static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 433 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 434 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 435 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 436 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 437}; 438 439static struct urtw_pair urtw_ratetable[] = { 440 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 441 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 442 { 96, 10 }, { 108, 11 } 443}; 444 445static const uint8_t urtw_8187b_reg_table[][3] = { 446 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 447 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 448 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 449 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 450 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 451 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 452 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 453 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 454 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 455 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 456 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 457 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 458 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 459 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 460 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 461 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 462 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 463 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 464 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 465 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 466 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 467 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 468 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 469 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 470 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 471 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 472 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 473 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 474 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 475 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 476 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 477}; 478 479static usb_callback_t urtw_bulk_rx_callback; 480static usb_callback_t urtw_bulk_tx_callback; 481 482static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 483 [URTW_8187B_BULK_RX] = { 484 .type = UE_BULK, 485 .endpoint = 0x83, 486 .direction = UE_DIR_IN, 487 .bufsize = MCLBYTES, 488 .flags = { 489 .ext_buffer = 1, 490 .pipe_bof = 1, 491 .short_xfer_ok = 1 492 }, 493 .callback = urtw_bulk_rx_callback 494 }, 495 [URTW_8187B_BULK_TX_BE] = { 496 .type = UE_BULK, 497 .endpoint = URTW_8187B_TXPIPE_BE, 498 .direction = UE_DIR_OUT, 499 .bufsize = URTW_TX_MAXSIZE, 500 .flags = { 501 .ext_buffer = 1, 502 .force_short_xfer = 1, 503 .pipe_bof = 1, 504 }, 505 .callback = urtw_bulk_tx_callback, 506 .timeout = URTW_DATA_TIMEOUT 507 }, 508 [URTW_8187B_BULK_TX_BK] = { 509 .type = UE_BULK, 510 .endpoint = URTW_8187B_TXPIPE_BK, 511 .direction = UE_DIR_OUT, 512 .bufsize = URTW_TX_MAXSIZE, 513 .flags = { 514 .ext_buffer = 1, 515 .force_short_xfer = 1, 516 .pipe_bof = 1, 517 }, 518 .callback = urtw_bulk_tx_callback, 519 .timeout = URTW_DATA_TIMEOUT 520 }, 521 [URTW_8187B_BULK_TX_VI] = { 522 .type = UE_BULK, 523 .endpoint = URTW_8187B_TXPIPE_VI, 524 .direction = UE_DIR_OUT, 525 .bufsize = URTW_TX_MAXSIZE, 526 .flags = { 527 .ext_buffer = 1, 528 .force_short_xfer = 1, 529 .pipe_bof = 1, 530 }, 531 .callback = urtw_bulk_tx_callback, 532 .timeout = URTW_DATA_TIMEOUT 533 }, 534 [URTW_8187B_BULK_TX_VO] = { 535 .type = UE_BULK, 536 .endpoint = URTW_8187B_TXPIPE_VO, 537 .direction = UE_DIR_OUT, 538 .bufsize = URTW_TX_MAXSIZE, 539 .flags = { 540 .ext_buffer = 1, 541 .force_short_xfer = 1, 542 .pipe_bof = 1, 543 }, 544 .callback = urtw_bulk_tx_callback, 545 .timeout = URTW_DATA_TIMEOUT 546 }, 547 [URTW_8187B_BULK_TX_EP12] = { 548 .type = UE_BULK, 549 .endpoint = 0xc, 550 .direction = UE_DIR_OUT, 551 .bufsize = URTW_TX_MAXSIZE, 552 .flags = { 553 .ext_buffer = 1, 554 .force_short_xfer = 1, 555 .pipe_bof = 1, 556 }, 557 .callback = urtw_bulk_tx_callback, 558 .timeout = URTW_DATA_TIMEOUT 559 } 560}; 561 562static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 563 [URTW_8187L_BULK_RX] = { 564 .type = UE_BULK, 565 .endpoint = 0x81, 566 .direction = UE_DIR_IN, 567 .bufsize = MCLBYTES, 568 .flags = { 569 .ext_buffer = 1, 570 .pipe_bof = 1, 571 .short_xfer_ok = 1 572 }, 573 .callback = urtw_bulk_rx_callback 574 }, 575 [URTW_8187L_BULK_TX_LOW] = { 576 .type = UE_BULK, 577 .endpoint = 0x2, 578 .direction = UE_DIR_OUT, 579 .bufsize = URTW_TX_MAXSIZE, 580 .flags = { 581 .ext_buffer = 1, 582 .force_short_xfer = 1, 583 .pipe_bof = 1, 584 }, 585 .callback = urtw_bulk_tx_callback, 586 .timeout = URTW_DATA_TIMEOUT 587 }, 588 [URTW_8187L_BULK_TX_NORMAL] = { 589 .type = UE_BULK, 590 .endpoint = 0x3, 591 .direction = UE_DIR_OUT, 592 .bufsize = URTW_TX_MAXSIZE, 593 .flags = { 594 .ext_buffer = 1, 595 .force_short_xfer = 1, 596 .pipe_bof = 1, 597 }, 598 .callback = urtw_bulk_tx_callback, 599 .timeout = URTW_DATA_TIMEOUT 600 }, 601}; 602 603static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 604 const char name[IFNAMSIZ], int unit, int opmode, 605 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 606 const uint8_t mac[IEEE80211_ADDR_LEN]); 607static void urtw_vap_delete(struct ieee80211vap *); 608static void urtw_init(void *); 609static void urtw_stop(struct ifnet *, int); 610static void urtw_stop_locked(struct ifnet *, int); 611static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 612static void urtw_start(struct ifnet *); 613static int urtw_alloc_rx_data_list(struct urtw_softc *); 614static int urtw_alloc_tx_data_list(struct urtw_softc *); 615static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 616 const struct ieee80211_bpf_params *); 617static void urtw_scan_start(struct ieee80211com *); 618static void urtw_scan_end(struct ieee80211com *); 619static void urtw_set_channel(struct ieee80211com *); 620static void urtw_update_mcast(struct ifnet *); 621static int urtw_tx_start(struct urtw_softc *, 622 struct ieee80211_node *, struct mbuf *, 623 struct urtw_data *, int); 624static int urtw_newstate(struct ieee80211vap *, 625 enum ieee80211_state, int); 626static void urtw_led_ch(void *); 627static void urtw_ledtask(void *, int); 628static void urtw_watchdog(void *); 629static void urtw_set_multi(void *); 630static int urtw_isbmode(uint16_t); 631static uint16_t urtw_rate2rtl(int); 632static uint16_t urtw_rtl2rate(int); 633static usb_error_t urtw_set_rate(struct urtw_softc *); 634static usb_error_t urtw_update_msr(struct urtw_softc *); 635static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 636static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 637static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 638static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 639static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 640static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 641static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 642static usb_error_t urtw_eprom_ck(struct urtw_softc *); 643static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 644 int); 645static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 646 uint32_t *); 647static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 648static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 649static usb_error_t urtw_get_macaddr(struct urtw_softc *); 650static usb_error_t urtw_get_txpwr(struct urtw_softc *); 651static usb_error_t urtw_get_rfchip(struct urtw_softc *); 652static usb_error_t urtw_led_init(struct urtw_softc *); 653static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 654static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 655static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 656 uint32_t); 657static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 658 uint8_t, uint32_t); 659static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 660 uint32_t); 661static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 662static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 663static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 664 uint16_t); 665static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 666 uint16_t *); 667static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 668 uint32_t *); 669static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 670static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 671static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 672static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 673static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 674static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 675static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 676static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 677static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 678static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 679static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 680static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 681static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 682static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 683static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 684static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 685static usb_error_t urtw_intr_enable(struct urtw_softc *); 686static usb_error_t urtw_intr_disable(struct urtw_softc *); 687static usb_error_t urtw_reset(struct urtw_softc *); 688static usb_error_t urtw_led_on(struct urtw_softc *, int); 689static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 690static usb_error_t urtw_led_blink(struct urtw_softc *); 691static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 692static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 693static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 694static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 695static usb_error_t urtw_rx_setconf(struct urtw_softc *); 696static usb_error_t urtw_rx_enable(struct urtw_softc *); 697static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 698static void urtw_free_tx_data_list(struct urtw_softc *); 699static void urtw_free_rx_data_list(struct urtw_softc *); 700static void urtw_free_data_list(struct urtw_softc *, 701 struct urtw_data data[], int, int); 702static usb_error_t urtw_adapter_start(struct urtw_softc *); 703static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 704static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 705static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 706static usb_error_t urtw_write16_i(struct urtw_softc *, int, uint16_t, int); 707static usb_error_t urtw_write8_i(struct urtw_softc *, int, uint8_t, int); 708static usb_error_t urtw_write32_i(struct urtw_softc *, int, uint32_t, int); 709static usb_error_t urtw_do_request(struct urtw_softc *, 710 struct usb_device_request *, void *); 711static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 712static usb_error_t urtw_led_off(struct urtw_softc *, int); 713static void urtw_abort_xfers(struct urtw_softc *); 714static struct urtw_data * 715 urtw_getbuf(struct urtw_softc *sc); 716 717static int 718urtw_match(device_t dev) 719{ 720 struct usb_attach_arg *uaa = device_get_ivars(dev); 721 722 if (uaa->usb_mode != USB_MODE_HOST) 723 return (ENXIO); 724 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 725 return (ENXIO); 726 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 727 return (ENXIO); 728 729 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 730} 731 732static int 733urtw_attach(device_t dev) 734{ 735 const struct usb_config *setup_start; 736 int ret = ENXIO; 737 struct urtw_softc *sc = device_get_softc(dev); 738 struct usb_attach_arg *uaa = device_get_ivars(dev); 739 struct ieee80211com *ic; 740 struct ifnet *ifp; 741 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 742 uint16_t n_setup; 743 uint32_t data; 744 usb_error_t error; 745 746 device_set_usb_desc(dev); 747 748 sc->sc_dev = dev; 749 sc->sc_udev = uaa->device; 750 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 751 sc->sc_flags |= URTW_RTL8187B; 752#ifdef URTW_DEBUG 753 sc->sc_debug = urtw_debug; 754#endif 755 756 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 757 MTX_DEF); 758 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 759 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 760 callout_init(&sc->sc_watchdog_ch, 0); 761 762 if (sc->sc_flags & URTW_RTL8187B) { 763 setup_start = urtw_8187b_usbconfig; 764 n_setup = URTW_8187B_N_XFERS; 765 } else { 766 setup_start = urtw_8187l_usbconfig; 767 n_setup = URTW_8187L_N_XFERS; 768 } 769 770 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 771 setup_start, n_setup, sc, &sc->sc_mtx); 772 if (error) { 773 device_printf(dev, "could not allocate USB transfers, " 774 "err=%s\n", usbd_errstr(error)); 775 ret = ENXIO; 776 goto fail0; 777 } 778 779 URTW_LOCK(sc); 780 781 urtw_read32_m(sc, URTW_RX, &data); 782 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 783 URTW_EEPROM_93C46; 784 785 error = urtw_get_rfchip(sc); 786 if (error != 0) 787 goto fail; 788 error = urtw_get_macaddr(sc); 789 if (error != 0) 790 goto fail; 791 error = urtw_get_txpwr(sc); 792 if (error != 0) 793 goto fail; 794 error = urtw_led_init(sc); 795 if (error != 0) 796 goto fail; 797 798 URTW_UNLOCK(sc); 799 800 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 801 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 802 sc->sc_currate = 3; 803 sc->sc_preamble_mode = urtw_preamble_mode; 804 805 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 806 if (ifp == NULL) { 807 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 808 ret = ENOMEM; 809 goto fail1; 810 } 811 812 ifp->if_softc = sc; 813 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 814 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 815 ifp->if_init = urtw_init; 816 ifp->if_ioctl = urtw_ioctl; 817 ifp->if_start = urtw_start; 818 /* XXX URTW_TX_DATA_LIST_COUNT */ 819 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 820 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 821 IFQ_SET_READY(&ifp->if_snd); 822 823 ic = ifp->if_l2com; 824 ic->ic_ifp = ifp; 825 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 826 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 827 828 /* set device capabilities */ 829 ic->ic_caps = 830 IEEE80211_C_STA | /* station mode */ 831 IEEE80211_C_MONITOR | /* monitor mode supported */ 832 IEEE80211_C_TXPMGT | /* tx power management */ 833 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 834 IEEE80211_C_SHSLOT | /* short slot time supported */ 835 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 836 IEEE80211_C_WPA; /* 802.11i */ 837 838 bands = 0; 839 setbit(&bands, IEEE80211_MODE_11B); 840 setbit(&bands, IEEE80211_MODE_11G); 841 ieee80211_init_channels(ic, NULL, &bands); 842 843 ieee80211_ifattach(ic, sc->sc_bssid); 844 ic->ic_raw_xmit = urtw_raw_xmit; 845 ic->ic_scan_start = urtw_scan_start; 846 ic->ic_scan_end = urtw_scan_end; 847 ic->ic_set_channel = urtw_set_channel; 848 849 ic->ic_vap_create = urtw_vap_create; 850 ic->ic_vap_delete = urtw_vap_delete; 851 ic->ic_update_mcast = urtw_update_mcast; 852 853 ieee80211_radiotap_attach(ic, 854 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 855 URTW_TX_RADIOTAP_PRESENT, 856 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 857 URTW_RX_RADIOTAP_PRESENT); 858 859 if (bootverbose) 860 ieee80211_announce(ic); 861 return (0); 862 863fail: URTW_UNLOCK(sc); 864fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 865 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 866fail0: 867 return (ret); 868} 869 870static int 871urtw_detach(device_t dev) 872{ 873 struct urtw_softc *sc = device_get_softc(dev); 874 struct ifnet *ifp = sc->sc_ifp; 875 struct ieee80211com *ic = ifp->if_l2com; 876 877 if (!device_is_attached(dev)) 878 return (0); 879 880 urtw_stop(ifp, 1); 881 ieee80211_draintask(ic, &sc->sc_led_task); 882 883 usb_callout_drain(&sc->sc_led_ch); 884 callout_drain(&sc->sc_watchdog_ch); 885 886 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 887 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 888 ieee80211_ifdetach(ic); 889 890 urtw_free_tx_data_list(sc); 891 urtw_free_rx_data_list(sc); 892 893 if_free(ifp); 894 mtx_destroy(&sc->sc_mtx); 895 896 return (0); 897} 898 899static void 900urtw_free_tx_data_list(struct urtw_softc *sc) 901{ 902 903 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 904} 905 906static void 907urtw_free_rx_data_list(struct urtw_softc *sc) 908{ 909 910 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 911} 912 913static void 914urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 915 int fillmbuf) 916{ 917 int i; 918 919 for (i = 0; i < ndata; i++) { 920 struct urtw_data *dp = &data[i]; 921 922 if (fillmbuf == 1) { 923 if (dp->m != NULL) { 924 m_freem(dp->m); 925 dp->m = NULL; 926 dp->buf = NULL; 927 } 928 } else { 929 if (dp->buf != NULL) { 930 free(dp->buf, M_USBDEV); 931 dp->buf = NULL; 932 } 933 } 934 if (dp->ni != NULL) { 935 ieee80211_free_node(dp->ni); 936 dp->ni = NULL; 937 } 938 } 939} 940 941static struct ieee80211vap * 942urtw_vap_create(struct ieee80211com *ic, 943 const char name[IFNAMSIZ], int unit, int opmode, int flags, 944 const uint8_t bssid[IEEE80211_ADDR_LEN], 945 const uint8_t mac[IEEE80211_ADDR_LEN]) 946{ 947 struct urtw_vap *uvp; 948 struct ieee80211vap *vap; 949 950 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 951 return (NULL); 952 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 953 M_80211_VAP, M_NOWAIT | M_ZERO); 954 if (uvp == NULL) 955 return (NULL); 956 vap = &uvp->vap; 957 /* enable s/w bmiss handling for sta mode */ 958 ieee80211_vap_setup(ic, vap, name, unit, opmode, 959 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 960 961 /* override state transition machine */ 962 uvp->newstate = vap->iv_newstate; 963 vap->iv_newstate = urtw_newstate; 964 965 /* complete setup */ 966 ieee80211_vap_attach(vap, ieee80211_media_change, 967 ieee80211_media_status); 968 ic->ic_opmode = opmode; 969 return (vap); 970} 971 972static void 973urtw_vap_delete(struct ieee80211vap *vap) 974{ 975 struct urtw_vap *uvp = URTW_VAP(vap); 976 977 ieee80211_vap_detach(vap); 978 free(uvp, M_80211_VAP); 979} 980 981static void 982urtw_init_locked(void *arg) 983{ 984 int ret; 985 struct urtw_softc *sc = arg; 986 struct ifnet *ifp = sc->sc_ifp; 987 usb_error_t error; 988 989 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 990 urtw_stop_locked(ifp, 0); 991 992 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 993 urtw_adapter_start(sc); 994 if (error != 0) 995 goto fail; 996 997 /* reset softc variables */ 998 sc->sc_txtimer = 0; 999 1000 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1001 ret = urtw_alloc_rx_data_list(sc); 1002 if (error != 0) 1003 goto fail; 1004 ret = urtw_alloc_tx_data_list(sc); 1005 if (error != 0) 1006 goto fail; 1007 sc->sc_flags |= URTW_INIT_ONCE; 1008 } 1009 1010 error = urtw_rx_enable(sc); 1011 if (error != 0) 1012 goto fail; 1013 error = urtw_tx_enable(sc); 1014 if (error != 0) 1015 goto fail; 1016 1017 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1018 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1019 1020 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1021fail: 1022 return; 1023} 1024 1025static void 1026urtw_init(void *arg) 1027{ 1028 struct urtw_softc *sc = arg; 1029 1030 URTW_LOCK(sc); 1031 urtw_init_locked(arg); 1032 URTW_UNLOCK(sc); 1033} 1034 1035static usb_error_t 1036urtw_adapter_start_b(struct urtw_softc *sc) 1037{ 1038#define N(a) (sizeof(a) / sizeof((a)[0])) 1039 int i; 1040 uint8_t data8; 1041 usb_error_t error; 1042 1043 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1044 if (error) 1045 goto fail; 1046 1047 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1048 urtw_write8_m(sc, URTW_CONFIG3, 1049 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1050 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1051 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1052 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1053 1054 urtw_write8_m(sc, 0x61, 0x10); 1055 urtw_read8_m(sc, 0x62, &data8); 1056 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1057 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1058 1059 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1060 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1061 urtw_write8_m(sc, URTW_CONFIG3, data8); 1062 1063 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1064 if (error) 1065 goto fail; 1066 1067 error = urtw_8187b_cmd_reset(sc); 1068 if (error) 1069 goto fail; 1070 1071 urtw_write16_m(sc, 0x2d, 0xfff); 1072 urtw_read8_m(sc, URTW_CW_CONF, &data8); 1073 urtw_write8_m(sc, URTW_CW_CONF, data8 | URTW_CW_CONF_PERPACKET_RETRY); 1074 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 1075 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN | 1076 URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 1077 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 1078 1079 error = urtw_write16_i(sc, 0xe0, 0xfff, 1); 1080 if (error) 1081 goto fail; 1082 1083 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 1084 urtw_write8_m(sc, URTW_RATE_FALLBACK, data8 | URTW_RATE_FALLBACK_ENABLE); 1085 1086 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1087 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1088 error = urtw_write16_i(sc, 0xd4, 0xffff, 1); 1089 if (error) 1090 goto fail; 1091 1092 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1093 if (error) 1094 goto fail; 1095 urtw_read8_m(sc, URTW_CONFIG1, &data8); 1096 urtw_write8_m(sc, URTW_CONFIG1, (data8 & 0x3f) | 0x80); 1097 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1098 if (error) 1099 goto fail; 1100 1101 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1102 for (i = 0; i < N(urtw_8187b_reg_table); i++) { 1103 error = urtw_write8_i(sc, urtw_8187b_reg_table[i][0], 1104 urtw_8187b_reg_table[i][1], urtw_8187b_reg_table[i][2]); 1105 if (error) 1106 goto fail; 1107 } 1108 1109 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 1110 urtw_write16_m(sc, URTW_INT_MIG, 0); 1111 1112 error = urtw_write32_i(sc, 0xf0, 0, 1); 1113 if (error) 1114 goto fail; 1115 error = urtw_write32_i(sc, 0xf4, 0, 1); 1116 if (error) 1117 goto fail; 1118 error = urtw_write8_i(sc, 0xf8, 0, 1); 1119 if (error) 1120 goto fail; 1121 1122 urtw_write32_m(sc, URTW_RF_TIMING, 0x00004001); 1123 1124 error = urtw_write16_i(sc, 0x72, 0x569a, 2); 1125 if (error) 1126 goto fail; 1127 1128 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1129 if (error) 1130 goto fail; 1131 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1132 urtw_write8_m(sc, URTW_CONFIG3, data8 | URTW_CONFIG3_ANAPARAM_WRITE); 1133 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1134 if (error) 1135 goto fail; 1136 1137 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 1138 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 1139 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 1140 usb_pause_mtx(&sc->sc_mtx, 100); 1141 1142 error = sc->sc_rf_init(sc); 1143 if (error != 0) 1144 goto fail; 1145 1146 error = urtw_intr_enable(sc); 1147 if (error) 1148 goto fail; 1149 1150 error = urtw_write8e(sc, 0x41, 0xf4); 1151 if (error) 1152 goto fail; 1153 error = urtw_write8e(sc, 0x40, 0x00); 1154 if (error) 1155 goto fail; 1156 error = urtw_write8e(sc, 0x42, 0x00); 1157 if (error) 1158 goto fail; 1159 error = urtw_write8e(sc, 0x42, 0x01); 1160 if (error) 1161 goto fail; 1162 error = urtw_write8e(sc, 0x40, 0x0f); 1163 if (error) 1164 goto fail; 1165 error = urtw_write8e(sc, 0x42, 0x00); 1166 if (error) 1167 goto fail; 1168 error = urtw_write8e(sc, 0x42, 0x01); 1169 if (error) 1170 goto fail; 1171 1172 urtw_read8_m(sc, 0xdb, &data8); 1173 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1174 error = urtw_write16_i(sc, 0x72, 0x59fa, 3); 1175 if (error) 1176 goto fail; 1177 error = urtw_write16_i(sc, 0x74, 0x59d2, 3); 1178 if (error) 1179 goto fail; 1180 error = urtw_write16_i(sc, 0x76, 0x59d2, 3); 1181 if (error) 1182 goto fail; 1183 error = urtw_write16_i(sc, 0x78, 0x19fa, 3); 1184 if (error) 1185 goto fail; 1186 error = urtw_write16_i(sc, 0x7a, 0x19fa, 3); 1187 if (error) 1188 goto fail; 1189 error = urtw_write16_i(sc, 0x7c, 0x00d0, 3); 1190 if (error) 1191 goto fail; 1192 urtw_write8_m(sc, 0x61, 0); 1193 error = urtw_write8_i(sc, 0x80, 0x0f, 1); 1194 if (error) 1195 goto fail; 1196 error = urtw_write8_i(sc, 0x83, 0x03, 1); 1197 if (error) 1198 goto fail; 1199 urtw_write8_m(sc, 0xda, 0x10); 1200 error = urtw_write8_i(sc, 0x4d, 0x08, 2); 1201 if (error) 1202 goto fail; 1203 1204 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321B); 1205 1206 error = urtw_write16_i(sc, 0xec, 0x800, 1); 1207 if (error) 1208 goto fail; 1209 1210fail: 1211 return (error); 1212#undef N 1213} 1214 1215static usb_error_t 1216urtw_adapter_start(struct urtw_softc *sc) 1217{ 1218 usb_error_t error; 1219 1220 error = urtw_reset(sc); 1221 if (error) 1222 goto fail; 1223 1224 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1225 urtw_write8_m(sc, URTW_GPIO, 0); 1226 1227 /* for led */ 1228 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1229 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1230 if (error != 0) 1231 goto fail; 1232 1233 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1234 if (error) 1235 goto fail; 1236 /* applying MAC address again. */ 1237 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1238 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1239 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1240 if (error) 1241 goto fail; 1242 1243 error = urtw_update_msr(sc); 1244 if (error) 1245 goto fail; 1246 1247 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1248 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1249 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1250 error = urtw_set_rate(sc); 1251 if (error != 0) 1252 goto fail; 1253 1254 error = sc->sc_rf_init(sc); 1255 if (error != 0) 1256 goto fail; 1257 if (sc->sc_rf_set_sens != NULL) 1258 sc->sc_rf_set_sens(sc, sc->sc_sens); 1259 1260 /* XXX correct? to call write16 */ 1261 urtw_write16_m(sc, URTW_PSR, 1); 1262 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1263 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1264 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1265 /* XXX correct? to call write16 */ 1266 urtw_write16_m(sc, URTW_PSR, 0); 1267 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1268 1269 error = urtw_intr_enable(sc); 1270 if (error != 0) 1271 goto fail; 1272 1273fail: 1274 return (error); 1275} 1276 1277static usb_error_t 1278urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1279{ 1280 uint8_t data; 1281 usb_error_t error; 1282 1283 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1284 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1285 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1286 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1287fail: 1288 return (error); 1289} 1290 1291static usb_error_t 1292urtw_8187b_cmd_reset(struct urtw_softc *sc) 1293{ 1294 int i; 1295 uint8_t data8; 1296 usb_error_t error; 1297 1298 /* XXX the code can be duplicate with urtw_reset(). */ 1299 urtw_read8_m(sc, URTW_CMD, &data8); 1300 data8 = (data8 & 0x2) | URTW_CMD_RST; 1301 urtw_write8_m(sc, URTW_CMD, data8); 1302 1303 for (i = 0; i < 20; i++) { 1304 usb_pause_mtx(&sc->sc_mtx, 2); 1305 urtw_read8_m(sc, URTW_CMD, &data8); 1306 if (!(data8 & URTW_CMD_RST)) 1307 break; 1308 } 1309 if (i >= 20) { 1310 device_printf(sc->sc_dev, "reset timeout\n"); 1311 goto fail; 1312 } 1313 1314 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 1315 if (error) 1316 goto fail; 1317 1318 for (i = 0; i < 20; i++) { 1319 usb_pause_mtx(&sc->sc_mtx, 4); 1320 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 1321 if (!(data8 & URTW_EPROM_CMD_CONFIG)) 1322 break; 1323 } 1324 if (i >= 20) { 1325 device_printf(sc->sc_dev, "eeprom reset timeout\n"); 1326 goto fail; 1327 } 1328 1329fail: 1330 return (error); 1331} 1332 1333static usb_error_t 1334urtw_write16_i(struct urtw_softc *sc, int val, uint16_t data, int idx) 1335{ 1336 struct usb_device_request req; 1337 1338 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1339 req.bRequest = URTW_8187_SETREGS_REQ; 1340 USETW(req.wValue, val | 0xff00); 1341 USETW(req.wIndex, idx & 0x3); 1342 USETW(req.wLength, sizeof(uint16_t)); 1343 1344 return (urtw_do_request(sc, &req, &data)); 1345} 1346 1347static usb_error_t 1348urtw_do_request(struct urtw_softc *sc, 1349 struct usb_device_request *req, void *data) 1350{ 1351 usb_error_t err; 1352 int ntries = 10; 1353 1354 URTW_ASSERT_LOCKED(sc); 1355 1356 while (ntries--) { 1357 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1358 req, data, 0, NULL, 250 /* ms */); 1359 if (err == 0) 1360 break; 1361 1362 DPRINTF(sc, URTW_DEBUG_INIT, 1363 "Control request failed, %s (retrying)\n", 1364 usbd_errstr(err)); 1365 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1366 } 1367 return (err); 1368} 1369 1370static usb_error_t 1371urtw_write8_i(struct urtw_softc *sc, int val, uint8_t data, int idx) 1372{ 1373 struct usb_device_request req; 1374 1375 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1376 req.bRequest = URTW_8187_SETREGS_REQ; 1377 USETW(req.wValue, val | 0xff00); 1378 USETW(req.wIndex, idx & 0x3); 1379 USETW(req.wLength, sizeof(uint8_t)); 1380 1381 return (urtw_do_request(sc, &req, &data)); 1382} 1383 1384static usb_error_t 1385urtw_write32_i(struct urtw_softc *sc, int val, uint32_t data, int idx) 1386{ 1387 struct usb_device_request req; 1388 1389 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1390 req.bRequest = URTW_8187_SETREGS_REQ; 1391 USETW(req.wValue, val | 0xff00); 1392 USETW(req.wIndex, idx & 0x3); 1393 USETW(req.wLength, sizeof(uint32_t)); 1394 1395 return (urtw_do_request(sc, &req, &data)); 1396} 1397 1398static void 1399urtw_stop_locked(struct ifnet *ifp, int disable) 1400{ 1401 struct urtw_softc *sc = ifp->if_softc; 1402 uint8_t data8; 1403 usb_error_t error; 1404 1405 (void)disable; 1406 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1407 1408 error = urtw_intr_disable(sc); 1409 if (error) 1410 goto fail; 1411 urtw_read8_m(sc, URTW_CMD, &data8); 1412 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1413 urtw_write8_m(sc, URTW_CMD, data8); 1414 1415 error = sc->sc_rf_stop(sc); 1416 if (error != 0) 1417 goto fail; 1418 1419 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1420 if (error) 1421 goto fail; 1422 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1423 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1424 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1425 if (error) 1426 goto fail; 1427fail: 1428 if (error) 1429 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1430 usbd_errstr(error)); 1431 1432 usb_callout_stop(&sc->sc_led_ch); 1433 callout_stop(&sc->sc_watchdog_ch); 1434 1435 urtw_abort_xfers(sc); 1436} 1437 1438static void 1439urtw_stop(struct ifnet *ifp, int disable) 1440{ 1441 struct urtw_softc *sc = ifp->if_softc; 1442 1443 URTW_LOCK(sc); 1444 urtw_stop_locked(ifp, disable); 1445 URTW_UNLOCK(sc); 1446} 1447 1448static void 1449urtw_abort_xfers(struct urtw_softc *sc) 1450{ 1451 int i, max; 1452 1453 URTW_ASSERT_LOCKED(sc); 1454 1455 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1456 URTW_8187L_N_XFERS; 1457 1458 /* abort any pending transfers */ 1459 for (i = 0; i < max; i++) 1460 usbd_transfer_stop(sc->sc_xfer[i]); 1461} 1462 1463static int 1464urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1465{ 1466 struct urtw_softc *sc = ifp->if_softc; 1467 struct ieee80211com *ic = ifp->if_l2com; 1468 struct ifreq *ifr = (struct ifreq *) data; 1469 int error = 0, startall = 0; 1470 1471 switch (cmd) { 1472 case SIOCSIFFLAGS: 1473 if (ifp->if_flags & IFF_UP) { 1474 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1475 if ((ifp->if_flags ^ sc->sc_if_flags) & 1476 (IFF_ALLMULTI | IFF_PROMISC)) 1477 urtw_set_multi(sc); 1478 } else { 1479 urtw_init(ifp->if_softc); 1480 startall = 1; 1481 } 1482 } else { 1483 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1484 urtw_stop(ifp, 1); 1485 } 1486 sc->sc_if_flags = ifp->if_flags; 1487 if (startall) 1488 ieee80211_start_all(ic); 1489 break; 1490 case SIOCGIFMEDIA: 1491 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1492 break; 1493 case SIOCGIFADDR: 1494 error = ether_ioctl(ifp, cmd, data); 1495 break; 1496 default: 1497 error = EINVAL; 1498 break; 1499 } 1500 1501 return (error); 1502} 1503 1504static void 1505urtw_start(struct ifnet *ifp) 1506{ 1507 struct urtw_data *bf; 1508 struct urtw_softc *sc = ifp->if_softc; 1509 struct ieee80211_node *ni; 1510 struct mbuf *m; 1511 1512 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1513 return; 1514 1515 URTW_LOCK(sc); 1516 for (;;) { 1517 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1518 if (m == NULL) 1519 break; 1520 bf = urtw_getbuf(sc); 1521 if (bf == NULL) { 1522 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1523 break; 1524 } 1525 1526 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1527 m->m_pkthdr.rcvif = NULL; 1528 1529 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1530 ifp->if_oerrors++; 1531 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1532 ieee80211_free_node(ni); 1533 break; 1534 } 1535 1536 sc->sc_txtimer = 5; 1537 } 1538 URTW_UNLOCK(sc); 1539} 1540 1541static int 1542urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1543 int ndata, int maxsz, int fillmbuf) 1544{ 1545 int i, error; 1546 1547 for (i = 0; i < ndata; i++) { 1548 struct urtw_data *dp = &data[i]; 1549 1550 dp->sc = sc; 1551 if (fillmbuf) { 1552 dp->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1553 if (dp->m == NULL) { 1554 device_printf(sc->sc_dev, 1555 "could not allocate rx mbuf\n"); 1556 error = ENOMEM; 1557 goto fail; 1558 } 1559 dp->buf = mtod(dp->m, uint8_t *); 1560 } else { 1561 dp->m = NULL; 1562 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1563 if (dp->buf == NULL) { 1564 device_printf(sc->sc_dev, 1565 "could not allocate buffer\n"); 1566 error = ENOMEM; 1567 goto fail; 1568 } 1569 if (((unsigned long)dp->buf) % 4) 1570 device_printf(sc->sc_dev, 1571 "warn: unaligned buffer %p\n", dp->buf); 1572 } 1573 dp->ni = NULL; 1574 } 1575 1576 return 0; 1577 1578fail: urtw_free_data_list(sc, data, ndata, fillmbuf); 1579 return error; 1580} 1581 1582static int 1583urtw_alloc_rx_data_list(struct urtw_softc *sc) 1584{ 1585 int error, i; 1586 1587 error = urtw_alloc_data_list(sc, 1588 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, MCLBYTES, 1 /* mbufs */); 1589 if (error != 0) 1590 return (error); 1591 1592 STAILQ_INIT(&sc->sc_rx_active); 1593 STAILQ_INIT(&sc->sc_rx_inactive); 1594 1595 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1596 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1597 1598 return (0); 1599} 1600 1601static int 1602urtw_alloc_tx_data_list(struct urtw_softc *sc) 1603{ 1604 int error, i; 1605 1606 error = urtw_alloc_data_list(sc, 1607 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1608 0 /* no mbufs */); 1609 if (error != 0) 1610 return (error); 1611 1612 STAILQ_INIT(&sc->sc_tx_active); 1613 STAILQ_INIT(&sc->sc_tx_inactive); 1614 STAILQ_INIT(&sc->sc_tx_pending); 1615 1616 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1617 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1618 next); 1619 1620 return (0); 1621} 1622 1623static int 1624urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1625 const struct ieee80211_bpf_params *params) 1626{ 1627 struct ieee80211com *ic = ni->ni_ic; 1628 struct ifnet *ifp = ic->ic_ifp; 1629 struct urtw_data *bf; 1630 struct urtw_softc *sc = ifp->if_softc; 1631 1632 /* prevent management frames from being sent if we're not ready */ 1633 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1634 m_freem(m); 1635 ieee80211_free_node(ni); 1636 return ENETDOWN; 1637 } 1638 URTW_LOCK(sc); 1639 bf = urtw_getbuf(sc); 1640 if (bf == NULL) { 1641 ieee80211_free_node(ni); 1642 m_freem(m); 1643 URTW_UNLOCK(sc); 1644 return (ENOBUFS); /* XXX */ 1645 } 1646 1647 ifp->if_opackets++; 1648 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1649 ieee80211_free_node(ni); 1650 ifp->if_oerrors++; 1651 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1652 URTW_UNLOCK(sc); 1653 return (EIO); 1654 } 1655 URTW_UNLOCK(sc); 1656 1657 sc->sc_txtimer = 5; 1658 return (0); 1659} 1660 1661static void 1662urtw_scan_start(struct ieee80211com *ic) 1663{ 1664 1665 /* XXX do nothing? */ 1666} 1667 1668static void 1669urtw_scan_end(struct ieee80211com *ic) 1670{ 1671 1672 /* XXX do nothing? */ 1673} 1674 1675static void 1676urtw_set_channel(struct ieee80211com *ic) 1677{ 1678 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1679 struct ifnet *ifp = sc->sc_ifp; 1680 uint32_t data, orig; 1681 usb_error_t error; 1682 1683 /* 1684 * if the user set a channel explicitly using ifconfig(8) this function 1685 * can be called earlier than we're expected that in some cases the 1686 * initialization would be failed if setting a channel is called before 1687 * the init have done. 1688 */ 1689 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1690 return; 1691 1692 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1693 return; 1694 1695 URTW_LOCK(sc); 1696 1697 /* 1698 * during changing th channel we need to temporarily be disable 1699 * TX. 1700 */ 1701 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1702 data = orig & ~URTW_TX_LOOPBACK_MASK; 1703 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1704 1705 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1706 if (error != 0) 1707 goto fail; 1708 usb_pause_mtx(&sc->sc_mtx, 10); 1709 urtw_write32_m(sc, URTW_TX_CONF, orig); 1710 1711 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1712 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1713 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1714 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1715 1716fail: 1717 URTW_UNLOCK(sc); 1718 1719 sc->sc_curchan = ic->ic_curchan; 1720 1721 if (error != 0) 1722 device_printf(sc->sc_dev, "could not change the channel\n"); 1723} 1724 1725static void 1726urtw_update_mcast(struct ifnet *ifp) 1727{ 1728 1729 /* XXX do nothing? */ 1730} 1731 1732static int 1733urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1734 struct urtw_data *data, int prior) 1735{ 1736 int xferlen; 1737 struct ifnet *ifp = sc->sc_ifp; 1738 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1739 struct ieee80211_key *k; 1740 const struct ieee80211_txparam *tp; 1741 struct ieee80211com *ic = ifp->if_l2com; 1742 struct ieee80211vap *vap = ni->ni_vap; 1743 struct urtw_8187b_txhdr *hdr; 1744 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1745 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1746 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1747 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1748 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1749 }; 1750 struct usb_xfer *xfer; 1751 usb_error_t error; 1752 1753 URTW_ASSERT_LOCKED(sc); 1754 1755 /* 1756 * Software crypto. 1757 */ 1758 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1759 k = ieee80211_crypto_encap(ni, m0); 1760 if (k == NULL) { 1761 device_printf(sc->sc_dev, 1762 "ieee80211_crypto_encap returns NULL.\n"); 1763 /* XXX we don't expect the fragmented frames */ 1764 m_freem(m0); 1765 return (ENOBUFS); 1766 } 1767 1768 /* in case packet header moved, reset pointer */ 1769 wh = mtod(m0, struct ieee80211_frame *); 1770 } 1771 1772 if (ieee80211_radiotap_active_vap(vap)) { 1773 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1774 1775 /* XXX Are variables correct? */ 1776 tap->wt_flags = 0; 1777 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1778 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1779 1780 ieee80211_radiotap_tx(vap, m0); 1781 } 1782 1783 xferlen = m0->m_pkthdr.len; 1784 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1785 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1786 xferlen += 1; 1787 1788 bzero(data->buf, URTW_TX_MAXSIZE); 1789 data->buf[0] = m0->m_pkthdr.len & 0xff; 1790 data->buf[1] = (m0->m_pkthdr.len & 0x0f00) >> 8; 1791 data->buf[1] |= (1 << 7); 1792 1793 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1794 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1795 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1796 (sc->sc_currate != 0)) 1797 data->buf[2] |= 1; 1798 if ((m0->m_pkthdr.len > vap->iv_rtsthreshold) && 1799 prior == URTW_PRIORITY_LOW) { 1800 device_printf(sc->sc_dev, "TODO tx.\n"); 1801 return (EIO); 1802 } 1803 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1804 data->buf[2] |= (1 << 1); 1805 /* RTS rate - 10 means we use a basic rate. */ 1806 data->buf[2] |= (urtw_rate2rtl(2) << 3); 1807 /* 1808 * XXX currently TX rate control depends on the rate value of 1809 * RX descriptor because I don't know how to we can control TX rate 1810 * in more smart way. Please fix me you find a thing. 1811 */ 1812 data->buf[3] = sc->sc_currate; 1813 if (prior == URTW_PRIORITY_NORMAL) { 1814 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1815 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1816 data->buf[3] = urtw_rate2rtl(tp->mcastrate); 1817 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1818 data->buf[3] = urtw_rate2rtl(tp->ucastrate); 1819 } 1820 1821 if (sc->sc_flags & URTW_RTL8187B) { 1822 hdr = (struct urtw_8187b_txhdr *)data->buf; 1823 hdr->rts_duration = 0; 1824 hdr->len = 0; 1825 hdr->retry = 3 | (7 << 4) | 11; 1826 hdr->tx_duration = ieee80211_compute_duration(ic->ic_rt, 1827 m0->m_pkthdr.len + IEEE80211_CRC_LEN, 1828 urtw_rtl2rate(data->buf[3]), 1829 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0); 1830 /* XXX MUST fill another variables like rts_duration, tx_.. */ 1831 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[32]); 1832 } else { 1833 data->buf[8] = 3; /* CW minimum */ 1834 data->buf[8] |= (7 << 4); /* CW maximum */ 1835 data->buf[9] |= 11; /* retry limitation */ 1836 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[12]); 1837 } 1838 1839 data->buflen = xferlen; 1840 data->ni = ni; 1841 data->m = m0; 1842 1843 if (sc->sc_flags & URTW_RTL8187B) { 1844 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1845 case IEEE80211_FC0_TYPE_CTL: 1846 case IEEE80211_FC0_TYPE_MGT: 1847 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1848 break; 1849 default: 1850 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1851 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1852 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1853 break; 1854 } 1855 } else 1856 xfer = (prior == URTW_PRIORITY_LOW) ? 1857 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1858 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1859 1860 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1861 usbd_transfer_start(xfer); 1862 1863 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1864 if (error != 0) 1865 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1866 error); 1867 return (0); 1868} 1869 1870static int 1871urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1872{ 1873 struct ieee80211_node *ni = vap->iv_bss; 1874 struct ieee80211com *ic = vap->iv_ic; 1875 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1876 struct urtw_vap *uvp = URTW_VAP(vap); 1877 usb_error_t error = 0; 1878 1879 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1880 ieee80211_state_name[vap->iv_state], 1881 ieee80211_state_name[nstate]); 1882 1883 sc->sc_state = nstate; 1884 1885 IEEE80211_UNLOCK(ic); 1886 URTW_LOCK(sc); 1887 usb_callout_stop(&sc->sc_led_ch); 1888 callout_stop(&sc->sc_watchdog_ch); 1889 1890 switch (nstate) { 1891 case IEEE80211_S_INIT: 1892 case IEEE80211_S_SCAN: 1893 case IEEE80211_S_AUTH: 1894 case IEEE80211_S_ASSOC: 1895 break; 1896 case IEEE80211_S_RUN: 1897 /* setting bssid. */ 1898 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1899 urtw_write16_m(sc, URTW_BSSID + 4, 1900 ((uint16_t *)ni->ni_bssid)[2]); 1901 urtw_update_msr(sc); 1902 /* XXX maybe the below would be incorrect. */ 1903 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1904 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1905 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1906 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1907 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1908 if (error != 0) 1909 device_printf(sc->sc_dev, 1910 "could not control LED (%d)\n", error); 1911 break; 1912 default: 1913 break; 1914 } 1915fail: 1916 URTW_UNLOCK(sc); 1917 IEEE80211_LOCK(ic); 1918 return (uvp->newstate(vap, nstate, arg)); 1919} 1920 1921static void 1922urtw_watchdog(void *arg) 1923{ 1924 struct urtw_softc *sc = arg; 1925 struct ifnet *ifp = sc->sc_ifp; 1926 1927 if (sc->sc_txtimer > 0) { 1928 if (--sc->sc_txtimer == 0) { 1929 device_printf(sc->sc_dev, "device timeout\n"); 1930 ifp->if_oerrors++; 1931 return; 1932 } 1933 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1934 } 1935} 1936 1937static void 1938urtw_set_multi(void *arg) 1939{ 1940 struct urtw_softc *sc = arg; 1941 struct ifnet *ifp = sc->sc_ifp; 1942 1943 if (!(ifp->if_flags & IFF_UP)) 1944 return; 1945 1946 /* 1947 * XXX don't know how to set a device. Lack of docs. Just try to set 1948 * IFF_ALLMULTI flag here. 1949 */ 1950 ifp->if_flags |= IFF_ALLMULTI; 1951} 1952 1953static usb_error_t 1954urtw_set_rate(struct urtw_softc *sc) 1955{ 1956 int i, basic_rate, min_rr_rate, max_rr_rate; 1957 uint16_t data; 1958 usb_error_t error; 1959 1960 basic_rate = urtw_rate2rtl(48); 1961 min_rr_rate = urtw_rate2rtl(12); 1962 max_rr_rate = urtw_rate2rtl(48); 1963 1964 urtw_write8_m(sc, URTW_RESP_RATE, 1965 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1966 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1967 1968 urtw_read16_m(sc, URTW_BRSR, &data); 1969 data &= ~URTW_BRSR_MBR_8185; 1970 1971 for (i = 0; i <= basic_rate; i++) 1972 data |= (1 << i); 1973 1974 urtw_write16_m(sc, URTW_BRSR, data); 1975fail: 1976 return (error); 1977} 1978 1979static uint16_t 1980urtw_rate2rtl(int rate) 1981{ 1982#define N(a) (sizeof(a) / sizeof((a)[0])) 1983 int i; 1984 1985 for (i = 0; i < N(urtw_ratetable); i++) { 1986 if (rate == urtw_ratetable[i].reg) 1987 return urtw_ratetable[i].val; 1988 } 1989 1990 return (3); 1991#undef N 1992} 1993 1994static uint16_t 1995urtw_rtl2rate(int rate) 1996{ 1997#define N(a) (sizeof(a) / sizeof((a)[0])) 1998 int i; 1999 2000 for (i = 0; i < N(urtw_ratetable); i++) { 2001 if (rate == urtw_ratetable[i].val) 2002 return urtw_ratetable[i].reg; 2003 } 2004 2005 return (0); 2006#undef N 2007} 2008 2009static usb_error_t 2010urtw_update_msr(struct urtw_softc *sc) 2011{ 2012 struct ifnet *ifp = sc->sc_ifp; 2013 struct ieee80211com *ic = ifp->if_l2com; 2014 uint8_t data; 2015 usb_error_t error; 2016 2017 urtw_read8_m(sc, URTW_MSR, &data); 2018 data &= ~URTW_MSR_LINK_MASK; 2019 2020 if (sc->sc_state == IEEE80211_S_RUN) { 2021 switch (ic->ic_opmode) { 2022 case IEEE80211_M_STA: 2023 case IEEE80211_M_MONITOR: 2024 data |= URTW_MSR_LINK_STA; 2025 if (sc->sc_flags & URTW_RTL8187B) 2026 data |= URTW_MSR_LINK_ENEDCA; 2027 break; 2028 case IEEE80211_M_IBSS: 2029 data |= URTW_MSR_LINK_ADHOC; 2030 break; 2031 case IEEE80211_M_HOSTAP: 2032 data |= URTW_MSR_LINK_HOSTAP; 2033 break; 2034 default: 2035 panic("unsupported operation mode 0x%x\n", 2036 ic->ic_opmode); 2037 /* never reach */ 2038 } 2039 } else 2040 data |= URTW_MSR_LINK_NONE; 2041 2042 urtw_write8_m(sc, URTW_MSR, data); 2043fail: 2044 return (error); 2045} 2046 2047static usb_error_t 2048urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2049{ 2050 struct usb_device_request req; 2051 usb_error_t error; 2052 2053 URTW_ASSERT_LOCKED(sc); 2054 2055 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2056 req.bRequest = URTW_8187_GETREGS_REQ; 2057 USETW(req.wValue, val | 0xff00); 2058 USETW(req.wIndex, 0); 2059 USETW(req.wLength, sizeof(uint8_t)); 2060 2061 error = urtw_do_request(sc, &req, data); 2062 return (error); 2063} 2064 2065static usb_error_t 2066urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2067{ 2068 struct usb_device_request req; 2069 usb_error_t error; 2070 2071 URTW_ASSERT_LOCKED(sc); 2072 2073 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2074 req.bRequest = URTW_8187_GETREGS_REQ; 2075 USETW(req.wValue, val | 0xff00); 2076 USETW(req.wIndex, 0); 2077 USETW(req.wLength, sizeof(uint16_t)); 2078 2079 error = urtw_do_request(sc, &req, data); 2080 return (error); 2081} 2082 2083static usb_error_t 2084urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2085{ 2086 struct usb_device_request req; 2087 usb_error_t error; 2088 2089 URTW_ASSERT_LOCKED(sc); 2090 2091 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2092 req.bRequest = URTW_8187_GETREGS_REQ; 2093 USETW(req.wValue, val | 0xff00); 2094 USETW(req.wIndex, 0); 2095 USETW(req.wLength, sizeof(uint32_t)); 2096 2097 error = urtw_do_request(sc, &req, data); 2098 return (error); 2099} 2100 2101static usb_error_t 2102urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2103{ 2104 struct usb_device_request req; 2105 2106 URTW_ASSERT_LOCKED(sc); 2107 2108 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2109 req.bRequest = URTW_8187_SETREGS_REQ; 2110 USETW(req.wValue, val | 0xff00); 2111 USETW(req.wIndex, 0); 2112 USETW(req.wLength, sizeof(uint8_t)); 2113 2114 return (urtw_do_request(sc, &req, &data)); 2115} 2116 2117static usb_error_t 2118urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2119{ 2120 struct usb_device_request req; 2121 2122 URTW_ASSERT_LOCKED(sc); 2123 2124 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2125 req.bRequest = URTW_8187_SETREGS_REQ; 2126 USETW(req.wValue, val | 0xff00); 2127 USETW(req.wIndex, 0); 2128 USETW(req.wLength, sizeof(uint16_t)); 2129 2130 return (urtw_do_request(sc, &req, &data)); 2131} 2132 2133static usb_error_t 2134urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2135{ 2136 struct usb_device_request req; 2137 2138 URTW_ASSERT_LOCKED(sc); 2139 2140 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2141 req.bRequest = URTW_8187_SETREGS_REQ; 2142 USETW(req.wValue, val | 0xff00); 2143 USETW(req.wIndex, 0); 2144 USETW(req.wLength, sizeof(uint32_t)); 2145 2146 return (urtw_do_request(sc, &req, &data)); 2147} 2148 2149static usb_error_t 2150urtw_get_macaddr(struct urtw_softc *sc) 2151{ 2152 uint32_t data; 2153 usb_error_t error; 2154 2155 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2156 if (error != 0) 2157 goto fail; 2158 sc->sc_bssid[0] = data & 0xff; 2159 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2160 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2161 if (error != 0) 2162 goto fail; 2163 sc->sc_bssid[2] = data & 0xff; 2164 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2165 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2166 if (error != 0) 2167 goto fail; 2168 sc->sc_bssid[4] = data & 0xff; 2169 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2170fail: 2171 return (error); 2172} 2173 2174static usb_error_t 2175urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2176{ 2177#define URTW_READCMD_LEN 3 2178 int addrlen, i; 2179 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2180 usb_error_t error; 2181 2182 /* NB: make sure the buffer is initialized */ 2183 *data = 0; 2184 2185 /* enable EPROM programming */ 2186 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2187 DELAY(URTW_EPROM_DELAY); 2188 2189 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2190 if (error != 0) 2191 goto fail; 2192 error = urtw_eprom_ck(sc); 2193 if (error != 0) 2194 goto fail; 2195 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2196 if (error != 0) 2197 goto fail; 2198 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2199 addrlen = 8; 2200 addrstr[0] = addr & (1 << 7); 2201 addrstr[1] = addr & (1 << 6); 2202 addrstr[2] = addr & (1 << 5); 2203 addrstr[3] = addr & (1 << 4); 2204 addrstr[4] = addr & (1 << 3); 2205 addrstr[5] = addr & (1 << 2); 2206 addrstr[6] = addr & (1 << 1); 2207 addrstr[7] = addr & (1 << 0); 2208 } else { 2209 addrlen=6; 2210 addrstr[0] = addr & (1 << 5); 2211 addrstr[1] = addr & (1 << 4); 2212 addrstr[2] = addr & (1 << 3); 2213 addrstr[3] = addr & (1 << 2); 2214 addrstr[4] = addr & (1 << 1); 2215 addrstr[5] = addr & (1 << 0); 2216 } 2217 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2218 if (error != 0) 2219 goto fail; 2220 2221 error = urtw_eprom_writebit(sc, 0); 2222 if (error != 0) 2223 goto fail; 2224 2225 for (i = 0; i < 16; i++) { 2226 error = urtw_eprom_ck(sc); 2227 if (error != 0) 2228 goto fail; 2229 error = urtw_eprom_readbit(sc, &data16); 2230 if (error != 0) 2231 goto fail; 2232 2233 (*data) |= (data16 << (15 - i)); 2234 } 2235 2236 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2237 if (error != 0) 2238 goto fail; 2239 error = urtw_eprom_ck(sc); 2240 if (error != 0) 2241 goto fail; 2242 2243 /* now disable EPROM programming */ 2244 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2245fail: 2246 return (error); 2247#undef URTW_READCMD_LEN 2248} 2249 2250static usb_error_t 2251urtw_eprom_cs(struct urtw_softc *sc, int able) 2252{ 2253 uint8_t data; 2254 usb_error_t error; 2255 2256 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2257 if (able == URTW_EPROM_ENABLE) 2258 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2259 else 2260 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2261 DELAY(URTW_EPROM_DELAY); 2262fail: 2263 return (error); 2264} 2265 2266static usb_error_t 2267urtw_eprom_ck(struct urtw_softc *sc) 2268{ 2269 uint8_t data; 2270 usb_error_t error; 2271 2272 /* masking */ 2273 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2274 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2275 DELAY(URTW_EPROM_DELAY); 2276 /* unmasking */ 2277 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2278 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2279 DELAY(URTW_EPROM_DELAY); 2280fail: 2281 return (error); 2282} 2283 2284static usb_error_t 2285urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2286{ 2287 uint8_t data8; 2288 usb_error_t error; 2289 2290 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2291 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2292 DELAY(URTW_EPROM_DELAY); 2293 2294fail: 2295 return (error); 2296} 2297 2298static usb_error_t 2299urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2300{ 2301 uint8_t data; 2302 usb_error_t error; 2303 2304 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2305 if (bit != 0) 2306 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2307 else 2308 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2309 DELAY(URTW_EPROM_DELAY); 2310fail: 2311 return (error); 2312} 2313 2314static usb_error_t 2315urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2316{ 2317 int i = 0; 2318 usb_error_t error = 0; 2319 2320 for (i = 0; i < buflen; i++) { 2321 error = urtw_eprom_writebit(sc, buf[i]); 2322 if (error != 0) 2323 goto fail; 2324 error = urtw_eprom_ck(sc); 2325 if (error != 0) 2326 goto fail; 2327 } 2328fail: 2329 return (error); 2330} 2331 2332 2333static usb_error_t 2334urtw_get_txpwr(struct urtw_softc *sc) 2335{ 2336 int i, j; 2337 uint32_t data; 2338 usb_error_t error; 2339 2340 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2341 if (error != 0) 2342 goto fail; 2343 sc->sc_txpwr_cck_base = data & 0xf; 2344 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2345 2346 for (i = 1, j = 0; i < 6; i += 2, j++) { 2347 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2348 if (error != 0) 2349 goto fail; 2350 sc->sc_txpwr_cck[i] = data & 0xf; 2351 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2352 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2353 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2354 } 2355 for (i = 1, j = 0; i < 4; i += 2, j++) { 2356 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2357 if (error != 0) 2358 goto fail; 2359 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2360 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2361 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2362 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2363 } 2364 if (sc->sc_flags & URTW_RTL8187B) { 2365 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2366 if (error != 0) 2367 goto fail; 2368 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2369 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2370 error = urtw_eprom_read32(sc, 0x0a, &data); 2371 if (error != 0) 2372 goto fail; 2373 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2374 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2375 error = urtw_eprom_read32(sc, 0x1c, &data); 2376 if (error != 0) 2377 goto fail; 2378 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2379 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2380 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2381 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2382 } else { 2383 for (i = 1, j = 0; i < 4; i += 2, j++) { 2384 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2385 &data); 2386 if (error != 0) 2387 goto fail; 2388 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2389 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2390 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2391 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2392 } 2393 } 2394fail: 2395 return (error); 2396} 2397 2398 2399static usb_error_t 2400urtw_get_rfchip(struct urtw_softc *sc) 2401{ 2402 int ret; 2403 uint8_t data8; 2404 uint32_t data; 2405 usb_error_t error; 2406 2407 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2408 if (error != 0) 2409 goto fail; 2410 switch (data & 0xff) { 2411 case URTW_EPROM_RFCHIPID_RTL8225U: 2412 error = urtw_8225_isv2(sc, &ret); 2413 if (error != 0) 2414 goto fail; 2415 if (ret == 0) { 2416 sc->sc_rf_init = urtw_8225_rf_init; 2417 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2418 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2419 sc->sc_rf_stop = urtw_8225_rf_stop; 2420 } else { 2421 sc->sc_rf_init = urtw_8225v2_rf_init; 2422 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2423 sc->sc_rf_stop = urtw_8225_rf_stop; 2424 } 2425 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2426 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2427 break; 2428 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2429 sc->sc_rf_init = urtw_8225v2b_rf_init; 2430 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2431 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2432 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2433 sc->sc_rf_stop = urtw_8225_rf_stop; 2434 break; 2435 default: 2436 panic("unsupported RF chip %d\n", data & 0xff); 2437 /* never reach */ 2438 } 2439 2440 if (sc->sc_flags & URTW_RTL8187B) { 2441 urtw_read8_m(sc, 0xe1, &data8); 2442 sc->sc_flags |= (data8 == 0) ? URTW_RTL8187B_REV_B : 2443 (data8 == 1) ? URTW_RTL8187B_REV_D : URTW_RTL8187B_REV_E; 2444 } 2445 2446 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2447 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2448 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2449 "rtl8225z2", 2450 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2451 (data8 == 1) ? "d" : "e") : "none"); 2452 2453fail: 2454 return (error); 2455} 2456 2457 2458static usb_error_t 2459urtw_led_init(struct urtw_softc *sc) 2460{ 2461 uint32_t rev; 2462 usb_error_t error; 2463 2464 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2465 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2466 if (error != 0) 2467 goto fail; 2468 2469 switch (rev & URTW_EPROM_CID_MASK) { 2470 case URTW_EPROM_CID_ALPHA0: 2471 sc->sc_strategy = URTW_SW_LED_MODE1; 2472 break; 2473 case URTW_EPROM_CID_SERCOMM_PS: 2474 sc->sc_strategy = URTW_SW_LED_MODE3; 2475 break; 2476 case URTW_EPROM_CID_HW_LED: 2477 sc->sc_strategy = URTW_HW_LED; 2478 break; 2479 case URTW_EPROM_CID_RSVD0: 2480 case URTW_EPROM_CID_RSVD1: 2481 default: 2482 sc->sc_strategy = URTW_SW_LED_MODE0; 2483 break; 2484 } 2485 2486 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2487 2488fail: 2489 return (error); 2490} 2491 2492 2493static usb_error_t 2494urtw_8225_rf_init(struct urtw_softc *sc) 2495{ 2496#define N(a) (sizeof(a) / sizeof((a)[0])) 2497 int i; 2498 uint16_t data; 2499 usb_error_t error; 2500 2501 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2502 if (error) 2503 goto fail; 2504 2505 error = urtw_8225_usb_init(sc); 2506 if (error) 2507 goto fail; 2508 2509 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2510 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2511 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2512 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2513 2514 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2515 if (error) 2516 goto fail; 2517 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2518 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2519 if (error) 2520 goto fail; 2521 2522 error = urtw_8185_rf_pins_enable(sc); 2523 if (error) 2524 goto fail; 2525 usb_pause_mtx(&sc->sc_mtx, 1000); 2526 2527 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2528 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2529 urtw_8225_rf_part1[i].val); 2530 usb_pause_mtx(&sc->sc_mtx, 1); 2531 } 2532 usb_pause_mtx(&sc->sc_mtx, 100); 2533 urtw_8225_write(sc, 2534 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2535 usb_pause_mtx(&sc->sc_mtx, 200); 2536 urtw_8225_write(sc, 2537 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2538 usb_pause_mtx(&sc->sc_mtx, 200); 2539 urtw_8225_write(sc, 2540 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2541 2542 for (i = 0; i < 95; i++) { 2543 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2544 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2545 } 2546 2547 urtw_8225_write(sc, 2548 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2549 urtw_8225_write(sc, 2550 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2551 2552 for (i = 0; i < 128; i++) { 2553 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2554 usb_pause_mtx(&sc->sc_mtx, 1); 2555 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2556 usb_pause_mtx(&sc->sc_mtx, 1); 2557 } 2558 2559 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2560 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2561 urtw_8225_rf_part2[i].val); 2562 usb_pause_mtx(&sc->sc_mtx, 1); 2563 } 2564 2565 error = urtw_8225_setgain(sc, 4); 2566 if (error) 2567 goto fail; 2568 2569 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2570 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2571 urtw_8225_rf_part3[i].val); 2572 usb_pause_mtx(&sc->sc_mtx, 1); 2573 } 2574 2575 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2576 2577 error = urtw_8225_set_txpwrlvl(sc, 1); 2578 if (error) 2579 goto fail; 2580 2581 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2582 usb_pause_mtx(&sc->sc_mtx, 1); 2583 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2584 usb_pause_mtx(&sc->sc_mtx, 1); 2585 2586 /* TX ant A, 0x0 for B */ 2587 error = urtw_8185_tx_antenna(sc, 0x3); 2588 if (error) 2589 goto fail; 2590 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2591 2592 error = urtw_8225_rf_set_chan(sc, 1); 2593fail: 2594 return (error); 2595#undef N 2596} 2597 2598static usb_error_t 2599urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2600{ 2601 usb_error_t error = 0; 2602 2603 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2604fail: 2605 return (error); 2606} 2607 2608static usb_error_t 2609urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2610{ 2611 usb_error_t error; 2612 2613 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2614 usb_pause_mtx(&sc->sc_mtx, 1); 2615fail: 2616 return (error); 2617} 2618 2619static usb_error_t 2620urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2621{ 2622 2623 data = data & 0xff; 2624 return urtw_8187_write_phy(sc, addr, data); 2625} 2626 2627static usb_error_t 2628urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2629{ 2630 2631 data = data & 0xff; 2632 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2633} 2634 2635static usb_error_t 2636urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2637{ 2638 uint32_t phyw; 2639 usb_error_t error; 2640 2641 phyw = ((data << 8) | (addr | 0x80)); 2642 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2643 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2644 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2645 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2646 usb_pause_mtx(&sc->sc_mtx, 1); 2647fail: 2648 return (error); 2649} 2650 2651static usb_error_t 2652urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2653{ 2654 usb_error_t error; 2655 2656 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2657 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2658 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2659 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2660fail: 2661 return (error); 2662} 2663 2664static usb_error_t 2665urtw_8225_usb_init(struct urtw_softc *sc) 2666{ 2667 uint8_t data; 2668 usb_error_t error; 2669 2670 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2671 urtw_write8_m(sc, URTW_GPIO, 0); 2672 error = urtw_read8e(sc, 0x53, &data); 2673 if (error) 2674 goto fail; 2675 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2676 if (error) 2677 goto fail; 2678 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2679 urtw_write8_m(sc, URTW_GPIO, 0x20); 2680 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2681 2682 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2683 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2684 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2685 2686 usb_pause_mtx(&sc->sc_mtx, 500); 2687fail: 2688 return (error); 2689} 2690 2691static usb_error_t 2692urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2693{ 2694 uint16_t d80, d82, d84; 2695 usb_error_t error; 2696 2697 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2698 d80 &= URTW_RF_PINS_MAGIC1; 2699 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2700 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2701 d84 &= URTW_RF_PINS_MAGIC2; 2702 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2703 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2704 DELAY(10); 2705 2706 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2707 DELAY(2); 2708 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2709 DELAY(10); 2710 2711 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2712 if (error != 0) 2713 goto fail; 2714 2715 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2716 DELAY(10); 2717 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2718 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2719 usb_pause_mtx(&sc->sc_mtx, 2); 2720fail: 2721 return (error); 2722} 2723 2724/* XXX why we should allocalte memory buffer instead of using memory stack? */ 2725static usb_error_t 2726urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2727 uint16_t *data) 2728{ 2729 uint8_t *buf; 2730 uint16_t data16; 2731 struct usb_device_request *req; 2732 usb_error_t error = 0; 2733 2734 data16 = *data; 2735 req = (usb_device_request_t *)malloc(sizeof(usb_device_request_t), 2736 M_80211_VAP, M_NOWAIT | M_ZERO); 2737 if (req == NULL) { 2738 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2739 goto fail0; 2740 } 2741 buf = (uint8_t *)malloc(2, M_80211_VAP, M_NOWAIT | M_ZERO); 2742 if (req == NULL) { 2743 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2744 goto fail1; 2745 } 2746 2747 req->bmRequestType = UT_WRITE_VENDOR_DEVICE; 2748 req->bRequest = URTW_8187_SETREGS_REQ; 2749 USETW(req->wValue, addr); 2750 USETW(req->wIndex, index); 2751 USETW(req->wLength, sizeof(uint16_t)); 2752 buf[0] = (data16 & 0x00ff); 2753 buf[1] = (data16 & 0xff00) >> 8; 2754 2755 error = urtw_do_request(sc, req, buf); 2756 2757 free(buf, M_80211_VAP); 2758fail1: free(req, M_80211_VAP); 2759fail0: return (error); 2760} 2761 2762static usb_error_t 2763urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2764{ 2765 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 2766 struct ieee80211_channel *c = ic->ic_curchan; 2767 usb_error_t error; 2768 2769 error = urtw_8225_set_txpwrlvl(sc, chan); 2770 if (error) 2771 goto fail; 2772 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2773 usb_pause_mtx(&sc->sc_mtx, 10); 2774 2775 urtw_write8_m(sc, URTW_SIFS, 0x22); 2776 2777 if (sc->sc_state == IEEE80211_S_ASSOC && 2778 ic->ic_flags & IEEE80211_F_SHSLOT) 2779 urtw_write8_m(sc, URTW_SLOT, 0x9); 2780 else 2781 urtw_write8_m(sc, URTW_SLOT, 0x14); 2782 2783 if (IEEE80211_IS_CHAN_G(c)) { 2784 /* for G */ 2785 urtw_write8_m(sc, URTW_DIFS, 0x14); 2786 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 2787 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 2788 } else { 2789 /* for B */ 2790 urtw_write8_m(sc, URTW_DIFS, 0x24); 2791 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 2792 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 2793 } 2794 2795fail: 2796 return (error); 2797} 2798 2799static usb_error_t 2800urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2801{ 2802 usb_error_t error; 2803 2804 if (sens < 0 || sens > 6) 2805 return -1; 2806 2807 if (sens > 4) 2808 urtw_8225_write(sc, 2809 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2810 else 2811 urtw_8225_write(sc, 2812 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2813 2814 sens = 6 - sens; 2815 error = urtw_8225_setgain(sc, sens); 2816 if (error) 2817 goto fail; 2818 2819 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2820 2821fail: 2822 return (error); 2823} 2824 2825static usb_error_t 2826urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2827{ 2828 int i, idx, set; 2829 uint8_t *cck_pwltable; 2830 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2831 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2832 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2833 usb_error_t error; 2834 2835 cck_pwrlvl_max = 11; 2836 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2837 ofdm_pwrlvl_min = 10; 2838 2839 /* CCK power setting */ 2840 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2841 idx = cck_pwrlvl % 6; 2842 set = cck_pwrlvl / 6; 2843 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2844 urtw_8225_txpwr_cck; 2845 2846 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2847 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2848 for (i = 0; i < 8; i++) { 2849 urtw_8187_write_phy_cck(sc, 0x44 + i, 2850 cck_pwltable[idx * 8 + i]); 2851 } 2852 usb_pause_mtx(&sc->sc_mtx, 1); 2853 2854 /* OFDM power setting */ 2855 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2856 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2857 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2858 2859 idx = ofdm_pwrlvl % 6; 2860 set = ofdm_pwrlvl / 6; 2861 2862 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2863 if (error) 2864 goto fail; 2865 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2866 urtw_8187_write_phy_ofdm(sc, 6, 0); 2867 urtw_8187_write_phy_ofdm(sc, 8, 0); 2868 2869 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2870 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2871 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2872 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2873 usb_pause_mtx(&sc->sc_mtx, 1); 2874fail: 2875 return (error); 2876} 2877 2878 2879static usb_error_t 2880urtw_8225_rf_stop(struct urtw_softc *sc) 2881{ 2882 uint8_t data; 2883 usb_error_t error; 2884 2885 urtw_8225_write(sc, 0x4, 0x1f); 2886 2887 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2888 if (error) 2889 goto fail; 2890 2891 urtw_read8_m(sc, URTW_CONFIG3, &data); 2892 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2893 if (sc->sc_flags & URTW_RTL8187B) { 2894 urtw_write32_m(sc, URTW_ANAPARAM2, 2895 URTW_8187B_8225_ANAPARAM2_OFF); 2896 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2897 urtw_write32_m(sc, URTW_ANAPARAM3, 2898 URTW_8187B_8225_ANAPARAM3_OFF); 2899 } else { 2900 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2901 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2902 } 2903 2904 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2905 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2906 if (error) 2907 goto fail; 2908 2909fail: 2910 return (error); 2911} 2912 2913static usb_error_t 2914urtw_8225v2_rf_init(struct urtw_softc *sc) 2915{ 2916#define N(a) (sizeof(a) / sizeof((a)[0])) 2917 int i; 2918 uint16_t data; 2919 uint32_t data32; 2920 usb_error_t error; 2921 2922 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2923 if (error) 2924 goto fail; 2925 2926 error = urtw_8225_usb_init(sc); 2927 if (error) 2928 goto fail; 2929 2930 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2931 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2932 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2933 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2934 2935 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2936 if (error) 2937 goto fail; 2938 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2939 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2940 if (error) 2941 goto fail; 2942 2943 error = urtw_8185_rf_pins_enable(sc); 2944 if (error) 2945 goto fail; 2946 2947 usb_pause_mtx(&sc->sc_mtx, 500); 2948 2949 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2950 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2951 urtw_8225v2_rf_part1[i].val); 2952 } 2953 usb_pause_mtx(&sc->sc_mtx, 50); 2954 2955 urtw_8225_write(sc, 2956 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2957 2958 for (i = 0; i < 95; i++) { 2959 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2960 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2961 urtw_8225v2_rxgain[i]); 2962 } 2963 2964 urtw_8225_write(sc, 2965 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2966 urtw_8225_write(sc, 2967 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2968 urtw_8225_write(sc, 2969 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2970 urtw_8225_write(sc, 2971 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2972 usb_pause_mtx(&sc->sc_mtx, 100); 2973 urtw_8225_write(sc, 2974 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2975 usb_pause_mtx(&sc->sc_mtx, 100); 2976 2977 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2978 if (error != 0) 2979 goto fail; 2980 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2981 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2982 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2983 urtw_8225_write(sc, 2984 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2985 usb_pause_mtx(&sc->sc_mtx, 100); 2986 urtw_8225_write(sc, 2987 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2988 usb_pause_mtx(&sc->sc_mtx, 50); 2989 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2990 if (error != 0) 2991 goto fail; 2992 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2993 device_printf(sc->sc_dev, "RF calibration failed\n"); 2994 } 2995 usb_pause_mtx(&sc->sc_mtx, 100); 2996 2997 urtw_8225_write(sc, 2998 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2999 for (i = 0; i < 128; i++) { 3000 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 3001 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3002 } 3003 3004 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 3005 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 3006 urtw_8225v2_rf_part2[i].val); 3007 } 3008 3009 error = urtw_8225v2_setgain(sc, 4); 3010 if (error) 3011 goto fail; 3012 3013 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 3014 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 3015 urtw_8225v2_rf_part3[i].val); 3016 } 3017 3018 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3019 3020 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3021 if (error) 3022 goto fail; 3023 3024 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3025 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3026 3027 /* TX ant A, 0x0 for B */ 3028 error = urtw_8185_tx_antenna(sc, 0x3); 3029 if (error) 3030 goto fail; 3031 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3032 3033 error = urtw_8225_rf_set_chan(sc, 1); 3034fail: 3035 return (error); 3036#undef N 3037} 3038 3039static usb_error_t 3040urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3041{ 3042 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3043 struct ieee80211_channel *c = ic->ic_curchan; 3044 usb_error_t error; 3045 3046 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3047 if (error) 3048 goto fail; 3049 3050 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3051 usb_pause_mtx(&sc->sc_mtx, 10); 3052 3053 urtw_write8_m(sc, URTW_SIFS, 0x22); 3054 3055 if(sc->sc_state == IEEE80211_S_ASSOC && 3056 ic->ic_flags & IEEE80211_F_SHSLOT) 3057 urtw_write8_m(sc, URTW_SLOT, 0x9); 3058 else 3059 urtw_write8_m(sc, URTW_SLOT, 0x14); 3060 3061 if (IEEE80211_IS_CHAN_G(c)) { 3062 /* for G */ 3063 urtw_write8_m(sc, URTW_DIFS, 0x14); 3064 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 3065 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 3066 } else { 3067 /* for B */ 3068 urtw_write8_m(sc, URTW_DIFS, 0x24); 3069 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 3070 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 3071 } 3072 3073fail: 3074 return (error); 3075} 3076 3077static usb_error_t 3078urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3079{ 3080 int i; 3081 int16_t bit; 3082 uint8_t rlen = 12, wlen = 6; 3083 uint16_t o1, o2, o3, tmp; 3084 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3085 uint32_t mask = 0x80000000, value = 0; 3086 usb_error_t error; 3087 3088 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3089 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3090 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3091 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3092 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3093 o1 &= ~URTW_RF_PINS_MAGIC4; 3094 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3095 DELAY(5); 3096 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3097 DELAY(5); 3098 3099 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3100 bit = ((d2w & mask) != 0) ? 1 : 0; 3101 3102 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3103 DELAY(2); 3104 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3105 URTW_BB_HOST_BANG_CLK); 3106 DELAY(2); 3107 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3108 URTW_BB_HOST_BANG_CLK); 3109 DELAY(2); 3110 mask = mask >> 1; 3111 if (i == 2) 3112 break; 3113 bit = ((d2w & mask) != 0) ? 1 : 0; 3114 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3115 URTW_BB_HOST_BANG_CLK); 3116 DELAY(2); 3117 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3118 URTW_BB_HOST_BANG_CLK); 3119 DELAY(2); 3120 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3121 DELAY(1); 3122 } 3123 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3124 URTW_BB_HOST_BANG_CLK); 3125 DELAY(2); 3126 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3127 DELAY(2); 3128 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3129 DELAY(2); 3130 3131 mask = 0x800; 3132 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3133 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3134 o1 | URTW_BB_HOST_BANG_RW); 3135 DELAY(2); 3136 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3137 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3138 DELAY(2); 3139 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3140 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3141 DELAY(2); 3142 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3143 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3144 DELAY(2); 3145 3146 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3147 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3148 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3149 o1 | URTW_BB_HOST_BANG_RW); 3150 DELAY(2); 3151 } 3152 3153 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3154 URTW_BB_HOST_BANG_RW); 3155 DELAY(2); 3156 3157 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3158 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3159 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3160 3161 if (data != NULL) 3162 *data = value; 3163fail: 3164 return (error); 3165} 3166 3167 3168static usb_error_t 3169urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3170{ 3171 int i; 3172 uint8_t *cck_pwrtable; 3173 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3174 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3175 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3176 usb_error_t error; 3177 3178 /* CCK power setting */ 3179 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3180 cck_pwrlvl += sc->sc_txpwr_cck_base; 3181 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3182 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3183 urtw_8225v2_txpwr_cck; 3184 3185 for (i = 0; i < 8; i++) 3186 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3187 3188 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3189 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3190 usb_pause_mtx(&sc->sc_mtx, 1); 3191 3192 /* OFDM power setting */ 3193 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3194 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3195 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3196 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3197 3198 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3199 if (error) 3200 goto fail; 3201 3202 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3203 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3204 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3205 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3206 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3207 3208 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3209 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3210 usb_pause_mtx(&sc->sc_mtx, 1); 3211fail: 3212 return (error); 3213} 3214 3215static usb_error_t 3216urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3217{ 3218 uint8_t *gainp; 3219 usb_error_t error; 3220 3221 /* XXX for A? */ 3222 gainp = urtw_8225v2_gain_bg; 3223 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3224 usb_pause_mtx(&sc->sc_mtx, 1); 3225 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3226 usb_pause_mtx(&sc->sc_mtx, 1); 3227 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3228 usb_pause_mtx(&sc->sc_mtx, 1); 3229 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3230 usb_pause_mtx(&sc->sc_mtx, 1); 3231fail: 3232 return (error); 3233} 3234 3235static usb_error_t 3236urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3237{ 3238 uint32_t data; 3239 usb_error_t error; 3240 3241 *ret = 1; 3242 3243 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3244 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3245 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3246 usb_pause_mtx(&sc->sc_mtx, 500); 3247 3248 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3249 URTW_8225_ADDR_0_DATA_MAGIC1); 3250 3251 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3252 if (error != 0) 3253 goto fail; 3254 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3255 *ret = 0; 3256 else { 3257 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3258 if (error != 0) 3259 goto fail; 3260 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3261 *ret = 0; 3262 } 3263 3264 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3265 URTW_8225_ADDR_0_DATA_MAGIC2); 3266fail: 3267 return (error); 3268} 3269 3270static usb_error_t 3271urtw_8225v2b_rf_init(struct urtw_softc *sc) 3272{ 3273#define N(a) (sizeof(a) / sizeof((a)[0])) 3274 int i; 3275 usb_error_t error; 3276 3277 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3278 urtw_8225_write(sc, urtw_8225v2b_rf_part1[i].reg, 3279 urtw_8225v2b_rf_part1[i].val); 3280 3281 urtw_8225_write(sc, 3282 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 3283 3284 for (i = 0; i < N(urtw_8225v2b_rxgain); i++) { 3285 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3286 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3287 urtw_8225v2b_rxgain[i]); 3288 } 3289 3290 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3291 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3292 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3293 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3294 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3295 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3296 3297 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3298 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3299 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3300 3301 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3302 for (i = 0; i < N(urtw_8225z2_agc); i++) { 3303 urtw_8187_write_phy_ofdm(sc, 0xf, urtw_8225z2_agc[i]); 3304 urtw_8187_write_phy_ofdm(sc, 0xe, 0x80 + i); 3305 urtw_8187_write_phy_ofdm(sc, 0xe, 0); 3306 } 3307 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3308 3309 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3310 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3311 3312 urtw_write32_m(sc, 0xf0, (7 << 12) | (3 << 8) | 0x1c); 3313 urtw_write32_m(sc, 0xf4, (7 << 12) | (3 << 8) | 0x1c); 3314 urtw_write32_m(sc, 0xf8, (7 << 12) | (3 << 8) | 0x1c); 3315 urtw_write32_m(sc, 0xfc, (7 << 12) | (3 << 8) | 0x1c); 3316 urtw_write8_m(sc, URTW_ACM_CONTROL, 0); 3317 3318 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3319 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3320 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3321 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3322fail: 3323 return (error); 3324#undef N 3325} 3326 3327static usb_error_t 3328urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3329{ 3330 int ack; 3331 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3332 usb_error_t error; 3333 3334 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3335 if (error) 3336 goto fail; 3337 3338 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3339 usb_pause_mtx(&sc->sc_mtx, 10); 3340 3341 urtw_write8_m(sc, URTW_SIFS, 0xa); 3342 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 3343 urtw_write8_m(sc, URTW_SLOT, 0x9); 3344 urtw_write8_m(sc, URTW_DIFS, 0x1c); 3345 /* In 8187B, BRSR + 1 ==> EIFS register */ 3346 urtw_write8_m(sc, URTW_BRSR + 1, 0x53); 3347 3348 ack = 112 + 48 + 0x1c; 3349 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3350 72 : 144; 3351 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3352 roundup2(ack, 4)); 3353 } else { 3354 urtw_write8_m(sc, URTW_SLOT, 0x14); 3355 urtw_write8_m(sc, URTW_DIFS, 0x32); 3356 /* In 8187B, BRSR + 1 ==> EIFS register */ 3357 urtw_write8_m(sc, URTW_BRSR + 1, 0x5b); 3358 3359 ack = 112 + 48 + 0x32; 3360 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3361 72 : 144; 3362 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3363 roundup2(ack, 4)); 3364 3365 } 3366 3367fail: 3368 return (error); 3369} 3370 3371static usb_error_t 3372urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3373{ 3374 int i; 3375 uint8_t *cck_pwrtable; 3376 uint8_t cck_pwrlvl_max = 15; 3377 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3378 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3379 usb_error_t error; 3380 3381 /* CCK power setting */ 3382 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3383 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3384 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3385 cck_pwrlvl += sc->sc_txpwr_cck_base; 3386 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3387 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3388 urtw_8225v2b_txpwr_cck; 3389 3390 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3391 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3392 ((cck_pwrlvl <= 11) ? 8 : 16); 3393 else 3394 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3395 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3396 3397 for (i = 0; i < 8; i++) 3398 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3399 3400 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3401 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3402 usb_pause_mtx(&sc->sc_mtx, 1); 3403 3404 /* OFDM power setting */ 3405 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3406 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3407 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3408 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3409 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3410 3411 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3412 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3413 3414 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3415 if (ofdm_pwrlvl <= 11) { 3416 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3417 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3418 } else { 3419 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3420 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3421 } 3422 } else { 3423 if (ofdm_pwrlvl <= 11) { 3424 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3425 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3426 } else if (ofdm_pwrlvl <= 17) { 3427 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3428 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3429 } else { 3430 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3431 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3432 } 3433 } 3434 usb_pause_mtx(&sc->sc_mtx, 1); 3435fail: 3436 return (error); 3437} 3438 3439static usb_error_t 3440urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3441{ 3442 struct usb_device_request req; 3443 usb_error_t error; 3444 3445 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3446 req.bRequest = URTW_8187_GETREGS_REQ; 3447 USETW(req.wValue, val | 0xfe00); 3448 USETW(req.wIndex, 0); 3449 USETW(req.wLength, sizeof(uint8_t)); 3450 3451 error = urtw_do_request(sc, &req, data); 3452 return (error); 3453} 3454 3455static usb_error_t 3456urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3457{ 3458 struct usb_device_request req; 3459 3460 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3461 req.bRequest = URTW_8187_SETREGS_REQ; 3462 USETW(req.wValue, val | 0xfe00); 3463 USETW(req.wIndex, 0); 3464 USETW(req.wLength, sizeof(uint8_t)); 3465 3466 return (urtw_do_request(sc, &req, &data)); 3467} 3468 3469static usb_error_t 3470urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3471{ 3472 uint8_t data; 3473 usb_error_t error; 3474 3475 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3476 if (error) 3477 goto fail; 3478 3479 urtw_read8_m(sc, URTW_CONFIG3, &data); 3480 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3481 urtw_write32_m(sc, URTW_ANAPARAM, val); 3482 urtw_read8_m(sc, URTW_CONFIG3, &data); 3483 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3484 3485 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3486 if (error) 3487 goto fail; 3488fail: 3489 return (error); 3490} 3491 3492static usb_error_t 3493urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3494{ 3495 uint8_t data; 3496 usb_error_t error; 3497 3498 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3499 if (error) 3500 goto fail; 3501 3502 urtw_read8_m(sc, URTW_CONFIG3, &data); 3503 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3504 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3505 urtw_read8_m(sc, URTW_CONFIG3, &data); 3506 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3507 3508 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3509 if (error) 3510 goto fail; 3511fail: 3512 return (error); 3513} 3514 3515static usb_error_t 3516urtw_intr_enable(struct urtw_softc *sc) 3517{ 3518 usb_error_t error; 3519 3520 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3521fail: 3522 return (error); 3523} 3524 3525static usb_error_t 3526urtw_intr_disable(struct urtw_softc *sc) 3527{ 3528 usb_error_t error; 3529 3530 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3531fail: 3532 return (error); 3533} 3534 3535static usb_error_t 3536urtw_reset(struct urtw_softc *sc) 3537{ 3538 uint8_t data; 3539 usb_error_t error; 3540 3541 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3542 if (error) 3543 goto fail; 3544 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3545 if (error) 3546 goto fail; 3547 3548 error = urtw_intr_disable(sc); 3549 if (error) 3550 goto fail; 3551 usb_pause_mtx(&sc->sc_mtx, 100); 3552 3553 error = urtw_write8e(sc, 0x18, 0x10); 3554 if (error != 0) 3555 goto fail; 3556 error = urtw_write8e(sc, 0x18, 0x11); 3557 if (error != 0) 3558 goto fail; 3559 error = urtw_write8e(sc, 0x18, 0x00); 3560 if (error != 0) 3561 goto fail; 3562 usb_pause_mtx(&sc->sc_mtx, 100); 3563 3564 urtw_read8_m(sc, URTW_CMD, &data); 3565 data = (data & 0x2) | URTW_CMD_RST; 3566 urtw_write8_m(sc, URTW_CMD, data); 3567 usb_pause_mtx(&sc->sc_mtx, 100); 3568 3569 urtw_read8_m(sc, URTW_CMD, &data); 3570 if (data & URTW_CMD_RST) { 3571 device_printf(sc->sc_dev, "reset timeout\n"); 3572 goto fail; 3573 } 3574 3575 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3576 if (error) 3577 goto fail; 3578 usb_pause_mtx(&sc->sc_mtx, 100); 3579 3580 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3581 if (error) 3582 goto fail; 3583 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3584 if (error) 3585 goto fail; 3586fail: 3587 return (error); 3588} 3589 3590static usb_error_t 3591urtw_led_ctl(struct urtw_softc *sc, int mode) 3592{ 3593 usb_error_t error = 0; 3594 3595 switch (sc->sc_strategy) { 3596 case URTW_SW_LED_MODE0: 3597 error = urtw_led_mode0(sc, mode); 3598 break; 3599 case URTW_SW_LED_MODE1: 3600 error = urtw_led_mode1(sc, mode); 3601 break; 3602 case URTW_SW_LED_MODE2: 3603 error = urtw_led_mode2(sc, mode); 3604 break; 3605 case URTW_SW_LED_MODE3: 3606 error = urtw_led_mode3(sc, mode); 3607 break; 3608 default: 3609 panic("unsupported LED mode %d\n", sc->sc_strategy); 3610 /* never reach */ 3611 } 3612 3613 return (error); 3614} 3615 3616static usb_error_t 3617urtw_led_mode0(struct urtw_softc *sc, int mode) 3618{ 3619 3620 switch (mode) { 3621 case URTW_LED_CTL_POWER_ON: 3622 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3623 break; 3624 case URTW_LED_CTL_TX: 3625 if (sc->sc_gpio_ledinprogress == 1) 3626 return (0); 3627 3628 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3629 sc->sc_gpio_blinktime = 2; 3630 break; 3631 case URTW_LED_CTL_LINK: 3632 sc->sc_gpio_ledstate = URTW_LED_ON; 3633 break; 3634 default: 3635 panic("unsupported LED mode 0x%x", mode); 3636 /* never reach */ 3637 } 3638 3639 switch (sc->sc_gpio_ledstate) { 3640 case URTW_LED_ON: 3641 if (sc->sc_gpio_ledinprogress != 0) 3642 break; 3643 urtw_led_on(sc, URTW_LED_GPIO); 3644 break; 3645 case URTW_LED_BLINK_NORMAL: 3646 if (sc->sc_gpio_ledinprogress != 0) 3647 break; 3648 sc->sc_gpio_ledinprogress = 1; 3649 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3650 URTW_LED_OFF : URTW_LED_ON; 3651 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3652 break; 3653 case URTW_LED_POWER_ON_BLINK: 3654 urtw_led_on(sc, URTW_LED_GPIO); 3655 usb_pause_mtx(&sc->sc_mtx, 100); 3656 urtw_led_off(sc, URTW_LED_GPIO); 3657 break; 3658 default: 3659 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3660 /* never reach */ 3661 } 3662 return (0); 3663} 3664 3665static usb_error_t 3666urtw_led_mode1(struct urtw_softc *sc, int mode) 3667{ 3668 3669 return (USB_ERR_INVAL); 3670} 3671 3672static usb_error_t 3673urtw_led_mode2(struct urtw_softc *sc, int mode) 3674{ 3675 3676 return (USB_ERR_INVAL); 3677} 3678 3679static usb_error_t 3680urtw_led_mode3(struct urtw_softc *sc, int mode) 3681{ 3682 3683 return (USB_ERR_INVAL); 3684} 3685 3686static usb_error_t 3687urtw_led_on(struct urtw_softc *sc, int type) 3688{ 3689 usb_error_t error; 3690 3691 if (type == URTW_LED_GPIO) { 3692 switch (sc->sc_gpio_ledpin) { 3693 case URTW_LED_PIN_GPIO0: 3694 urtw_write8_m(sc, URTW_GPIO, 0x01); 3695 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3696 break; 3697 default: 3698 panic("unsupported LED PIN type 0x%x", 3699 sc->sc_gpio_ledpin); 3700 /* never reach */ 3701 } 3702 } else { 3703 panic("unsupported LED type 0x%x", type); 3704 /* never reach */ 3705 } 3706 3707 sc->sc_gpio_ledon = 1; 3708fail: 3709 return (error); 3710} 3711 3712static usb_error_t 3713urtw_led_off(struct urtw_softc *sc, int type) 3714{ 3715 usb_error_t error; 3716 3717 if (type == URTW_LED_GPIO) { 3718 switch (sc->sc_gpio_ledpin) { 3719 case URTW_LED_PIN_GPIO0: 3720 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3721 urtw_write8_m(sc, 3722 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3723 break; 3724 default: 3725 panic("unsupported LED PIN type 0x%x", 3726 sc->sc_gpio_ledpin); 3727 /* never reach */ 3728 } 3729 } else { 3730 panic("unsupported LED type 0x%x", type); 3731 /* never reach */ 3732 } 3733 3734 sc->sc_gpio_ledon = 0; 3735 3736fail: 3737 return (error); 3738} 3739 3740static void 3741urtw_led_ch(void *arg) 3742{ 3743 struct urtw_softc *sc = arg; 3744 struct ifnet *ifp = sc->sc_ifp; 3745 struct ieee80211com *ic = ifp->if_l2com; 3746 3747 ieee80211_runtask(ic, &sc->sc_led_task); 3748} 3749 3750static void 3751urtw_ledtask(void *arg, int pending) 3752{ 3753 struct urtw_softc *sc = arg; 3754 3755 if (sc->sc_strategy != URTW_SW_LED_MODE0) 3756 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 3757 3758 URTW_LOCK(sc); 3759 urtw_led_blink(sc); 3760 URTW_UNLOCK(sc); 3761} 3762 3763static usb_error_t 3764urtw_led_blink(struct urtw_softc *sc) 3765{ 3766 uint8_t ing = 0; 3767 usb_error_t error; 3768 3769 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3770 error = urtw_led_on(sc, URTW_LED_GPIO); 3771 else 3772 error = urtw_led_off(sc, URTW_LED_GPIO); 3773 sc->sc_gpio_blinktime--; 3774 if (sc->sc_gpio_blinktime == 0) 3775 ing = 1; 3776 else { 3777 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3778 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3779 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3780 ing = 1; 3781 } 3782 if (ing == 1) { 3783 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3784 sc->sc_gpio_ledon == 0) 3785 error = urtw_led_on(sc, URTW_LED_GPIO); 3786 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3787 sc->sc_gpio_ledon == 1) 3788 error = urtw_led_off(sc, URTW_LED_GPIO); 3789 3790 sc->sc_gpio_blinktime = 0; 3791 sc->sc_gpio_ledinprogress = 0; 3792 return (0); 3793 } 3794 3795 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3796 URTW_LED_ON : URTW_LED_OFF; 3797 3798 switch (sc->sc_gpio_ledstate) { 3799 case URTW_LED_BLINK_NORMAL: 3800 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3801 break; 3802 default: 3803 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3804 /* never reach */ 3805 } 3806 return (0); 3807} 3808 3809static usb_error_t 3810urtw_rx_enable(struct urtw_softc *sc) 3811{ 3812 uint8_t data; 3813 usb_error_t error; 3814 3815 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3816 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3817 3818 error = urtw_rx_setconf(sc); 3819 if (error != 0) 3820 goto fail; 3821 3822 urtw_read8_m(sc, URTW_CMD, &data); 3823 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3824fail: 3825 return (error); 3826} 3827 3828static usb_error_t 3829urtw_tx_enable(struct urtw_softc *sc) 3830{ 3831 uint8_t data8; 3832 uint32_t data; 3833 usb_error_t error; 3834 3835 if (sc->sc_flags & URTW_RTL8187B) { 3836 urtw_read32_m(sc, URTW_TX_CONF, &data); 3837 data &= ~URTW_TX_LOOPBACK_MASK; 3838 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3839 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3840 data &= ~URTW_TX_SWPLCPLEN; 3841 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3842 (7 << 8) | /* short retry limit */ 3843 (7 << 0) | /* long retry limit */ 3844 (7 << 21); /* MAX TX DMA */ 3845 urtw_write32_m(sc, URTW_TX_CONF, data); 3846 3847 urtw_read8_m(sc, URTW_CMD, &data8); 3848 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3849 return (error); 3850 } 3851 3852 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3853 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3854 urtw_write8_m(sc, URTW_CW_CONF, data8); 3855 3856 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3857 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3858 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3859 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3860 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3861 3862 urtw_read32_m(sc, URTW_TX_CONF, &data); 3863 data &= ~URTW_TX_LOOPBACK_MASK; 3864 data |= URTW_TX_LOOPBACK_NONE; 3865 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3866 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3867 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3868 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3869 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3870 data &= ~URTW_TX_SWPLCPLEN; 3871 data |= URTW_TX_NOICV; 3872 urtw_write32_m(sc, URTW_TX_CONF, data); 3873 3874 urtw_read8_m(sc, URTW_CMD, &data8); 3875 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3876fail: 3877 return (error); 3878} 3879 3880static usb_error_t 3881urtw_rx_setconf(struct urtw_softc *sc) 3882{ 3883 struct ifnet *ifp = sc->sc_ifp; 3884 struct ieee80211com *ic = ifp->if_l2com; 3885 uint32_t data; 3886 usb_error_t error; 3887 3888 urtw_read32_m(sc, URTW_RX, &data); 3889 data = data &~ URTW_RX_FILTER_MASK; 3890 if (sc->sc_flags & URTW_RTL8187B) { 3891 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3892 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3893 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3894 URTW_RX_FIFO_THRESHOLD_NONE | 3895 URTW_MAX_RX_DMA_2048 | 3896 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3897 } else { 3898 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3899 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3900 3901 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3902 data = data | URTW_RX_FILTER_ICVERR; 3903 data = data | URTW_RX_FILTER_PWR; 3904 } 3905 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3906 data = data | URTW_RX_FILTER_CRCERR; 3907 3908 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3909 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3910 data = data | URTW_RX_FILTER_ALLMAC; 3911 } else { 3912 data = data | URTW_RX_FILTER_NICMAC; 3913 data = data | URTW_RX_CHECK_BSSID; 3914 } 3915 3916 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3917 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3918 URTW_RX_AUTORESETPHY; 3919 data = data &~ URTW_MAX_RX_DMA_MASK; 3920 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3921 } 3922 3923 urtw_write32_m(sc, URTW_RX, data); 3924fail: 3925 return (error); 3926} 3927 3928static struct mbuf * 3929urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3930 int8_t *nf_p) 3931{ 3932 int actlen, flen, len, nf = -95, rssi; 3933 struct ieee80211_frame *wh; 3934 struct mbuf *m, *mnew; 3935 struct urtw_8187b_rxhdr *bhdr; 3936 struct urtw_softc *sc = data->sc; 3937 struct ifnet *ifp = sc->sc_ifp; 3938 struct ieee80211com *ic = ifp->if_l2com; 3939 uint8_t *desc, quality = 0, rate; 3940 3941 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3942 3943 if (actlen < URTW_MIN_RXBUFSZ) { 3944 ifp->if_ierrors++; 3945 return (NULL); 3946 } 3947 3948 if (sc->sc_flags & URTW_RTL8187B) { 3949 len = actlen - (sizeof(struct urtw_8187b_rxhdr)); 3950 bhdr = (struct urtw_8187b_rxhdr *)(data->buf + len); 3951 desc = data->buf + len; 3952 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3953 if (flen > actlen) { 3954 ifp->if_ierrors++; 3955 return (NULL); 3956 } 3957 rate = (le32toh(bhdr->flags) >> 20) & 0xf; 3958 rssi = 14 + (bhdr->rssi / 2); 3959 if (rssi > 95) 3960 rssi = 95; 3961 } else { 3962 /* 4 dword and 4 byte CRC */ 3963 len = actlen - (4 * 4); 3964 desc = data->buf + len; 3965 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3966 if (flen > actlen) { 3967 ifp->if_ierrors++; 3968 return (NULL); 3969 } 3970 3971 rate = (desc[2] & 0xf0) >> 4; 3972 quality = desc[4] & 0xff; 3973 /* XXX correct? */ 3974 rssi = (desc[6] & 0xfe) >> 1; 3975 if (!urtw_isbmode(rate)) { 3976 rssi = (rssi > 90) ? 90 : ((rssi < 25) ? 25 : rssi); 3977 rssi = ((90 - rssi) * 100) / 65; 3978 } else { 3979 rssi = (rssi > 90) ? 95 : ((rssi < 30) ? 30 : rssi); 3980 rssi = ((95 - rssi) * 100) / 65; 3981 } 3982 } 3983 3984 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 3985 if (mnew == NULL) { 3986 ifp->if_ierrors++; 3987 return (NULL); 3988 } 3989 3990 m = data->m; 3991 data->m = mnew; 3992 data->buf = mtod(mnew, uint8_t *); 3993 3994 /* finalize mbuf */ 3995 m->m_pkthdr.rcvif = ifp; 3996 m->m_pkthdr.len = m->m_len = flen - 4; 3997 3998 if (ieee80211_radiotap_active(ic)) { 3999 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4000 4001 /* XXX Are variables correct? */ 4002 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4003 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4004 tap->wr_dbm_antsignal = (int8_t)rssi; 4005 } 4006 4007 wh = mtod(m, struct ieee80211_frame *); 4008 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4009 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4010 /* XXX correct? */ 4011 if ((sc->sc_flags & URTW_RTL8187B) == 0) 4012 nf = (quality > 64) ? 0 : ((64 - quality) * 100) / 64; 4013 4014 *rssi_p = rssi; 4015 *nf_p = nf; 4016 4017 return (m); 4018} 4019 4020static void 4021urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4022{ 4023 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4024 struct ifnet *ifp = sc->sc_ifp; 4025 struct ieee80211com *ic = ifp->if_l2com; 4026 struct ieee80211_frame *wh; 4027 struct ieee80211_node *ni; 4028 struct mbuf *m = NULL; 4029 struct urtw_data *data; 4030 int8_t nf = -95; 4031 int rssi = 1; 4032 4033 URTW_ASSERT_LOCKED(sc); 4034 4035 switch (USB_GET_STATE(xfer)) { 4036 case USB_ST_TRANSFERRED: 4037 data = STAILQ_FIRST(&sc->sc_rx_active); 4038 if (data == NULL) 4039 goto setup; 4040 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4041 m = urtw_rxeof(xfer, data, &rssi, &nf); 4042 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4043 /* FALLTHROUGH */ 4044 case USB_ST_SETUP: 4045setup: 4046 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4047 if (data == NULL) { 4048 KASSERT(m == NULL, ("mbuf isn't NULL")); 4049 return; 4050 } 4051 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4052 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4053 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4054 usbd_xfer_max_len(xfer)); 4055 usbd_transfer_submit(xfer); 4056 4057 /* 4058 * To avoid LOR we should unlock our private mutex here to call 4059 * ieee80211_input() because here is at the end of a USB 4060 * callback and safe to unlock. 4061 */ 4062 URTW_UNLOCK(sc); 4063 if (m != NULL) { 4064 wh = mtod(m, struct ieee80211_frame *); 4065 ni = ieee80211_find_rxnode(ic, 4066 (struct ieee80211_frame_min *)wh); 4067 if (ni != NULL) { 4068 (void) ieee80211_input(ni, m, rssi, nf); 4069 /* node is no longer needed */ 4070 ieee80211_free_node(ni); 4071 } else 4072 (void) ieee80211_input_all(ic, m, rssi, nf); 4073 m = NULL; 4074 } 4075 URTW_LOCK(sc); 4076 break; 4077 default: 4078 /* needs it to the inactive queue due to a error. */ 4079 data = STAILQ_FIRST(&sc->sc_rx_active); 4080 if (data != NULL) { 4081 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4082 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4083 } 4084 if (error != USB_ERR_CANCELLED) { 4085 usbd_xfer_set_stall(xfer); 4086 ifp->if_ierrors++; 4087 goto setup; 4088 } 4089 break; 4090 } 4091} 4092 4093static void 4094urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4095{ 4096 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4097 struct ifnet *ifp = sc->sc_ifp; 4098 struct mbuf *m; 4099 4100 URTW_ASSERT_LOCKED(sc); 4101 4102 /* 4103 * Do any tx complete callback. Note this must be done before releasing 4104 * the node reference. 4105 */ 4106 if (data->m) { 4107 m = data->m; 4108 if (m->m_flags & M_TXCB) { 4109 /* XXX status? */ 4110 ieee80211_process_callback(data->ni, m, 0); 4111 } 4112 m_freem(m); 4113 data->m = NULL; 4114 } 4115 if (data->ni) { 4116 ieee80211_free_node(data->ni); 4117 data->ni = NULL; 4118 } 4119 sc->sc_txtimer = 0; 4120 ifp->if_opackets++; 4121 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4122} 4123 4124static void 4125urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4126{ 4127 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4128 struct ifnet *ifp = sc->sc_ifp; 4129 struct urtw_data *data; 4130 4131 URTW_ASSERT_LOCKED(sc); 4132 4133 switch (USB_GET_STATE(xfer)) { 4134 case USB_ST_TRANSFERRED: 4135 data = STAILQ_FIRST(&sc->sc_tx_active); 4136 if (data == NULL) 4137 goto setup; 4138 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4139 urtw_txeof(xfer, data); 4140 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4141 /* FALLTHROUGH */ 4142 case USB_ST_SETUP: 4143setup: 4144 data = STAILQ_FIRST(&sc->sc_tx_pending); 4145 if (data == NULL) { 4146 DPRINTF(sc, URTW_DEBUG_XMIT, 4147 "%s: empty pending queue\n", __func__); 4148 return; 4149 } 4150 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4151 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4152 4153 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4154 usbd_transfer_submit(xfer); 4155 4156 URTW_UNLOCK(sc); 4157 urtw_start(ifp); 4158 URTW_LOCK(sc); 4159 break; 4160 default: 4161 data = STAILQ_FIRST(&sc->sc_tx_active); 4162 if (data == NULL) 4163 goto setup; 4164 if (data->ni != NULL) { 4165 ieee80211_free_node(data->ni); 4166 data->ni = NULL; 4167 ifp->if_oerrors++; 4168 } 4169 if (error != USB_ERR_CANCELLED) { 4170 usbd_xfer_set_stall(xfer); 4171 goto setup; 4172 } 4173 break; 4174 } 4175} 4176 4177static struct urtw_data * 4178_urtw_getbuf(struct urtw_softc *sc) 4179{ 4180 struct urtw_data *bf; 4181 4182 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4183 if (bf != NULL) 4184 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4185 else 4186 bf = NULL; 4187 if (bf == NULL) 4188 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4189 "out of xmit buffers"); 4190 return (bf); 4191} 4192 4193static struct urtw_data * 4194urtw_getbuf(struct urtw_softc *sc) 4195{ 4196 struct urtw_data *bf; 4197 4198 URTW_ASSERT_LOCKED(sc); 4199 4200 bf = _urtw_getbuf(sc); 4201 if (bf == NULL) { 4202 struct ifnet *ifp = sc->sc_ifp; 4203 4204 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4205 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4206 } 4207 return (bf); 4208} 4209 4210static int 4211urtw_isbmode(uint16_t rate) 4212{ 4213 4214 rate = urtw_rtl2rate(rate); 4215 4216 return ((rate <= 22 && rate != 12 && rate != 18) || 4217 rate == 44) ? (1) : (0); 4218} 4219 4220static device_method_t urtw_methods[] = { 4221 DEVMETHOD(device_probe, urtw_match), 4222 DEVMETHOD(device_attach, urtw_attach), 4223 DEVMETHOD(device_detach, urtw_detach), 4224 { 0, 0 } 4225}; 4226static driver_t urtw_driver = { 4227 "urtw", 4228 urtw_methods, 4229 sizeof(struct urtw_softc) 4230}; 4231static devclass_t urtw_devclass; 4232 4233DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4234MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4235MODULE_DEPEND(urtw, usb, 1, 1, 1); 4236