if_urtw.c revision 195049
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 195049 2009-06-26 11:45:06Z rwatson $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_arp.h> 40#include <net/ethernet.h> 41#include <net/if_dl.h> 42#include <net/if_media.h> 43#include <net/if_types.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/in_systm.h> 48#include <netinet/in_var.h> 49#include <netinet/if_ether.h> 50#include <netinet/ip.h> 51#endif 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_regdomain.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 64SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 65#ifdef URTW_DEBUG 66int urtw_debug = 0; 67SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW, &urtw_debug, 0, 68 "control debugging printfs"); 69TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 70enum { 71 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 72 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 73 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 74 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 75 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 76 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 77 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 78 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 79 URTW_DEBUG_ANY = 0xffffffff 80}; 81#define DPRINTF(sc, m, fmt, ...) do { \ 82 if (sc->sc_debug & (m)) \ 83 printf(fmt, __VA_ARGS__); \ 84} while (0) 85#else 86#define DPRINTF(sc, m, fmt, ...) do { \ 87 (void) sc; \ 88} while (0) 89#endif 90static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 91SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW, 92 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 93TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode); 94 95/* recognized device vendors/products */ 96#define urtw_lookup(v, p) \ 97 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 98#define URTW_DEV_B(v,p) \ 99 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 100#define URTW_DEV_L(v,p) \ 101 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 102#define URTW_REV_RTL8187B 0 103#define URTW_REV_RTL8187L 1 104static const struct usb_device_id urtw_devs[] = { 105 { USB_VPI(USB_VENDOR_BELKIN, 0x705e, URTW_REV_RTL8187B) }, 106 { USB_VPI(USB_VENDOR_REALTEK, 0x8189, URTW_REV_RTL8187B) }, 107 { USB_VPI(USB_VENDOR_REALTEK, 0x8197, URTW_REV_RTL8187B) }, 108 { USB_VPI(USB_VENDOR_REALTEK, 0x8198, URTW_REV_RTL8187B) }, 109 { USB_VPI(USB_VENDOR_NETGEAR, 0x4260, URTW_REV_RTL8187B) }, 110 { USB_VPI(0x1b75, 0x8187, URTW_REV_RTL8187L) }, 111 { USB_VPI(USB_VENDOR_ASUS, 0x171d, URTW_REV_RTL8187L) }, 112 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 113 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 114 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 115 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 116 URTW_DEV_L(NETGEAR, WG111V2), 117 URTW_DEV_L(REALTEK, RTL8187), 118 { USB_VPI(USB_VENDOR_SITECOMEU, 0x000d, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_SURECOM, 0x11f2, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 122#undef URTW_DEV_L 123#undef URTW_DEV_B 124}; 125 126#define urtw_read8_m(sc, val, data) do { \ 127 error = urtw_read8_c(sc, val, data); \ 128 if (error != 0) \ 129 goto fail; \ 130} while (0) 131#define urtw_write8_m(sc, val, data) do { \ 132 error = urtw_write8_c(sc, val, data); \ 133 if (error != 0) \ 134 goto fail; \ 135} while (0) 136#define urtw_read16_m(sc, val, data) do { \ 137 error = urtw_read16_c(sc, val, data); \ 138 if (error != 0) \ 139 goto fail; \ 140} while (0) 141#define urtw_write16_m(sc, val, data) do { \ 142 error = urtw_write16_c(sc, val, data); \ 143 if (error != 0) \ 144 goto fail; \ 145} while (0) 146#define urtw_read32_m(sc, val, data) do { \ 147 error = urtw_read32_c(sc, val, data); \ 148 if (error != 0) \ 149 goto fail; \ 150} while (0) 151#define urtw_write32_m(sc, val, data) do { \ 152 error = urtw_write32_c(sc, val, data); \ 153 if (error != 0) \ 154 goto fail; \ 155} while (0) 156#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 157 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 158 if (error != 0) \ 159 goto fail; \ 160} while (0) 161#define urtw_8187_write_phy_cck(sc, val, data) do { \ 162 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 163 if (error != 0) \ 164 goto fail; \ 165} while (0) 166#define urtw_8225_write(sc, val, data) do { \ 167 error = urtw_8225_write_c(sc, val, data); \ 168 if (error != 0) \ 169 goto fail; \ 170} while (0) 171 172struct urtw_pair { 173 uint32_t reg; 174 uint32_t val; 175}; 176 177static uint8_t urtw_8225_agc[] = { 178 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 179 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 180 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 181 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 182 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 183 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 184 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 185 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 186 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 187 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 188 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 189 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 190}; 191 192static uint8_t urtw_8225z2_agc[] = { 193 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 194 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 195 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 196 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 197 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 198 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 199 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 200 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 201 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 202 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 203 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 204 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 205}; 206 207static uint32_t urtw_8225_channel[] = { 208 0x0000, /* dummy channel 0 */ 209 0x085c, /* 1 */ 210 0x08dc, /* 2 */ 211 0x095c, /* 3 */ 212 0x09dc, /* 4 */ 213 0x0a5c, /* 5 */ 214 0x0adc, /* 6 */ 215 0x0b5c, /* 7 */ 216 0x0bdc, /* 8 */ 217 0x0c5c, /* 9 */ 218 0x0cdc, /* 10 */ 219 0x0d5c, /* 11 */ 220 0x0ddc, /* 12 */ 221 0x0e5c, /* 13 */ 222 0x0f72, /* 14 */ 223}; 224 225static uint8_t urtw_8225_gain[] = { 226 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 227 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 228 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 229 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 230 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 231 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 232 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 233}; 234 235static struct urtw_pair urtw_8225_rf_part1[] = { 236 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 237 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 238 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 239 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 240}; 241 242static struct urtw_pair urtw_8225_rf_part2[] = { 243 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 244 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 245 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 246 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 247 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 248 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 249 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 250 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 251 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 252 { 0x27, 0x88 } 253}; 254 255static struct urtw_pair urtw_8225_rf_part3[] = { 256 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 257 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 258 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 259 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 260 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 261 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 262 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 263}; 264 265static uint16_t urtw_8225_rxgain[] = { 266 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 267 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 268 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 269 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 270 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 271 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 272 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 273 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 274 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 275 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 276 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 277 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 278}; 279 280static uint8_t urtw_8225_threshold[] = { 281 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 282}; 283 284static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 285 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 286}; 287 288static uint8_t urtw_8225_txpwr_cck[] = { 289 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 290 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 291 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 292 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 293 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 294 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 295}; 296 297static uint8_t urtw_8225_txpwr_cck_ch14[] = { 298 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 299 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 300 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 301 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 302 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 303 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 304}; 305 306static uint8_t urtw_8225_txpwr_ofdm[]={ 307 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 308}; 309 310static uint8_t urtw_8225v2_gain_bg[]={ 311 0x23, 0x15, 0xa5, /* -82-1dbm */ 312 0x23, 0x15, 0xb5, /* -82-2dbm */ 313 0x23, 0x15, 0xc5, /* -82-3dbm */ 314 0x33, 0x15, 0xc5, /* -78dbm */ 315 0x43, 0x15, 0xc5, /* -74dbm */ 316 0x53, 0x15, 0xc5, /* -70dbm */ 317 0x63, 0x15, 0xc5, /* -66dbm */ 318}; 319 320static struct urtw_pair urtw_8225v2_rf_part1[] = { 321 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 322 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 323 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 324 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 325}; 326 327static struct urtw_pair urtw_8225v2b_rf_part1[] = { 328 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 329 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 330 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 331 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 332}; 333 334static struct urtw_pair urtw_8225v2_rf_part2[] = { 335 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 336 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 337 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 338 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 339 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 340 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 341 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 342 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 343 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 344 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 345}; 346 347static struct urtw_pair urtw_8225v2b_rf_part2[] = { 348 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 349 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 350 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 351 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 352 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 353 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 354 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 355 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 356 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 357 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 358 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 359 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 360 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 361 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 362 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 363}; 364 365static struct urtw_pair urtw_8225v2_rf_part3[] = { 366 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 367 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 368 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 369 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 370 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 371 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 372 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 373 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 374}; 375 376static uint16_t urtw_8225v2_rxgain[] = { 377 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 378 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 379 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 380 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 381 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 382 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 383 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 384 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 385 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 386 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 387 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 388 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 389}; 390 391static uint16_t urtw_8225v2b_rxgain[] = { 392 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 393 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 394 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 395 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 396 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 397 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 398 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 399 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 400 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 401 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 402 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 403 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 404}; 405 406static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 407 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 408 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 409 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 410 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 411 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 412 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 413}; 414 415static uint8_t urtw_8225v2_txpwr_cck[] = { 416 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 417}; 418 419static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 420 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 421}; 422 423static uint8_t urtw_8225v2b_txpwr_cck[] = { 424 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 425 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 426 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 427 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 428}; 429 430static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 431 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 432 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 433 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 434 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 435}; 436 437static struct urtw_pair urtw_ratetable[] = { 438 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 439 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 440 { 96, 10 }, { 108, 11 } 441}; 442 443static const uint8_t urtw_8187b_reg_table[][3] = { 444 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 445 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 446 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 447 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 448 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 449 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 450 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 451 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 452 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 453 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 454 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 455 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 456 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 457 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 458 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 459 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 460 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 461 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 462 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 463 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 464 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 465 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 466 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 467 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 468 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 469 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 470 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 471 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 472 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 473 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 474 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 475}; 476 477static usb_callback_t urtw_bulk_rx_callback; 478static usb_callback_t urtw_bulk_tx_callback; 479 480static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 481 [URTW_8187B_BULK_RX] = { 482 .type = UE_BULK, 483 .endpoint = 0x83, 484 .direction = UE_DIR_IN, 485 .bufsize = MCLBYTES, 486 .flags = { 487 .ext_buffer = 1, 488 .pipe_bof = 1, 489 .short_xfer_ok = 1 490 }, 491 .callback = urtw_bulk_rx_callback 492 }, 493 [URTW_8187B_BULK_TX_BE] = { 494 .type = UE_BULK, 495 .endpoint = URTW_8187B_TXPIPE_BE, 496 .direction = UE_DIR_OUT, 497 .bufsize = URTW_TX_MAXSIZE, 498 .flags = { 499 .ext_buffer = 1, 500 .force_short_xfer = 1, 501 .pipe_bof = 1, 502 }, 503 .callback = urtw_bulk_tx_callback, 504 .timeout = URTW_DATA_TIMEOUT 505 }, 506 [URTW_8187B_BULK_TX_BK] = { 507 .type = UE_BULK, 508 .endpoint = URTW_8187B_TXPIPE_BK, 509 .direction = UE_DIR_OUT, 510 .bufsize = URTW_TX_MAXSIZE, 511 .flags = { 512 .ext_buffer = 1, 513 .force_short_xfer = 1, 514 .pipe_bof = 1, 515 }, 516 .callback = urtw_bulk_tx_callback, 517 .timeout = URTW_DATA_TIMEOUT 518 }, 519 [URTW_8187B_BULK_TX_VI] = { 520 .type = UE_BULK, 521 .endpoint = URTW_8187B_TXPIPE_VI, 522 .direction = UE_DIR_OUT, 523 .bufsize = URTW_TX_MAXSIZE, 524 .flags = { 525 .ext_buffer = 1, 526 .force_short_xfer = 1, 527 .pipe_bof = 1, 528 }, 529 .callback = urtw_bulk_tx_callback, 530 .timeout = URTW_DATA_TIMEOUT 531 }, 532 [URTW_8187B_BULK_TX_VO] = { 533 .type = UE_BULK, 534 .endpoint = URTW_8187B_TXPIPE_VO, 535 .direction = UE_DIR_OUT, 536 .bufsize = URTW_TX_MAXSIZE, 537 .flags = { 538 .ext_buffer = 1, 539 .force_short_xfer = 1, 540 .pipe_bof = 1, 541 }, 542 .callback = urtw_bulk_tx_callback, 543 .timeout = URTW_DATA_TIMEOUT 544 }, 545 [URTW_8187B_BULK_TX_EP12] = { 546 .type = UE_BULK, 547 .endpoint = 0xc, 548 .direction = UE_DIR_OUT, 549 .bufsize = URTW_TX_MAXSIZE, 550 .flags = { 551 .ext_buffer = 1, 552 .force_short_xfer = 1, 553 .pipe_bof = 1, 554 }, 555 .callback = urtw_bulk_tx_callback, 556 .timeout = URTW_DATA_TIMEOUT 557 } 558}; 559 560static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 561 [URTW_8187L_BULK_RX] = { 562 .type = UE_BULK, 563 .endpoint = 0x81, 564 .direction = UE_DIR_IN, 565 .bufsize = MCLBYTES, 566 .flags = { 567 .ext_buffer = 1, 568 .pipe_bof = 1, 569 .short_xfer_ok = 1 570 }, 571 .callback = urtw_bulk_rx_callback 572 }, 573 [URTW_8187L_BULK_TX_LOW] = { 574 .type = UE_BULK, 575 .endpoint = 0x2, 576 .direction = UE_DIR_OUT, 577 .bufsize = URTW_TX_MAXSIZE, 578 .flags = { 579 .ext_buffer = 1, 580 .force_short_xfer = 1, 581 .pipe_bof = 1, 582 }, 583 .callback = urtw_bulk_tx_callback, 584 .timeout = URTW_DATA_TIMEOUT 585 }, 586 [URTW_8187L_BULK_TX_NORMAL] = { 587 .type = UE_BULK, 588 .endpoint = 0x3, 589 .direction = UE_DIR_OUT, 590 .bufsize = URTW_TX_MAXSIZE, 591 .flags = { 592 .ext_buffer = 1, 593 .force_short_xfer = 1, 594 .pipe_bof = 1, 595 }, 596 .callback = urtw_bulk_tx_callback, 597 .timeout = URTW_DATA_TIMEOUT 598 }, 599}; 600 601static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 602 const char name[IFNAMSIZ], int unit, int opmode, 603 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 604 const uint8_t mac[IEEE80211_ADDR_LEN]); 605static void urtw_vap_delete(struct ieee80211vap *); 606static void urtw_init(void *); 607static void urtw_stop(struct ifnet *, int); 608static void urtw_stop_locked(struct ifnet *, int); 609static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 610static void urtw_start(struct ifnet *); 611static int urtw_alloc_rx_data_list(struct urtw_softc *); 612static int urtw_alloc_tx_data_list(struct urtw_softc *); 613static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 614 const struct ieee80211_bpf_params *); 615static void urtw_scan_start(struct ieee80211com *); 616static void urtw_scan_end(struct ieee80211com *); 617static void urtw_set_channel(struct ieee80211com *); 618static void urtw_update_mcast(struct ifnet *); 619static int urtw_tx_start(struct urtw_softc *, 620 struct ieee80211_node *, struct mbuf *, 621 struct urtw_data *, int); 622static int urtw_newstate(struct ieee80211vap *, 623 enum ieee80211_state, int); 624static void urtw_led_ch(void *); 625static void urtw_ledtask(void *, int); 626static void urtw_watchdog(void *); 627static void urtw_set_multi(void *); 628static int urtw_isbmode(uint16_t); 629static uint16_t urtw_rate2rtl(int); 630static uint16_t urtw_rtl2rate(int); 631static usb_error_t urtw_set_rate(struct urtw_softc *); 632static usb_error_t urtw_update_msr(struct urtw_softc *); 633static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 634static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 635static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 636static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 637static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 638static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 639static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 640static usb_error_t urtw_eprom_ck(struct urtw_softc *); 641static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 642 int); 643static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 644 uint32_t *); 645static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 646static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 647static usb_error_t urtw_get_macaddr(struct urtw_softc *); 648static usb_error_t urtw_get_txpwr(struct urtw_softc *); 649static usb_error_t urtw_get_rfchip(struct urtw_softc *); 650static usb_error_t urtw_led_init(struct urtw_softc *); 651static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 652static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 653static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 654 uint32_t); 655static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 656 uint8_t, uint32_t); 657static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 658 uint32_t); 659static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 660static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 661static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 662 uint16_t); 663static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 664 uint16_t *); 665static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 666 uint32_t *); 667static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 668static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 669static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 670static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 671static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 672static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 673static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 674static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 675static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 676static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 677static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 678static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 679static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 680static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 681static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 682static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 683static usb_error_t urtw_intr_enable(struct urtw_softc *); 684static usb_error_t urtw_intr_disable(struct urtw_softc *); 685static usb_error_t urtw_reset(struct urtw_softc *); 686static usb_error_t urtw_led_on(struct urtw_softc *, int); 687static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 688static usb_error_t urtw_led_blink(struct urtw_softc *); 689static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 690static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 691static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 692static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 693static usb_error_t urtw_rx_setconf(struct urtw_softc *); 694static usb_error_t urtw_rx_enable(struct urtw_softc *); 695static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 696static void urtw_free_tx_data_list(struct urtw_softc *); 697static void urtw_free_rx_data_list(struct urtw_softc *); 698static void urtw_free_data_list(struct urtw_softc *, 699 struct urtw_data data[], int, int); 700static usb_error_t urtw_adapter_start(struct urtw_softc *); 701static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 702static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 703static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 704static usb_error_t urtw_write16_i(struct urtw_softc *, int, uint16_t, int); 705static usb_error_t urtw_write8_i(struct urtw_softc *, int, uint8_t, int); 706static usb_error_t urtw_write32_i(struct urtw_softc *, int, uint32_t, int); 707static usb_error_t urtw_do_request(struct urtw_softc *, 708 struct usb_device_request *, void *); 709static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 710static usb_error_t urtw_led_off(struct urtw_softc *, int); 711static void urtw_abort_xfers(struct urtw_softc *); 712static struct urtw_data * 713 urtw_getbuf(struct urtw_softc *sc); 714 715static int 716urtw_match(device_t dev) 717{ 718 struct usb_attach_arg *uaa = device_get_ivars(dev); 719 720 if (uaa->usb_mode != USB_MODE_HOST) 721 return (ENXIO); 722 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 723 return (ENXIO); 724 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 725 return (ENXIO); 726 727 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 728} 729 730static int 731urtw_attach(device_t dev) 732{ 733 const struct usb_config *setup_start; 734 int ret = ENXIO; 735 struct urtw_softc *sc = device_get_softc(dev); 736 struct usb_attach_arg *uaa = device_get_ivars(dev); 737 struct ieee80211com *ic; 738 struct ifnet *ifp; 739 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 740 uint16_t n_setup; 741 uint32_t data; 742 usb_error_t error; 743 744 device_set_usb_desc(dev); 745 746 sc->sc_dev = dev; 747 sc->sc_udev = uaa->device; 748 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 749 sc->sc_flags |= URTW_RTL8187B; 750#ifdef URTW_DEBUG 751 sc->sc_debug = urtw_debug; 752#endif 753 754 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 755 MTX_DEF); 756 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 757 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 758 callout_init(&sc->sc_watchdog_ch, 0); 759 760 if (sc->sc_flags & URTW_RTL8187B) { 761 setup_start = urtw_8187b_usbconfig; 762 n_setup = URTW_8187B_N_XFERS; 763 } else { 764 setup_start = urtw_8187l_usbconfig; 765 n_setup = URTW_8187L_N_XFERS; 766 } 767 768 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 769 setup_start, n_setup, sc, &sc->sc_mtx); 770 if (error) { 771 device_printf(dev, "could not allocate USB transfers, " 772 "err=%s\n", usbd_errstr(error)); 773 ret = ENXIO; 774 goto fail0; 775 } 776 777 URTW_LOCK(sc); 778 779 urtw_read32_m(sc, URTW_RX, &data); 780 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 781 URTW_EEPROM_93C46; 782 783 error = urtw_get_rfchip(sc); 784 if (error != 0) 785 goto fail; 786 error = urtw_get_macaddr(sc); 787 if (error != 0) 788 goto fail; 789 error = urtw_get_txpwr(sc); 790 if (error != 0) 791 goto fail; 792 error = urtw_led_init(sc); 793 if (error != 0) 794 goto fail; 795 796 URTW_UNLOCK(sc); 797 798 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 799 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 800 sc->sc_currate = 3; 801 sc->sc_preamble_mode = urtw_preamble_mode; 802 803 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 804 if (ifp == NULL) { 805 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 806 ret = ENOMEM; 807 goto fail1; 808 } 809 810 ifp->if_softc = sc; 811 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 812 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 813 ifp->if_init = urtw_init; 814 ifp->if_ioctl = urtw_ioctl; 815 ifp->if_start = urtw_start; 816 /* XXX URTW_TX_DATA_LIST_COUNT */ 817 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 818 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 819 IFQ_SET_READY(&ifp->if_snd); 820 821 ic = ifp->if_l2com; 822 ic->ic_ifp = ifp; 823 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 824 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 825 826 /* set device capabilities */ 827 ic->ic_caps = 828 IEEE80211_C_STA | /* station mode */ 829 IEEE80211_C_MONITOR | /* monitor mode supported */ 830 IEEE80211_C_TXPMGT | /* tx power management */ 831 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 832 IEEE80211_C_SHSLOT | /* short slot time supported */ 833 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 834 IEEE80211_C_WPA; /* 802.11i */ 835 836 bands = 0; 837 setbit(&bands, IEEE80211_MODE_11B); 838 setbit(&bands, IEEE80211_MODE_11G); 839 ieee80211_init_channels(ic, NULL, &bands); 840 841 ieee80211_ifattach(ic, sc->sc_bssid); 842 ic->ic_raw_xmit = urtw_raw_xmit; 843 ic->ic_scan_start = urtw_scan_start; 844 ic->ic_scan_end = urtw_scan_end; 845 ic->ic_set_channel = urtw_set_channel; 846 847 ic->ic_vap_create = urtw_vap_create; 848 ic->ic_vap_delete = urtw_vap_delete; 849 ic->ic_update_mcast = urtw_update_mcast; 850 851 ieee80211_radiotap_attach(ic, 852 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 853 URTW_TX_RADIOTAP_PRESENT, 854 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 855 URTW_RX_RADIOTAP_PRESENT); 856 857 if (bootverbose) 858 ieee80211_announce(ic); 859 return (0); 860 861fail: URTW_UNLOCK(sc); 862fail1: usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 863 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 864fail0: 865 return (ret); 866} 867 868static int 869urtw_detach(device_t dev) 870{ 871 struct urtw_softc *sc = device_get_softc(dev); 872 struct ifnet *ifp = sc->sc_ifp; 873 struct ieee80211com *ic = ifp->if_l2com; 874 875 if (!device_is_attached(dev)) 876 return (0); 877 878 urtw_stop(ifp, 1); 879 ieee80211_draintask(ic, &sc->sc_led_task); 880 881 usb_callout_drain(&sc->sc_led_ch); 882 callout_drain(&sc->sc_watchdog_ch); 883 884 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 885 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 886 ieee80211_ifdetach(ic); 887 888 urtw_free_tx_data_list(sc); 889 urtw_free_rx_data_list(sc); 890 891 if_free(ifp); 892 mtx_destroy(&sc->sc_mtx); 893 894 return (0); 895} 896 897static void 898urtw_free_tx_data_list(struct urtw_softc *sc) 899{ 900 901 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 902} 903 904static void 905urtw_free_rx_data_list(struct urtw_softc *sc) 906{ 907 908 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 909} 910 911static void 912urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 913 int fillmbuf) 914{ 915 int i; 916 917 for (i = 0; i < ndata; i++) { 918 struct urtw_data *dp = &data[i]; 919 920 if (fillmbuf == 1) { 921 if (dp->m != NULL) { 922 m_freem(dp->m); 923 dp->m = NULL; 924 dp->buf = NULL; 925 } 926 } else { 927 if (dp->buf != NULL) { 928 free(dp->buf, M_USBDEV); 929 dp->buf = NULL; 930 } 931 } 932 if (dp->ni != NULL) { 933 ieee80211_free_node(dp->ni); 934 dp->ni = NULL; 935 } 936 } 937} 938 939static struct ieee80211vap * 940urtw_vap_create(struct ieee80211com *ic, 941 const char name[IFNAMSIZ], int unit, int opmode, int flags, 942 const uint8_t bssid[IEEE80211_ADDR_LEN], 943 const uint8_t mac[IEEE80211_ADDR_LEN]) 944{ 945 struct urtw_vap *uvp; 946 struct ieee80211vap *vap; 947 948 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 949 return (NULL); 950 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 951 M_80211_VAP, M_NOWAIT | M_ZERO); 952 if (uvp == NULL) 953 return (NULL); 954 vap = &uvp->vap; 955 /* enable s/w bmiss handling for sta mode */ 956 ieee80211_vap_setup(ic, vap, name, unit, opmode, 957 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 958 959 /* override state transition machine */ 960 uvp->newstate = vap->iv_newstate; 961 vap->iv_newstate = urtw_newstate; 962 963 /* complete setup */ 964 ieee80211_vap_attach(vap, ieee80211_media_change, 965 ieee80211_media_status); 966 ic->ic_opmode = opmode; 967 return (vap); 968} 969 970static void 971urtw_vap_delete(struct ieee80211vap *vap) 972{ 973 struct urtw_vap *uvp = URTW_VAP(vap); 974 975 ieee80211_vap_detach(vap); 976 free(uvp, M_80211_VAP); 977} 978 979static void 980urtw_init_locked(void *arg) 981{ 982 int ret; 983 struct urtw_softc *sc = arg; 984 struct ifnet *ifp = sc->sc_ifp; 985 usb_error_t error; 986 987 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 988 urtw_stop_locked(ifp, 0); 989 990 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 991 urtw_adapter_start(sc); 992 if (error != 0) 993 goto fail; 994 995 /* reset softc variables */ 996 sc->sc_txtimer = 0; 997 998 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 999 ret = urtw_alloc_rx_data_list(sc); 1000 if (error != 0) 1001 goto fail; 1002 ret = urtw_alloc_tx_data_list(sc); 1003 if (error != 0) 1004 goto fail; 1005 sc->sc_flags |= URTW_INIT_ONCE; 1006 } 1007 1008 error = urtw_rx_enable(sc); 1009 if (error != 0) 1010 goto fail; 1011 error = urtw_tx_enable(sc); 1012 if (error != 0) 1013 goto fail; 1014 1015 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1016 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1017 1018 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1019fail: 1020 return; 1021} 1022 1023static void 1024urtw_init(void *arg) 1025{ 1026 struct urtw_softc *sc = arg; 1027 1028 URTW_LOCK(sc); 1029 urtw_init_locked(arg); 1030 URTW_UNLOCK(sc); 1031} 1032 1033static usb_error_t 1034urtw_adapter_start_b(struct urtw_softc *sc) 1035{ 1036#define N(a) (sizeof(a) / sizeof((a)[0])) 1037 int i; 1038 uint8_t data8; 1039 usb_error_t error; 1040 1041 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1042 if (error) 1043 goto fail; 1044 1045 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1046 urtw_write8_m(sc, URTW_CONFIG3, 1047 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1048 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1049 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1050 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1051 1052 urtw_write8_m(sc, 0x61, 0x10); 1053 urtw_read8_m(sc, 0x62, &data8); 1054 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1055 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1056 1057 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1058 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1059 urtw_write8_m(sc, URTW_CONFIG3, data8); 1060 1061 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1062 if (error) 1063 goto fail; 1064 1065 error = urtw_8187b_cmd_reset(sc); 1066 if (error) 1067 goto fail; 1068 1069 urtw_write16_m(sc, 0x2d, 0xfff); 1070 urtw_read8_m(sc, URTW_CW_CONF, &data8); 1071 urtw_write8_m(sc, URTW_CW_CONF, data8 | URTW_CW_CONF_PERPACKET_RETRY); 1072 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 1073 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN | 1074 URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 1075 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 1076 1077 error = urtw_write16_i(sc, 0xe0, 0xfff, 1); 1078 if (error) 1079 goto fail; 1080 1081 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 1082 urtw_write8_m(sc, URTW_RATE_FALLBACK, data8 | URTW_RATE_FALLBACK_ENABLE); 1083 1084 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1085 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1086 error = urtw_write16_i(sc, 0xd4, 0xffff, 1); 1087 if (error) 1088 goto fail; 1089 1090 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1091 if (error) 1092 goto fail; 1093 urtw_read8_m(sc, URTW_CONFIG1, &data8); 1094 urtw_write8_m(sc, URTW_CONFIG1, (data8 & 0x3f) | 0x80); 1095 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1096 if (error) 1097 goto fail; 1098 1099 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1100 for (i = 0; i < N(urtw_8187b_reg_table); i++) { 1101 error = urtw_write8_i(sc, urtw_8187b_reg_table[i][0], 1102 urtw_8187b_reg_table[i][1], urtw_8187b_reg_table[i][2]); 1103 if (error) 1104 goto fail; 1105 } 1106 1107 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 1108 urtw_write16_m(sc, URTW_INT_MIG, 0); 1109 1110 error = urtw_write32_i(sc, 0xf0, 0, 1); 1111 if (error) 1112 goto fail; 1113 error = urtw_write32_i(sc, 0xf4, 0, 1); 1114 if (error) 1115 goto fail; 1116 error = urtw_write8_i(sc, 0xf8, 0, 1); 1117 if (error) 1118 goto fail; 1119 1120 urtw_write32_m(sc, URTW_RF_TIMING, 0x00004001); 1121 1122 error = urtw_write16_i(sc, 0x72, 0x569a, 2); 1123 if (error) 1124 goto fail; 1125 1126 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1127 if (error) 1128 goto fail; 1129 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1130 urtw_write8_m(sc, URTW_CONFIG3, data8 | URTW_CONFIG3_ANAPARAM_WRITE); 1131 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1132 if (error) 1133 goto fail; 1134 1135 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 1136 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 1137 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 1138 usb_pause_mtx(&sc->sc_mtx, 100); 1139 1140 error = sc->sc_rf_init(sc); 1141 if (error != 0) 1142 goto fail; 1143 1144 error = urtw_intr_enable(sc); 1145 if (error) 1146 goto fail; 1147 1148 error = urtw_write8e(sc, 0x41, 0xf4); 1149 if (error) 1150 goto fail; 1151 error = urtw_write8e(sc, 0x40, 0x00); 1152 if (error) 1153 goto fail; 1154 error = urtw_write8e(sc, 0x42, 0x00); 1155 if (error) 1156 goto fail; 1157 error = urtw_write8e(sc, 0x42, 0x01); 1158 if (error) 1159 goto fail; 1160 error = urtw_write8e(sc, 0x40, 0x0f); 1161 if (error) 1162 goto fail; 1163 error = urtw_write8e(sc, 0x42, 0x00); 1164 if (error) 1165 goto fail; 1166 error = urtw_write8e(sc, 0x42, 0x01); 1167 if (error) 1168 goto fail; 1169 1170 urtw_read8_m(sc, 0xdb, &data8); 1171 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1172 error = urtw_write16_i(sc, 0x72, 0x59fa, 3); 1173 if (error) 1174 goto fail; 1175 error = urtw_write16_i(sc, 0x74, 0x59d2, 3); 1176 if (error) 1177 goto fail; 1178 error = urtw_write16_i(sc, 0x76, 0x59d2, 3); 1179 if (error) 1180 goto fail; 1181 error = urtw_write16_i(sc, 0x78, 0x19fa, 3); 1182 if (error) 1183 goto fail; 1184 error = urtw_write16_i(sc, 0x7a, 0x19fa, 3); 1185 if (error) 1186 goto fail; 1187 error = urtw_write16_i(sc, 0x7c, 0x00d0, 3); 1188 if (error) 1189 goto fail; 1190 urtw_write8_m(sc, 0x61, 0); 1191 error = urtw_write8_i(sc, 0x80, 0x0f, 1); 1192 if (error) 1193 goto fail; 1194 error = urtw_write8_i(sc, 0x83, 0x03, 1); 1195 if (error) 1196 goto fail; 1197 urtw_write8_m(sc, 0xda, 0x10); 1198 error = urtw_write8_i(sc, 0x4d, 0x08, 2); 1199 if (error) 1200 goto fail; 1201 1202 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321B); 1203 1204 error = urtw_write16_i(sc, 0xec, 0x800, 1); 1205 if (error) 1206 goto fail; 1207 1208fail: 1209 return (error); 1210#undef N 1211} 1212 1213static usb_error_t 1214urtw_adapter_start(struct urtw_softc *sc) 1215{ 1216 usb_error_t error; 1217 1218 error = urtw_reset(sc); 1219 if (error) 1220 goto fail; 1221 1222 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1223 urtw_write8_m(sc, URTW_GPIO, 0); 1224 1225 /* for led */ 1226 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1227 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1228 if (error != 0) 1229 goto fail; 1230 1231 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1232 if (error) 1233 goto fail; 1234 /* applying MAC address again. */ 1235 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1236 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1237 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1238 if (error) 1239 goto fail; 1240 1241 error = urtw_update_msr(sc); 1242 if (error) 1243 goto fail; 1244 1245 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1246 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1247 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1248 error = urtw_set_rate(sc); 1249 if (error != 0) 1250 goto fail; 1251 1252 error = sc->sc_rf_init(sc); 1253 if (error != 0) 1254 goto fail; 1255 if (sc->sc_rf_set_sens != NULL) 1256 sc->sc_rf_set_sens(sc, sc->sc_sens); 1257 1258 /* XXX correct? to call write16 */ 1259 urtw_write16_m(sc, URTW_PSR, 1); 1260 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1261 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1262 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1263 /* XXX correct? to call write16 */ 1264 urtw_write16_m(sc, URTW_PSR, 0); 1265 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1266 1267 error = urtw_intr_enable(sc); 1268 if (error != 0) 1269 goto fail; 1270 1271fail: 1272 return (error); 1273} 1274 1275static usb_error_t 1276urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1277{ 1278 uint8_t data; 1279 usb_error_t error; 1280 1281 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1282 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1283 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1284 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1285fail: 1286 return (error); 1287} 1288 1289static usb_error_t 1290urtw_8187b_cmd_reset(struct urtw_softc *sc) 1291{ 1292 int i; 1293 uint8_t data8; 1294 usb_error_t error; 1295 1296 /* XXX the code can be duplicate with urtw_reset(). */ 1297 urtw_read8_m(sc, URTW_CMD, &data8); 1298 data8 = (data8 & 0x2) | URTW_CMD_RST; 1299 urtw_write8_m(sc, URTW_CMD, data8); 1300 1301 for (i = 0; i < 20; i++) { 1302 usb_pause_mtx(&sc->sc_mtx, 2); 1303 urtw_read8_m(sc, URTW_CMD, &data8); 1304 if (!(data8 & URTW_CMD_RST)) 1305 break; 1306 } 1307 if (i >= 20) { 1308 device_printf(sc->sc_dev, "reset timeout\n"); 1309 goto fail; 1310 } 1311 1312 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 1313 if (error) 1314 goto fail; 1315 1316 for (i = 0; i < 20; i++) { 1317 usb_pause_mtx(&sc->sc_mtx, 4); 1318 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 1319 if (!(data8 & URTW_EPROM_CMD_CONFIG)) 1320 break; 1321 } 1322 if (i >= 20) { 1323 device_printf(sc->sc_dev, "eeprom reset timeout\n"); 1324 goto fail; 1325 } 1326 1327fail: 1328 return (error); 1329} 1330 1331static usb_error_t 1332urtw_write16_i(struct urtw_softc *sc, int val, uint16_t data, int idx) 1333{ 1334 struct usb_device_request req; 1335 1336 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1337 req.bRequest = URTW_8187_SETREGS_REQ; 1338 USETW(req.wValue, val | 0xff00); 1339 USETW(req.wIndex, idx & 0x3); 1340 USETW(req.wLength, sizeof(uint16_t)); 1341 1342 return (urtw_do_request(sc, &req, &data)); 1343} 1344 1345static usb_error_t 1346urtw_do_request(struct urtw_softc *sc, 1347 struct usb_device_request *req, void *data) 1348{ 1349 usb_error_t err; 1350 int ntries = 10; 1351 1352 URTW_ASSERT_LOCKED(sc); 1353 1354 while (ntries--) { 1355 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1356 req, data, 0, NULL, 250 /* ms */); 1357 if (err == 0) 1358 break; 1359 1360 DPRINTF(sc, URTW_DEBUG_INIT, 1361 "Control request failed, %s (retrying)\n", 1362 usbd_errstr(err)); 1363 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1364 } 1365 return (err); 1366} 1367 1368static usb_error_t 1369urtw_write8_i(struct urtw_softc *sc, int val, uint8_t data, int idx) 1370{ 1371 struct usb_device_request req; 1372 1373 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1374 req.bRequest = URTW_8187_SETREGS_REQ; 1375 USETW(req.wValue, val | 0xff00); 1376 USETW(req.wIndex, idx & 0x3); 1377 USETW(req.wLength, sizeof(uint8_t)); 1378 1379 return (urtw_do_request(sc, &req, &data)); 1380} 1381 1382static usb_error_t 1383urtw_write32_i(struct urtw_softc *sc, int val, uint32_t data, int idx) 1384{ 1385 struct usb_device_request req; 1386 1387 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1388 req.bRequest = URTW_8187_SETREGS_REQ; 1389 USETW(req.wValue, val | 0xff00); 1390 USETW(req.wIndex, idx & 0x3); 1391 USETW(req.wLength, sizeof(uint32_t)); 1392 1393 return (urtw_do_request(sc, &req, &data)); 1394} 1395 1396static void 1397urtw_stop_locked(struct ifnet *ifp, int disable) 1398{ 1399 struct urtw_softc *sc = ifp->if_softc; 1400 uint8_t data8; 1401 usb_error_t error; 1402 1403 (void)disable; 1404 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1405 1406 error = urtw_intr_disable(sc); 1407 if (error) 1408 goto fail; 1409 urtw_read8_m(sc, URTW_CMD, &data8); 1410 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1411 urtw_write8_m(sc, URTW_CMD, data8); 1412 1413 error = sc->sc_rf_stop(sc); 1414 if (error != 0) 1415 goto fail; 1416 1417 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1418 if (error) 1419 goto fail; 1420 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1421 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1422 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1423 if (error) 1424 goto fail; 1425fail: 1426 if (error) 1427 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1428 usbd_errstr(error)); 1429 1430 usb_callout_stop(&sc->sc_led_ch); 1431 callout_stop(&sc->sc_watchdog_ch); 1432 1433 urtw_abort_xfers(sc); 1434} 1435 1436static void 1437urtw_stop(struct ifnet *ifp, int disable) 1438{ 1439 struct urtw_softc *sc = ifp->if_softc; 1440 1441 URTW_LOCK(sc); 1442 urtw_stop_locked(ifp, disable); 1443 URTW_UNLOCK(sc); 1444} 1445 1446static void 1447urtw_abort_xfers(struct urtw_softc *sc) 1448{ 1449 int i, max; 1450 1451 URTW_ASSERT_LOCKED(sc); 1452 1453 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1454 URTW_8187L_N_XFERS; 1455 1456 /* abort any pending transfers */ 1457 for (i = 0; i < max; i++) 1458 usbd_transfer_stop(sc->sc_xfer[i]); 1459} 1460 1461static int 1462urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1463{ 1464 struct urtw_softc *sc = ifp->if_softc; 1465 struct ieee80211com *ic = ifp->if_l2com; 1466 struct ifreq *ifr = (struct ifreq *) data; 1467 int error = 0, startall = 0; 1468 1469 switch (cmd) { 1470 case SIOCSIFFLAGS: 1471 if (ifp->if_flags & IFF_UP) { 1472 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1473 if ((ifp->if_flags ^ sc->sc_if_flags) & 1474 (IFF_ALLMULTI | IFF_PROMISC)) 1475 urtw_set_multi(sc); 1476 } else { 1477 urtw_init(ifp->if_softc); 1478 startall = 1; 1479 } 1480 } else { 1481 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1482 urtw_stop(ifp, 1); 1483 } 1484 sc->sc_if_flags = ifp->if_flags; 1485 if (startall) 1486 ieee80211_start_all(ic); 1487 break; 1488 case SIOCGIFMEDIA: 1489 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1490 break; 1491 case SIOCGIFADDR: 1492 error = ether_ioctl(ifp, cmd, data); 1493 break; 1494 default: 1495 error = EINVAL; 1496 break; 1497 } 1498 1499 return (error); 1500} 1501 1502static void 1503urtw_start(struct ifnet *ifp) 1504{ 1505 struct urtw_data *bf; 1506 struct urtw_softc *sc = ifp->if_softc; 1507 struct ieee80211_node *ni; 1508 struct mbuf *m; 1509 1510 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1511 return; 1512 1513 URTW_LOCK(sc); 1514 for (;;) { 1515 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1516 if (m == NULL) 1517 break; 1518 bf = urtw_getbuf(sc); 1519 if (bf == NULL) { 1520 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1521 break; 1522 } 1523 1524 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1525 m->m_pkthdr.rcvif = NULL; 1526 1527 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1528 ifp->if_oerrors++; 1529 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1530 ieee80211_free_node(ni); 1531 break; 1532 } 1533 1534 sc->sc_txtimer = 5; 1535 } 1536 URTW_UNLOCK(sc); 1537} 1538 1539static int 1540urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1541 int ndata, int maxsz, int fillmbuf) 1542{ 1543 int i, error; 1544 1545 for (i = 0; i < ndata; i++) { 1546 struct urtw_data *dp = &data[i]; 1547 1548 dp->sc = sc; 1549 if (fillmbuf) { 1550 dp->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1551 if (dp->m == NULL) { 1552 device_printf(sc->sc_dev, 1553 "could not allocate rx mbuf\n"); 1554 error = ENOMEM; 1555 goto fail; 1556 } 1557 dp->buf = mtod(dp->m, uint8_t *); 1558 } else { 1559 dp->m = NULL; 1560 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1561 if (dp->buf == NULL) { 1562 device_printf(sc->sc_dev, 1563 "could not allocate buffer\n"); 1564 error = ENOMEM; 1565 goto fail; 1566 } 1567 if (((unsigned long)dp->buf) % 4) 1568 device_printf(sc->sc_dev, 1569 "warn: unaligned buffer %p\n", dp->buf); 1570 } 1571 dp->ni = NULL; 1572 } 1573 1574 return 0; 1575 1576fail: urtw_free_data_list(sc, data, ndata, fillmbuf); 1577 return error; 1578} 1579 1580static int 1581urtw_alloc_rx_data_list(struct urtw_softc *sc) 1582{ 1583 int error, i; 1584 1585 error = urtw_alloc_data_list(sc, 1586 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, MCLBYTES, 1 /* mbufs */); 1587 if (error != 0) 1588 return (error); 1589 1590 STAILQ_INIT(&sc->sc_rx_active); 1591 STAILQ_INIT(&sc->sc_rx_inactive); 1592 1593 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1594 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1595 1596 return (0); 1597} 1598 1599static int 1600urtw_alloc_tx_data_list(struct urtw_softc *sc) 1601{ 1602 int error, i; 1603 1604 error = urtw_alloc_data_list(sc, 1605 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1606 0 /* no mbufs */); 1607 if (error != 0) 1608 return (error); 1609 1610 STAILQ_INIT(&sc->sc_tx_active); 1611 STAILQ_INIT(&sc->sc_tx_inactive); 1612 STAILQ_INIT(&sc->sc_tx_pending); 1613 1614 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1615 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1616 next); 1617 1618 return (0); 1619} 1620 1621static int 1622urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1623 const struct ieee80211_bpf_params *params) 1624{ 1625 struct ieee80211com *ic = ni->ni_ic; 1626 struct ifnet *ifp = ic->ic_ifp; 1627 struct urtw_data *bf; 1628 struct urtw_softc *sc = ifp->if_softc; 1629 1630 /* prevent management frames from being sent if we're not ready */ 1631 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1632 m_freem(m); 1633 ieee80211_free_node(ni); 1634 return ENETDOWN; 1635 } 1636 URTW_LOCK(sc); 1637 bf = urtw_getbuf(sc); 1638 if (bf == NULL) { 1639 ieee80211_free_node(ni); 1640 m_freem(m); 1641 URTW_UNLOCK(sc); 1642 return (ENOBUFS); /* XXX */ 1643 } 1644 1645 ifp->if_opackets++; 1646 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1647 ieee80211_free_node(ni); 1648 ifp->if_oerrors++; 1649 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1650 URTW_UNLOCK(sc); 1651 return (EIO); 1652 } 1653 URTW_UNLOCK(sc); 1654 1655 sc->sc_txtimer = 5; 1656 return (0); 1657} 1658 1659static void 1660urtw_scan_start(struct ieee80211com *ic) 1661{ 1662 1663 /* XXX do nothing? */ 1664} 1665 1666static void 1667urtw_scan_end(struct ieee80211com *ic) 1668{ 1669 1670 /* XXX do nothing? */ 1671} 1672 1673static void 1674urtw_set_channel(struct ieee80211com *ic) 1675{ 1676 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1677 struct ifnet *ifp = sc->sc_ifp; 1678 uint32_t data, orig; 1679 usb_error_t error; 1680 1681 /* 1682 * if the user set a channel explicitly using ifconfig(8) this function 1683 * can be called earlier than we're expected that in some cases the 1684 * initialization would be failed if setting a channel is called before 1685 * the init have done. 1686 */ 1687 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1688 return; 1689 1690 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1691 return; 1692 1693 URTW_LOCK(sc); 1694 1695 /* 1696 * during changing th channel we need to temporarily be disable 1697 * TX. 1698 */ 1699 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1700 data = orig & ~URTW_TX_LOOPBACK_MASK; 1701 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1702 1703 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1704 if (error != 0) 1705 goto fail; 1706 usb_pause_mtx(&sc->sc_mtx, 10); 1707 urtw_write32_m(sc, URTW_TX_CONF, orig); 1708 1709 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1710 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1711 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1712 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1713 1714fail: 1715 URTW_UNLOCK(sc); 1716 1717 sc->sc_curchan = ic->ic_curchan; 1718 1719 if (error != 0) 1720 device_printf(sc->sc_dev, "could not change the channel\n"); 1721} 1722 1723static void 1724urtw_update_mcast(struct ifnet *ifp) 1725{ 1726 1727 /* XXX do nothing? */ 1728} 1729 1730static int 1731urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1732 struct urtw_data *data, int prior) 1733{ 1734 int xferlen; 1735 struct ifnet *ifp = sc->sc_ifp; 1736 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1737 struct ieee80211_key *k; 1738 const struct ieee80211_txparam *tp; 1739 struct ieee80211com *ic = ifp->if_l2com; 1740 struct ieee80211vap *vap = ni->ni_vap; 1741 struct urtw_8187b_txhdr *hdr; 1742 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1743 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1744 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1745 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1746 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1747 }; 1748 struct usb_xfer *xfer; 1749 usb_error_t error; 1750 1751 URTW_ASSERT_LOCKED(sc); 1752 1753 /* 1754 * Software crypto. 1755 */ 1756 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1757 k = ieee80211_crypto_encap(ni, m0); 1758 if (k == NULL) { 1759 device_printf(sc->sc_dev, 1760 "ieee80211_crypto_encap returns NULL.\n"); 1761 /* XXX we don't expect the fragmented frames */ 1762 m_freem(m0); 1763 return (ENOBUFS); 1764 } 1765 1766 /* in case packet header moved, reset pointer */ 1767 wh = mtod(m0, struct ieee80211_frame *); 1768 } 1769 1770 if (ieee80211_radiotap_active_vap(vap)) { 1771 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1772 1773 /* XXX Are variables correct? */ 1774 tap->wt_flags = 0; 1775 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1776 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1777 1778 ieee80211_radiotap_tx(vap, m0); 1779 } 1780 1781 xferlen = m0->m_pkthdr.len; 1782 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1783 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1784 xferlen += 1; 1785 1786 bzero(data->buf, URTW_TX_MAXSIZE); 1787 data->buf[0] = m0->m_pkthdr.len & 0xff; 1788 data->buf[1] = (m0->m_pkthdr.len & 0x0f00) >> 8; 1789 data->buf[1] |= (1 << 7); 1790 1791 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1792 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1793 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1794 (sc->sc_currate != 0)) 1795 data->buf[2] |= 1; 1796 if ((m0->m_pkthdr.len > vap->iv_rtsthreshold) && 1797 prior == URTW_PRIORITY_LOW) { 1798 device_printf(sc->sc_dev, "TODO tx.\n"); 1799 return (EIO); 1800 } 1801 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1802 data->buf[2] |= (1 << 1); 1803 /* RTS rate - 10 means we use a basic rate. */ 1804 data->buf[2] |= (urtw_rate2rtl(2) << 3); 1805 /* 1806 * XXX currently TX rate control depends on the rate value of 1807 * RX descriptor because I don't know how to we can control TX rate 1808 * in more smart way. Please fix me you find a thing. 1809 */ 1810 data->buf[3] = sc->sc_currate; 1811 if (prior == URTW_PRIORITY_NORMAL) { 1812 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1813 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1814 data->buf[3] = urtw_rate2rtl(tp->mcastrate); 1815 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1816 data->buf[3] = urtw_rate2rtl(tp->ucastrate); 1817 } 1818 1819 if (sc->sc_flags & URTW_RTL8187B) { 1820 hdr = (struct urtw_8187b_txhdr *)data->buf; 1821 hdr->rts_duration = 0; 1822 hdr->len = 0; 1823 hdr->retry = 3 | (7 << 4) | 11; 1824 hdr->tx_duration = ieee80211_compute_duration(ic->ic_rt, 1825 m0->m_pkthdr.len + IEEE80211_CRC_LEN, 1826 urtw_rtl2rate(data->buf[3]), 1827 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0); 1828 /* XXX MUST fill another variables like rts_duration, tx_.. */ 1829 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[32]); 1830 } else { 1831 data->buf[8] = 3; /* CW minimum */ 1832 data->buf[8] |= (7 << 4); /* CW maximum */ 1833 data->buf[9] |= 11; /* retry limitation */ 1834 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[12]); 1835 } 1836 1837 data->buflen = xferlen; 1838 data->ni = ni; 1839 data->m = m0; 1840 1841 if (sc->sc_flags & URTW_RTL8187B) { 1842 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1843 case IEEE80211_FC0_TYPE_CTL: 1844 case IEEE80211_FC0_TYPE_MGT: 1845 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1846 break; 1847 default: 1848 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1849 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1850 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1851 break; 1852 } 1853 } else 1854 xfer = (prior == URTW_PRIORITY_LOW) ? 1855 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1856 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1857 1858 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1859 usbd_transfer_start(xfer); 1860 1861 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1862 if (error != 0) 1863 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1864 error); 1865 return (0); 1866} 1867 1868static int 1869urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1870{ 1871 struct ieee80211_node *ni = vap->iv_bss; 1872 struct ieee80211com *ic = vap->iv_ic; 1873 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1874 struct urtw_vap *uvp = URTW_VAP(vap); 1875 usb_error_t error = 0; 1876 1877 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1878 ieee80211_state_name[vap->iv_state], 1879 ieee80211_state_name[nstate]); 1880 1881 sc->sc_state = nstate; 1882 1883 IEEE80211_UNLOCK(ic); 1884 URTW_LOCK(sc); 1885 usb_callout_stop(&sc->sc_led_ch); 1886 callout_stop(&sc->sc_watchdog_ch); 1887 1888 switch (nstate) { 1889 case IEEE80211_S_INIT: 1890 case IEEE80211_S_SCAN: 1891 case IEEE80211_S_AUTH: 1892 case IEEE80211_S_ASSOC: 1893 break; 1894 case IEEE80211_S_RUN: 1895 /* setting bssid. */ 1896 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1897 urtw_write16_m(sc, URTW_BSSID + 4, 1898 ((uint16_t *)ni->ni_bssid)[2]); 1899 urtw_update_msr(sc); 1900 /* XXX maybe the below would be incorrect. */ 1901 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1902 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1903 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1904 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1905 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1906 if (error != 0) 1907 device_printf(sc->sc_dev, 1908 "could not control LED (%d)\n", error); 1909 break; 1910 default: 1911 break; 1912 } 1913fail: 1914 URTW_UNLOCK(sc); 1915 IEEE80211_LOCK(ic); 1916 return (uvp->newstate(vap, nstate, arg)); 1917} 1918 1919static void 1920urtw_watchdog(void *arg) 1921{ 1922 struct urtw_softc *sc = arg; 1923 struct ifnet *ifp = sc->sc_ifp; 1924 1925 if (sc->sc_txtimer > 0) { 1926 if (--sc->sc_txtimer == 0) { 1927 device_printf(sc->sc_dev, "device timeout\n"); 1928 ifp->if_oerrors++; 1929 return; 1930 } 1931 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1932 } 1933} 1934 1935static void 1936urtw_set_multi(void *arg) 1937{ 1938 struct urtw_softc *sc = arg; 1939 struct ifnet *ifp = sc->sc_ifp; 1940 1941 if (!(ifp->if_flags & IFF_UP)) 1942 return; 1943 1944 /* 1945 * XXX don't know how to set a device. Lack of docs. Just try to set 1946 * IFF_ALLMULTI flag here. 1947 */ 1948 ifp->if_flags |= IFF_ALLMULTI; 1949} 1950 1951static usb_error_t 1952urtw_set_rate(struct urtw_softc *sc) 1953{ 1954 int i, basic_rate, min_rr_rate, max_rr_rate; 1955 uint16_t data; 1956 usb_error_t error; 1957 1958 basic_rate = urtw_rate2rtl(48); 1959 min_rr_rate = urtw_rate2rtl(12); 1960 max_rr_rate = urtw_rate2rtl(48); 1961 1962 urtw_write8_m(sc, URTW_RESP_RATE, 1963 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1964 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1965 1966 urtw_read16_m(sc, URTW_BRSR, &data); 1967 data &= ~URTW_BRSR_MBR_8185; 1968 1969 for (i = 0; i <= basic_rate; i++) 1970 data |= (1 << i); 1971 1972 urtw_write16_m(sc, URTW_BRSR, data); 1973fail: 1974 return (error); 1975} 1976 1977static uint16_t 1978urtw_rate2rtl(int rate) 1979{ 1980#define N(a) (sizeof(a) / sizeof((a)[0])) 1981 int i; 1982 1983 for (i = 0; i < N(urtw_ratetable); i++) { 1984 if (rate == urtw_ratetable[i].reg) 1985 return urtw_ratetable[i].val; 1986 } 1987 1988 return (3); 1989#undef N 1990} 1991 1992static uint16_t 1993urtw_rtl2rate(int rate) 1994{ 1995#define N(a) (sizeof(a) / sizeof((a)[0])) 1996 int i; 1997 1998 for (i = 0; i < N(urtw_ratetable); i++) { 1999 if (rate == urtw_ratetable[i].val) 2000 return urtw_ratetable[i].reg; 2001 } 2002 2003 return (0); 2004#undef N 2005} 2006 2007static usb_error_t 2008urtw_update_msr(struct urtw_softc *sc) 2009{ 2010 struct ifnet *ifp = sc->sc_ifp; 2011 struct ieee80211com *ic = ifp->if_l2com; 2012 uint8_t data; 2013 usb_error_t error; 2014 2015 urtw_read8_m(sc, URTW_MSR, &data); 2016 data &= ~URTW_MSR_LINK_MASK; 2017 2018 if (sc->sc_state == IEEE80211_S_RUN) { 2019 switch (ic->ic_opmode) { 2020 case IEEE80211_M_STA: 2021 case IEEE80211_M_MONITOR: 2022 data |= URTW_MSR_LINK_STA; 2023 if (sc->sc_flags & URTW_RTL8187B) 2024 data |= URTW_MSR_LINK_ENEDCA; 2025 break; 2026 case IEEE80211_M_IBSS: 2027 data |= URTW_MSR_LINK_ADHOC; 2028 break; 2029 case IEEE80211_M_HOSTAP: 2030 data |= URTW_MSR_LINK_HOSTAP; 2031 break; 2032 default: 2033 panic("unsupported operation mode 0x%x\n", 2034 ic->ic_opmode); 2035 /* never reach */ 2036 } 2037 } else 2038 data |= URTW_MSR_LINK_NONE; 2039 2040 urtw_write8_m(sc, URTW_MSR, data); 2041fail: 2042 return (error); 2043} 2044 2045static usb_error_t 2046urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2047{ 2048 struct usb_device_request req; 2049 usb_error_t error; 2050 2051 URTW_ASSERT_LOCKED(sc); 2052 2053 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2054 req.bRequest = URTW_8187_GETREGS_REQ; 2055 USETW(req.wValue, val | 0xff00); 2056 USETW(req.wIndex, 0); 2057 USETW(req.wLength, sizeof(uint8_t)); 2058 2059 error = urtw_do_request(sc, &req, data); 2060 return (error); 2061} 2062 2063static usb_error_t 2064urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2065{ 2066 struct usb_device_request req; 2067 usb_error_t error; 2068 2069 URTW_ASSERT_LOCKED(sc); 2070 2071 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2072 req.bRequest = URTW_8187_GETREGS_REQ; 2073 USETW(req.wValue, val | 0xff00); 2074 USETW(req.wIndex, 0); 2075 USETW(req.wLength, sizeof(uint16_t)); 2076 2077 error = urtw_do_request(sc, &req, data); 2078 return (error); 2079} 2080 2081static usb_error_t 2082urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2083{ 2084 struct usb_device_request req; 2085 usb_error_t error; 2086 2087 URTW_ASSERT_LOCKED(sc); 2088 2089 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2090 req.bRequest = URTW_8187_GETREGS_REQ; 2091 USETW(req.wValue, val | 0xff00); 2092 USETW(req.wIndex, 0); 2093 USETW(req.wLength, sizeof(uint32_t)); 2094 2095 error = urtw_do_request(sc, &req, data); 2096 return (error); 2097} 2098 2099static usb_error_t 2100urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2101{ 2102 struct usb_device_request req; 2103 2104 URTW_ASSERT_LOCKED(sc); 2105 2106 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2107 req.bRequest = URTW_8187_SETREGS_REQ; 2108 USETW(req.wValue, val | 0xff00); 2109 USETW(req.wIndex, 0); 2110 USETW(req.wLength, sizeof(uint8_t)); 2111 2112 return (urtw_do_request(sc, &req, &data)); 2113} 2114 2115static usb_error_t 2116urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2117{ 2118 struct usb_device_request req; 2119 2120 URTW_ASSERT_LOCKED(sc); 2121 2122 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2123 req.bRequest = URTW_8187_SETREGS_REQ; 2124 USETW(req.wValue, val | 0xff00); 2125 USETW(req.wIndex, 0); 2126 USETW(req.wLength, sizeof(uint16_t)); 2127 2128 return (urtw_do_request(sc, &req, &data)); 2129} 2130 2131static usb_error_t 2132urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2133{ 2134 struct usb_device_request req; 2135 2136 URTW_ASSERT_LOCKED(sc); 2137 2138 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2139 req.bRequest = URTW_8187_SETREGS_REQ; 2140 USETW(req.wValue, val | 0xff00); 2141 USETW(req.wIndex, 0); 2142 USETW(req.wLength, sizeof(uint32_t)); 2143 2144 return (urtw_do_request(sc, &req, &data)); 2145} 2146 2147static usb_error_t 2148urtw_get_macaddr(struct urtw_softc *sc) 2149{ 2150 uint32_t data; 2151 usb_error_t error; 2152 2153 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2154 if (error != 0) 2155 goto fail; 2156 sc->sc_bssid[0] = data & 0xff; 2157 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2158 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2159 if (error != 0) 2160 goto fail; 2161 sc->sc_bssid[2] = data & 0xff; 2162 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2163 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2164 if (error != 0) 2165 goto fail; 2166 sc->sc_bssid[4] = data & 0xff; 2167 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2168fail: 2169 return (error); 2170} 2171 2172static usb_error_t 2173urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2174{ 2175#define URTW_READCMD_LEN 3 2176 int addrlen, i; 2177 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2178 usb_error_t error; 2179 2180 /* NB: make sure the buffer is initialized */ 2181 *data = 0; 2182 2183 /* enable EPROM programming */ 2184 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2185 DELAY(URTW_EPROM_DELAY); 2186 2187 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2188 if (error != 0) 2189 goto fail; 2190 error = urtw_eprom_ck(sc); 2191 if (error != 0) 2192 goto fail; 2193 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2194 if (error != 0) 2195 goto fail; 2196 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2197 addrlen = 8; 2198 addrstr[0] = addr & (1 << 7); 2199 addrstr[1] = addr & (1 << 6); 2200 addrstr[2] = addr & (1 << 5); 2201 addrstr[3] = addr & (1 << 4); 2202 addrstr[4] = addr & (1 << 3); 2203 addrstr[5] = addr & (1 << 2); 2204 addrstr[6] = addr & (1 << 1); 2205 addrstr[7] = addr & (1 << 0); 2206 } else { 2207 addrlen=6; 2208 addrstr[0] = addr & (1 << 5); 2209 addrstr[1] = addr & (1 << 4); 2210 addrstr[2] = addr & (1 << 3); 2211 addrstr[3] = addr & (1 << 2); 2212 addrstr[4] = addr & (1 << 1); 2213 addrstr[5] = addr & (1 << 0); 2214 } 2215 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2216 if (error != 0) 2217 goto fail; 2218 2219 error = urtw_eprom_writebit(sc, 0); 2220 if (error != 0) 2221 goto fail; 2222 2223 for (i = 0; i < 16; i++) { 2224 error = urtw_eprom_ck(sc); 2225 if (error != 0) 2226 goto fail; 2227 error = urtw_eprom_readbit(sc, &data16); 2228 if (error != 0) 2229 goto fail; 2230 2231 (*data) |= (data16 << (15 - i)); 2232 } 2233 2234 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2235 if (error != 0) 2236 goto fail; 2237 error = urtw_eprom_ck(sc); 2238 if (error != 0) 2239 goto fail; 2240 2241 /* now disable EPROM programming */ 2242 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2243fail: 2244 return (error); 2245#undef URTW_READCMD_LEN 2246} 2247 2248static usb_error_t 2249urtw_eprom_cs(struct urtw_softc *sc, int able) 2250{ 2251 uint8_t data; 2252 usb_error_t error; 2253 2254 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2255 if (able == URTW_EPROM_ENABLE) 2256 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2257 else 2258 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2259 DELAY(URTW_EPROM_DELAY); 2260fail: 2261 return (error); 2262} 2263 2264static usb_error_t 2265urtw_eprom_ck(struct urtw_softc *sc) 2266{ 2267 uint8_t data; 2268 usb_error_t error; 2269 2270 /* masking */ 2271 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2272 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2273 DELAY(URTW_EPROM_DELAY); 2274 /* unmasking */ 2275 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2276 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2277 DELAY(URTW_EPROM_DELAY); 2278fail: 2279 return (error); 2280} 2281 2282static usb_error_t 2283urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2284{ 2285 uint8_t data8; 2286 usb_error_t error; 2287 2288 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2289 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2290 DELAY(URTW_EPROM_DELAY); 2291 2292fail: 2293 return (error); 2294} 2295 2296static usb_error_t 2297urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2298{ 2299 uint8_t data; 2300 usb_error_t error; 2301 2302 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2303 if (bit != 0) 2304 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2305 else 2306 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2307 DELAY(URTW_EPROM_DELAY); 2308fail: 2309 return (error); 2310} 2311 2312static usb_error_t 2313urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2314{ 2315 int i = 0; 2316 usb_error_t error = 0; 2317 2318 for (i = 0; i < buflen; i++) { 2319 error = urtw_eprom_writebit(sc, buf[i]); 2320 if (error != 0) 2321 goto fail; 2322 error = urtw_eprom_ck(sc); 2323 if (error != 0) 2324 goto fail; 2325 } 2326fail: 2327 return (error); 2328} 2329 2330 2331static usb_error_t 2332urtw_get_txpwr(struct urtw_softc *sc) 2333{ 2334 int i, j; 2335 uint32_t data; 2336 usb_error_t error; 2337 2338 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2339 if (error != 0) 2340 goto fail; 2341 sc->sc_txpwr_cck_base = data & 0xf; 2342 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2343 2344 for (i = 1, j = 0; i < 6; i += 2, j++) { 2345 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2346 if (error != 0) 2347 goto fail; 2348 sc->sc_txpwr_cck[i] = data & 0xf; 2349 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2350 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2351 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2352 } 2353 for (i = 1, j = 0; i < 4; i += 2, j++) { 2354 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2355 if (error != 0) 2356 goto fail; 2357 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2358 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2359 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2360 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2361 } 2362 if (sc->sc_flags & URTW_RTL8187B) { 2363 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2364 if (error != 0) 2365 goto fail; 2366 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2367 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2368 error = urtw_eprom_read32(sc, 0x0a, &data); 2369 if (error != 0) 2370 goto fail; 2371 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2372 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2373 error = urtw_eprom_read32(sc, 0x1c, &data); 2374 if (error != 0) 2375 goto fail; 2376 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2377 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2378 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2379 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2380 } else { 2381 for (i = 1, j = 0; i < 4; i += 2, j++) { 2382 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2383 &data); 2384 if (error != 0) 2385 goto fail; 2386 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2387 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2388 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2389 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2390 } 2391 } 2392fail: 2393 return (error); 2394} 2395 2396 2397static usb_error_t 2398urtw_get_rfchip(struct urtw_softc *sc) 2399{ 2400 int ret; 2401 uint8_t data8; 2402 uint32_t data; 2403 usb_error_t error; 2404 2405 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2406 if (error != 0) 2407 goto fail; 2408 switch (data & 0xff) { 2409 case URTW_EPROM_RFCHIPID_RTL8225U: 2410 error = urtw_8225_isv2(sc, &ret); 2411 if (error != 0) 2412 goto fail; 2413 if (ret == 0) { 2414 sc->sc_rf_init = urtw_8225_rf_init; 2415 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2416 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2417 sc->sc_rf_stop = urtw_8225_rf_stop; 2418 } else { 2419 sc->sc_rf_init = urtw_8225v2_rf_init; 2420 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2421 sc->sc_rf_stop = urtw_8225_rf_stop; 2422 } 2423 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2424 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2425 break; 2426 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2427 sc->sc_rf_init = urtw_8225v2b_rf_init; 2428 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2429 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2430 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2431 sc->sc_rf_stop = urtw_8225_rf_stop; 2432 break; 2433 default: 2434 panic("unsupported RF chip %d\n", data & 0xff); 2435 /* never reach */ 2436 } 2437 2438 if (sc->sc_flags & URTW_RTL8187B) { 2439 urtw_read8_m(sc, 0xe1, &data8); 2440 sc->sc_flags |= (data8 == 0) ? URTW_RTL8187B_REV_B : 2441 (data8 == 1) ? URTW_RTL8187B_REV_D : URTW_RTL8187B_REV_E; 2442 } 2443 2444 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2445 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2446 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2447 "rtl8225z2", 2448 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2449 (data8 == 1) ? "d" : "e") : "none"); 2450 2451fail: 2452 return (error); 2453} 2454 2455 2456static usb_error_t 2457urtw_led_init(struct urtw_softc *sc) 2458{ 2459 uint32_t rev; 2460 usb_error_t error; 2461 2462 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2463 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2464 if (error != 0) 2465 goto fail; 2466 2467 switch (rev & URTW_EPROM_CID_MASK) { 2468 case URTW_EPROM_CID_ALPHA0: 2469 sc->sc_strategy = URTW_SW_LED_MODE1; 2470 break; 2471 case URTW_EPROM_CID_SERCOMM_PS: 2472 sc->sc_strategy = URTW_SW_LED_MODE3; 2473 break; 2474 case URTW_EPROM_CID_HW_LED: 2475 sc->sc_strategy = URTW_HW_LED; 2476 break; 2477 case URTW_EPROM_CID_RSVD0: 2478 case URTW_EPROM_CID_RSVD1: 2479 default: 2480 sc->sc_strategy = URTW_SW_LED_MODE0; 2481 break; 2482 } 2483 2484 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2485 2486fail: 2487 return (error); 2488} 2489 2490 2491static usb_error_t 2492urtw_8225_rf_init(struct urtw_softc *sc) 2493{ 2494#define N(a) (sizeof(a) / sizeof((a)[0])) 2495 int i; 2496 uint16_t data; 2497 usb_error_t error; 2498 2499 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2500 if (error) 2501 goto fail; 2502 2503 error = urtw_8225_usb_init(sc); 2504 if (error) 2505 goto fail; 2506 2507 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2508 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2509 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2510 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2511 2512 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2513 if (error) 2514 goto fail; 2515 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2516 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2517 if (error) 2518 goto fail; 2519 2520 error = urtw_8185_rf_pins_enable(sc); 2521 if (error) 2522 goto fail; 2523 usb_pause_mtx(&sc->sc_mtx, 1000); 2524 2525 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2526 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2527 urtw_8225_rf_part1[i].val); 2528 usb_pause_mtx(&sc->sc_mtx, 1); 2529 } 2530 usb_pause_mtx(&sc->sc_mtx, 100); 2531 urtw_8225_write(sc, 2532 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2533 usb_pause_mtx(&sc->sc_mtx, 200); 2534 urtw_8225_write(sc, 2535 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2536 usb_pause_mtx(&sc->sc_mtx, 200); 2537 urtw_8225_write(sc, 2538 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2539 2540 for (i = 0; i < 95; i++) { 2541 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2542 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2543 } 2544 2545 urtw_8225_write(sc, 2546 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2547 urtw_8225_write(sc, 2548 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2549 2550 for (i = 0; i < 128; i++) { 2551 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2552 usb_pause_mtx(&sc->sc_mtx, 1); 2553 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2554 usb_pause_mtx(&sc->sc_mtx, 1); 2555 } 2556 2557 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2558 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2559 urtw_8225_rf_part2[i].val); 2560 usb_pause_mtx(&sc->sc_mtx, 1); 2561 } 2562 2563 error = urtw_8225_setgain(sc, 4); 2564 if (error) 2565 goto fail; 2566 2567 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2568 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2569 urtw_8225_rf_part3[i].val); 2570 usb_pause_mtx(&sc->sc_mtx, 1); 2571 } 2572 2573 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2574 2575 error = urtw_8225_set_txpwrlvl(sc, 1); 2576 if (error) 2577 goto fail; 2578 2579 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2580 usb_pause_mtx(&sc->sc_mtx, 1); 2581 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2582 usb_pause_mtx(&sc->sc_mtx, 1); 2583 2584 /* TX ant A, 0x0 for B */ 2585 error = urtw_8185_tx_antenna(sc, 0x3); 2586 if (error) 2587 goto fail; 2588 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2589 2590 error = urtw_8225_rf_set_chan(sc, 1); 2591fail: 2592 return (error); 2593#undef N 2594} 2595 2596static usb_error_t 2597urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2598{ 2599 usb_error_t error = 0; 2600 2601 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2602fail: 2603 return (error); 2604} 2605 2606static usb_error_t 2607urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2608{ 2609 usb_error_t error; 2610 2611 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2612 usb_pause_mtx(&sc->sc_mtx, 1); 2613fail: 2614 return (error); 2615} 2616 2617static usb_error_t 2618urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2619{ 2620 2621 data = data & 0xff; 2622 return urtw_8187_write_phy(sc, addr, data); 2623} 2624 2625static usb_error_t 2626urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2627{ 2628 2629 data = data & 0xff; 2630 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2631} 2632 2633static usb_error_t 2634urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2635{ 2636 uint32_t phyw; 2637 usb_error_t error; 2638 2639 phyw = ((data << 8) | (addr | 0x80)); 2640 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2641 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2642 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2643 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2644 usb_pause_mtx(&sc->sc_mtx, 1); 2645fail: 2646 return (error); 2647} 2648 2649static usb_error_t 2650urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2651{ 2652 usb_error_t error; 2653 2654 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2655 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2656 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2657 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2658fail: 2659 return (error); 2660} 2661 2662static usb_error_t 2663urtw_8225_usb_init(struct urtw_softc *sc) 2664{ 2665 uint8_t data; 2666 usb_error_t error; 2667 2668 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2669 urtw_write8_m(sc, URTW_GPIO, 0); 2670 error = urtw_read8e(sc, 0x53, &data); 2671 if (error) 2672 goto fail; 2673 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2674 if (error) 2675 goto fail; 2676 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2677 urtw_write8_m(sc, URTW_GPIO, 0x20); 2678 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2679 2680 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2681 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2682 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2683 2684 usb_pause_mtx(&sc->sc_mtx, 500); 2685fail: 2686 return (error); 2687} 2688 2689static usb_error_t 2690urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2691{ 2692 uint16_t d80, d82, d84; 2693 usb_error_t error; 2694 2695 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2696 d80 &= URTW_RF_PINS_MAGIC1; 2697 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2698 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2699 d84 &= URTW_RF_PINS_MAGIC2; 2700 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2701 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2702 DELAY(10); 2703 2704 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2705 DELAY(2); 2706 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2707 DELAY(10); 2708 2709 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2710 if (error != 0) 2711 goto fail; 2712 2713 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2714 DELAY(10); 2715 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2716 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2717 usb_pause_mtx(&sc->sc_mtx, 2); 2718fail: 2719 return (error); 2720} 2721 2722/* XXX why we should allocalte memory buffer instead of using memory stack? */ 2723static usb_error_t 2724urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2725 uint16_t *data) 2726{ 2727 uint8_t *buf; 2728 uint16_t data16; 2729 struct usb_device_request *req; 2730 usb_error_t error = 0; 2731 2732 data16 = *data; 2733 req = (usb_device_request_t *)malloc(sizeof(usb_device_request_t), 2734 M_80211_VAP, M_NOWAIT | M_ZERO); 2735 if (req == NULL) { 2736 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2737 goto fail0; 2738 } 2739 buf = (uint8_t *)malloc(2, M_80211_VAP, M_NOWAIT | M_ZERO); 2740 if (req == NULL) { 2741 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2742 goto fail1; 2743 } 2744 2745 req->bmRequestType = UT_WRITE_VENDOR_DEVICE; 2746 req->bRequest = URTW_8187_SETREGS_REQ; 2747 USETW(req->wValue, addr); 2748 USETW(req->wIndex, index); 2749 USETW(req->wLength, sizeof(uint16_t)); 2750 buf[0] = (data16 & 0x00ff); 2751 buf[1] = (data16 & 0xff00) >> 8; 2752 2753 error = urtw_do_request(sc, req, buf); 2754 2755 free(buf, M_80211_VAP); 2756fail1: free(req, M_80211_VAP); 2757fail0: return (error); 2758} 2759 2760static usb_error_t 2761urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2762{ 2763 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 2764 struct ieee80211_channel *c = ic->ic_curchan; 2765 usb_error_t error; 2766 2767 error = urtw_8225_set_txpwrlvl(sc, chan); 2768 if (error) 2769 goto fail; 2770 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2771 usb_pause_mtx(&sc->sc_mtx, 10); 2772 2773 urtw_write8_m(sc, URTW_SIFS, 0x22); 2774 2775 if (sc->sc_state == IEEE80211_S_ASSOC && 2776 ic->ic_flags & IEEE80211_F_SHSLOT) 2777 urtw_write8_m(sc, URTW_SLOT, 0x9); 2778 else 2779 urtw_write8_m(sc, URTW_SLOT, 0x14); 2780 2781 if (IEEE80211_IS_CHAN_G(c)) { 2782 /* for G */ 2783 urtw_write8_m(sc, URTW_DIFS, 0x14); 2784 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 2785 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 2786 } else { 2787 /* for B */ 2788 urtw_write8_m(sc, URTW_DIFS, 0x24); 2789 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 2790 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 2791 } 2792 2793fail: 2794 return (error); 2795} 2796 2797static usb_error_t 2798urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2799{ 2800 usb_error_t error; 2801 2802 if (sens < 0 || sens > 6) 2803 return -1; 2804 2805 if (sens > 4) 2806 urtw_8225_write(sc, 2807 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2808 else 2809 urtw_8225_write(sc, 2810 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2811 2812 sens = 6 - sens; 2813 error = urtw_8225_setgain(sc, sens); 2814 if (error) 2815 goto fail; 2816 2817 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2818 2819fail: 2820 return (error); 2821} 2822 2823static usb_error_t 2824urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2825{ 2826 int i, idx, set; 2827 uint8_t *cck_pwltable; 2828 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2829 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2830 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2831 usb_error_t error; 2832 2833 cck_pwrlvl_max = 11; 2834 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2835 ofdm_pwrlvl_min = 10; 2836 2837 /* CCK power setting */ 2838 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2839 idx = cck_pwrlvl % 6; 2840 set = cck_pwrlvl / 6; 2841 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2842 urtw_8225_txpwr_cck; 2843 2844 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2845 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2846 for (i = 0; i < 8; i++) { 2847 urtw_8187_write_phy_cck(sc, 0x44 + i, 2848 cck_pwltable[idx * 8 + i]); 2849 } 2850 usb_pause_mtx(&sc->sc_mtx, 1); 2851 2852 /* OFDM power setting */ 2853 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2854 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2855 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2856 2857 idx = ofdm_pwrlvl % 6; 2858 set = ofdm_pwrlvl / 6; 2859 2860 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2861 if (error) 2862 goto fail; 2863 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2864 urtw_8187_write_phy_ofdm(sc, 6, 0); 2865 urtw_8187_write_phy_ofdm(sc, 8, 0); 2866 2867 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2868 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2869 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2870 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2871 usb_pause_mtx(&sc->sc_mtx, 1); 2872fail: 2873 return (error); 2874} 2875 2876 2877static usb_error_t 2878urtw_8225_rf_stop(struct urtw_softc *sc) 2879{ 2880 uint8_t data; 2881 usb_error_t error; 2882 2883 urtw_8225_write(sc, 0x4, 0x1f); 2884 2885 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2886 if (error) 2887 goto fail; 2888 2889 urtw_read8_m(sc, URTW_CONFIG3, &data); 2890 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2891 if (sc->sc_flags & URTW_RTL8187B) { 2892 urtw_write32_m(sc, URTW_ANAPARAM2, 2893 URTW_8187B_8225_ANAPARAM2_OFF); 2894 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2895 urtw_write32_m(sc, URTW_ANAPARAM3, 2896 URTW_8187B_8225_ANAPARAM3_OFF); 2897 } else { 2898 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2899 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2900 } 2901 2902 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2903 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2904 if (error) 2905 goto fail; 2906 2907fail: 2908 return (error); 2909} 2910 2911static usb_error_t 2912urtw_8225v2_rf_init(struct urtw_softc *sc) 2913{ 2914#define N(a) (sizeof(a) / sizeof((a)[0])) 2915 int i; 2916 uint16_t data; 2917 uint32_t data32; 2918 usb_error_t error; 2919 2920 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2921 if (error) 2922 goto fail; 2923 2924 error = urtw_8225_usb_init(sc); 2925 if (error) 2926 goto fail; 2927 2928 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2929 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2930 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2931 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2932 2933 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2934 if (error) 2935 goto fail; 2936 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2937 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2938 if (error) 2939 goto fail; 2940 2941 error = urtw_8185_rf_pins_enable(sc); 2942 if (error) 2943 goto fail; 2944 2945 usb_pause_mtx(&sc->sc_mtx, 500); 2946 2947 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2948 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2949 urtw_8225v2_rf_part1[i].val); 2950 } 2951 usb_pause_mtx(&sc->sc_mtx, 50); 2952 2953 urtw_8225_write(sc, 2954 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2955 2956 for (i = 0; i < 95; i++) { 2957 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2958 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2959 urtw_8225v2_rxgain[i]); 2960 } 2961 2962 urtw_8225_write(sc, 2963 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2964 urtw_8225_write(sc, 2965 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2966 urtw_8225_write(sc, 2967 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2968 urtw_8225_write(sc, 2969 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2970 usb_pause_mtx(&sc->sc_mtx, 100); 2971 urtw_8225_write(sc, 2972 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2973 usb_pause_mtx(&sc->sc_mtx, 100); 2974 2975 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2976 if (error != 0) 2977 goto fail; 2978 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2979 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2980 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2981 urtw_8225_write(sc, 2982 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2983 usb_pause_mtx(&sc->sc_mtx, 100); 2984 urtw_8225_write(sc, 2985 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2986 usb_pause_mtx(&sc->sc_mtx, 50); 2987 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2988 if (error != 0) 2989 goto fail; 2990 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2991 device_printf(sc->sc_dev, "RF calibration failed\n"); 2992 } 2993 usb_pause_mtx(&sc->sc_mtx, 100); 2994 2995 urtw_8225_write(sc, 2996 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2997 for (i = 0; i < 128; i++) { 2998 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2999 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3000 } 3001 3002 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 3003 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 3004 urtw_8225v2_rf_part2[i].val); 3005 } 3006 3007 error = urtw_8225v2_setgain(sc, 4); 3008 if (error) 3009 goto fail; 3010 3011 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 3012 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 3013 urtw_8225v2_rf_part3[i].val); 3014 } 3015 3016 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3017 3018 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3019 if (error) 3020 goto fail; 3021 3022 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3023 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3024 3025 /* TX ant A, 0x0 for B */ 3026 error = urtw_8185_tx_antenna(sc, 0x3); 3027 if (error) 3028 goto fail; 3029 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3030 3031 error = urtw_8225_rf_set_chan(sc, 1); 3032fail: 3033 return (error); 3034#undef N 3035} 3036 3037static usb_error_t 3038urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3039{ 3040 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3041 struct ieee80211_channel *c = ic->ic_curchan; 3042 usb_error_t error; 3043 3044 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3045 if (error) 3046 goto fail; 3047 3048 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3049 usb_pause_mtx(&sc->sc_mtx, 10); 3050 3051 urtw_write8_m(sc, URTW_SIFS, 0x22); 3052 3053 if(sc->sc_state == IEEE80211_S_ASSOC && 3054 ic->ic_flags & IEEE80211_F_SHSLOT) 3055 urtw_write8_m(sc, URTW_SLOT, 0x9); 3056 else 3057 urtw_write8_m(sc, URTW_SLOT, 0x14); 3058 3059 if (IEEE80211_IS_CHAN_G(c)) { 3060 /* for G */ 3061 urtw_write8_m(sc, URTW_DIFS, 0x14); 3062 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 3063 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 3064 } else { 3065 /* for B */ 3066 urtw_write8_m(sc, URTW_DIFS, 0x24); 3067 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 3068 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 3069 } 3070 3071fail: 3072 return (error); 3073} 3074 3075static usb_error_t 3076urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3077{ 3078 int i; 3079 int16_t bit; 3080 uint8_t rlen = 12, wlen = 6; 3081 uint16_t o1, o2, o3, tmp; 3082 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3083 uint32_t mask = 0x80000000, value = 0; 3084 usb_error_t error; 3085 3086 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3087 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3088 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3089 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3090 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3091 o1 &= ~URTW_RF_PINS_MAGIC4; 3092 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3093 DELAY(5); 3094 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3095 DELAY(5); 3096 3097 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3098 bit = ((d2w & mask) != 0) ? 1 : 0; 3099 3100 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3101 DELAY(2); 3102 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3103 URTW_BB_HOST_BANG_CLK); 3104 DELAY(2); 3105 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3106 URTW_BB_HOST_BANG_CLK); 3107 DELAY(2); 3108 mask = mask >> 1; 3109 if (i == 2) 3110 break; 3111 bit = ((d2w & mask) != 0) ? 1 : 0; 3112 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3113 URTW_BB_HOST_BANG_CLK); 3114 DELAY(2); 3115 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3116 URTW_BB_HOST_BANG_CLK); 3117 DELAY(2); 3118 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3119 DELAY(1); 3120 } 3121 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3122 URTW_BB_HOST_BANG_CLK); 3123 DELAY(2); 3124 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3125 DELAY(2); 3126 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3127 DELAY(2); 3128 3129 mask = 0x800; 3130 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3131 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3132 o1 | URTW_BB_HOST_BANG_RW); 3133 DELAY(2); 3134 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3135 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3136 DELAY(2); 3137 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3138 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3139 DELAY(2); 3140 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3141 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3142 DELAY(2); 3143 3144 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3145 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3146 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3147 o1 | URTW_BB_HOST_BANG_RW); 3148 DELAY(2); 3149 } 3150 3151 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3152 URTW_BB_HOST_BANG_RW); 3153 DELAY(2); 3154 3155 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3156 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3157 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3158 3159 if (data != NULL) 3160 *data = value; 3161fail: 3162 return (error); 3163} 3164 3165 3166static usb_error_t 3167urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3168{ 3169 int i; 3170 uint8_t *cck_pwrtable; 3171 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3172 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3173 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3174 usb_error_t error; 3175 3176 /* CCK power setting */ 3177 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3178 cck_pwrlvl += sc->sc_txpwr_cck_base; 3179 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3180 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3181 urtw_8225v2_txpwr_cck; 3182 3183 for (i = 0; i < 8; i++) 3184 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3185 3186 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3187 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3188 usb_pause_mtx(&sc->sc_mtx, 1); 3189 3190 /* OFDM power setting */ 3191 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3192 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3193 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3194 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3195 3196 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3197 if (error) 3198 goto fail; 3199 3200 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3201 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3202 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3203 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3204 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3205 3206 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3207 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3208 usb_pause_mtx(&sc->sc_mtx, 1); 3209fail: 3210 return (error); 3211} 3212 3213static usb_error_t 3214urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3215{ 3216 uint8_t *gainp; 3217 usb_error_t error; 3218 3219 /* XXX for A? */ 3220 gainp = urtw_8225v2_gain_bg; 3221 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3222 usb_pause_mtx(&sc->sc_mtx, 1); 3223 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3224 usb_pause_mtx(&sc->sc_mtx, 1); 3225 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3226 usb_pause_mtx(&sc->sc_mtx, 1); 3227 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3228 usb_pause_mtx(&sc->sc_mtx, 1); 3229fail: 3230 return (error); 3231} 3232 3233static usb_error_t 3234urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3235{ 3236 uint32_t data; 3237 usb_error_t error; 3238 3239 *ret = 1; 3240 3241 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3242 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3243 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3244 usb_pause_mtx(&sc->sc_mtx, 500); 3245 3246 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3247 URTW_8225_ADDR_0_DATA_MAGIC1); 3248 3249 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3250 if (error != 0) 3251 goto fail; 3252 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3253 *ret = 0; 3254 else { 3255 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3256 if (error != 0) 3257 goto fail; 3258 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3259 *ret = 0; 3260 } 3261 3262 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3263 URTW_8225_ADDR_0_DATA_MAGIC2); 3264fail: 3265 return (error); 3266} 3267 3268static usb_error_t 3269urtw_8225v2b_rf_init(struct urtw_softc *sc) 3270{ 3271#define N(a) (sizeof(a) / sizeof((a)[0])) 3272 int i; 3273 usb_error_t error; 3274 3275 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3276 urtw_8225_write(sc, urtw_8225v2b_rf_part1[i].reg, 3277 urtw_8225v2b_rf_part1[i].val); 3278 3279 urtw_8225_write(sc, 3280 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 3281 3282 for (i = 0; i < N(urtw_8225v2b_rxgain); i++) { 3283 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3284 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3285 urtw_8225v2b_rxgain[i]); 3286 } 3287 3288 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3289 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3290 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3291 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3292 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3293 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3294 3295 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3296 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3297 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3298 3299 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3300 for (i = 0; i < N(urtw_8225z2_agc); i++) { 3301 urtw_8187_write_phy_ofdm(sc, 0xf, urtw_8225z2_agc[i]); 3302 urtw_8187_write_phy_ofdm(sc, 0xe, 0x80 + i); 3303 urtw_8187_write_phy_ofdm(sc, 0xe, 0); 3304 } 3305 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3306 3307 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3308 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3309 3310 urtw_write32_m(sc, 0xf0, (7 << 12) | (3 << 8) | 0x1c); 3311 urtw_write32_m(sc, 0xf4, (7 << 12) | (3 << 8) | 0x1c); 3312 urtw_write32_m(sc, 0xf8, (7 << 12) | (3 << 8) | 0x1c); 3313 urtw_write32_m(sc, 0xfc, (7 << 12) | (3 << 8) | 0x1c); 3314 urtw_write8_m(sc, URTW_ACM_CONTROL, 0); 3315 3316 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3317 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3318 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3319 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3320fail: 3321 return (error); 3322#undef N 3323} 3324 3325static usb_error_t 3326urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3327{ 3328 int ack; 3329 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3330 usb_error_t error; 3331 3332 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3333 if (error) 3334 goto fail; 3335 3336 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3337 usb_pause_mtx(&sc->sc_mtx, 10); 3338 3339 urtw_write8_m(sc, URTW_SIFS, 0xa); 3340 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 3341 urtw_write8_m(sc, URTW_SLOT, 0x9); 3342 urtw_write8_m(sc, URTW_DIFS, 0x1c); 3343 /* In 8187B, BRSR + 1 ==> EIFS register */ 3344 urtw_write8_m(sc, URTW_BRSR + 1, 0x53); 3345 3346 ack = 112 + 48 + 0x1c; 3347 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3348 72 : 144; 3349 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3350 roundup2(ack, 4)); 3351 } else { 3352 urtw_write8_m(sc, URTW_SLOT, 0x14); 3353 urtw_write8_m(sc, URTW_DIFS, 0x32); 3354 /* In 8187B, BRSR + 1 ==> EIFS register */ 3355 urtw_write8_m(sc, URTW_BRSR + 1, 0x5b); 3356 3357 ack = 112 + 48 + 0x32; 3358 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3359 72 : 144; 3360 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3361 roundup2(ack, 4)); 3362 3363 } 3364 3365fail: 3366 return (error); 3367} 3368 3369static usb_error_t 3370urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3371{ 3372 int i; 3373 uint8_t *cck_pwrtable; 3374 uint8_t cck_pwrlvl_max = 15; 3375 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3376 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3377 usb_error_t error; 3378 3379 /* CCK power setting */ 3380 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3381 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3382 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3383 cck_pwrlvl += sc->sc_txpwr_cck_base; 3384 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3385 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3386 urtw_8225v2b_txpwr_cck; 3387 3388 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3389 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3390 ((cck_pwrlvl <= 11) ? 8 : 16); 3391 else 3392 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3393 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3394 3395 for (i = 0; i < 8; i++) 3396 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3397 3398 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3399 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3400 usb_pause_mtx(&sc->sc_mtx, 1); 3401 3402 /* OFDM power setting */ 3403 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3404 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3405 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3406 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3407 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3408 3409 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3410 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3411 3412 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3413 if (ofdm_pwrlvl <= 11) { 3414 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3415 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3416 } else { 3417 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3418 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3419 } 3420 } else { 3421 if (ofdm_pwrlvl <= 11) { 3422 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3423 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3424 } else if (ofdm_pwrlvl <= 17) { 3425 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3426 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3427 } else { 3428 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3429 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3430 } 3431 } 3432 usb_pause_mtx(&sc->sc_mtx, 1); 3433fail: 3434 return (error); 3435} 3436 3437static usb_error_t 3438urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3439{ 3440 struct usb_device_request req; 3441 usb_error_t error; 3442 3443 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3444 req.bRequest = URTW_8187_GETREGS_REQ; 3445 USETW(req.wValue, val | 0xfe00); 3446 USETW(req.wIndex, 0); 3447 USETW(req.wLength, sizeof(uint8_t)); 3448 3449 error = urtw_do_request(sc, &req, data); 3450 return (error); 3451} 3452 3453static usb_error_t 3454urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3455{ 3456 struct usb_device_request req; 3457 3458 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3459 req.bRequest = URTW_8187_SETREGS_REQ; 3460 USETW(req.wValue, val | 0xfe00); 3461 USETW(req.wIndex, 0); 3462 USETW(req.wLength, sizeof(uint8_t)); 3463 3464 return (urtw_do_request(sc, &req, &data)); 3465} 3466 3467static usb_error_t 3468urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3469{ 3470 uint8_t data; 3471 usb_error_t error; 3472 3473 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3474 if (error) 3475 goto fail; 3476 3477 urtw_read8_m(sc, URTW_CONFIG3, &data); 3478 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3479 urtw_write32_m(sc, URTW_ANAPARAM, val); 3480 urtw_read8_m(sc, URTW_CONFIG3, &data); 3481 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3482 3483 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3484 if (error) 3485 goto fail; 3486fail: 3487 return (error); 3488} 3489 3490static usb_error_t 3491urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3492{ 3493 uint8_t data; 3494 usb_error_t error; 3495 3496 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3497 if (error) 3498 goto fail; 3499 3500 urtw_read8_m(sc, URTW_CONFIG3, &data); 3501 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3502 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3503 urtw_read8_m(sc, URTW_CONFIG3, &data); 3504 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3505 3506 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3507 if (error) 3508 goto fail; 3509fail: 3510 return (error); 3511} 3512 3513static usb_error_t 3514urtw_intr_enable(struct urtw_softc *sc) 3515{ 3516 usb_error_t error; 3517 3518 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3519fail: 3520 return (error); 3521} 3522 3523static usb_error_t 3524urtw_intr_disable(struct urtw_softc *sc) 3525{ 3526 usb_error_t error; 3527 3528 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3529fail: 3530 return (error); 3531} 3532 3533static usb_error_t 3534urtw_reset(struct urtw_softc *sc) 3535{ 3536 uint8_t data; 3537 usb_error_t error; 3538 3539 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3540 if (error) 3541 goto fail; 3542 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3543 if (error) 3544 goto fail; 3545 3546 error = urtw_intr_disable(sc); 3547 if (error) 3548 goto fail; 3549 usb_pause_mtx(&sc->sc_mtx, 100); 3550 3551 error = urtw_write8e(sc, 0x18, 0x10); 3552 if (error != 0) 3553 goto fail; 3554 error = urtw_write8e(sc, 0x18, 0x11); 3555 if (error != 0) 3556 goto fail; 3557 error = urtw_write8e(sc, 0x18, 0x00); 3558 if (error != 0) 3559 goto fail; 3560 usb_pause_mtx(&sc->sc_mtx, 100); 3561 3562 urtw_read8_m(sc, URTW_CMD, &data); 3563 data = (data & 0x2) | URTW_CMD_RST; 3564 urtw_write8_m(sc, URTW_CMD, data); 3565 usb_pause_mtx(&sc->sc_mtx, 100); 3566 3567 urtw_read8_m(sc, URTW_CMD, &data); 3568 if (data & URTW_CMD_RST) { 3569 device_printf(sc->sc_dev, "reset timeout\n"); 3570 goto fail; 3571 } 3572 3573 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3574 if (error) 3575 goto fail; 3576 usb_pause_mtx(&sc->sc_mtx, 100); 3577 3578 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3579 if (error) 3580 goto fail; 3581 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3582 if (error) 3583 goto fail; 3584fail: 3585 return (error); 3586} 3587 3588static usb_error_t 3589urtw_led_ctl(struct urtw_softc *sc, int mode) 3590{ 3591 usb_error_t error = 0; 3592 3593 switch (sc->sc_strategy) { 3594 case URTW_SW_LED_MODE0: 3595 error = urtw_led_mode0(sc, mode); 3596 break; 3597 case URTW_SW_LED_MODE1: 3598 error = urtw_led_mode1(sc, mode); 3599 break; 3600 case URTW_SW_LED_MODE2: 3601 error = urtw_led_mode2(sc, mode); 3602 break; 3603 case URTW_SW_LED_MODE3: 3604 error = urtw_led_mode3(sc, mode); 3605 break; 3606 default: 3607 panic("unsupported LED mode %d\n", sc->sc_strategy); 3608 /* never reach */ 3609 } 3610 3611 return (error); 3612} 3613 3614static usb_error_t 3615urtw_led_mode0(struct urtw_softc *sc, int mode) 3616{ 3617 3618 switch (mode) { 3619 case URTW_LED_CTL_POWER_ON: 3620 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3621 break; 3622 case URTW_LED_CTL_TX: 3623 if (sc->sc_gpio_ledinprogress == 1) 3624 return (0); 3625 3626 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3627 sc->sc_gpio_blinktime = 2; 3628 break; 3629 case URTW_LED_CTL_LINK: 3630 sc->sc_gpio_ledstate = URTW_LED_ON; 3631 break; 3632 default: 3633 panic("unsupported LED mode 0x%x", mode); 3634 /* never reach */ 3635 } 3636 3637 switch (sc->sc_gpio_ledstate) { 3638 case URTW_LED_ON: 3639 if (sc->sc_gpio_ledinprogress != 0) 3640 break; 3641 urtw_led_on(sc, URTW_LED_GPIO); 3642 break; 3643 case URTW_LED_BLINK_NORMAL: 3644 if (sc->sc_gpio_ledinprogress != 0) 3645 break; 3646 sc->sc_gpio_ledinprogress = 1; 3647 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3648 URTW_LED_OFF : URTW_LED_ON; 3649 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3650 break; 3651 case URTW_LED_POWER_ON_BLINK: 3652 urtw_led_on(sc, URTW_LED_GPIO); 3653 usb_pause_mtx(&sc->sc_mtx, 100); 3654 urtw_led_off(sc, URTW_LED_GPIO); 3655 break; 3656 default: 3657 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3658 /* never reach */ 3659 } 3660 return (0); 3661} 3662 3663static usb_error_t 3664urtw_led_mode1(struct urtw_softc *sc, int mode) 3665{ 3666 3667 return (USB_ERR_INVAL); 3668} 3669 3670static usb_error_t 3671urtw_led_mode2(struct urtw_softc *sc, int mode) 3672{ 3673 3674 return (USB_ERR_INVAL); 3675} 3676 3677static usb_error_t 3678urtw_led_mode3(struct urtw_softc *sc, int mode) 3679{ 3680 3681 return (USB_ERR_INVAL); 3682} 3683 3684static usb_error_t 3685urtw_led_on(struct urtw_softc *sc, int type) 3686{ 3687 usb_error_t error; 3688 3689 if (type == URTW_LED_GPIO) { 3690 switch (sc->sc_gpio_ledpin) { 3691 case URTW_LED_PIN_GPIO0: 3692 urtw_write8_m(sc, URTW_GPIO, 0x01); 3693 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3694 break; 3695 default: 3696 panic("unsupported LED PIN type 0x%x", 3697 sc->sc_gpio_ledpin); 3698 /* never reach */ 3699 } 3700 } else { 3701 panic("unsupported LED type 0x%x", type); 3702 /* never reach */ 3703 } 3704 3705 sc->sc_gpio_ledon = 1; 3706fail: 3707 return (error); 3708} 3709 3710static usb_error_t 3711urtw_led_off(struct urtw_softc *sc, int type) 3712{ 3713 usb_error_t error; 3714 3715 if (type == URTW_LED_GPIO) { 3716 switch (sc->sc_gpio_ledpin) { 3717 case URTW_LED_PIN_GPIO0: 3718 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3719 urtw_write8_m(sc, 3720 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3721 break; 3722 default: 3723 panic("unsupported LED PIN type 0x%x", 3724 sc->sc_gpio_ledpin); 3725 /* never reach */ 3726 } 3727 } else { 3728 panic("unsupported LED type 0x%x", type); 3729 /* never reach */ 3730 } 3731 3732 sc->sc_gpio_ledon = 0; 3733 3734fail: 3735 return (error); 3736} 3737 3738static void 3739urtw_led_ch(void *arg) 3740{ 3741 struct urtw_softc *sc = arg; 3742 struct ifnet *ifp = sc->sc_ifp; 3743 struct ieee80211com *ic = ifp->if_l2com; 3744 3745 ieee80211_runtask(ic, &sc->sc_led_task); 3746} 3747 3748static void 3749urtw_ledtask(void *arg, int pending) 3750{ 3751 struct urtw_softc *sc = arg; 3752 3753 if (sc->sc_strategy != URTW_SW_LED_MODE0) 3754 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 3755 3756 URTW_LOCK(sc); 3757 urtw_led_blink(sc); 3758 URTW_UNLOCK(sc); 3759} 3760 3761static usb_error_t 3762urtw_led_blink(struct urtw_softc *sc) 3763{ 3764 uint8_t ing = 0; 3765 usb_error_t error; 3766 3767 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3768 error = urtw_led_on(sc, URTW_LED_GPIO); 3769 else 3770 error = urtw_led_off(sc, URTW_LED_GPIO); 3771 sc->sc_gpio_blinktime--; 3772 if (sc->sc_gpio_blinktime == 0) 3773 ing = 1; 3774 else { 3775 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3776 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3777 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3778 ing = 1; 3779 } 3780 if (ing == 1) { 3781 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3782 sc->sc_gpio_ledon == 0) 3783 error = urtw_led_on(sc, URTW_LED_GPIO); 3784 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3785 sc->sc_gpio_ledon == 1) 3786 error = urtw_led_off(sc, URTW_LED_GPIO); 3787 3788 sc->sc_gpio_blinktime = 0; 3789 sc->sc_gpio_ledinprogress = 0; 3790 return (0); 3791 } 3792 3793 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3794 URTW_LED_ON : URTW_LED_OFF; 3795 3796 switch (sc->sc_gpio_ledstate) { 3797 case URTW_LED_BLINK_NORMAL: 3798 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3799 break; 3800 default: 3801 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3802 /* never reach */ 3803 } 3804 return (0); 3805} 3806 3807static usb_error_t 3808urtw_rx_enable(struct urtw_softc *sc) 3809{ 3810 uint8_t data; 3811 usb_error_t error; 3812 3813 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3814 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3815 3816 error = urtw_rx_setconf(sc); 3817 if (error != 0) 3818 goto fail; 3819 3820 urtw_read8_m(sc, URTW_CMD, &data); 3821 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3822fail: 3823 return (error); 3824} 3825 3826static usb_error_t 3827urtw_tx_enable(struct urtw_softc *sc) 3828{ 3829 uint8_t data8; 3830 uint32_t data; 3831 usb_error_t error; 3832 3833 if (sc->sc_flags & URTW_RTL8187B) { 3834 urtw_read32_m(sc, URTW_TX_CONF, &data); 3835 data &= ~URTW_TX_LOOPBACK_MASK; 3836 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3837 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3838 data &= ~URTW_TX_SWPLCPLEN; 3839 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3840 (7 << 8) | /* short retry limit */ 3841 (7 << 0) | /* long retry limit */ 3842 (7 << 21); /* MAX TX DMA */ 3843 urtw_write32_m(sc, URTW_TX_CONF, data); 3844 3845 urtw_read8_m(sc, URTW_CMD, &data8); 3846 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3847 return (error); 3848 } 3849 3850 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3851 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3852 urtw_write8_m(sc, URTW_CW_CONF, data8); 3853 3854 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3855 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3856 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3857 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3858 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3859 3860 urtw_read32_m(sc, URTW_TX_CONF, &data); 3861 data &= ~URTW_TX_LOOPBACK_MASK; 3862 data |= URTW_TX_LOOPBACK_NONE; 3863 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3864 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3865 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3866 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3867 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3868 data &= ~URTW_TX_SWPLCPLEN; 3869 data |= URTW_TX_NOICV; 3870 urtw_write32_m(sc, URTW_TX_CONF, data); 3871 3872 urtw_read8_m(sc, URTW_CMD, &data8); 3873 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3874fail: 3875 return (error); 3876} 3877 3878static usb_error_t 3879urtw_rx_setconf(struct urtw_softc *sc) 3880{ 3881 struct ifnet *ifp = sc->sc_ifp; 3882 struct ieee80211com *ic = ifp->if_l2com; 3883 uint32_t data; 3884 usb_error_t error; 3885 3886 urtw_read32_m(sc, URTW_RX, &data); 3887 data = data &~ URTW_RX_FILTER_MASK; 3888 if (sc->sc_flags & URTW_RTL8187B) { 3889 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3890 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3891 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3892 URTW_RX_FIFO_THRESHOLD_NONE | 3893 URTW_MAX_RX_DMA_2048 | 3894 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3895 } else { 3896 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3897 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3898 3899 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3900 data = data | URTW_RX_FILTER_ICVERR; 3901 data = data | URTW_RX_FILTER_PWR; 3902 } 3903 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3904 data = data | URTW_RX_FILTER_CRCERR; 3905 3906 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3907 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3908 data = data | URTW_RX_FILTER_ALLMAC; 3909 } else { 3910 data = data | URTW_RX_FILTER_NICMAC; 3911 data = data | URTW_RX_CHECK_BSSID; 3912 } 3913 3914 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3915 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3916 URTW_RX_AUTORESETPHY; 3917 data = data &~ URTW_MAX_RX_DMA_MASK; 3918 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3919 } 3920 3921 urtw_write32_m(sc, URTW_RX, data); 3922fail: 3923 return (error); 3924} 3925 3926static struct mbuf * 3927urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3928 int8_t *nf_p) 3929{ 3930 int actlen, flen, len, nf = -95, rssi; 3931 struct ieee80211_frame *wh; 3932 struct mbuf *m, *mnew; 3933 struct urtw_8187b_rxhdr *bhdr; 3934 struct urtw_softc *sc = data->sc; 3935 struct ifnet *ifp = sc->sc_ifp; 3936 struct ieee80211com *ic = ifp->if_l2com; 3937 uint8_t *desc, quality = 0, rate; 3938 3939 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3940 3941 if (actlen < URTW_MIN_RXBUFSZ) { 3942 ifp->if_ierrors++; 3943 return (NULL); 3944 } 3945 3946 if (sc->sc_flags & URTW_RTL8187B) { 3947 len = actlen - (sizeof(struct urtw_8187b_rxhdr)); 3948 bhdr = (struct urtw_8187b_rxhdr *)(data->buf + len); 3949 desc = data->buf + len; 3950 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3951 if (flen > actlen) { 3952 ifp->if_ierrors++; 3953 return (NULL); 3954 } 3955 rate = (le32toh(bhdr->flags) >> 20) & 0xf; 3956 rssi = 14 + (bhdr->rssi / 2); 3957 if (rssi > 95) 3958 rssi = 95; 3959 } else { 3960 /* 4 dword and 4 byte CRC */ 3961 len = actlen - (4 * 4); 3962 desc = data->buf + len; 3963 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3964 if (flen > actlen) { 3965 ifp->if_ierrors++; 3966 return (NULL); 3967 } 3968 3969 rate = (desc[2] & 0xf0) >> 4; 3970 quality = desc[4] & 0xff; 3971 /* XXX correct? */ 3972 rssi = (desc[6] & 0xfe) >> 1; 3973 if (!urtw_isbmode(rate)) { 3974 rssi = (rssi > 90) ? 90 : ((rssi < 25) ? 25 : rssi); 3975 rssi = ((90 - rssi) * 100) / 65; 3976 } else { 3977 rssi = (rssi > 90) ? 95 : ((rssi < 30) ? 30 : rssi); 3978 rssi = ((95 - rssi) * 100) / 65; 3979 } 3980 } 3981 3982 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 3983 if (mnew == NULL) { 3984 ifp->if_ierrors++; 3985 return (NULL); 3986 } 3987 3988 m = data->m; 3989 data->m = mnew; 3990 data->buf = mtod(mnew, uint8_t *); 3991 3992 /* finalize mbuf */ 3993 m->m_pkthdr.rcvif = ifp; 3994 m->m_pkthdr.len = m->m_len = flen - 4; 3995 3996 if (ieee80211_radiotap_active(ic)) { 3997 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 3998 3999 /* XXX Are variables correct? */ 4000 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4001 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4002 tap->wr_dbm_antsignal = (int8_t)rssi; 4003 } 4004 4005 wh = mtod(m, struct ieee80211_frame *); 4006 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4007 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4008 /* XXX correct? */ 4009 if ((sc->sc_flags & URTW_RTL8187B) == 0) 4010 nf = (quality > 64) ? 0 : ((64 - quality) * 100) / 64; 4011 4012 *rssi_p = rssi; 4013 *nf_p = nf; 4014 4015 return (m); 4016} 4017 4018static void 4019urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4020{ 4021 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4022 struct ifnet *ifp = sc->sc_ifp; 4023 struct ieee80211com *ic = ifp->if_l2com; 4024 struct ieee80211_frame *wh; 4025 struct ieee80211_node *ni; 4026 struct mbuf *m = NULL; 4027 struct urtw_data *data; 4028 int8_t nf = -95; 4029 int rssi = 1; 4030 4031 URTW_ASSERT_LOCKED(sc); 4032 4033 switch (USB_GET_STATE(xfer)) { 4034 case USB_ST_TRANSFERRED: 4035 data = STAILQ_FIRST(&sc->sc_rx_active); 4036 if (data == NULL) 4037 goto setup; 4038 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4039 m = urtw_rxeof(xfer, data, &rssi, &nf); 4040 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4041 /* FALLTHROUGH */ 4042 case USB_ST_SETUP: 4043setup: 4044 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4045 if (data == NULL) { 4046 KASSERT(m == NULL, ("mbuf isn't NULL")); 4047 return; 4048 } 4049 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4050 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4051 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4052 usbd_xfer_max_len(xfer)); 4053 usbd_transfer_submit(xfer); 4054 4055 /* 4056 * To avoid LOR we should unlock our private mutex here to call 4057 * ieee80211_input() because here is at the end of a USB 4058 * callback and safe to unlock. 4059 */ 4060 URTW_UNLOCK(sc); 4061 if (m != NULL) { 4062 wh = mtod(m, struct ieee80211_frame *); 4063 ni = ieee80211_find_rxnode(ic, 4064 (struct ieee80211_frame_min *)wh); 4065 if (ni != NULL) { 4066 (void) ieee80211_input(ni, m, rssi, nf); 4067 /* node is no longer needed */ 4068 ieee80211_free_node(ni); 4069 } else 4070 (void) ieee80211_input_all(ic, m, rssi, nf); 4071 m = NULL; 4072 } 4073 URTW_LOCK(sc); 4074 break; 4075 default: 4076 /* needs it to the inactive queue due to a error. */ 4077 data = STAILQ_FIRST(&sc->sc_rx_active); 4078 if (data != NULL) { 4079 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4080 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4081 } 4082 if (error != USB_ERR_CANCELLED) { 4083 usbd_xfer_set_stall(xfer); 4084 ifp->if_ierrors++; 4085 goto setup; 4086 } 4087 break; 4088 } 4089} 4090 4091static void 4092urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4093{ 4094 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4095 struct ifnet *ifp = sc->sc_ifp; 4096 struct mbuf *m; 4097 4098 URTW_ASSERT_LOCKED(sc); 4099 4100 /* 4101 * Do any tx complete callback. Note this must be done before releasing 4102 * the node reference. 4103 */ 4104 if (data->m) { 4105 m = data->m; 4106 if (m->m_flags & M_TXCB) { 4107 /* XXX status? */ 4108 ieee80211_process_callback(data->ni, m, 0); 4109 } 4110 m_freem(m); 4111 data->m = NULL; 4112 } 4113 if (data->ni) { 4114 ieee80211_free_node(data->ni); 4115 data->ni = NULL; 4116 } 4117 sc->sc_txtimer = 0; 4118 ifp->if_opackets++; 4119 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4120} 4121 4122static void 4123urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4124{ 4125 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4126 struct ifnet *ifp = sc->sc_ifp; 4127 struct urtw_data *data; 4128 4129 URTW_ASSERT_LOCKED(sc); 4130 4131 switch (USB_GET_STATE(xfer)) { 4132 case USB_ST_TRANSFERRED: 4133 data = STAILQ_FIRST(&sc->sc_tx_active); 4134 if (data == NULL) 4135 goto setup; 4136 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4137 urtw_txeof(xfer, data); 4138 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4139 /* FALLTHROUGH */ 4140 case USB_ST_SETUP: 4141setup: 4142 data = STAILQ_FIRST(&sc->sc_tx_pending); 4143 if (data == NULL) { 4144 DPRINTF(sc, URTW_DEBUG_XMIT, 4145 "%s: empty pending queue\n", __func__); 4146 return; 4147 } 4148 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4149 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4150 4151 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4152 usbd_transfer_submit(xfer); 4153 4154 URTW_UNLOCK(sc); 4155 urtw_start(ifp); 4156 URTW_LOCK(sc); 4157 break; 4158 default: 4159 data = STAILQ_FIRST(&sc->sc_tx_active); 4160 if (data == NULL) 4161 goto setup; 4162 if (data->ni != NULL) { 4163 ieee80211_free_node(data->ni); 4164 data->ni = NULL; 4165 ifp->if_oerrors++; 4166 } 4167 if (error != USB_ERR_CANCELLED) { 4168 usbd_xfer_set_stall(xfer); 4169 goto setup; 4170 } 4171 break; 4172 } 4173} 4174 4175static struct urtw_data * 4176_urtw_getbuf(struct urtw_softc *sc) 4177{ 4178 struct urtw_data *bf; 4179 4180 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4181 if (bf != NULL) 4182 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4183 else 4184 bf = NULL; 4185 if (bf == NULL) 4186 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4187 "out of xmit buffers"); 4188 return (bf); 4189} 4190 4191static struct urtw_data * 4192urtw_getbuf(struct urtw_softc *sc) 4193{ 4194 struct urtw_data *bf; 4195 4196 URTW_ASSERT_LOCKED(sc); 4197 4198 bf = _urtw_getbuf(sc); 4199 if (bf == NULL) { 4200 struct ifnet *ifp = sc->sc_ifp; 4201 4202 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4203 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4204 } 4205 return (bf); 4206} 4207 4208static int 4209urtw_isbmode(uint16_t rate) 4210{ 4211 4212 rate = urtw_rtl2rate(rate); 4213 4214 return ((rate <= 22 && rate != 12 && rate != 18) || 4215 rate == 44) ? (1) : (0); 4216} 4217 4218static device_method_t urtw_methods[] = { 4219 DEVMETHOD(device_probe, urtw_match), 4220 DEVMETHOD(device_attach, urtw_attach), 4221 DEVMETHOD(device_detach, urtw_detach), 4222 { 0, 0 } 4223}; 4224static driver_t urtw_driver = { 4225 "urtw", 4226 urtw_methods, 4227 sizeof(struct urtw_softc) 4228}; 4229static devclass_t urtw_devclass; 4230 4231DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4232MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4233MODULE_DEPEND(urtw, usb, 1, 1, 1); 4234