if_urtw.c revision 194099
1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_urtw.c 194099 2009-06-13 04:56:45Z thompsa $"); 19#include <sys/param.h> 20#include <sys/sockio.h> 21#include <sys/sysctl.h> 22#include <sys/lock.h> 23#include <sys/mutex.h> 24#include <sys/mbuf.h> 25#include <sys/kernel.h> 26#include <sys/socket.h> 27#include <sys/systm.h> 28#include <sys/malloc.h> 29#include <sys/module.h> 30#include <sys/bus.h> 31#include <sys/endian.h> 32#include <sys/kdb.h> 33 34#include <machine/bus.h> 35#include <machine/resource.h> 36#include <sys/rman.h> 37 38#include <net/if.h> 39#include <net/if_arp.h> 40#include <net/ethernet.h> 41#include <net/if_dl.h> 42#include <net/if_media.h> 43#include <net/if_types.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/in_systm.h> 48#include <netinet/in_var.h> 49#include <netinet/if_ether.h> 50#include <netinet/ip.h> 51#endif 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_regdomain.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usb_core.h> 59#include <dev/usb/usb_busdma.h> 60#include <dev/usb/usb_debug.h> 61#include <dev/usb/usb_error.h> 62#include <dev/usb/usb_lookup.h> 63#include <dev/usb/usb_request.h> 64#include <dev/usb/usb_util.h> 65#include "usbdevs.h" 66 67#include <dev/usb/wlan/if_urtwreg.h> 68#include <dev/usb/wlan/if_urtwvar.h> 69 70SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 71#ifdef URTW_DEBUG 72int urtw_debug = 0; 73SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RW, &urtw_debug, 0, 74 "control debugging printfs"); 75TUNABLE_INT("hw.usb.urtw.debug", &urtw_debug); 76enum { 77 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 78 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 79 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 80 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 81 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 82 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 83 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 84 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 85 URTW_DEBUG_ANY = 0xffffffff 86}; 87#define DPRINTF(sc, m, fmt, ...) do { \ 88 if (sc->sc_debug & (m)) \ 89 printf(fmt, __VA_ARGS__); \ 90} while (0) 91#else 92#define DPRINTF(sc, m, fmt, ...) do { \ 93 (void) sc; \ 94} while (0) 95#endif 96static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 97SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RW, 98 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 99TUNABLE_INT("hw.usb.urtw.preamble_mode", &urtw_preamble_mode); 100 101/* recognized device vendors/products */ 102#define urtw_lookup(v, p) \ 103 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 104#define URTW_DEV_B(v,p) \ 105 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 106#define URTW_DEV_L(v,p) \ 107 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 108#define URTW_REV_RTL8187B 0 109#define URTW_REV_RTL8187L 1 110static const struct usb_device_id urtw_devs[] = { 111 { USB_VPI(USB_VENDOR_BELKIN, 0x705e, URTW_REV_RTL8187B) }, 112 { USB_VPI(USB_VENDOR_REALTEK, 0x8189, URTW_REV_RTL8187B) }, 113 { USB_VPI(USB_VENDOR_REALTEK, 0x8197, URTW_REV_RTL8187B) }, 114 { USB_VPI(USB_VENDOR_REALTEK, 0x8198, URTW_REV_RTL8187B) }, 115 { USB_VPI(USB_VENDOR_NETGEAR, 0x4260, URTW_REV_RTL8187B) }, 116 { USB_VPI(0x1b75, 0x8187, URTW_REV_RTL8187L) }, 117 { USB_VPI(USB_VENDOR_ASUS, 0x171d, URTW_REV_RTL8187L) }, 118 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 119 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 120 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 121 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 122 URTW_DEV_L(NETGEAR, WG111V2), 123 URTW_DEV_L(REALTEK, RTL8187), 124 { USB_VPI(USB_VENDOR_SITECOMEU, 0x000d, URTW_REV_RTL8187L) }, 125 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 126 { USB_VPI(USB_VENDOR_SURECOM, 0x11f2, URTW_REV_RTL8187L) }, 127 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 128#undef URTW_DEV_L 129#undef URTW_DEV_B 130}; 131 132#define urtw_read8_m(sc, val, data) do { \ 133 error = urtw_read8_c(sc, val, data); \ 134 if (error != 0) \ 135 goto fail; \ 136} while (0) 137#define urtw_write8_m(sc, val, data) do { \ 138 error = urtw_write8_c(sc, val, data); \ 139 if (error != 0) \ 140 goto fail; \ 141} while (0) 142#define urtw_read16_m(sc, val, data) do { \ 143 error = urtw_read16_c(sc, val, data); \ 144 if (error != 0) \ 145 goto fail; \ 146} while (0) 147#define urtw_write16_m(sc, val, data) do { \ 148 error = urtw_write16_c(sc, val, data); \ 149 if (error != 0) \ 150 goto fail; \ 151} while (0) 152#define urtw_read32_m(sc, val, data) do { \ 153 error = urtw_read32_c(sc, val, data); \ 154 if (error != 0) \ 155 goto fail; \ 156} while (0) 157#define urtw_write32_m(sc, val, data) do { \ 158 error = urtw_write32_c(sc, val, data); \ 159 if (error != 0) \ 160 goto fail; \ 161} while (0) 162#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 163 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 164 if (error != 0) \ 165 goto fail; \ 166} while (0) 167#define urtw_8187_write_phy_cck(sc, val, data) do { \ 168 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 169 if (error != 0) \ 170 goto fail; \ 171} while (0) 172#define urtw_8225_write(sc, val, data) do { \ 173 error = urtw_8225_write_c(sc, val, data); \ 174 if (error != 0) \ 175 goto fail; \ 176} while (0) 177 178struct urtw_pair { 179 uint32_t reg; 180 uint32_t val; 181}; 182 183static uint8_t urtw_8225_agc[] = { 184 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 185 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 186 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 187 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 188 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 189 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 190 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 191 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 192 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 193 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 194 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 195 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 196}; 197 198static uint8_t urtw_8225z2_agc[] = { 199 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 200 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 201 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 202 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 203 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 204 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 205 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 206 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 207 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 208 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 209 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 210 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 211}; 212 213static uint32_t urtw_8225_channel[] = { 214 0x0000, /* dummy channel 0 */ 215 0x085c, /* 1 */ 216 0x08dc, /* 2 */ 217 0x095c, /* 3 */ 218 0x09dc, /* 4 */ 219 0x0a5c, /* 5 */ 220 0x0adc, /* 6 */ 221 0x0b5c, /* 7 */ 222 0x0bdc, /* 8 */ 223 0x0c5c, /* 9 */ 224 0x0cdc, /* 10 */ 225 0x0d5c, /* 11 */ 226 0x0ddc, /* 12 */ 227 0x0e5c, /* 13 */ 228 0x0f72, /* 14 */ 229}; 230 231static uint8_t urtw_8225_gain[] = { 232 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 233 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 234 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 235 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 236 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 237 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 238 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 239}; 240 241static struct urtw_pair urtw_8225_rf_part1[] = { 242 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 243 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 244 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 245 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 246}; 247 248static struct urtw_pair urtw_8225_rf_part2[] = { 249 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 250 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 251 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 252 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 253 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 254 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 255 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 256 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 257 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 258 { 0x27, 0x88 } 259}; 260 261static struct urtw_pair urtw_8225_rf_part3[] = { 262 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 263 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 264 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 265 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 266 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 267 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 268 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 269}; 270 271static uint16_t urtw_8225_rxgain[] = { 272 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 273 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 274 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 275 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 276 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 277 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 278 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 279 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 280 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 281 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 282 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 283 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 284}; 285 286static uint8_t urtw_8225_threshold[] = { 287 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 288}; 289 290static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 291 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 292}; 293 294static uint8_t urtw_8225_txpwr_cck[] = { 295 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 296 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 297 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 298 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 299 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 300 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 301}; 302 303static uint8_t urtw_8225_txpwr_cck_ch14[] = { 304 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 305 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 306 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 307 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 308 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 309 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 310}; 311 312static uint8_t urtw_8225_txpwr_ofdm[]={ 313 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 314}; 315 316static uint8_t urtw_8225v2_gain_bg[]={ 317 0x23, 0x15, 0xa5, /* -82-1dbm */ 318 0x23, 0x15, 0xb5, /* -82-2dbm */ 319 0x23, 0x15, 0xc5, /* -82-3dbm */ 320 0x33, 0x15, 0xc5, /* -78dbm */ 321 0x43, 0x15, 0xc5, /* -74dbm */ 322 0x53, 0x15, 0xc5, /* -70dbm */ 323 0x63, 0x15, 0xc5, /* -66dbm */ 324}; 325 326static struct urtw_pair urtw_8225v2_rf_part1[] = { 327 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 328 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 329 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 330 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 331}; 332 333static struct urtw_pair urtw_8225v2b_rf_part1[] = { 334 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 335 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 336 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 337 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 338}; 339 340static struct urtw_pair urtw_8225v2_rf_part2[] = { 341 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 342 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 343 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 344 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 345 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 346 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 347 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 348 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 349 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 350 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 351}; 352 353static struct urtw_pair urtw_8225v2b_rf_part2[] = { 354 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 355 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 356 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 357 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 358 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 359 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 360 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 361 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 362 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 363 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 364 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 365 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 366 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 367 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 368 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 369}; 370 371static struct urtw_pair urtw_8225v2_rf_part3[] = { 372 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 373 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 374 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 375 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 376 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 377 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 378 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 379 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 380}; 381 382static uint16_t urtw_8225v2_rxgain[] = { 383 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 384 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 385 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 386 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 387 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 388 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 389 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 390 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 391 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 392 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 393 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 394 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 395}; 396 397static uint16_t urtw_8225v2b_rxgain[] = { 398 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 399 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 400 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 401 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 402 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 403 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 404 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 405 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 406 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 407 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 408 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 409 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 410}; 411 412static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 413 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 414 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 415 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 416 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 417 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 418 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 419}; 420 421static uint8_t urtw_8225v2_txpwr_cck[] = { 422 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 423}; 424 425static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 426 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 427}; 428 429static uint8_t urtw_8225v2b_txpwr_cck[] = { 430 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 431 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 432 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 433 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 434}; 435 436static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 437 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 438 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 439 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 440 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 441}; 442 443static struct urtw_pair urtw_ratetable[] = { 444 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 445 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 446 { 96, 10 }, { 108, 11 } 447}; 448 449static const uint8_t urtw_8187b_reg_table[][3] = { 450 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 451 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 452 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 453 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 454 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 455 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 456 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 457 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 458 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 459 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 460 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 461 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 462 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 463 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 464 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 465 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 466 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 467 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 468 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 469 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 470 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 471 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 472 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 473 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 474 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 475 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 476 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 477 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 478 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 479 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 480 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 481}; 482 483static usb_callback_t urtw_bulk_rx_callback; 484static usb_callback_t urtw_bulk_tx_callback; 485 486static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 487 [URTW_8187B_BULK_RX] = { 488 .type = UE_BULK, 489 .endpoint = 0x83, 490 .direction = UE_DIR_IN, 491 .bufsize = MCLBYTES, 492 .flags = { 493 .ext_buffer = 1, 494 .pipe_bof = 1, 495 .short_xfer_ok = 1 496 }, 497 .callback = urtw_bulk_rx_callback 498 }, 499 [URTW_8187B_BULK_TX_BE] = { 500 .type = UE_BULK, 501 .endpoint = URTW_8187B_TXPIPE_BE, 502 .direction = UE_DIR_OUT, 503 .bufsize = URTW_TX_MAXSIZE, 504 .flags = { 505 .ext_buffer = 1, 506 .force_short_xfer = 1, 507 .pipe_bof = 1, 508 }, 509 .callback = urtw_bulk_tx_callback, 510 .timeout = URTW_DATA_TIMEOUT 511 }, 512 [URTW_8187B_BULK_TX_BK] = { 513 .type = UE_BULK, 514 .endpoint = URTW_8187B_TXPIPE_BK, 515 .direction = UE_DIR_OUT, 516 .bufsize = URTW_TX_MAXSIZE, 517 .flags = { 518 .ext_buffer = 1, 519 .force_short_xfer = 1, 520 .pipe_bof = 1, 521 }, 522 .callback = urtw_bulk_tx_callback, 523 .timeout = URTW_DATA_TIMEOUT 524 }, 525 [URTW_8187B_BULK_TX_VI] = { 526 .type = UE_BULK, 527 .endpoint = URTW_8187B_TXPIPE_VI, 528 .direction = UE_DIR_OUT, 529 .bufsize = URTW_TX_MAXSIZE, 530 .flags = { 531 .ext_buffer = 1, 532 .force_short_xfer = 1, 533 .pipe_bof = 1, 534 }, 535 .callback = urtw_bulk_tx_callback, 536 .timeout = URTW_DATA_TIMEOUT 537 }, 538 [URTW_8187B_BULK_TX_VO] = { 539 .type = UE_BULK, 540 .endpoint = URTW_8187B_TXPIPE_VO, 541 .direction = UE_DIR_OUT, 542 .bufsize = URTW_TX_MAXSIZE, 543 .flags = { 544 .ext_buffer = 1, 545 .force_short_xfer = 1, 546 .pipe_bof = 1, 547 }, 548 .callback = urtw_bulk_tx_callback, 549 .timeout = URTW_DATA_TIMEOUT 550 }, 551 [URTW_8187B_BULK_TX_EP12] = { 552 .type = UE_BULK, 553 .endpoint = 0xc, 554 .direction = UE_DIR_OUT, 555 .bufsize = URTW_TX_MAXSIZE, 556 .flags = { 557 .ext_buffer = 1, 558 .force_short_xfer = 1, 559 .pipe_bof = 1, 560 }, 561 .callback = urtw_bulk_tx_callback, 562 .timeout = URTW_DATA_TIMEOUT 563 } 564}; 565 566static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 567 [URTW_8187L_BULK_RX] = { 568 .type = UE_BULK, 569 .endpoint = 0x81, 570 .direction = UE_DIR_IN, 571 .bufsize = MCLBYTES, 572 .flags = { 573 .ext_buffer = 1, 574 .pipe_bof = 1, 575 .short_xfer_ok = 1 576 }, 577 .callback = urtw_bulk_rx_callback 578 }, 579 [URTW_8187L_BULK_TX_LOW] = { 580 .type = UE_BULK, 581 .endpoint = 0x2, 582 .direction = UE_DIR_OUT, 583 .bufsize = URTW_TX_MAXSIZE, 584 .flags = { 585 .ext_buffer = 1, 586 .force_short_xfer = 1, 587 .pipe_bof = 1, 588 }, 589 .callback = urtw_bulk_tx_callback, 590 .timeout = URTW_DATA_TIMEOUT 591 }, 592 [URTW_8187L_BULK_TX_NORMAL] = { 593 .type = UE_BULK, 594 .endpoint = 0x3, 595 .direction = UE_DIR_OUT, 596 .bufsize = URTW_TX_MAXSIZE, 597 .flags = { 598 .ext_buffer = 1, 599 .force_short_xfer = 1, 600 .pipe_bof = 1, 601 }, 602 .callback = urtw_bulk_tx_callback, 603 .timeout = URTW_DATA_TIMEOUT 604 }, 605}; 606 607static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 608 const char name[IFNAMSIZ], int unit, int opmode, 609 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN], 610 const uint8_t mac[IEEE80211_ADDR_LEN]); 611static void urtw_vap_delete(struct ieee80211vap *); 612static void urtw_init(void *); 613static void urtw_stop(struct ifnet *, int); 614static void urtw_stop_locked(struct ifnet *, int); 615static int urtw_ioctl(struct ifnet *, u_long, caddr_t); 616static void urtw_start(struct ifnet *); 617static int urtw_alloc_rx_data_list(struct urtw_softc *); 618static int urtw_alloc_tx_data_list(struct urtw_softc *); 619static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 620 const struct ieee80211_bpf_params *); 621static void urtw_scan_start(struct ieee80211com *); 622static void urtw_scan_end(struct ieee80211com *); 623static void urtw_set_channel(struct ieee80211com *); 624static void urtw_update_mcast(struct ifnet *); 625static int urtw_tx_start(struct urtw_softc *, 626 struct ieee80211_node *, struct mbuf *, 627 struct urtw_data *, int); 628static int urtw_newstate(struct ieee80211vap *, 629 enum ieee80211_state, int); 630static void urtw_led_ch(void *); 631static void urtw_ledtask(void *, int); 632static void urtw_watchdog(void *); 633static void urtw_set_multi(void *); 634static int urtw_isbmode(uint16_t); 635static uint16_t urtw_rate2rtl(int); 636static uint16_t urtw_rtl2rate(int); 637static usb_error_t urtw_set_rate(struct urtw_softc *); 638static usb_error_t urtw_update_msr(struct urtw_softc *); 639static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 640static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 641static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 642static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 643static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 644static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 645static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 646static usb_error_t urtw_eprom_ck(struct urtw_softc *); 647static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 648 int); 649static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 650 uint32_t *); 651static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 652static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 653static usb_error_t urtw_get_macaddr(struct urtw_softc *); 654static usb_error_t urtw_get_txpwr(struct urtw_softc *); 655static usb_error_t urtw_get_rfchip(struct urtw_softc *); 656static usb_error_t urtw_led_init(struct urtw_softc *); 657static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 658static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 659static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 660 uint32_t); 661static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 662 uint8_t, uint32_t); 663static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 664 uint32_t); 665static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 666static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 667static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 668 uint16_t); 669static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 670 uint16_t *); 671static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 672 uint32_t *); 673static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 674static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 675static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 676static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 677static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 678static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 679static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 680static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 681static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 682static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 683static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 684static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 685static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 686static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 687static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 688static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 689static usb_error_t urtw_intr_enable(struct urtw_softc *); 690static usb_error_t urtw_intr_disable(struct urtw_softc *); 691static usb_error_t urtw_reset(struct urtw_softc *); 692static usb_error_t urtw_led_on(struct urtw_softc *, int); 693static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 694static usb_error_t urtw_led_blink(struct urtw_softc *); 695static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 696static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 697static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 698static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 699static usb_error_t urtw_rx_setconf(struct urtw_softc *); 700static usb_error_t urtw_rx_enable(struct urtw_softc *); 701static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 702static void urtw_free_tx_data_list(struct urtw_softc *); 703static void urtw_free_rx_data_list(struct urtw_softc *); 704static void urtw_free_data_list(struct urtw_softc *, 705 struct urtw_data data[], int, int); 706static usb_error_t urtw_adapter_start(struct urtw_softc *); 707static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 708static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 709static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 710static usb_error_t urtw_write16_i(struct urtw_softc *, int, uint16_t, int); 711static usb_error_t urtw_write8_i(struct urtw_softc *, int, uint8_t, int); 712static usb_error_t urtw_write32_i(struct urtw_softc *, int, uint32_t, int); 713static usb_error_t urtw_do_request(struct urtw_softc *, 714 struct usb_device_request *, void *); 715static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 716static usb_error_t urtw_led_off(struct urtw_softc *, int); 717static void urtw_abort_xfers(struct urtw_softc *); 718static struct urtw_data * 719 urtw_getbuf(struct urtw_softc *sc); 720 721static int 722urtw_match(device_t dev) 723{ 724 struct usb_attach_arg *uaa = device_get_ivars(dev); 725 726 if (uaa->usb_mode != USB_MODE_HOST) 727 return (ENXIO); 728 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 729 return (ENXIO); 730 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 731 return (ENXIO); 732 733 return (usb2_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 734} 735 736static int 737urtw_attach(device_t dev) 738{ 739 const struct usb_config *setup_start; 740 int ret = ENXIO; 741 struct urtw_softc *sc = device_get_softc(dev); 742 struct usb_attach_arg *uaa = device_get_ivars(dev); 743 struct ieee80211com *ic; 744 struct ifnet *ifp; 745 uint8_t bands, iface_index = URTW_IFACE_INDEX; /* XXX */ 746 uint16_t n_setup; 747 uint32_t data; 748 usb_error_t error; 749 750 device_set_usb2_desc(dev); 751 752 sc->sc_dev = dev; 753 sc->sc_udev = uaa->device; 754 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 755 sc->sc_flags |= URTW_RTL8187B; 756#ifdef URTW_DEBUG 757 sc->sc_debug = urtw_debug; 758#endif 759 760 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 761 MTX_DEF); 762 usb2_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 763 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 764 callout_init(&sc->sc_watchdog_ch, 0); 765 766 if (sc->sc_flags & URTW_RTL8187B) { 767 setup_start = urtw_8187b_usbconfig; 768 n_setup = URTW_8187B_N_XFERS; 769 } else { 770 setup_start = urtw_8187l_usbconfig; 771 n_setup = URTW_8187L_N_XFERS; 772 } 773 774 error = usb2_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 775 setup_start, n_setup, sc, &sc->sc_mtx); 776 if (error) { 777 device_printf(dev, "could not allocate USB transfers, " 778 "err=%s\n", usb2_errstr(error)); 779 ret = ENXIO; 780 goto fail0; 781 } 782 783 URTW_LOCK(sc); 784 785 urtw_read32_m(sc, URTW_RX, &data); 786 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 787 URTW_EEPROM_93C46; 788 789 error = urtw_get_rfchip(sc); 790 if (error != 0) 791 goto fail; 792 error = urtw_get_macaddr(sc); 793 if (error != 0) 794 goto fail; 795 error = urtw_get_txpwr(sc); 796 if (error != 0) 797 goto fail; 798 error = urtw_led_init(sc); 799 if (error != 0) 800 goto fail; 801 802 URTW_UNLOCK(sc); 803 804 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 805 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 806 sc->sc_currate = 3; 807 sc->sc_preamble_mode = urtw_preamble_mode; 808 809 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211); 810 if (ifp == NULL) { 811 device_printf(sc->sc_dev, "can not allocate ifnet\n"); 812 ret = ENOMEM; 813 goto fail1; 814 } 815 816 ifp->if_softc = sc; 817 if_initname(ifp, "urtw", device_get_unit(sc->sc_dev)); 818 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 819 ifp->if_init = urtw_init; 820 ifp->if_ioctl = urtw_ioctl; 821 ifp->if_start = urtw_start; 822 /* XXX URTW_TX_DATA_LIST_COUNT */ 823 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 824 ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 825 IFQ_SET_READY(&ifp->if_snd); 826 827 ic = ifp->if_l2com; 828 ic->ic_ifp = ifp; 829 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 830 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 831 832 /* set device capabilities */ 833 ic->ic_caps = 834 IEEE80211_C_STA | /* station mode */ 835 IEEE80211_C_MONITOR | /* monitor mode supported */ 836 IEEE80211_C_TXPMGT | /* tx power management */ 837 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 838 IEEE80211_C_SHSLOT | /* short slot time supported */ 839 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 840 IEEE80211_C_WPA; /* 802.11i */ 841 842 bands = 0; 843 setbit(&bands, IEEE80211_MODE_11B); 844 setbit(&bands, IEEE80211_MODE_11G); 845 ieee80211_init_channels(ic, NULL, &bands); 846 847 ieee80211_ifattach(ic, sc->sc_bssid); 848 ic->ic_raw_xmit = urtw_raw_xmit; 849 ic->ic_scan_start = urtw_scan_start; 850 ic->ic_scan_end = urtw_scan_end; 851 ic->ic_set_channel = urtw_set_channel; 852 853 ic->ic_vap_create = urtw_vap_create; 854 ic->ic_vap_delete = urtw_vap_delete; 855 ic->ic_update_mcast = urtw_update_mcast; 856 857 ieee80211_radiotap_attach(ic, 858 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 859 URTW_TX_RADIOTAP_PRESENT, 860 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 861 URTW_RX_RADIOTAP_PRESENT); 862 863 if (bootverbose) 864 ieee80211_announce(ic); 865 return (0); 866 867fail: URTW_UNLOCK(sc); 868fail1: usb2_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 869 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 870fail0: 871 return (ret); 872} 873 874static int 875urtw_detach(device_t dev) 876{ 877 struct urtw_softc *sc = device_get_softc(dev); 878 struct ifnet *ifp = sc->sc_ifp; 879 struct ieee80211com *ic = ifp->if_l2com; 880 881 if (!device_is_attached(dev)) 882 return (0); 883 884 urtw_stop(ifp, 1); 885 ieee80211_draintask(ic, &sc->sc_led_task); 886 887 usb2_callout_drain(&sc->sc_led_ch); 888 callout_drain(&sc->sc_watchdog_ch); 889 890 usb2_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 891 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 892 ieee80211_ifdetach(ic); 893 894 urtw_free_tx_data_list(sc); 895 urtw_free_rx_data_list(sc); 896 897 if_free(ifp); 898 mtx_destroy(&sc->sc_mtx); 899 900 return (0); 901} 902 903static void 904urtw_free_tx_data_list(struct urtw_softc *sc) 905{ 906 907 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 908} 909 910static void 911urtw_free_rx_data_list(struct urtw_softc *sc) 912{ 913 914 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 915} 916 917static void 918urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 919 int fillmbuf) 920{ 921 int i; 922 923 for (i = 0; i < ndata; i++) { 924 struct urtw_data *dp = &data[i]; 925 926 if (fillmbuf == 1) { 927 if (dp->m != NULL) { 928 m_freem(dp->m); 929 dp->m = NULL; 930 dp->buf = NULL; 931 } 932 } else { 933 if (dp->buf != NULL) { 934 free(dp->buf, M_USBDEV); 935 dp->buf = NULL; 936 } 937 } 938 if (dp->ni != NULL) { 939 ieee80211_free_node(dp->ni); 940 dp->ni = NULL; 941 } 942 } 943} 944 945static struct ieee80211vap * 946urtw_vap_create(struct ieee80211com *ic, 947 const char name[IFNAMSIZ], int unit, int opmode, int flags, 948 const uint8_t bssid[IEEE80211_ADDR_LEN], 949 const uint8_t mac[IEEE80211_ADDR_LEN]) 950{ 951 struct urtw_vap *uvp; 952 struct ieee80211vap *vap; 953 954 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 955 return (NULL); 956 uvp = (struct urtw_vap *) malloc(sizeof(struct urtw_vap), 957 M_80211_VAP, M_NOWAIT | M_ZERO); 958 if (uvp == NULL) 959 return (NULL); 960 vap = &uvp->vap; 961 /* enable s/w bmiss handling for sta mode */ 962 ieee80211_vap_setup(ic, vap, name, unit, opmode, 963 flags | IEEE80211_CLONE_NOBEACONS, bssid, mac); 964 965 /* override state transition machine */ 966 uvp->newstate = vap->iv_newstate; 967 vap->iv_newstate = urtw_newstate; 968 969 /* complete setup */ 970 ieee80211_vap_attach(vap, ieee80211_media_change, 971 ieee80211_media_status); 972 ic->ic_opmode = opmode; 973 return (vap); 974} 975 976static void 977urtw_vap_delete(struct ieee80211vap *vap) 978{ 979 struct urtw_vap *uvp = URTW_VAP(vap); 980 981 ieee80211_vap_detach(vap); 982 free(uvp, M_80211_VAP); 983} 984 985static void 986urtw_init_locked(void *arg) 987{ 988 int ret; 989 struct urtw_softc *sc = arg; 990 struct ifnet *ifp = sc->sc_ifp; 991 usb_error_t error; 992 993 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 994 urtw_stop_locked(ifp, 0); 995 996 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 997 urtw_adapter_start(sc); 998 if (error != 0) 999 goto fail; 1000 1001 /* reset softc variables */ 1002 sc->sc_txtimer = 0; 1003 1004 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1005 ret = urtw_alloc_rx_data_list(sc); 1006 if (error != 0) 1007 goto fail; 1008 ret = urtw_alloc_tx_data_list(sc); 1009 if (error != 0) 1010 goto fail; 1011 sc->sc_flags |= URTW_INIT_ONCE; 1012 } 1013 1014 error = urtw_rx_enable(sc); 1015 if (error != 0) 1016 goto fail; 1017 error = urtw_tx_enable(sc); 1018 if (error != 0) 1019 goto fail; 1020 1021 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1022 ifp->if_drv_flags |= IFF_DRV_RUNNING; 1023 1024 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1025fail: 1026 return; 1027} 1028 1029static void 1030urtw_init(void *arg) 1031{ 1032 struct urtw_softc *sc = arg; 1033 1034 URTW_LOCK(sc); 1035 urtw_init_locked(arg); 1036 URTW_UNLOCK(sc); 1037} 1038 1039static usb_error_t 1040urtw_adapter_start_b(struct urtw_softc *sc) 1041{ 1042#define N(a) (sizeof(a) / sizeof((a)[0])) 1043 int i; 1044 uint8_t data8; 1045 usb_error_t error; 1046 1047 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1048 if (error) 1049 goto fail; 1050 1051 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1052 urtw_write8_m(sc, URTW_CONFIG3, 1053 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1054 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1055 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1056 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1057 1058 urtw_write8_m(sc, 0x61, 0x10); 1059 urtw_read8_m(sc, 0x62, &data8); 1060 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1061 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1062 1063 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1064 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1065 urtw_write8_m(sc, URTW_CONFIG3, data8); 1066 1067 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1068 if (error) 1069 goto fail; 1070 1071 error = urtw_8187b_cmd_reset(sc); 1072 if (error) 1073 goto fail; 1074 1075 urtw_write16_m(sc, 0x2d, 0xfff); 1076 urtw_read8_m(sc, URTW_CW_CONF, &data8); 1077 urtw_write8_m(sc, URTW_CW_CONF, data8 | URTW_CW_CONF_PERPACKET_RETRY); 1078 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 1079 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN | 1080 URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 1081 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 1082 1083 error = urtw_write16_i(sc, 0xe0, 0xfff, 1); 1084 if (error) 1085 goto fail; 1086 1087 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 1088 urtw_write8_m(sc, URTW_RATE_FALLBACK, data8 | URTW_RATE_FALLBACK_ENABLE); 1089 1090 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1091 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1092 error = urtw_write16_i(sc, 0xd4, 0xffff, 1); 1093 if (error) 1094 goto fail; 1095 1096 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1097 if (error) 1098 goto fail; 1099 urtw_read8_m(sc, URTW_CONFIG1, &data8); 1100 urtw_write8_m(sc, URTW_CONFIG1, (data8 & 0x3f) | 0x80); 1101 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1102 if (error) 1103 goto fail; 1104 1105 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1106 for (i = 0; i < N(urtw_8187b_reg_table); i++) { 1107 error = urtw_write8_i(sc, urtw_8187b_reg_table[i][0], 1108 urtw_8187b_reg_table[i][1], urtw_8187b_reg_table[i][2]); 1109 if (error) 1110 goto fail; 1111 } 1112 1113 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 1114 urtw_write16_m(sc, URTW_INT_MIG, 0); 1115 1116 error = urtw_write32_i(sc, 0xf0, 0, 1); 1117 if (error) 1118 goto fail; 1119 error = urtw_write32_i(sc, 0xf4, 0, 1); 1120 if (error) 1121 goto fail; 1122 error = urtw_write8_i(sc, 0xf8, 0, 1); 1123 if (error) 1124 goto fail; 1125 1126 urtw_write32_m(sc, URTW_RF_TIMING, 0x00004001); 1127 1128 error = urtw_write16_i(sc, 0x72, 0x569a, 2); 1129 if (error) 1130 goto fail; 1131 1132 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1133 if (error) 1134 goto fail; 1135 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1136 urtw_write8_m(sc, URTW_CONFIG3, data8 | URTW_CONFIG3_ANAPARAM_WRITE); 1137 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1138 if (error) 1139 goto fail; 1140 1141 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 1142 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 1143 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 1144 usb2_pause_mtx(&sc->sc_mtx, 100); 1145 1146 error = sc->sc_rf_init(sc); 1147 if (error != 0) 1148 goto fail; 1149 1150 error = urtw_intr_enable(sc); 1151 if (error) 1152 goto fail; 1153 1154 error = urtw_write8e(sc, 0x41, 0xf4); 1155 if (error) 1156 goto fail; 1157 error = urtw_write8e(sc, 0x40, 0x00); 1158 if (error) 1159 goto fail; 1160 error = urtw_write8e(sc, 0x42, 0x00); 1161 if (error) 1162 goto fail; 1163 error = urtw_write8e(sc, 0x42, 0x01); 1164 if (error) 1165 goto fail; 1166 error = urtw_write8e(sc, 0x40, 0x0f); 1167 if (error) 1168 goto fail; 1169 error = urtw_write8e(sc, 0x42, 0x00); 1170 if (error) 1171 goto fail; 1172 error = urtw_write8e(sc, 0x42, 0x01); 1173 if (error) 1174 goto fail; 1175 1176 urtw_read8_m(sc, 0xdb, &data8); 1177 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1178 error = urtw_write16_i(sc, 0x72, 0x59fa, 3); 1179 if (error) 1180 goto fail; 1181 error = urtw_write16_i(sc, 0x74, 0x59d2, 3); 1182 if (error) 1183 goto fail; 1184 error = urtw_write16_i(sc, 0x76, 0x59d2, 3); 1185 if (error) 1186 goto fail; 1187 error = urtw_write16_i(sc, 0x78, 0x19fa, 3); 1188 if (error) 1189 goto fail; 1190 error = urtw_write16_i(sc, 0x7a, 0x19fa, 3); 1191 if (error) 1192 goto fail; 1193 error = urtw_write16_i(sc, 0x7c, 0x00d0, 3); 1194 if (error) 1195 goto fail; 1196 urtw_write8_m(sc, 0x61, 0); 1197 error = urtw_write8_i(sc, 0x80, 0x0f, 1); 1198 if (error) 1199 goto fail; 1200 error = urtw_write8_i(sc, 0x83, 0x03, 1); 1201 if (error) 1202 goto fail; 1203 urtw_write8_m(sc, 0xda, 0x10); 1204 error = urtw_write8_i(sc, 0x4d, 0x08, 2); 1205 if (error) 1206 goto fail; 1207 1208 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321B); 1209 1210 error = urtw_write16_i(sc, 0xec, 0x800, 1); 1211 if (error) 1212 goto fail; 1213 1214fail: 1215 return (error); 1216#undef N 1217} 1218 1219static usb_error_t 1220urtw_adapter_start(struct urtw_softc *sc) 1221{ 1222 usb_error_t error; 1223 1224 error = urtw_reset(sc); 1225 if (error) 1226 goto fail; 1227 1228 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1229 urtw_write8_m(sc, URTW_GPIO, 0); 1230 1231 /* for led */ 1232 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1233 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1234 if (error != 0) 1235 goto fail; 1236 1237 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1238 if (error) 1239 goto fail; 1240 /* applying MAC address again. */ 1241 urtw_write32_m(sc, URTW_MAC0, ((uint32_t *)sc->sc_bssid)[0]); 1242 urtw_write16_m(sc, URTW_MAC4, ((uint32_t *)sc->sc_bssid)[1] & 0xffff); 1243 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1244 if (error) 1245 goto fail; 1246 1247 error = urtw_update_msr(sc); 1248 if (error) 1249 goto fail; 1250 1251 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1252 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1253 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1254 error = urtw_set_rate(sc); 1255 if (error != 0) 1256 goto fail; 1257 1258 error = sc->sc_rf_init(sc); 1259 if (error != 0) 1260 goto fail; 1261 if (sc->sc_rf_set_sens != NULL) 1262 sc->sc_rf_set_sens(sc, sc->sc_sens); 1263 1264 /* XXX correct? to call write16 */ 1265 urtw_write16_m(sc, URTW_PSR, 1); 1266 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1267 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1268 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1269 /* XXX correct? to call write16 */ 1270 urtw_write16_m(sc, URTW_PSR, 0); 1271 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1272 1273 error = urtw_intr_enable(sc); 1274 if (error != 0) 1275 goto fail; 1276 1277fail: 1278 return (error); 1279} 1280 1281static usb_error_t 1282urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1283{ 1284 uint8_t data; 1285 usb_error_t error; 1286 1287 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1288 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1289 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1290 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1291fail: 1292 return (error); 1293} 1294 1295static usb_error_t 1296urtw_8187b_cmd_reset(struct urtw_softc *sc) 1297{ 1298 int i; 1299 uint8_t data8; 1300 usb_error_t error; 1301 1302 /* XXX the code can be duplicate with urtw_reset(). */ 1303 urtw_read8_m(sc, URTW_CMD, &data8); 1304 data8 = (data8 & 0x2) | URTW_CMD_RST; 1305 urtw_write8_m(sc, URTW_CMD, data8); 1306 1307 for (i = 0; i < 20; i++) { 1308 usb2_pause_mtx(&sc->sc_mtx, 2); 1309 urtw_read8_m(sc, URTW_CMD, &data8); 1310 if (!(data8 & URTW_CMD_RST)) 1311 break; 1312 } 1313 if (i >= 20) { 1314 device_printf(sc->sc_dev, "reset timeout\n"); 1315 goto fail; 1316 } 1317 1318 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 1319 if (error) 1320 goto fail; 1321 1322 for (i = 0; i < 20; i++) { 1323 usb2_pause_mtx(&sc->sc_mtx, 4); 1324 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 1325 if (!(data8 & URTW_EPROM_CMD_CONFIG)) 1326 break; 1327 } 1328 if (i >= 20) { 1329 device_printf(sc->sc_dev, "eeprom reset timeout\n"); 1330 goto fail; 1331 } 1332 1333fail: 1334 return (error); 1335} 1336 1337static usb_error_t 1338urtw_write16_i(struct urtw_softc *sc, int val, uint16_t data, int idx) 1339{ 1340 struct usb_device_request req; 1341 1342 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1343 req.bRequest = URTW_8187_SETREGS_REQ; 1344 USETW(req.wValue, val | 0xff00); 1345 USETW(req.wIndex, idx & 0x3); 1346 USETW(req.wLength, sizeof(uint16_t)); 1347 1348 return (urtw_do_request(sc, &req, &data)); 1349} 1350 1351static usb_error_t 1352urtw_do_request(struct urtw_softc *sc, 1353 struct usb_device_request *req, void *data) 1354{ 1355 usb_error_t err; 1356 int ntries = 10; 1357 1358 URTW_ASSERT_LOCKED(sc); 1359 1360 while (ntries--) { 1361 err = usb2_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1362 req, data, 0, NULL, 250 /* ms */); 1363 if (err == 0) 1364 break; 1365 1366 DPRINTF(sc, URTW_DEBUG_INIT, 1367 "Control request failed, %s (retrying)\n", 1368 usb2_errstr(err)); 1369 usb2_pause_mtx(&sc->sc_mtx, hz / 100); 1370 } 1371 return (err); 1372} 1373 1374static usb_error_t 1375urtw_write8_i(struct urtw_softc *sc, int val, uint8_t data, int idx) 1376{ 1377 struct usb_device_request req; 1378 1379 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1380 req.bRequest = URTW_8187_SETREGS_REQ; 1381 USETW(req.wValue, val | 0xff00); 1382 USETW(req.wIndex, idx & 0x3); 1383 USETW(req.wLength, sizeof(uint8_t)); 1384 1385 return (urtw_do_request(sc, &req, &data)); 1386} 1387 1388static usb_error_t 1389urtw_write32_i(struct urtw_softc *sc, int val, uint32_t data, int idx) 1390{ 1391 struct usb_device_request req; 1392 1393 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1394 req.bRequest = URTW_8187_SETREGS_REQ; 1395 USETW(req.wValue, val | 0xff00); 1396 USETW(req.wIndex, idx & 0x3); 1397 USETW(req.wLength, sizeof(uint32_t)); 1398 1399 return (urtw_do_request(sc, &req, &data)); 1400} 1401 1402static void 1403urtw_stop_locked(struct ifnet *ifp, int disable) 1404{ 1405 struct urtw_softc *sc = ifp->if_softc; 1406 uint8_t data8; 1407 usb_error_t error; 1408 1409 (void)disable; 1410 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1411 1412 error = urtw_intr_disable(sc); 1413 if (error) 1414 goto fail; 1415 urtw_read8_m(sc, URTW_CMD, &data8); 1416 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1417 urtw_write8_m(sc, URTW_CMD, data8); 1418 1419 error = sc->sc_rf_stop(sc); 1420 if (error != 0) 1421 goto fail; 1422 1423 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1424 if (error) 1425 goto fail; 1426 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1427 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1428 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1429 if (error) 1430 goto fail; 1431fail: 1432 if (error) 1433 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1434 usb2_errstr(error)); 1435 1436 usb2_callout_stop(&sc->sc_led_ch); 1437 callout_stop(&sc->sc_watchdog_ch); 1438 1439 urtw_abort_xfers(sc); 1440} 1441 1442static void 1443urtw_stop(struct ifnet *ifp, int disable) 1444{ 1445 struct urtw_softc *sc = ifp->if_softc; 1446 1447 URTW_LOCK(sc); 1448 urtw_stop_locked(ifp, disable); 1449 URTW_UNLOCK(sc); 1450} 1451 1452static void 1453urtw_abort_xfers(struct urtw_softc *sc) 1454{ 1455 int i, max; 1456 1457 URTW_ASSERT_LOCKED(sc); 1458 1459 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1460 URTW_8187L_N_XFERS; 1461 1462 /* abort any pending transfers */ 1463 for (i = 0; i < max; i++) 1464 usb2_transfer_stop(sc->sc_xfer[i]); 1465} 1466 1467static int 1468urtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1469{ 1470 struct urtw_softc *sc = ifp->if_softc; 1471 struct ieee80211com *ic = ifp->if_l2com; 1472 struct ifreq *ifr = (struct ifreq *) data; 1473 int error = 0, startall = 0; 1474 1475 switch (cmd) { 1476 case SIOCSIFFLAGS: 1477 if (ifp->if_flags & IFF_UP) { 1478 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1479 if ((ifp->if_flags ^ sc->sc_if_flags) & 1480 (IFF_ALLMULTI | IFF_PROMISC)) 1481 urtw_set_multi(sc); 1482 } else { 1483 urtw_init(ifp->if_softc); 1484 startall = 1; 1485 } 1486 } else { 1487 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1488 urtw_stop(ifp, 1); 1489 } 1490 sc->sc_if_flags = ifp->if_flags; 1491 if (startall) 1492 ieee80211_start_all(ic); 1493 break; 1494 case SIOCGIFMEDIA: 1495 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1496 break; 1497 case SIOCGIFADDR: 1498 error = ether_ioctl(ifp, cmd, data); 1499 break; 1500 default: 1501 error = EINVAL; 1502 break; 1503 } 1504 1505 return (error); 1506} 1507 1508static void 1509urtw_start(struct ifnet *ifp) 1510{ 1511 struct urtw_data *bf; 1512 struct urtw_softc *sc = ifp->if_softc; 1513 struct ieee80211_node *ni; 1514 struct mbuf *m; 1515 1516 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1517 return; 1518 1519 URTW_LOCK(sc); 1520 for (;;) { 1521 IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1522 if (m == NULL) 1523 break; 1524 bf = urtw_getbuf(sc); 1525 if (bf == NULL) { 1526 IFQ_DRV_PREPEND(&ifp->if_snd, m); 1527 break; 1528 } 1529 1530 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1531 m->m_pkthdr.rcvif = NULL; 1532 1533 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1534 ifp->if_oerrors++; 1535 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1536 ieee80211_free_node(ni); 1537 break; 1538 } 1539 1540 sc->sc_txtimer = 5; 1541 } 1542 URTW_UNLOCK(sc); 1543} 1544 1545static int 1546urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1547 int ndata, int maxsz, int fillmbuf) 1548{ 1549 int i, error; 1550 1551 for (i = 0; i < ndata; i++) { 1552 struct urtw_data *dp = &data[i]; 1553 1554 dp->sc = sc; 1555 if (fillmbuf) { 1556 dp->m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1557 if (dp->m == NULL) { 1558 device_printf(sc->sc_dev, 1559 "could not allocate rx mbuf\n"); 1560 error = ENOMEM; 1561 goto fail; 1562 } 1563 dp->buf = mtod(dp->m, uint8_t *); 1564 } else { 1565 dp->m = NULL; 1566 dp->buf = malloc(maxsz, M_USBDEV, M_NOWAIT); 1567 if (dp->buf == NULL) { 1568 device_printf(sc->sc_dev, 1569 "could not allocate buffer\n"); 1570 error = ENOMEM; 1571 goto fail; 1572 } 1573 if (((unsigned long)dp->buf) % 4) 1574 device_printf(sc->sc_dev, 1575 "warn: unaligned buffer %p\n", dp->buf); 1576 } 1577 dp->ni = NULL; 1578 } 1579 1580 return 0; 1581 1582fail: urtw_free_data_list(sc, data, ndata, fillmbuf); 1583 return error; 1584} 1585 1586static int 1587urtw_alloc_rx_data_list(struct urtw_softc *sc) 1588{ 1589 int error, i; 1590 1591 error = urtw_alloc_data_list(sc, 1592 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, MCLBYTES, 1 /* mbufs */); 1593 if (error != 0) 1594 return (error); 1595 1596 STAILQ_INIT(&sc->sc_rx_active); 1597 STAILQ_INIT(&sc->sc_rx_inactive); 1598 1599 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1600 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1601 1602 return (0); 1603} 1604 1605static int 1606urtw_alloc_tx_data_list(struct urtw_softc *sc) 1607{ 1608 int error, i; 1609 1610 error = urtw_alloc_data_list(sc, 1611 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1612 0 /* no mbufs */); 1613 if (error != 0) 1614 return (error); 1615 1616 STAILQ_INIT(&sc->sc_tx_active); 1617 STAILQ_INIT(&sc->sc_tx_inactive); 1618 STAILQ_INIT(&sc->sc_tx_pending); 1619 1620 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1621 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1622 next); 1623 1624 return (0); 1625} 1626 1627static int 1628urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1629 const struct ieee80211_bpf_params *params) 1630{ 1631 struct ieee80211com *ic = ni->ni_ic; 1632 struct ifnet *ifp = ic->ic_ifp; 1633 struct urtw_data *bf; 1634 struct urtw_softc *sc = ifp->if_softc; 1635 1636 /* prevent management frames from being sent if we're not ready */ 1637 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 1638 m_freem(m); 1639 ieee80211_free_node(ni); 1640 return ENETDOWN; 1641 } 1642 URTW_LOCK(sc); 1643 bf = urtw_getbuf(sc); 1644 if (bf == NULL) { 1645 ieee80211_free_node(ni); 1646 m_freem(m); 1647 URTW_UNLOCK(sc); 1648 return (ENOBUFS); /* XXX */ 1649 } 1650 1651 ifp->if_opackets++; 1652 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1653 ieee80211_free_node(ni); 1654 ifp->if_oerrors++; 1655 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1656 URTW_UNLOCK(sc); 1657 return (EIO); 1658 } 1659 URTW_UNLOCK(sc); 1660 1661 sc->sc_txtimer = 5; 1662 return (0); 1663} 1664 1665static void 1666urtw_scan_start(struct ieee80211com *ic) 1667{ 1668 1669 /* XXX do nothing? */ 1670} 1671 1672static void 1673urtw_scan_end(struct ieee80211com *ic) 1674{ 1675 1676 /* XXX do nothing? */ 1677} 1678 1679static void 1680urtw_set_channel(struct ieee80211com *ic) 1681{ 1682 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1683 struct ifnet *ifp = sc->sc_ifp; 1684 uint32_t data, orig; 1685 usb_error_t error; 1686 1687 /* 1688 * if the user set a channel explicitly using ifconfig(8) this function 1689 * can be called earlier than we're expected that in some cases the 1690 * initialization would be failed if setting a channel is called before 1691 * the init have done. 1692 */ 1693 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1694 return; 1695 1696 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1697 return; 1698 1699 URTW_LOCK(sc); 1700 1701 /* 1702 * during changing th channel we need to temporarily be disable 1703 * TX. 1704 */ 1705 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1706 data = orig & ~URTW_TX_LOOPBACK_MASK; 1707 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1708 1709 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1710 if (error != 0) 1711 goto fail; 1712 usb2_pause_mtx(&sc->sc_mtx, 10); 1713 urtw_write32_m(sc, URTW_TX_CONF, orig); 1714 1715 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1716 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1717 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1718 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1719 1720fail: 1721 URTW_UNLOCK(sc); 1722 1723 sc->sc_curchan = ic->ic_curchan; 1724 1725 if (error != 0) 1726 device_printf(sc->sc_dev, "could not change the channel\n"); 1727} 1728 1729static void 1730urtw_update_mcast(struct ifnet *ifp) 1731{ 1732 1733 /* XXX do nothing? */ 1734} 1735 1736static int 1737urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1738 struct urtw_data *data, int prior) 1739{ 1740 int xferlen; 1741 struct ifnet *ifp = sc->sc_ifp; 1742 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1743 struct ieee80211_key *k; 1744 const struct ieee80211_txparam *tp; 1745 struct ieee80211com *ic = ifp->if_l2com; 1746 struct ieee80211vap *vap = ni->ni_vap; 1747 struct urtw_8187b_txhdr *hdr; 1748 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1749 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1750 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1751 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1752 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1753 }; 1754 struct usb_xfer *xfer; 1755 usb_error_t error; 1756 1757 URTW_ASSERT_LOCKED(sc); 1758 1759 /* 1760 * Software crypto. 1761 */ 1762 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1763 k = ieee80211_crypto_encap(ni, m0); 1764 if (k == NULL) { 1765 device_printf(sc->sc_dev, 1766 "ieee80211_crypto_encap returns NULL.\n"); 1767 /* XXX we don't expect the fragmented frames */ 1768 m_freem(m0); 1769 return (ENOBUFS); 1770 } 1771 1772 /* in case packet header moved, reset pointer */ 1773 wh = mtod(m0, struct ieee80211_frame *); 1774 } 1775 1776 if (ieee80211_radiotap_active_vap(vap)) { 1777 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1778 1779 /* XXX Are variables correct? */ 1780 tap->wt_flags = 0; 1781 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1782 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1783 1784 ieee80211_radiotap_tx(vap, m0); 1785 } 1786 1787 xferlen = m0->m_pkthdr.len; 1788 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1789 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1790 xferlen += 1; 1791 1792 bzero(data->buf, URTW_TX_MAXSIZE); 1793 data->buf[0] = m0->m_pkthdr.len & 0xff; 1794 data->buf[1] = (m0->m_pkthdr.len & 0x0f00) >> 8; 1795 data->buf[1] |= (1 << 7); 1796 1797 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1798 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1799 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1800 (sc->sc_currate != 0)) 1801 data->buf[2] |= 1; 1802 if ((m0->m_pkthdr.len > vap->iv_rtsthreshold) && 1803 prior == URTW_PRIORITY_LOW) { 1804 device_printf(sc->sc_dev, "TODO tx.\n"); 1805 return (EIO); 1806 } 1807 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1808 data->buf[2] |= (1 << 1); 1809 /* RTS rate - 10 means we use a basic rate. */ 1810 data->buf[2] |= (urtw_rate2rtl(2) << 3); 1811 /* 1812 * XXX currently TX rate control depends on the rate value of 1813 * RX descriptor because I don't know how to we can control TX rate 1814 * in more smart way. Please fix me you find a thing. 1815 */ 1816 data->buf[3] = sc->sc_currate; 1817 if (prior == URTW_PRIORITY_NORMAL) { 1818 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)]; 1819 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) 1820 data->buf[3] = urtw_rate2rtl(tp->mcastrate); 1821 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1822 data->buf[3] = urtw_rate2rtl(tp->ucastrate); 1823 } 1824 1825 if (sc->sc_flags & URTW_RTL8187B) { 1826 hdr = (struct urtw_8187b_txhdr *)data->buf; 1827 hdr->rts_duration = 0; 1828 hdr->len = 0; 1829 hdr->retry = 3 | (7 << 4) | 11; 1830 hdr->tx_duration = ieee80211_compute_duration(ic->ic_rt, 1831 m0->m_pkthdr.len + IEEE80211_CRC_LEN, 1832 urtw_rtl2rate(data->buf[3]), 1833 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0); 1834 /* XXX MUST fill another variables like rts_duration, tx_.. */ 1835 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[32]); 1836 } else { 1837 data->buf[8] = 3; /* CW minimum */ 1838 data->buf[8] |= (7 << 4); /* CW maximum */ 1839 data->buf[9] |= 11; /* retry limitation */ 1840 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)&data->buf[12]); 1841 } 1842 1843 data->buflen = xferlen; 1844 data->ni = ni; 1845 data->m = m0; 1846 1847 if (sc->sc_flags & URTW_RTL8187B) { 1848 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1849 case IEEE80211_FC0_TYPE_CTL: 1850 case IEEE80211_FC0_TYPE_MGT: 1851 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1852 break; 1853 default: 1854 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1855 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1856 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1857 break; 1858 } 1859 } else 1860 xfer = (prior == URTW_PRIORITY_LOW) ? 1861 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1862 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1863 1864 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1865 usb2_transfer_start(xfer); 1866 1867 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1868 if (error != 0) 1869 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1870 error); 1871 return (0); 1872} 1873 1874static int 1875urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1876{ 1877 struct ieee80211_node *ni = vap->iv_bss; 1878 struct ieee80211com *ic = vap->iv_ic; 1879 struct urtw_softc *sc = ic->ic_ifp->if_softc; 1880 struct urtw_vap *uvp = URTW_VAP(vap); 1881 usb_error_t error = 0; 1882 1883 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1884 ieee80211_state_name[vap->iv_state], 1885 ieee80211_state_name[nstate]); 1886 1887 sc->sc_state = nstate; 1888 1889 IEEE80211_UNLOCK(ic); 1890 URTW_LOCK(sc); 1891 usb2_callout_stop(&sc->sc_led_ch); 1892 callout_stop(&sc->sc_watchdog_ch); 1893 1894 switch (nstate) { 1895 case IEEE80211_S_INIT: 1896 case IEEE80211_S_SCAN: 1897 case IEEE80211_S_AUTH: 1898 case IEEE80211_S_ASSOC: 1899 break; 1900 case IEEE80211_S_RUN: 1901 /* setting bssid. */ 1902 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1903 urtw_write16_m(sc, URTW_BSSID + 4, 1904 ((uint16_t *)ni->ni_bssid)[2]); 1905 urtw_update_msr(sc); 1906 /* XXX maybe the below would be incorrect. */ 1907 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1908 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1909 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1910 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1911 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1912 if (error != 0) 1913 device_printf(sc->sc_dev, 1914 "could not control LED (%d)\n", error); 1915 break; 1916 default: 1917 break; 1918 } 1919fail: 1920 URTW_UNLOCK(sc); 1921 IEEE80211_LOCK(ic); 1922 return (uvp->newstate(vap, nstate, arg)); 1923} 1924 1925static void 1926urtw_watchdog(void *arg) 1927{ 1928 struct urtw_softc *sc = arg; 1929 struct ifnet *ifp = sc->sc_ifp; 1930 1931 if (sc->sc_txtimer > 0) { 1932 if (--sc->sc_txtimer == 0) { 1933 device_printf(sc->sc_dev, "device timeout\n"); 1934 ifp->if_oerrors++; 1935 return; 1936 } 1937 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1938 } 1939} 1940 1941static void 1942urtw_set_multi(void *arg) 1943{ 1944 struct urtw_softc *sc = arg; 1945 struct ifnet *ifp = sc->sc_ifp; 1946 1947 if (!(ifp->if_flags & IFF_UP)) 1948 return; 1949 1950 /* 1951 * XXX don't know how to set a device. Lack of docs. Just try to set 1952 * IFF_ALLMULTI flag here. 1953 */ 1954 IF_ADDR_LOCK(ifp); 1955 ifp->if_flags |= IFF_ALLMULTI; 1956 IF_ADDR_UNLOCK(ifp); 1957} 1958 1959static usb_error_t 1960urtw_set_rate(struct urtw_softc *sc) 1961{ 1962 int i, basic_rate, min_rr_rate, max_rr_rate; 1963 uint16_t data; 1964 usb_error_t error; 1965 1966 basic_rate = urtw_rate2rtl(48); 1967 min_rr_rate = urtw_rate2rtl(12); 1968 max_rr_rate = urtw_rate2rtl(48); 1969 1970 urtw_write8_m(sc, URTW_RESP_RATE, 1971 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1972 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1973 1974 urtw_read16_m(sc, URTW_BRSR, &data); 1975 data &= ~URTW_BRSR_MBR_8185; 1976 1977 for (i = 0; i <= basic_rate; i++) 1978 data |= (1 << i); 1979 1980 urtw_write16_m(sc, URTW_BRSR, data); 1981fail: 1982 return (error); 1983} 1984 1985static uint16_t 1986urtw_rate2rtl(int rate) 1987{ 1988#define N(a) (sizeof(a) / sizeof((a)[0])) 1989 int i; 1990 1991 for (i = 0; i < N(urtw_ratetable); i++) { 1992 if (rate == urtw_ratetable[i].reg) 1993 return urtw_ratetable[i].val; 1994 } 1995 1996 return (3); 1997#undef N 1998} 1999 2000static uint16_t 2001urtw_rtl2rate(int rate) 2002{ 2003#define N(a) (sizeof(a) / sizeof((a)[0])) 2004 int i; 2005 2006 for (i = 0; i < N(urtw_ratetable); i++) { 2007 if (rate == urtw_ratetable[i].val) 2008 return urtw_ratetable[i].reg; 2009 } 2010 2011 return (0); 2012#undef N 2013} 2014 2015static usb_error_t 2016urtw_update_msr(struct urtw_softc *sc) 2017{ 2018 struct ifnet *ifp = sc->sc_ifp; 2019 struct ieee80211com *ic = ifp->if_l2com; 2020 uint8_t data; 2021 usb_error_t error; 2022 2023 urtw_read8_m(sc, URTW_MSR, &data); 2024 data &= ~URTW_MSR_LINK_MASK; 2025 2026 if (sc->sc_state == IEEE80211_S_RUN) { 2027 switch (ic->ic_opmode) { 2028 case IEEE80211_M_STA: 2029 case IEEE80211_M_MONITOR: 2030 data |= URTW_MSR_LINK_STA; 2031 if (sc->sc_flags & URTW_RTL8187B) 2032 data |= URTW_MSR_LINK_ENEDCA; 2033 break; 2034 case IEEE80211_M_IBSS: 2035 data |= URTW_MSR_LINK_ADHOC; 2036 break; 2037 case IEEE80211_M_HOSTAP: 2038 data |= URTW_MSR_LINK_HOSTAP; 2039 break; 2040 default: 2041 panic("unsupported operation mode 0x%x\n", 2042 ic->ic_opmode); 2043 /* never reach */ 2044 } 2045 } else 2046 data |= URTW_MSR_LINK_NONE; 2047 2048 urtw_write8_m(sc, URTW_MSR, data); 2049fail: 2050 return (error); 2051} 2052 2053static usb_error_t 2054urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2055{ 2056 struct usb_device_request req; 2057 usb_error_t error; 2058 2059 URTW_ASSERT_LOCKED(sc); 2060 2061 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2062 req.bRequest = URTW_8187_GETREGS_REQ; 2063 USETW(req.wValue, val | 0xff00); 2064 USETW(req.wIndex, 0); 2065 USETW(req.wLength, sizeof(uint8_t)); 2066 2067 error = urtw_do_request(sc, &req, data); 2068 return (error); 2069} 2070 2071static usb_error_t 2072urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2073{ 2074 struct usb_device_request req; 2075 usb_error_t error; 2076 2077 URTW_ASSERT_LOCKED(sc); 2078 2079 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2080 req.bRequest = URTW_8187_GETREGS_REQ; 2081 USETW(req.wValue, val | 0xff00); 2082 USETW(req.wIndex, 0); 2083 USETW(req.wLength, sizeof(uint16_t)); 2084 2085 error = urtw_do_request(sc, &req, data); 2086 return (error); 2087} 2088 2089static usb_error_t 2090urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2091{ 2092 struct usb_device_request req; 2093 usb_error_t error; 2094 2095 URTW_ASSERT_LOCKED(sc); 2096 2097 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2098 req.bRequest = URTW_8187_GETREGS_REQ; 2099 USETW(req.wValue, val | 0xff00); 2100 USETW(req.wIndex, 0); 2101 USETW(req.wLength, sizeof(uint32_t)); 2102 2103 error = urtw_do_request(sc, &req, data); 2104 return (error); 2105} 2106 2107static usb_error_t 2108urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2109{ 2110 struct usb_device_request req; 2111 2112 URTW_ASSERT_LOCKED(sc); 2113 2114 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2115 req.bRequest = URTW_8187_SETREGS_REQ; 2116 USETW(req.wValue, val | 0xff00); 2117 USETW(req.wIndex, 0); 2118 USETW(req.wLength, sizeof(uint8_t)); 2119 2120 return (urtw_do_request(sc, &req, &data)); 2121} 2122 2123static usb_error_t 2124urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2125{ 2126 struct usb_device_request req; 2127 2128 URTW_ASSERT_LOCKED(sc); 2129 2130 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2131 req.bRequest = URTW_8187_SETREGS_REQ; 2132 USETW(req.wValue, val | 0xff00); 2133 USETW(req.wIndex, 0); 2134 USETW(req.wLength, sizeof(uint16_t)); 2135 2136 return (urtw_do_request(sc, &req, &data)); 2137} 2138 2139static usb_error_t 2140urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2141{ 2142 struct usb_device_request req; 2143 2144 URTW_ASSERT_LOCKED(sc); 2145 2146 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2147 req.bRequest = URTW_8187_SETREGS_REQ; 2148 USETW(req.wValue, val | 0xff00); 2149 USETW(req.wIndex, 0); 2150 USETW(req.wLength, sizeof(uint32_t)); 2151 2152 return (urtw_do_request(sc, &req, &data)); 2153} 2154 2155static usb_error_t 2156urtw_get_macaddr(struct urtw_softc *sc) 2157{ 2158 uint32_t data; 2159 usb_error_t error; 2160 2161 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2162 if (error != 0) 2163 goto fail; 2164 sc->sc_bssid[0] = data & 0xff; 2165 sc->sc_bssid[1] = (data & 0xff00) >> 8; 2166 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2167 if (error != 0) 2168 goto fail; 2169 sc->sc_bssid[2] = data & 0xff; 2170 sc->sc_bssid[3] = (data & 0xff00) >> 8; 2171 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2172 if (error != 0) 2173 goto fail; 2174 sc->sc_bssid[4] = data & 0xff; 2175 sc->sc_bssid[5] = (data & 0xff00) >> 8; 2176fail: 2177 return (error); 2178} 2179 2180static usb_error_t 2181urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2182{ 2183#define URTW_READCMD_LEN 3 2184 int addrlen, i; 2185 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2186 usb_error_t error; 2187 2188 /* NB: make sure the buffer is initialized */ 2189 *data = 0; 2190 2191 /* enable EPROM programming */ 2192 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2193 DELAY(URTW_EPROM_DELAY); 2194 2195 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2196 if (error != 0) 2197 goto fail; 2198 error = urtw_eprom_ck(sc); 2199 if (error != 0) 2200 goto fail; 2201 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2202 if (error != 0) 2203 goto fail; 2204 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2205 addrlen = 8; 2206 addrstr[0] = addr & (1 << 7); 2207 addrstr[1] = addr & (1 << 6); 2208 addrstr[2] = addr & (1 << 5); 2209 addrstr[3] = addr & (1 << 4); 2210 addrstr[4] = addr & (1 << 3); 2211 addrstr[5] = addr & (1 << 2); 2212 addrstr[6] = addr & (1 << 1); 2213 addrstr[7] = addr & (1 << 0); 2214 } else { 2215 addrlen=6; 2216 addrstr[0] = addr & (1 << 5); 2217 addrstr[1] = addr & (1 << 4); 2218 addrstr[2] = addr & (1 << 3); 2219 addrstr[3] = addr & (1 << 2); 2220 addrstr[4] = addr & (1 << 1); 2221 addrstr[5] = addr & (1 << 0); 2222 } 2223 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2224 if (error != 0) 2225 goto fail; 2226 2227 error = urtw_eprom_writebit(sc, 0); 2228 if (error != 0) 2229 goto fail; 2230 2231 for (i = 0; i < 16; i++) { 2232 error = urtw_eprom_ck(sc); 2233 if (error != 0) 2234 goto fail; 2235 error = urtw_eprom_readbit(sc, &data16); 2236 if (error != 0) 2237 goto fail; 2238 2239 (*data) |= (data16 << (15 - i)); 2240 } 2241 2242 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2243 if (error != 0) 2244 goto fail; 2245 error = urtw_eprom_ck(sc); 2246 if (error != 0) 2247 goto fail; 2248 2249 /* now disable EPROM programming */ 2250 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2251fail: 2252 return (error); 2253#undef URTW_READCMD_LEN 2254} 2255 2256static usb_error_t 2257urtw_eprom_cs(struct urtw_softc *sc, int able) 2258{ 2259 uint8_t data; 2260 usb_error_t error; 2261 2262 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2263 if (able == URTW_EPROM_ENABLE) 2264 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2265 else 2266 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2267 DELAY(URTW_EPROM_DELAY); 2268fail: 2269 return (error); 2270} 2271 2272static usb_error_t 2273urtw_eprom_ck(struct urtw_softc *sc) 2274{ 2275 uint8_t data; 2276 usb_error_t error; 2277 2278 /* masking */ 2279 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2280 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2281 DELAY(URTW_EPROM_DELAY); 2282 /* unmasking */ 2283 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2284 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2285 DELAY(URTW_EPROM_DELAY); 2286fail: 2287 return (error); 2288} 2289 2290static usb_error_t 2291urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2292{ 2293 uint8_t data8; 2294 usb_error_t error; 2295 2296 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2297 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2298 DELAY(URTW_EPROM_DELAY); 2299 2300fail: 2301 return (error); 2302} 2303 2304static usb_error_t 2305urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2306{ 2307 uint8_t data; 2308 usb_error_t error; 2309 2310 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2311 if (bit != 0) 2312 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2313 else 2314 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2315 DELAY(URTW_EPROM_DELAY); 2316fail: 2317 return (error); 2318} 2319 2320static usb_error_t 2321urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2322{ 2323 int i = 0; 2324 usb_error_t error = 0; 2325 2326 for (i = 0; i < buflen; i++) { 2327 error = urtw_eprom_writebit(sc, buf[i]); 2328 if (error != 0) 2329 goto fail; 2330 error = urtw_eprom_ck(sc); 2331 if (error != 0) 2332 goto fail; 2333 } 2334fail: 2335 return (error); 2336} 2337 2338 2339static usb_error_t 2340urtw_get_txpwr(struct urtw_softc *sc) 2341{ 2342 int i, j; 2343 uint32_t data; 2344 usb_error_t error; 2345 2346 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2347 if (error != 0) 2348 goto fail; 2349 sc->sc_txpwr_cck_base = data & 0xf; 2350 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2351 2352 for (i = 1, j = 0; i < 6; i += 2, j++) { 2353 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2354 if (error != 0) 2355 goto fail; 2356 sc->sc_txpwr_cck[i] = data & 0xf; 2357 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2358 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2359 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2360 } 2361 for (i = 1, j = 0; i < 4; i += 2, j++) { 2362 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2363 if (error != 0) 2364 goto fail; 2365 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2366 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2367 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2368 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2369 } 2370 if (sc->sc_flags & URTW_RTL8187B) { 2371 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2372 if (error != 0) 2373 goto fail; 2374 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2375 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2376 error = urtw_eprom_read32(sc, 0x0a, &data); 2377 if (error != 0) 2378 goto fail; 2379 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2380 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2381 error = urtw_eprom_read32(sc, 0x1c, &data); 2382 if (error != 0) 2383 goto fail; 2384 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2385 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2386 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2387 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2388 } else { 2389 for (i = 1, j = 0; i < 4; i += 2, j++) { 2390 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2391 &data); 2392 if (error != 0) 2393 goto fail; 2394 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2395 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2396 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2397 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2398 } 2399 } 2400fail: 2401 return (error); 2402} 2403 2404 2405static usb_error_t 2406urtw_get_rfchip(struct urtw_softc *sc) 2407{ 2408 int ret; 2409 uint8_t data8; 2410 uint32_t data; 2411 usb_error_t error; 2412 2413 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2414 if (error != 0) 2415 goto fail; 2416 switch (data & 0xff) { 2417 case URTW_EPROM_RFCHIPID_RTL8225U: 2418 error = urtw_8225_isv2(sc, &ret); 2419 if (error != 0) 2420 goto fail; 2421 if (ret == 0) { 2422 sc->sc_rf_init = urtw_8225_rf_init; 2423 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2424 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2425 sc->sc_rf_stop = urtw_8225_rf_stop; 2426 } else { 2427 sc->sc_rf_init = urtw_8225v2_rf_init; 2428 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2429 sc->sc_rf_stop = urtw_8225_rf_stop; 2430 } 2431 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2432 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2433 break; 2434 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2435 sc->sc_rf_init = urtw_8225v2b_rf_init; 2436 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2437 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2438 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2439 sc->sc_rf_stop = urtw_8225_rf_stop; 2440 break; 2441 default: 2442 panic("unsupported RF chip %d\n", data & 0xff); 2443 /* never reach */ 2444 } 2445 2446 if (sc->sc_flags & URTW_RTL8187B) { 2447 urtw_read8_m(sc, 0xe1, &data8); 2448 sc->sc_flags |= (data8 == 0) ? URTW_RTL8187B_REV_B : 2449 (data8 == 1) ? URTW_RTL8187B_REV_D : URTW_RTL8187B_REV_E; 2450 } 2451 2452 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2453 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2454 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2455 "rtl8225z2", 2456 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2457 (data8 == 1) ? "d" : "e") : "none"); 2458 2459fail: 2460 return (error); 2461} 2462 2463 2464static usb_error_t 2465urtw_led_init(struct urtw_softc *sc) 2466{ 2467 uint32_t rev; 2468 usb_error_t error; 2469 2470 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2471 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2472 if (error != 0) 2473 goto fail; 2474 2475 switch (rev & URTW_EPROM_CID_MASK) { 2476 case URTW_EPROM_CID_ALPHA0: 2477 sc->sc_strategy = URTW_SW_LED_MODE1; 2478 break; 2479 case URTW_EPROM_CID_SERCOMM_PS: 2480 sc->sc_strategy = URTW_SW_LED_MODE3; 2481 break; 2482 case URTW_EPROM_CID_HW_LED: 2483 sc->sc_strategy = URTW_HW_LED; 2484 break; 2485 case URTW_EPROM_CID_RSVD0: 2486 case URTW_EPROM_CID_RSVD1: 2487 default: 2488 sc->sc_strategy = URTW_SW_LED_MODE0; 2489 break; 2490 } 2491 2492 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2493 2494fail: 2495 return (error); 2496} 2497 2498 2499static usb_error_t 2500urtw_8225_rf_init(struct urtw_softc *sc) 2501{ 2502#define N(a) (sizeof(a) / sizeof((a)[0])) 2503 int i; 2504 uint16_t data; 2505 usb_error_t error; 2506 2507 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2508 if (error) 2509 goto fail; 2510 2511 error = urtw_8225_usb_init(sc); 2512 if (error) 2513 goto fail; 2514 2515 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2516 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2517 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2518 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2519 2520 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2521 if (error) 2522 goto fail; 2523 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2524 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2525 if (error) 2526 goto fail; 2527 2528 error = urtw_8185_rf_pins_enable(sc); 2529 if (error) 2530 goto fail; 2531 usb2_pause_mtx(&sc->sc_mtx, 1000); 2532 2533 for (i = 0; i < N(urtw_8225_rf_part1); i++) { 2534 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2535 urtw_8225_rf_part1[i].val); 2536 usb2_pause_mtx(&sc->sc_mtx, 1); 2537 } 2538 usb2_pause_mtx(&sc->sc_mtx, 100); 2539 urtw_8225_write(sc, 2540 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2541 usb2_pause_mtx(&sc->sc_mtx, 200); 2542 urtw_8225_write(sc, 2543 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2544 usb2_pause_mtx(&sc->sc_mtx, 200); 2545 urtw_8225_write(sc, 2546 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2547 2548 for (i = 0; i < 95; i++) { 2549 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2550 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2551 } 2552 2553 urtw_8225_write(sc, 2554 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2555 urtw_8225_write(sc, 2556 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2557 2558 for (i = 0; i < 128; i++) { 2559 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2560 usb2_pause_mtx(&sc->sc_mtx, 1); 2561 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2562 usb2_pause_mtx(&sc->sc_mtx, 1); 2563 } 2564 2565 for (i = 0; i < N(urtw_8225_rf_part2); i++) { 2566 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2567 urtw_8225_rf_part2[i].val); 2568 usb2_pause_mtx(&sc->sc_mtx, 1); 2569 } 2570 2571 error = urtw_8225_setgain(sc, 4); 2572 if (error) 2573 goto fail; 2574 2575 for (i = 0; i < N(urtw_8225_rf_part3); i++) { 2576 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2577 urtw_8225_rf_part3[i].val); 2578 usb2_pause_mtx(&sc->sc_mtx, 1); 2579 } 2580 2581 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2582 2583 error = urtw_8225_set_txpwrlvl(sc, 1); 2584 if (error) 2585 goto fail; 2586 2587 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2588 usb2_pause_mtx(&sc->sc_mtx, 1); 2589 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2590 usb2_pause_mtx(&sc->sc_mtx, 1); 2591 2592 /* TX ant A, 0x0 for B */ 2593 error = urtw_8185_tx_antenna(sc, 0x3); 2594 if (error) 2595 goto fail; 2596 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2597 2598 error = urtw_8225_rf_set_chan(sc, 1); 2599fail: 2600 return (error); 2601#undef N 2602} 2603 2604static usb_error_t 2605urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2606{ 2607 usb_error_t error = 0; 2608 2609 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2610fail: 2611 return (error); 2612} 2613 2614static usb_error_t 2615urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2616{ 2617 usb_error_t error; 2618 2619 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2620 usb2_pause_mtx(&sc->sc_mtx, 1); 2621fail: 2622 return (error); 2623} 2624 2625static usb_error_t 2626urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2627{ 2628 2629 data = data & 0xff; 2630 return urtw_8187_write_phy(sc, addr, data); 2631} 2632 2633static usb_error_t 2634urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2635{ 2636 2637 data = data & 0xff; 2638 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2639} 2640 2641static usb_error_t 2642urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2643{ 2644 uint32_t phyw; 2645 usb_error_t error; 2646 2647 phyw = ((data << 8) | (addr | 0x80)); 2648 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2649 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2650 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2651 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2652 usb2_pause_mtx(&sc->sc_mtx, 1); 2653fail: 2654 return (error); 2655} 2656 2657static usb_error_t 2658urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2659{ 2660 usb_error_t error; 2661 2662 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2663 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2664 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2665 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2666fail: 2667 return (error); 2668} 2669 2670static usb_error_t 2671urtw_8225_usb_init(struct urtw_softc *sc) 2672{ 2673 uint8_t data; 2674 usb_error_t error; 2675 2676 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2677 urtw_write8_m(sc, URTW_GPIO, 0); 2678 error = urtw_read8e(sc, 0x53, &data); 2679 if (error) 2680 goto fail; 2681 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2682 if (error) 2683 goto fail; 2684 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2685 urtw_write8_m(sc, URTW_GPIO, 0x20); 2686 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2687 2688 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2689 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2690 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2691 2692 usb2_pause_mtx(&sc->sc_mtx, 500); 2693fail: 2694 return (error); 2695} 2696 2697static usb_error_t 2698urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2699{ 2700 uint16_t d80, d82, d84; 2701 usb_error_t error; 2702 2703 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2704 d80 &= URTW_RF_PINS_MAGIC1; 2705 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2706 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2707 d84 &= URTW_RF_PINS_MAGIC2; 2708 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2709 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2710 DELAY(10); 2711 2712 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2713 DELAY(2); 2714 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2715 DELAY(10); 2716 2717 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2718 if (error != 0) 2719 goto fail; 2720 2721 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2722 DELAY(10); 2723 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2724 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2725 usb2_pause_mtx(&sc->sc_mtx, 2); 2726fail: 2727 return (error); 2728} 2729 2730/* XXX why we should allocalte memory buffer instead of using memory stack? */ 2731static usb_error_t 2732urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2733 uint16_t *data) 2734{ 2735 uint8_t *buf; 2736 uint16_t data16; 2737 struct usb_device_request *req; 2738 usb_error_t error = 0; 2739 2740 data16 = *data; 2741 req = (usb_device_request_t *)malloc(sizeof(usb_device_request_t), 2742 M_80211_VAP, M_NOWAIT | M_ZERO); 2743 if (req == NULL) { 2744 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2745 goto fail0; 2746 } 2747 buf = (uint8_t *)malloc(2, M_80211_VAP, M_NOWAIT | M_ZERO); 2748 if (req == NULL) { 2749 device_printf(sc->sc_dev, "could not allocate a memory\n"); 2750 goto fail1; 2751 } 2752 2753 req->bmRequestType = UT_WRITE_VENDOR_DEVICE; 2754 req->bRequest = URTW_8187_SETREGS_REQ; 2755 USETW(req->wValue, addr); 2756 USETW(req->wIndex, index); 2757 USETW(req->wLength, sizeof(uint16_t)); 2758 buf[0] = (data16 & 0x00ff); 2759 buf[1] = (data16 & 0xff00) >> 8; 2760 2761 error = urtw_do_request(sc, req, buf); 2762 2763 free(buf, M_80211_VAP); 2764fail1: free(req, M_80211_VAP); 2765fail0: return (error); 2766} 2767 2768static usb_error_t 2769urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2770{ 2771 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 2772 struct ieee80211_channel *c = ic->ic_curchan; 2773 usb_error_t error; 2774 2775 error = urtw_8225_set_txpwrlvl(sc, chan); 2776 if (error) 2777 goto fail; 2778 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2779 usb2_pause_mtx(&sc->sc_mtx, 10); 2780 2781 urtw_write8_m(sc, URTW_SIFS, 0x22); 2782 2783 if (sc->sc_state == IEEE80211_S_ASSOC && 2784 ic->ic_flags & IEEE80211_F_SHSLOT) 2785 urtw_write8_m(sc, URTW_SLOT, 0x9); 2786 else 2787 urtw_write8_m(sc, URTW_SLOT, 0x14); 2788 2789 if (IEEE80211_IS_CHAN_G(c)) { 2790 /* for G */ 2791 urtw_write8_m(sc, URTW_DIFS, 0x14); 2792 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 2793 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 2794 } else { 2795 /* for B */ 2796 urtw_write8_m(sc, URTW_DIFS, 0x24); 2797 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 2798 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 2799 } 2800 2801fail: 2802 return (error); 2803} 2804 2805static usb_error_t 2806urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2807{ 2808 usb_error_t error; 2809 2810 if (sens < 0 || sens > 6) 2811 return -1; 2812 2813 if (sens > 4) 2814 urtw_8225_write(sc, 2815 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2816 else 2817 urtw_8225_write(sc, 2818 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2819 2820 sens = 6 - sens; 2821 error = urtw_8225_setgain(sc, sens); 2822 if (error) 2823 goto fail; 2824 2825 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2826 2827fail: 2828 return (error); 2829} 2830 2831static usb_error_t 2832urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2833{ 2834 int i, idx, set; 2835 uint8_t *cck_pwltable; 2836 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2837 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2838 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2839 usb_error_t error; 2840 2841 cck_pwrlvl_max = 11; 2842 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2843 ofdm_pwrlvl_min = 10; 2844 2845 /* CCK power setting */ 2846 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2847 idx = cck_pwrlvl % 6; 2848 set = cck_pwrlvl / 6; 2849 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2850 urtw_8225_txpwr_cck; 2851 2852 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2853 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2854 for (i = 0; i < 8; i++) { 2855 urtw_8187_write_phy_cck(sc, 0x44 + i, 2856 cck_pwltable[idx * 8 + i]); 2857 } 2858 usb2_pause_mtx(&sc->sc_mtx, 1); 2859 2860 /* OFDM power setting */ 2861 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2862 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2863 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2864 2865 idx = ofdm_pwrlvl % 6; 2866 set = ofdm_pwrlvl / 6; 2867 2868 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2869 if (error) 2870 goto fail; 2871 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2872 urtw_8187_write_phy_ofdm(sc, 6, 0); 2873 urtw_8187_write_phy_ofdm(sc, 8, 0); 2874 2875 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2876 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2877 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2878 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2879 usb2_pause_mtx(&sc->sc_mtx, 1); 2880fail: 2881 return (error); 2882} 2883 2884 2885static usb_error_t 2886urtw_8225_rf_stop(struct urtw_softc *sc) 2887{ 2888 uint8_t data; 2889 usb_error_t error; 2890 2891 urtw_8225_write(sc, 0x4, 0x1f); 2892 2893 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2894 if (error) 2895 goto fail; 2896 2897 urtw_read8_m(sc, URTW_CONFIG3, &data); 2898 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2899 if (sc->sc_flags & URTW_RTL8187B) { 2900 urtw_write32_m(sc, URTW_ANAPARAM2, 2901 URTW_8187B_8225_ANAPARAM2_OFF); 2902 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2903 urtw_write32_m(sc, URTW_ANAPARAM3, 2904 URTW_8187B_8225_ANAPARAM3_OFF); 2905 } else { 2906 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2907 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2908 } 2909 2910 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2911 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2912 if (error) 2913 goto fail; 2914 2915fail: 2916 return (error); 2917} 2918 2919static usb_error_t 2920urtw_8225v2_rf_init(struct urtw_softc *sc) 2921{ 2922#define N(a) (sizeof(a) / sizeof((a)[0])) 2923 int i; 2924 uint16_t data; 2925 uint32_t data32; 2926 usb_error_t error; 2927 2928 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2929 if (error) 2930 goto fail; 2931 2932 error = urtw_8225_usb_init(sc); 2933 if (error) 2934 goto fail; 2935 2936 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2937 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2938 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2939 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2940 2941 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2942 if (error) 2943 goto fail; 2944 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2945 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2946 if (error) 2947 goto fail; 2948 2949 error = urtw_8185_rf_pins_enable(sc); 2950 if (error) 2951 goto fail; 2952 2953 usb2_pause_mtx(&sc->sc_mtx, 500); 2954 2955 for (i = 0; i < N(urtw_8225v2_rf_part1); i++) { 2956 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2957 urtw_8225v2_rf_part1[i].val); 2958 } 2959 usb2_pause_mtx(&sc->sc_mtx, 50); 2960 2961 urtw_8225_write(sc, 2962 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2963 2964 for (i = 0; i < 95; i++) { 2965 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2966 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2967 urtw_8225v2_rxgain[i]); 2968 } 2969 2970 urtw_8225_write(sc, 2971 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2972 urtw_8225_write(sc, 2973 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2974 urtw_8225_write(sc, 2975 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2976 urtw_8225_write(sc, 2977 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2978 usb2_pause_mtx(&sc->sc_mtx, 100); 2979 urtw_8225_write(sc, 2980 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2981 usb2_pause_mtx(&sc->sc_mtx, 100); 2982 2983 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2984 if (error != 0) 2985 goto fail; 2986 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2987 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2988 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2989 urtw_8225_write(sc, 2990 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2991 usb2_pause_mtx(&sc->sc_mtx, 100); 2992 urtw_8225_write(sc, 2993 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2994 usb2_pause_mtx(&sc->sc_mtx, 50); 2995 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2996 if (error != 0) 2997 goto fail; 2998 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2999 device_printf(sc->sc_dev, "RF calibration failed\n"); 3000 } 3001 usb2_pause_mtx(&sc->sc_mtx, 100); 3002 3003 urtw_8225_write(sc, 3004 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 3005 for (i = 0; i < 128; i++) { 3006 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 3007 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 3008 } 3009 3010 for (i = 0; i < N(urtw_8225v2_rf_part2); i++) { 3011 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 3012 urtw_8225v2_rf_part2[i].val); 3013 } 3014 3015 error = urtw_8225v2_setgain(sc, 4); 3016 if (error) 3017 goto fail; 3018 3019 for (i = 0; i < N(urtw_8225v2_rf_part3); i++) { 3020 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 3021 urtw_8225v2_rf_part3[i].val); 3022 } 3023 3024 urtw_write8_m(sc, URTW_TESTR, 0x0d); 3025 3026 error = urtw_8225v2_set_txpwrlvl(sc, 1); 3027 if (error) 3028 goto fail; 3029 3030 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 3031 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 3032 3033 /* TX ant A, 0x0 for B */ 3034 error = urtw_8185_tx_antenna(sc, 0x3); 3035 if (error) 3036 goto fail; 3037 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 3038 3039 error = urtw_8225_rf_set_chan(sc, 1); 3040fail: 3041 return (error); 3042#undef N 3043} 3044 3045static usb_error_t 3046urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 3047{ 3048 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3049 struct ieee80211_channel *c = ic->ic_curchan; 3050 usb_error_t error; 3051 3052 error = urtw_8225v2_set_txpwrlvl(sc, chan); 3053 if (error) 3054 goto fail; 3055 3056 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3057 usb2_pause_mtx(&sc->sc_mtx, 10); 3058 3059 urtw_write8_m(sc, URTW_SIFS, 0x22); 3060 3061 if(sc->sc_state == IEEE80211_S_ASSOC && 3062 ic->ic_flags & IEEE80211_F_SHSLOT) 3063 urtw_write8_m(sc, URTW_SLOT, 0x9); 3064 else 3065 urtw_write8_m(sc, URTW_SLOT, 0x14); 3066 3067 if (IEEE80211_IS_CHAN_G(c)) { 3068 /* for G */ 3069 urtw_write8_m(sc, URTW_DIFS, 0x14); 3070 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 3071 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 3072 } else { 3073 /* for B */ 3074 urtw_write8_m(sc, URTW_DIFS, 0x24); 3075 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 3076 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 3077 } 3078 3079fail: 3080 return (error); 3081} 3082 3083static usb_error_t 3084urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3085{ 3086 int i; 3087 int16_t bit; 3088 uint8_t rlen = 12, wlen = 6; 3089 uint16_t o1, o2, o3, tmp; 3090 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3091 uint32_t mask = 0x80000000, value = 0; 3092 usb_error_t error; 3093 3094 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3095 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3096 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3097 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3098 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3099 o1 &= ~URTW_RF_PINS_MAGIC4; 3100 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3101 DELAY(5); 3102 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3103 DELAY(5); 3104 3105 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3106 bit = ((d2w & mask) != 0) ? 1 : 0; 3107 3108 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3109 DELAY(2); 3110 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3111 URTW_BB_HOST_BANG_CLK); 3112 DELAY(2); 3113 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3114 URTW_BB_HOST_BANG_CLK); 3115 DELAY(2); 3116 mask = mask >> 1; 3117 if (i == 2) 3118 break; 3119 bit = ((d2w & mask) != 0) ? 1 : 0; 3120 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3121 URTW_BB_HOST_BANG_CLK); 3122 DELAY(2); 3123 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3124 URTW_BB_HOST_BANG_CLK); 3125 DELAY(2); 3126 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3127 DELAY(1); 3128 } 3129 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3130 URTW_BB_HOST_BANG_CLK); 3131 DELAY(2); 3132 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3133 DELAY(2); 3134 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3135 DELAY(2); 3136 3137 mask = 0x800; 3138 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3139 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3140 o1 | URTW_BB_HOST_BANG_RW); 3141 DELAY(2); 3142 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3143 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3144 DELAY(2); 3145 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3146 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3147 DELAY(2); 3148 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3149 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3150 DELAY(2); 3151 3152 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3153 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3154 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3155 o1 | URTW_BB_HOST_BANG_RW); 3156 DELAY(2); 3157 } 3158 3159 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3160 URTW_BB_HOST_BANG_RW); 3161 DELAY(2); 3162 3163 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3164 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3165 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3166 3167 if (data != NULL) 3168 *data = value; 3169fail: 3170 return (error); 3171} 3172 3173 3174static usb_error_t 3175urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3176{ 3177 int i; 3178 uint8_t *cck_pwrtable; 3179 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3180 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3181 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3182 usb_error_t error; 3183 3184 /* CCK power setting */ 3185 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3186 cck_pwrlvl += sc->sc_txpwr_cck_base; 3187 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3188 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3189 urtw_8225v2_txpwr_cck; 3190 3191 for (i = 0; i < 8; i++) 3192 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3193 3194 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3195 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3196 usb2_pause_mtx(&sc->sc_mtx, 1); 3197 3198 /* OFDM power setting */ 3199 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3200 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3201 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3202 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3203 3204 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3205 if (error) 3206 goto fail; 3207 3208 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3209 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3210 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3211 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3212 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3213 3214 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3215 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3216 usb2_pause_mtx(&sc->sc_mtx, 1); 3217fail: 3218 return (error); 3219} 3220 3221static usb_error_t 3222urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3223{ 3224 uint8_t *gainp; 3225 usb_error_t error; 3226 3227 /* XXX for A? */ 3228 gainp = urtw_8225v2_gain_bg; 3229 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3230 usb2_pause_mtx(&sc->sc_mtx, 1); 3231 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3232 usb2_pause_mtx(&sc->sc_mtx, 1); 3233 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3234 usb2_pause_mtx(&sc->sc_mtx, 1); 3235 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3236 usb2_pause_mtx(&sc->sc_mtx, 1); 3237fail: 3238 return (error); 3239} 3240 3241static usb_error_t 3242urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3243{ 3244 uint32_t data; 3245 usb_error_t error; 3246 3247 *ret = 1; 3248 3249 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3250 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3251 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3252 usb2_pause_mtx(&sc->sc_mtx, 500); 3253 3254 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3255 URTW_8225_ADDR_0_DATA_MAGIC1); 3256 3257 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3258 if (error != 0) 3259 goto fail; 3260 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3261 *ret = 0; 3262 else { 3263 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3264 if (error != 0) 3265 goto fail; 3266 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3267 *ret = 0; 3268 } 3269 3270 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3271 URTW_8225_ADDR_0_DATA_MAGIC2); 3272fail: 3273 return (error); 3274} 3275 3276static usb_error_t 3277urtw_8225v2b_rf_init(struct urtw_softc *sc) 3278{ 3279#define N(a) (sizeof(a) / sizeof((a)[0])) 3280 int i; 3281 usb_error_t error; 3282 3283 for (i = 0; i < N(urtw_8225v2b_rf_part1); i++) 3284 urtw_8225_write(sc, urtw_8225v2b_rf_part1[i].reg, 3285 urtw_8225v2b_rf_part1[i].val); 3286 3287 urtw_8225_write(sc, 3288 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 3289 3290 for (i = 0; i < N(urtw_8225v2b_rxgain); i++) { 3291 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3292 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3293 urtw_8225v2b_rxgain[i]); 3294 } 3295 3296 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3297 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3298 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3299 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3300 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3301 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3302 3303 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3304 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3305 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3306 3307 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3308 for (i = 0; i < N(urtw_8225z2_agc); i++) { 3309 urtw_8187_write_phy_ofdm(sc, 0xf, urtw_8225z2_agc[i]); 3310 urtw_8187_write_phy_ofdm(sc, 0xe, 0x80 + i); 3311 urtw_8187_write_phy_ofdm(sc, 0xe, 0); 3312 } 3313 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3314 3315 for (i = 0; i < N(urtw_8225v2b_rf_part2); i++) 3316 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3317 3318 urtw_write32_m(sc, 0xf0, (7 << 12) | (3 << 8) | 0x1c); 3319 urtw_write32_m(sc, 0xf4, (7 << 12) | (3 << 8) | 0x1c); 3320 urtw_write32_m(sc, 0xf8, (7 << 12) | (3 << 8) | 0x1c); 3321 urtw_write32_m(sc, 0xfc, (7 << 12) | (3 << 8) | 0x1c); 3322 urtw_write8_m(sc, URTW_ACM_CONTROL, 0); 3323 3324 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3325 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3326 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3327 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3328fail: 3329 return (error); 3330#undef N 3331} 3332 3333static usb_error_t 3334urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3335{ 3336 int ack; 3337 struct ieee80211com *ic = sc->sc_ifp->if_l2com; 3338 usb_error_t error; 3339 3340 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3341 if (error) 3342 goto fail; 3343 3344 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3345 usb2_pause_mtx(&sc->sc_mtx, 10); 3346 3347 urtw_write8_m(sc, URTW_SIFS, 0xa); 3348 if (ic->ic_flags & IEEE80211_F_SHSLOT) { 3349 urtw_write8_m(sc, URTW_SLOT, 0x9); 3350 urtw_write8_m(sc, URTW_DIFS, 0x1c); 3351 /* In 8187B, BRSR + 1 ==> EIFS register */ 3352 urtw_write8_m(sc, URTW_BRSR + 1, 0x53); 3353 3354 ack = 112 + 48 + 0x1c; 3355 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3356 72 : 144; 3357 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3358 roundup2(ack, 4)); 3359 } else { 3360 urtw_write8_m(sc, URTW_SLOT, 0x14); 3361 urtw_write8_m(sc, URTW_DIFS, 0x32); 3362 /* In 8187B, BRSR + 1 ==> EIFS register */ 3363 urtw_write8_m(sc, URTW_BRSR + 1, 0x5b); 3364 3365 ack = 112 + 48 + 0x32; 3366 ack += (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 3367 72 : 144; 3368 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 3369 roundup2(ack, 4)); 3370 3371 } 3372 3373fail: 3374 return (error); 3375} 3376 3377static usb_error_t 3378urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3379{ 3380 int i; 3381 uint8_t *cck_pwrtable; 3382 uint8_t cck_pwrlvl_max = 15; 3383 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3384 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3385 usb_error_t error; 3386 3387 /* CCK power setting */ 3388 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3389 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3390 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3391 cck_pwrlvl += sc->sc_txpwr_cck_base; 3392 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3393 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3394 urtw_8225v2b_txpwr_cck; 3395 3396 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3397 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3398 ((cck_pwrlvl <= 11) ? 8 : 16); 3399 else 3400 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3401 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3402 3403 for (i = 0; i < 8; i++) 3404 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3405 3406 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3407 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3408 usb2_pause_mtx(&sc->sc_mtx, 1); 3409 3410 /* OFDM power setting */ 3411 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3412 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3413 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3414 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3415 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3416 3417 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3418 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3419 3420 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3421 if (ofdm_pwrlvl <= 11) { 3422 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3423 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3424 } else { 3425 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3426 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3427 } 3428 } else { 3429 if (ofdm_pwrlvl <= 11) { 3430 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3431 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3432 } else if (ofdm_pwrlvl <= 17) { 3433 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3434 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3435 } else { 3436 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3437 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3438 } 3439 } 3440 usb2_pause_mtx(&sc->sc_mtx, 1); 3441fail: 3442 return (error); 3443} 3444 3445static usb_error_t 3446urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3447{ 3448 struct usb_device_request req; 3449 usb_error_t error; 3450 3451 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3452 req.bRequest = URTW_8187_GETREGS_REQ; 3453 USETW(req.wValue, val | 0xfe00); 3454 USETW(req.wIndex, 0); 3455 USETW(req.wLength, sizeof(uint8_t)); 3456 3457 error = urtw_do_request(sc, &req, data); 3458 return (error); 3459} 3460 3461static usb_error_t 3462urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3463{ 3464 struct usb_device_request req; 3465 3466 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3467 req.bRequest = URTW_8187_SETREGS_REQ; 3468 USETW(req.wValue, val | 0xfe00); 3469 USETW(req.wIndex, 0); 3470 USETW(req.wLength, sizeof(uint8_t)); 3471 3472 return (urtw_do_request(sc, &req, &data)); 3473} 3474 3475static usb_error_t 3476urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3477{ 3478 uint8_t data; 3479 usb_error_t error; 3480 3481 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3482 if (error) 3483 goto fail; 3484 3485 urtw_read8_m(sc, URTW_CONFIG3, &data); 3486 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3487 urtw_write32_m(sc, URTW_ANAPARAM, val); 3488 urtw_read8_m(sc, URTW_CONFIG3, &data); 3489 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3490 3491 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3492 if (error) 3493 goto fail; 3494fail: 3495 return (error); 3496} 3497 3498static usb_error_t 3499urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3500{ 3501 uint8_t data; 3502 usb_error_t error; 3503 3504 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3505 if (error) 3506 goto fail; 3507 3508 urtw_read8_m(sc, URTW_CONFIG3, &data); 3509 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3510 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3511 urtw_read8_m(sc, URTW_CONFIG3, &data); 3512 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3513 3514 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3515 if (error) 3516 goto fail; 3517fail: 3518 return (error); 3519} 3520 3521static usb_error_t 3522urtw_intr_enable(struct urtw_softc *sc) 3523{ 3524 usb_error_t error; 3525 3526 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3527fail: 3528 return (error); 3529} 3530 3531static usb_error_t 3532urtw_intr_disable(struct urtw_softc *sc) 3533{ 3534 usb_error_t error; 3535 3536 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3537fail: 3538 return (error); 3539} 3540 3541static usb_error_t 3542urtw_reset(struct urtw_softc *sc) 3543{ 3544 uint8_t data; 3545 usb_error_t error; 3546 3547 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3548 if (error) 3549 goto fail; 3550 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3551 if (error) 3552 goto fail; 3553 3554 error = urtw_intr_disable(sc); 3555 if (error) 3556 goto fail; 3557 usb2_pause_mtx(&sc->sc_mtx, 100); 3558 3559 error = urtw_write8e(sc, 0x18, 0x10); 3560 if (error != 0) 3561 goto fail; 3562 error = urtw_write8e(sc, 0x18, 0x11); 3563 if (error != 0) 3564 goto fail; 3565 error = urtw_write8e(sc, 0x18, 0x00); 3566 if (error != 0) 3567 goto fail; 3568 usb2_pause_mtx(&sc->sc_mtx, 100); 3569 3570 urtw_read8_m(sc, URTW_CMD, &data); 3571 data = (data & 0x2) | URTW_CMD_RST; 3572 urtw_write8_m(sc, URTW_CMD, data); 3573 usb2_pause_mtx(&sc->sc_mtx, 100); 3574 3575 urtw_read8_m(sc, URTW_CMD, &data); 3576 if (data & URTW_CMD_RST) { 3577 device_printf(sc->sc_dev, "reset timeout\n"); 3578 goto fail; 3579 } 3580 3581 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3582 if (error) 3583 goto fail; 3584 usb2_pause_mtx(&sc->sc_mtx, 100); 3585 3586 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3587 if (error) 3588 goto fail; 3589 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3590 if (error) 3591 goto fail; 3592fail: 3593 return (error); 3594} 3595 3596static usb_error_t 3597urtw_led_ctl(struct urtw_softc *sc, int mode) 3598{ 3599 usb_error_t error = 0; 3600 3601 switch (sc->sc_strategy) { 3602 case URTW_SW_LED_MODE0: 3603 error = urtw_led_mode0(sc, mode); 3604 break; 3605 case URTW_SW_LED_MODE1: 3606 error = urtw_led_mode1(sc, mode); 3607 break; 3608 case URTW_SW_LED_MODE2: 3609 error = urtw_led_mode2(sc, mode); 3610 break; 3611 case URTW_SW_LED_MODE3: 3612 error = urtw_led_mode3(sc, mode); 3613 break; 3614 default: 3615 panic("unsupported LED mode %d\n", sc->sc_strategy); 3616 /* never reach */ 3617 } 3618 3619 return (error); 3620} 3621 3622static usb_error_t 3623urtw_led_mode0(struct urtw_softc *sc, int mode) 3624{ 3625 3626 switch (mode) { 3627 case URTW_LED_CTL_POWER_ON: 3628 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3629 break; 3630 case URTW_LED_CTL_TX: 3631 if (sc->sc_gpio_ledinprogress == 1) 3632 return (0); 3633 3634 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3635 sc->sc_gpio_blinktime = 2; 3636 break; 3637 case URTW_LED_CTL_LINK: 3638 sc->sc_gpio_ledstate = URTW_LED_ON; 3639 break; 3640 default: 3641 panic("unsupported LED mode 0x%x", mode); 3642 /* never reach */ 3643 } 3644 3645 switch (sc->sc_gpio_ledstate) { 3646 case URTW_LED_ON: 3647 if (sc->sc_gpio_ledinprogress != 0) 3648 break; 3649 urtw_led_on(sc, URTW_LED_GPIO); 3650 break; 3651 case URTW_LED_BLINK_NORMAL: 3652 if (sc->sc_gpio_ledinprogress != 0) 3653 break; 3654 sc->sc_gpio_ledinprogress = 1; 3655 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3656 URTW_LED_OFF : URTW_LED_ON; 3657 usb2_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3658 break; 3659 case URTW_LED_POWER_ON_BLINK: 3660 urtw_led_on(sc, URTW_LED_GPIO); 3661 usb2_pause_mtx(&sc->sc_mtx, 100); 3662 urtw_led_off(sc, URTW_LED_GPIO); 3663 break; 3664 default: 3665 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3666 /* never reach */ 3667 } 3668 return (0); 3669} 3670 3671static usb_error_t 3672urtw_led_mode1(struct urtw_softc *sc, int mode) 3673{ 3674 3675 return (USB_ERR_INVAL); 3676} 3677 3678static usb_error_t 3679urtw_led_mode2(struct urtw_softc *sc, int mode) 3680{ 3681 3682 return (USB_ERR_INVAL); 3683} 3684 3685static usb_error_t 3686urtw_led_mode3(struct urtw_softc *sc, int mode) 3687{ 3688 3689 return (USB_ERR_INVAL); 3690} 3691 3692static usb_error_t 3693urtw_led_on(struct urtw_softc *sc, int type) 3694{ 3695 usb_error_t error; 3696 3697 if (type == URTW_LED_GPIO) { 3698 switch (sc->sc_gpio_ledpin) { 3699 case URTW_LED_PIN_GPIO0: 3700 urtw_write8_m(sc, URTW_GPIO, 0x01); 3701 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3702 break; 3703 default: 3704 panic("unsupported LED PIN type 0x%x", 3705 sc->sc_gpio_ledpin); 3706 /* never reach */ 3707 } 3708 } else { 3709 panic("unsupported LED type 0x%x", type); 3710 /* never reach */ 3711 } 3712 3713 sc->sc_gpio_ledon = 1; 3714fail: 3715 return (error); 3716} 3717 3718static usb_error_t 3719urtw_led_off(struct urtw_softc *sc, int type) 3720{ 3721 usb_error_t error; 3722 3723 if (type == URTW_LED_GPIO) { 3724 switch (sc->sc_gpio_ledpin) { 3725 case URTW_LED_PIN_GPIO0: 3726 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3727 urtw_write8_m(sc, 3728 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3729 break; 3730 default: 3731 panic("unsupported LED PIN type 0x%x", 3732 sc->sc_gpio_ledpin); 3733 /* never reach */ 3734 } 3735 } else { 3736 panic("unsupported LED type 0x%x", type); 3737 /* never reach */ 3738 } 3739 3740 sc->sc_gpio_ledon = 0; 3741 3742fail: 3743 return (error); 3744} 3745 3746static void 3747urtw_led_ch(void *arg) 3748{ 3749 struct urtw_softc *sc = arg; 3750 struct ifnet *ifp = sc->sc_ifp; 3751 struct ieee80211com *ic = ifp->if_l2com; 3752 3753 ieee80211_runtask(ic, &sc->sc_led_task); 3754} 3755 3756static void 3757urtw_ledtask(void *arg, int pending) 3758{ 3759 struct urtw_softc *sc = arg; 3760 3761 if (sc->sc_strategy != URTW_SW_LED_MODE0) 3762 panic("could not process a LED strategy 0x%x", sc->sc_strategy); 3763 3764 URTW_LOCK(sc); 3765 urtw_led_blink(sc); 3766 URTW_UNLOCK(sc); 3767} 3768 3769static usb_error_t 3770urtw_led_blink(struct urtw_softc *sc) 3771{ 3772 uint8_t ing = 0; 3773 usb_error_t error; 3774 3775 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3776 error = urtw_led_on(sc, URTW_LED_GPIO); 3777 else 3778 error = urtw_led_off(sc, URTW_LED_GPIO); 3779 sc->sc_gpio_blinktime--; 3780 if (sc->sc_gpio_blinktime == 0) 3781 ing = 1; 3782 else { 3783 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3784 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3785 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3786 ing = 1; 3787 } 3788 if (ing == 1) { 3789 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3790 sc->sc_gpio_ledon == 0) 3791 error = urtw_led_on(sc, URTW_LED_GPIO); 3792 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3793 sc->sc_gpio_ledon == 1) 3794 error = urtw_led_off(sc, URTW_LED_GPIO); 3795 3796 sc->sc_gpio_blinktime = 0; 3797 sc->sc_gpio_ledinprogress = 0; 3798 return (0); 3799 } 3800 3801 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3802 URTW_LED_ON : URTW_LED_OFF; 3803 3804 switch (sc->sc_gpio_ledstate) { 3805 case URTW_LED_BLINK_NORMAL: 3806 usb2_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3807 break; 3808 default: 3809 panic("unknown LED status 0x%x", sc->sc_gpio_ledstate); 3810 /* never reach */ 3811 } 3812 return (0); 3813} 3814 3815static usb_error_t 3816urtw_rx_enable(struct urtw_softc *sc) 3817{ 3818 uint8_t data; 3819 usb_error_t error; 3820 3821 usb2_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3822 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3823 3824 error = urtw_rx_setconf(sc); 3825 if (error != 0) 3826 goto fail; 3827 3828 urtw_read8_m(sc, URTW_CMD, &data); 3829 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3830fail: 3831 return (error); 3832} 3833 3834static usb_error_t 3835urtw_tx_enable(struct urtw_softc *sc) 3836{ 3837 uint8_t data8; 3838 uint32_t data; 3839 usb_error_t error; 3840 3841 if (sc->sc_flags & URTW_RTL8187B) { 3842 urtw_read32_m(sc, URTW_TX_CONF, &data); 3843 data &= ~URTW_TX_LOOPBACK_MASK; 3844 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3845 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3846 data &= ~URTW_TX_SWPLCPLEN; 3847 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3848 (7 << 8) | /* short retry limit */ 3849 (7 << 0) | /* long retry limit */ 3850 (7 << 21); /* MAX TX DMA */ 3851 urtw_write32_m(sc, URTW_TX_CONF, data); 3852 3853 urtw_read8_m(sc, URTW_CMD, &data8); 3854 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3855 return (error); 3856 } 3857 3858 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3859 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3860 urtw_write8_m(sc, URTW_CW_CONF, data8); 3861 3862 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3863 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3864 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3865 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3866 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3867 3868 urtw_read32_m(sc, URTW_TX_CONF, &data); 3869 data &= ~URTW_TX_LOOPBACK_MASK; 3870 data |= URTW_TX_LOOPBACK_NONE; 3871 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3872 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3873 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3874 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3875 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3876 data &= ~URTW_TX_SWPLCPLEN; 3877 data |= URTW_TX_NOICV; 3878 urtw_write32_m(sc, URTW_TX_CONF, data); 3879 3880 urtw_read8_m(sc, URTW_CMD, &data8); 3881 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3882fail: 3883 return (error); 3884} 3885 3886static usb_error_t 3887urtw_rx_setconf(struct urtw_softc *sc) 3888{ 3889 struct ifnet *ifp = sc->sc_ifp; 3890 struct ieee80211com *ic = ifp->if_l2com; 3891 uint32_t data; 3892 usb_error_t error; 3893 3894 urtw_read32_m(sc, URTW_RX, &data); 3895 data = data &~ URTW_RX_FILTER_MASK; 3896 if (sc->sc_flags & URTW_RTL8187B) { 3897 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3898 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3899 URTW_RX_FILTER_NICMAC | URTW_RX_CHECK_BSSID | 3900 URTW_RX_FIFO_THRESHOLD_NONE | 3901 URTW_MAX_RX_DMA_2048 | 3902 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3903 } else { 3904 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3905 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3906 3907 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3908 data = data | URTW_RX_FILTER_ICVERR; 3909 data = data | URTW_RX_FILTER_PWR; 3910 } 3911 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3912 data = data | URTW_RX_FILTER_CRCERR; 3913 3914 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3915 (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) { 3916 data = data | URTW_RX_FILTER_ALLMAC; 3917 } else { 3918 data = data | URTW_RX_FILTER_NICMAC; 3919 data = data | URTW_RX_CHECK_BSSID; 3920 } 3921 3922 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3923 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3924 URTW_RX_AUTORESETPHY; 3925 data = data &~ URTW_MAX_RX_DMA_MASK; 3926 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3927 } 3928 3929 urtw_write32_m(sc, URTW_RX, data); 3930fail: 3931 return (error); 3932} 3933 3934static struct mbuf * 3935urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3936 int8_t *nf_p) 3937{ 3938 int actlen, flen, len, nf = -95, rssi; 3939 struct ieee80211_frame *wh; 3940 struct mbuf *m, *mnew; 3941 struct urtw_8187b_rxhdr *bhdr; 3942 struct urtw_softc *sc = data->sc; 3943 struct ifnet *ifp = sc->sc_ifp; 3944 struct ieee80211com *ic = ifp->if_l2com; 3945 uint8_t *desc, quality = 0, rate; 3946 3947 actlen = xfer->actlen; 3948 if (actlen < URTW_MIN_RXBUFSZ) { 3949 ifp->if_ierrors++; 3950 return (NULL); 3951 } 3952 3953 if (sc->sc_flags & URTW_RTL8187B) { 3954 len = actlen - (sizeof(struct urtw_8187b_rxhdr)); 3955 bhdr = (struct urtw_8187b_rxhdr *)(data->buf + len); 3956 desc = data->buf + len; 3957 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3958 if (flen > actlen) { 3959 ifp->if_ierrors++; 3960 return (NULL); 3961 } 3962 rate = (le32toh(bhdr->flags) >> 20) & 0xf; 3963 rssi = 14 + (bhdr->rssi / 2); 3964 if (rssi > 95) 3965 rssi = 95; 3966 } else { 3967 /* 4 dword and 4 byte CRC */ 3968 len = actlen - (4 * 4); 3969 desc = data->buf + len; 3970 flen = ((desc[1] & 0x0f) << 8) + (desc[0] & 0xff); 3971 if (flen > actlen) { 3972 ifp->if_ierrors++; 3973 return (NULL); 3974 } 3975 3976 rate = (desc[2] & 0xf0) >> 4; 3977 quality = desc[4] & 0xff; 3978 /* XXX correct? */ 3979 rssi = (desc[6] & 0xfe) >> 1; 3980 if (!urtw_isbmode(rate)) { 3981 rssi = (rssi > 90) ? 90 : ((rssi < 25) ? 25 : rssi); 3982 rssi = ((90 - rssi) * 100) / 65; 3983 } else { 3984 rssi = (rssi > 90) ? 95 : ((rssi < 30) ? 30 : rssi); 3985 rssi = ((95 - rssi) * 100) / 65; 3986 } 3987 } 3988 3989 mnew = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 3990 if (mnew == NULL) { 3991 ifp->if_ierrors++; 3992 return (NULL); 3993 } 3994 3995 m = data->m; 3996 data->m = mnew; 3997 data->buf = mtod(mnew, uint8_t *); 3998 3999 /* finalize mbuf */ 4000 m->m_pkthdr.rcvif = ifp; 4001 m->m_pkthdr.len = m->m_len = flen - 4; 4002 4003 if (ieee80211_radiotap_active(ic)) { 4004 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4005 4006 /* XXX Are variables correct? */ 4007 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 4008 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 4009 tap->wr_dbm_antsignal = (int8_t)rssi; 4010 } 4011 4012 wh = mtod(m, struct ieee80211_frame *); 4013 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == IEEE80211_FC0_TYPE_DATA) 4014 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4015 /* XXX correct? */ 4016 if ((sc->sc_flags & URTW_RTL8187B) == 0) 4017 nf = (quality > 64) ? 0 : ((64 - quality) * 100) / 64; 4018 4019 *rssi_p = rssi; 4020 *nf_p = nf; 4021 4022 return (m); 4023} 4024 4025static void 4026urtw_bulk_rx_callback(struct usb_xfer *xfer) 4027{ 4028 struct urtw_softc *sc = xfer->priv_sc; 4029 struct ifnet *ifp = sc->sc_ifp; 4030 struct ieee80211com *ic = ifp->if_l2com; 4031 struct ieee80211_frame *wh; 4032 struct ieee80211_node *ni; 4033 struct mbuf *m = NULL; 4034 struct urtw_data *data; 4035 int8_t nf = -95; 4036 int rssi = 1; 4037 4038 URTW_ASSERT_LOCKED(sc); 4039 4040 switch (USB_GET_STATE(xfer)) { 4041 case USB_ST_TRANSFERRED: 4042 data = STAILQ_FIRST(&sc->sc_rx_active); 4043 if (data == NULL) 4044 goto setup; 4045 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4046 m = urtw_rxeof(xfer, data, &rssi, &nf); 4047 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4048 /* FALLTHROUGH */ 4049 case USB_ST_SETUP: 4050setup: 4051 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4052 if (data == NULL) { 4053 KASSERT(m == NULL, ("mbuf isn't NULL")); 4054 return; 4055 } 4056 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4057 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4058 usb2_set_frame_data(xfer, data->buf, 0); 4059 xfer->frlengths[0] = xfer->max_data_length; 4060 usb2_start_hardware(xfer); 4061 4062 /* 4063 * To avoid LOR we should unlock our private mutex here to call 4064 * ieee80211_input() because here is at the end of a USB 4065 * callback and safe to unlock. 4066 */ 4067 URTW_UNLOCK(sc); 4068 if (m != NULL) { 4069 wh = mtod(m, struct ieee80211_frame *); 4070 ni = ieee80211_find_rxnode(ic, 4071 (struct ieee80211_frame_min *)wh); 4072 if (ni != NULL) { 4073 (void) ieee80211_input(ni, m, rssi, nf); 4074 /* node is no longer needed */ 4075 ieee80211_free_node(ni); 4076 } else 4077 (void) ieee80211_input_all(ic, m, rssi, nf); 4078 m = NULL; 4079 } 4080 URTW_LOCK(sc); 4081 break; 4082 default: 4083 /* needs it to the inactive queue due to a error. */ 4084 data = STAILQ_FIRST(&sc->sc_rx_active); 4085 if (data != NULL) { 4086 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4087 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4088 } 4089 if (xfer->error != USB_ERR_CANCELLED) { 4090 xfer->flags.stall_pipe = 1; 4091 ifp->if_ierrors++; 4092 goto setup; 4093 } 4094 break; 4095 } 4096} 4097 4098static void 4099urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4100{ 4101 struct urtw_softc *sc = xfer->priv_sc; 4102 struct ifnet *ifp = sc->sc_ifp; 4103 struct mbuf *m; 4104 4105 URTW_ASSERT_LOCKED(sc); 4106 4107 /* 4108 * Do any tx complete callback. Note this must be done before releasing 4109 * the node reference. 4110 */ 4111 if (data->m) { 4112 m = data->m; 4113 if (m->m_flags & M_TXCB) { 4114 /* XXX status? */ 4115 ieee80211_process_callback(data->ni, m, 0); 4116 } 4117 m_freem(m); 4118 data->m = NULL; 4119 } 4120 if (data->ni) { 4121 ieee80211_free_node(data->ni); 4122 data->ni = NULL; 4123 } 4124 sc->sc_txtimer = 0; 4125 ifp->if_opackets++; 4126 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 4127} 4128 4129static void 4130urtw_bulk_tx_callback(struct usb_xfer *xfer) 4131{ 4132 struct urtw_softc *sc = xfer->priv_sc; 4133 struct ifnet *ifp = sc->sc_ifp; 4134 struct urtw_data *data; 4135 4136 URTW_ASSERT_LOCKED(sc); 4137 4138 switch (USB_GET_STATE(xfer)) { 4139 case USB_ST_TRANSFERRED: 4140 data = STAILQ_FIRST(&sc->sc_tx_active); 4141 if (data == NULL) 4142 goto setup; 4143 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4144 urtw_txeof(xfer, data); 4145 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4146 /* FALLTHROUGH */ 4147 case USB_ST_SETUP: 4148setup: 4149 data = STAILQ_FIRST(&sc->sc_tx_pending); 4150 if (data == NULL) { 4151 DPRINTF(sc, URTW_DEBUG_XMIT, 4152 "%s: empty pending queue\n", __func__); 4153 return; 4154 } 4155 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4156 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4157 4158 usb2_set_frame_data(xfer, data->buf, 0); 4159 xfer->frlengths[0] = data->buflen; 4160 usb2_start_hardware(xfer); 4161 4162 URTW_UNLOCK(sc); 4163 urtw_start(ifp); 4164 URTW_LOCK(sc); 4165 break; 4166 default: 4167 data = STAILQ_FIRST(&sc->sc_tx_active); 4168 if (data == NULL) 4169 goto setup; 4170 if (data->ni != NULL) { 4171 ieee80211_free_node(data->ni); 4172 data->ni = NULL; 4173 ifp->if_oerrors++; 4174 } 4175 if (xfer->error != USB_ERR_CANCELLED) { 4176 xfer->flags.stall_pipe = 1; 4177 goto setup; 4178 } 4179 break; 4180 } 4181} 4182 4183static struct urtw_data * 4184_urtw_getbuf(struct urtw_softc *sc) 4185{ 4186 struct urtw_data *bf; 4187 4188 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4189 if (bf != NULL) 4190 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4191 else 4192 bf = NULL; 4193 if (bf == NULL) 4194 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4195 "out of xmit buffers"); 4196 return (bf); 4197} 4198 4199static struct urtw_data * 4200urtw_getbuf(struct urtw_softc *sc) 4201{ 4202 struct urtw_data *bf; 4203 4204 URTW_ASSERT_LOCKED(sc); 4205 4206 bf = _urtw_getbuf(sc); 4207 if (bf == NULL) { 4208 struct ifnet *ifp = sc->sc_ifp; 4209 4210 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4211 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 4212 } 4213 return (bf); 4214} 4215 4216static int 4217urtw_isbmode(uint16_t rate) 4218{ 4219 4220 rate = urtw_rtl2rate(rate); 4221 4222 return ((rate <= 22 && rate != 12 && rate != 18) || 4223 rate == 44) ? (1) : (0); 4224} 4225 4226static device_method_t urtw_methods[] = { 4227 DEVMETHOD(device_probe, urtw_match), 4228 DEVMETHOD(device_attach, urtw_attach), 4229 DEVMETHOD(device_detach, urtw_detach), 4230 { 0, 0 } 4231}; 4232static driver_t urtw_driver = { 4233 "urtw", 4234 urtw_methods, 4235 sizeof(struct urtw_softc) 4236}; 4237static devclass_t urtw_devclass; 4238 4239DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4240MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4241MODULE_DEPEND(urtw, usb, 1, 1, 1); 4242