if_ural.c revision 233774
1190688Sweongyo/*	$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 233774 2012-04-02 10:50:42Z hselasky $	*/
2190688Sweongyo
3190688Sweongyo/*-
4190688Sweongyo * Copyright (c) 2005, 2006
5190688Sweongyo *	Damien Bergamini <damien.bergamini@free.fr>
6190688Sweongyo *
7190688Sweongyo * Copyright (c) 2006, 2008
8190688Sweongyo *	Hans Petter Selasky <hselasky@FreeBSD.org>
9190688Sweongyo *
10190688Sweongyo * Permission to use, copy, modify, and distribute this software for any
11190688Sweongyo * purpose with or without fee is hereby granted, provided that the above
12190688Sweongyo * copyright notice and this permission notice appear in all copies.
13190688Sweongyo *
14190688Sweongyo * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
15190688Sweongyo * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
16190688Sweongyo * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
17190688Sweongyo * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
18190688Sweongyo * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
19190688Sweongyo * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
20190688Sweongyo * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
21190688Sweongyo */
22190688Sweongyo
23190688Sweongyo#include <sys/cdefs.h>
24190688Sweongyo__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 233774 2012-04-02 10:50:42Z hselasky $");
25190688Sweongyo
26190688Sweongyo/*-
27190688Sweongyo * Ralink Technology RT2500USB chipset driver
28190688Sweongyo * http://www.ralinktech.com/
29190688Sweongyo */
30190688Sweongyo
31190688Sweongyo#include <sys/param.h>
32190688Sweongyo#include <sys/sockio.h>
33190688Sweongyo#include <sys/sysctl.h>
34190688Sweongyo#include <sys/lock.h>
35190688Sweongyo#include <sys/mutex.h>
36190688Sweongyo#include <sys/mbuf.h>
37190688Sweongyo#include <sys/kernel.h>
38190688Sweongyo#include <sys/socket.h>
39190688Sweongyo#include <sys/systm.h>
40190688Sweongyo#include <sys/malloc.h>
41190688Sweongyo#include <sys/module.h>
42190688Sweongyo#include <sys/bus.h>
43190688Sweongyo#include <sys/endian.h>
44190688Sweongyo#include <sys/kdb.h>
45190688Sweongyo
46190688Sweongyo#include <machine/bus.h>
47190688Sweongyo#include <machine/resource.h>
48190688Sweongyo#include <sys/rman.h>
49190688Sweongyo
50190688Sweongyo#include <net/bpf.h>
51190688Sweongyo#include <net/if.h>
52190688Sweongyo#include <net/if_arp.h>
53190688Sweongyo#include <net/ethernet.h>
54190688Sweongyo#include <net/if_dl.h>
55190688Sweongyo#include <net/if_media.h>
56190688Sweongyo#include <net/if_types.h>
57190688Sweongyo
58190688Sweongyo#ifdef INET
59190688Sweongyo#include <netinet/in.h>
60190688Sweongyo#include <netinet/in_systm.h>
61190688Sweongyo#include <netinet/in_var.h>
62190688Sweongyo#include <netinet/if_ether.h>
63190688Sweongyo#include <netinet/ip.h>
64190688Sweongyo#endif
65190688Sweongyo
66190688Sweongyo#include <net80211/ieee80211_var.h>
67190688Sweongyo#include <net80211/ieee80211_regdomain.h>
68190688Sweongyo#include <net80211/ieee80211_radiotap.h>
69190688Sweongyo#include <net80211/ieee80211_ratectl.h>
70190688Sweongyo
71190688Sweongyo#include <dev/usb/usb.h>
72190688Sweongyo#include <dev/usb/usbdi.h>
73190688Sweongyo#include "usbdevs.h"
74190688Sweongyo
75190688Sweongyo#define	USB_DEBUG_VAR ural_debug
76190688Sweongyo#include <dev/usb/usb_debug.h>
77190688Sweongyo
78190688Sweongyo#include <dev/usb/wlan/if_uralreg.h>
79190688Sweongyo#include <dev/usb/wlan/if_uralvar.h>
80190688Sweongyo
81190688Sweongyo#ifdef USB_DEBUG
82190688Sweongyostatic int ural_debug = 0;
83190688Sweongyo
84190688Sweongyostatic SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
85190688SweongyoSYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
86190688Sweongyo    "Debug level");
87190688Sweongyo#endif
88190688Sweongyo
89190688Sweongyo#define URAL_RSSI(rssi)					\
90190688Sweongyo	((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ?	\
91190688Sweongyo	 ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
92190688Sweongyo
93190688Sweongyo/* various supported device vendors/products */
94190688Sweongyostatic const STRUCT_USB_HOST_ID ural_devs[] = {
95190688Sweongyo#define	URAL_DEV(v,p)  { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
96190688Sweongyo	URAL_DEV(ASUS, WL167G),
97190688Sweongyo	URAL_DEV(ASUS, RT2570),
98190688Sweongyo	URAL_DEV(BELKIN, F5D7050),
99190688Sweongyo	URAL_DEV(BELKIN, F5D7051),
100190688Sweongyo	URAL_DEV(CISCOLINKSYS, HU200TS),
101190688Sweongyo	URAL_DEV(CISCOLINKSYS, WUSB54G),
102190688Sweongyo	URAL_DEV(CISCOLINKSYS, WUSB54GP),
103190688Sweongyo	URAL_DEV(CONCEPTRONIC2, C54RU),
104190688Sweongyo	URAL_DEV(DLINK, DWLG122),
105190688Sweongyo	URAL_DEV(GIGABYTE, GN54G),
106190688Sweongyo	URAL_DEV(GIGABYTE, GNWBKG),
107190688Sweongyo	URAL_DEV(GUILLEMOT, HWGUSB254),
108194677Sthompsa	URAL_DEV(MELCO, KG54),
109190688Sweongyo	URAL_DEV(MELCO, KG54AI),
110190688Sweongyo	URAL_DEV(MELCO, KG54YB),
111190688Sweongyo	URAL_DEV(MELCO, NINWIFI),
112190688Sweongyo	URAL_DEV(MSI, RT2570),
113190688Sweongyo	URAL_DEV(MSI, RT2570_2),
114192502Sthompsa	URAL_DEV(MSI, RT2570_3),
115190688Sweongyo	URAL_DEV(NOVATECH, NV902),
116190688Sweongyo	URAL_DEV(RALINK, RT2570),
117192502Sthompsa	URAL_DEV(RALINK, RT2570_2),
118190688Sweongyo	URAL_DEV(RALINK, RT2570_3),
119192502Sthompsa	URAL_DEV(SIEMENS2, WL54G),
120190688Sweongyo	URAL_DEV(SMC, 2862WG),
121192502Sthompsa	URAL_DEV(SPHAIRON, UB801R),
122190688Sweongyo	URAL_DEV(SURECOM, RT2570),
123190688Sweongyo	URAL_DEV(VTECH, RT2570),
124190688Sweongyo	URAL_DEV(ZINWELL, RT2570),
125190688Sweongyo#undef URAL_DEV
126192502Sthompsa};
127190688Sweongyo
128190688Sweongyostatic usb_callback_t ural_bulk_read_callback;
129190688Sweongyostatic usb_callback_t ural_bulk_write_callback;
130190688Sweongyo
131190688Sweongyostatic usb_error_t	ural_do_request(struct ural_softc *sc,
132190688Sweongyo			    struct usb_device_request *req, void *data);
133190688Sweongyostatic struct ieee80211vap *ural_vap_create(struct ieee80211com *,
134190688Sweongyo			    const char [IFNAMSIZ], int, enum ieee80211_opmode,
135190688Sweongyo			    int, const uint8_t [IEEE80211_ADDR_LEN],
136190688Sweongyo			    const uint8_t [IEEE80211_ADDR_LEN]);
137190688Sweongyostatic void		ural_vap_delete(struct ieee80211vap *);
138190688Sweongyostatic void		ural_tx_free(struct ural_tx_data *, int);
139190688Sweongyostatic void		ural_setup_tx_list(struct ural_softc *);
140190688Sweongyostatic void		ural_unsetup_tx_list(struct ural_softc *);
141190688Sweongyostatic int		ural_newstate(struct ieee80211vap *,
142190688Sweongyo			    enum ieee80211_state, int);
143190688Sweongyostatic void		ural_setup_tx_desc(struct ural_softc *,
144190688Sweongyo			    struct ural_tx_desc *, uint32_t, int, int);
145190688Sweongyostatic int		ural_tx_bcn(struct ural_softc *, struct mbuf *,
146190688Sweongyo			    struct ieee80211_node *);
147190688Sweongyostatic int		ural_tx_mgt(struct ural_softc *, struct mbuf *,
148190688Sweongyo			    struct ieee80211_node *);
149190688Sweongyostatic int		ural_tx_data(struct ural_softc *, struct mbuf *,
150190688Sweongyo			    struct ieee80211_node *);
151190688Sweongyostatic void		ural_start(struct ifnet *);
152190688Sweongyostatic int		ural_ioctl(struct ifnet *, u_long, caddr_t);
153190688Sweongyostatic void		ural_set_testmode(struct ural_softc *);
154190688Sweongyostatic void		ural_eeprom_read(struct ural_softc *, uint16_t, void *,
155190688Sweongyo			    int);
156190688Sweongyostatic uint16_t		ural_read(struct ural_softc *, uint16_t);
157190688Sweongyostatic void		ural_read_multi(struct ural_softc *, uint16_t, void *,
158190688Sweongyo			    int);
159190688Sweongyostatic void		ural_write(struct ural_softc *, uint16_t, uint16_t);
160190688Sweongyostatic void		ural_write_multi(struct ural_softc *, uint16_t, void *,
161190688Sweongyo			    int) __unused;
162190688Sweongyostatic void		ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
163190688Sweongyostatic uint8_t		ural_bbp_read(struct ural_softc *, uint8_t);
164190688Sweongyostatic void		ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
165190688Sweongyostatic void		ural_scan_start(struct ieee80211com *);
166190688Sweongyostatic void		ural_scan_end(struct ieee80211com *);
167190688Sweongyostatic void		ural_set_channel(struct ieee80211com *);
168190688Sweongyostatic void		ural_set_chan(struct ural_softc *,
169190688Sweongyo			    struct ieee80211_channel *);
170192984Sthompsastatic void		ural_disable_rf_tune(struct ural_softc *);
171190688Sweongyostatic void		ural_enable_tsf_sync(struct ural_softc *);
172193029Sweongyostatic void 		ural_enable_tsf(struct ural_softc *);
173193029Sweongyostatic void		ural_update_slot(struct ifnet *);
174190688Sweongyostatic void		ural_set_txpreamble(struct ural_softc *);
175190688Sweongyostatic void		ural_set_basicrates(struct ural_softc *,
176190688Sweongyo			    const struct ieee80211_channel *);
177190688Sweongyostatic void		ural_set_bssid(struct ural_softc *, const uint8_t *);
178190688Sweongyostatic void		ural_set_macaddr(struct ural_softc *, uint8_t *);
179190688Sweongyostatic void		ural_update_promisc(struct ifnet *);
180190688Sweongyostatic void		ural_setpromisc(struct ural_softc *);
181190688Sweongyostatic const char	*ural_get_rf(int);
182190688Sweongyostatic void		ural_read_eeprom(struct ural_softc *);
183195916Sweongyostatic int		ural_bbp_init(struct ural_softc *);
184190688Sweongyostatic void		ural_set_txantenna(struct ural_softc *, int);
185190688Sweongyostatic void		ural_set_rxantenna(struct ural_softc *, int);
186190688Sweongyostatic void		ural_init_locked(struct ural_softc *);
187190688Sweongyostatic void		ural_init(void *);
188190688Sweongyostatic void		ural_stop(struct ural_softc *);
189190688Sweongyostatic int		ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
190190688Sweongyo			    const struct ieee80211_bpf_params *);
191203143Sthompsastatic void		ural_ratectl_start(struct ural_softc *,
192190688Sweongyo			    struct ieee80211_node *);
193190688Sweongyostatic void		ural_ratectl_timeout(void *);
194190688Sweongyostatic void		ural_ratectl_task(void *, int);
195190688Sweongyostatic int		ural_pause(struct ural_softc *sc, int timeout);
196190688Sweongyo
197190688Sweongyo/*
198190688Sweongyo * Default values for MAC registers; values taken from the reference driver.
199190688Sweongyo */
200193045Sthompsastatic const struct {
201193045Sthompsa	uint16_t	reg;
202193045Sthompsa	uint16_t	val;
203193045Sthompsa} ural_def_mac[] = {
204190688Sweongyo	{ RAL_TXRX_CSR5,  0x8c8d },
205192984Sthompsa	{ RAL_TXRX_CSR6,  0x8b8a },
206190688Sweongyo	{ RAL_TXRX_CSR7,  0x8687 },
207190688Sweongyo	{ RAL_TXRX_CSR8,  0x0085 },
208190688Sweongyo	{ RAL_MAC_CSR13,  0x1111 },
209190688Sweongyo	{ RAL_MAC_CSR14,  0x1e11 },
210190744Sthompsa	{ RAL_TXRX_CSR21, 0xe78f },
211190744Sthompsa	{ RAL_MAC_CSR9,   0xff1d },
212190688Sweongyo	{ RAL_MAC_CSR11,  0x0002 },
213190688Sweongyo	{ RAL_MAC_CSR22,  0x0053 },
214190688Sweongyo	{ RAL_MAC_CSR15,  0x0000 },
215190744Sthompsa	{ RAL_MAC_CSR8,   RAL_FRAME_SIZE },
216190688Sweongyo	{ RAL_TXRX_CSR19, 0x0000 },
217190688Sweongyo	{ RAL_TXRX_CSR18, 0x005a },
218190688Sweongyo	{ RAL_PHY_CSR2,   0x0000 },
219190688Sweongyo	{ RAL_TXRX_CSR0,  0x1ec0 },
220190688Sweongyo	{ RAL_PHY_CSR4,   0x000f }
221190744Sthompsa};
222190744Sthompsa
223190688Sweongyo/*
224190688Sweongyo * Default values for BBP registers; values taken from the reference driver.
225190688Sweongyo */
226190688Sweongyostatic const struct {
227190744Sthompsa	uint8_t	reg;
228190744Sthompsa	uint8_t	val;
229190688Sweongyo} ural_def_bbp[] = {
230190688Sweongyo	{  3, 0x02 },
231190688Sweongyo	{  4, 0x19 },
232190688Sweongyo	{ 14, 0x1c },
233190688Sweongyo	{ 15, 0x30 },
234190744Sthompsa	{ 16, 0xac },
235190744Sthompsa	{ 17, 0x48 },
236190688Sweongyo	{ 18, 0x18 },
237190688Sweongyo	{ 19, 0xff },
238190688Sweongyo	{ 20, 0x1e },
239190688Sweongyo	{ 21, 0x08 },
240190744Sthompsa	{ 22, 0x08 },
241190688Sweongyo	{ 23, 0x08 },
242190688Sweongyo	{ 24, 0x80 },
243190688Sweongyo	{ 25, 0x50 },
244190688Sweongyo	{ 26, 0x08 },
245190688Sweongyo	{ 27, 0x23 },
246190744Sthompsa	{ 30, 0x10 },
247190744Sthompsa	{ 31, 0x2b },
248190688Sweongyo	{ 32, 0xb9 },
249190688Sweongyo	{ 34, 0x12 },
250190688Sweongyo	{ 35, 0x50 },
251190688Sweongyo	{ 39, 0xc4 },
252190744Sthompsa	{ 40, 0x02 },
253190744Sthompsa	{ 41, 0x60 },
254190688Sweongyo	{ 53, 0x10 },
255190688Sweongyo	{ 54, 0x18 },
256190688Sweongyo	{ 56, 0x08 },
257190688Sweongyo	{ 57, 0x10 },
258190688Sweongyo	{ 58, 0x08 },
259190688Sweongyo	{ 61, 0x60 },
260190688Sweongyo	{ 62, 0x10 },
261190688Sweongyo	{ 75, 0xff }
262190688Sweongyo};
263190688Sweongyo
264190688Sweongyo/*
265190688Sweongyo * Default values for RF register R2 indexed by channel numbers.
266190688Sweongyo */
267190688Sweongyostatic const uint32_t ural_rf2522_r2[] = {
268190688Sweongyo	0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
269190688Sweongyo	0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
270190688Sweongyo};
271190688Sweongyo
272190688Sweongyostatic const uint32_t ural_rf2523_r2[] = {
273190688Sweongyo	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
274190688Sweongyo	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
275190688Sweongyo};
276190688Sweongyo
277190688Sweongyostatic const uint32_t ural_rf2524_r2[] = {
278190688Sweongyo	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
279190688Sweongyo	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
280190688Sweongyo};
281190688Sweongyo
282190688Sweongyostatic const uint32_t ural_rf2525_r2[] = {
283190688Sweongyo	0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
284190688Sweongyo	0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
285190688Sweongyo};
286190688Sweongyo
287190688Sweongyostatic const uint32_t ural_rf2525_hi_r2[] = {
288190688Sweongyo	0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
289190688Sweongyo	0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
290190688Sweongyo};
291190688Sweongyo
292190688Sweongyostatic const uint32_t ural_rf2525e_r2[] = {
293190688Sweongyo	0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
294190688Sweongyo	0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
295190688Sweongyo};
296190688Sweongyo
297190688Sweongyostatic const uint32_t ural_rf2526_hi_r2[] = {
298190688Sweongyo	0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
299190688Sweongyo	0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
300190688Sweongyo};
301190688Sweongyo
302190688Sweongyostatic const uint32_t ural_rf2526_r2[] = {
303190688Sweongyo	0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
304190688Sweongyo	0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
305190688Sweongyo};
306190688Sweongyo
307190688Sweongyo/*
308190688Sweongyo * For dual-band RF, RF registers R1 and R4 also depend on channel number;
309190688Sweongyo * values taken from the reference driver.
310190688Sweongyo */
311190688Sweongyostatic const struct {
312190688Sweongyo	uint8_t		chan;
313190688Sweongyo	uint32_t	r1;
314190688Sweongyo	uint32_t	r2;
315190688Sweongyo	uint32_t	r4;
316190688Sweongyo} ural_rf5222[] = {
317190688Sweongyo	{   1, 0x08808, 0x0044d, 0x00282 },
318190688Sweongyo	{   2, 0x08808, 0x0044e, 0x00282 },
319190688Sweongyo	{   3, 0x08808, 0x0044f, 0x00282 },
320190688Sweongyo	{   4, 0x08808, 0x00460, 0x00282 },
321190688Sweongyo	{   5, 0x08808, 0x00461, 0x00282 },
322190688Sweongyo	{   6, 0x08808, 0x00462, 0x00282 },
323190688Sweongyo	{   7, 0x08808, 0x00463, 0x00282 },
324190688Sweongyo	{   8, 0x08808, 0x00464, 0x00282 },
325190688Sweongyo	{   9, 0x08808, 0x00465, 0x00282 },
326190688Sweongyo	{  10, 0x08808, 0x00466, 0x00282 },
327190688Sweongyo	{  11, 0x08808, 0x00467, 0x00282 },
328192984Sthompsa	{  12, 0x08808, 0x00468, 0x00282 },
329190688Sweongyo	{  13, 0x08808, 0x00469, 0x00282 },
330192499Sthompsa	{  14, 0x08808, 0x0046b, 0x00286 },
331190688Sweongyo
332190688Sweongyo	{  36, 0x08804, 0x06225, 0x00287 },
333190688Sweongyo	{  40, 0x08804, 0x06226, 0x00287 },
334190688Sweongyo	{  44, 0x08804, 0x06227, 0x00287 },
335190688Sweongyo	{  48, 0x08804, 0x06228, 0x00287 },
336190688Sweongyo	{  52, 0x08804, 0x06229, 0x00287 },
337194228Sthompsa	{  56, 0x08804, 0x0622a, 0x00287 },
338190688Sweongyo	{  60, 0x08804, 0x0622b, 0x00287 },
339190688Sweongyo	{  64, 0x08804, 0x0622c, 0x00287 },
340190688Sweongyo
341190688Sweongyo	{ 100, 0x08804, 0x02200, 0x00283 },
342190688Sweongyo	{ 104, 0x08804, 0x02201, 0x00283 },
343190688Sweongyo	{ 108, 0x08804, 0x02202, 0x00283 },
344192984Sthompsa	{ 112, 0x08804, 0x02203, 0x00283 },
345190688Sweongyo	{ 116, 0x08804, 0x02204, 0x00283 },
346190688Sweongyo	{ 120, 0x08804, 0x02205, 0x00283 },
347190688Sweongyo	{ 124, 0x08804, 0x02206, 0x00283 },
348193045Sthompsa	{ 128, 0x08804, 0x02207, 0x00283 },
349190688Sweongyo	{ 132, 0x08804, 0x02208, 0x00283 },
350190688Sweongyo	{ 136, 0x08804, 0x02209, 0x00283 },
351190688Sweongyo	{ 140, 0x08804, 0x0220a, 0x00283 },
352190688Sweongyo
353190688Sweongyo	{ 149, 0x08808, 0x02429, 0x00281 },
354190688Sweongyo	{ 153, 0x08808, 0x0242b, 0x00281 },
355190688Sweongyo	{ 157, 0x08808, 0x0242d, 0x00281 },
356194228Sthompsa	{ 161, 0x08808, 0x0242f, 0x00281 }
357190688Sweongyo};
358190688Sweongyo
359190688Sweongyostatic const struct usb_config ural_config[URAL_N_TRANSFER] = {
360190688Sweongyo	[URAL_BULK_WR] = {
361190688Sweongyo		.type = UE_BULK,
362190688Sweongyo		.endpoint = UE_ADDR_ANY,
363190688Sweongyo		.direction = UE_DIR_OUT,
364190688Sweongyo		.bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
365190688Sweongyo		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
366190688Sweongyo		.callback = ural_bulk_write_callback,
367190688Sweongyo		.timeout = 5000,	/* ms */
368190688Sweongyo	},
369190688Sweongyo	[URAL_BULK_RD] = {
370190688Sweongyo		.type = UE_BULK,
371190688Sweongyo		.endpoint = UE_ADDR_ANY,
372190688Sweongyo		.direction = UE_DIR_IN,
373190688Sweongyo		.bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
374190688Sweongyo		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
375190688Sweongyo		.callback = ural_bulk_read_callback,
376190688Sweongyo	},
377194228Sthompsa};
378190688Sweongyo
379190688Sweongyostatic device_probe_t ural_match;
380190688Sweongyostatic device_attach_t ural_attach;
381194228Sthompsastatic device_detach_t ural_detach;
382190688Sweongyo
383190688Sweongyostatic device_method_t ural_methods[] = {
384190688Sweongyo	/* Device interface */
385190688Sweongyo	DEVMETHOD(device_probe,		ural_match),
386190688Sweongyo	DEVMETHOD(device_attach,	ural_attach),
387190688Sweongyo	DEVMETHOD(device_detach,	ural_detach),
388190688Sweongyo
389190688Sweongyo	{ 0, 0 }
390190688Sweongyo};
391190688Sweongyo
392190688Sweongyostatic driver_t ural_driver = {
393190688Sweongyo	.name = "ural",
394190688Sweongyo	.methods = ural_methods,
395190688Sweongyo	.size = sizeof(struct ural_softc),
396190688Sweongyo};
397190688Sweongyo
398190688Sweongyostatic devclass_t ural_devclass;
399190688Sweongyo
400190688SweongyoDRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
401190688SweongyoMODULE_DEPEND(ural, usb, 1, 1, 1);
402190688SweongyoMODULE_DEPEND(ural, wlan, 1, 1, 1);
403190688SweongyoMODULE_VERSION(ural, 1);
404190688Sweongyo
405190688Sweongyostatic int
406190688Sweongyoural_match(device_t self)
407190688Sweongyo{
408190688Sweongyo	struct usb_attach_arg *uaa = device_get_ivars(self);
409190688Sweongyo
410190688Sweongyo	if (uaa->usb_mode != USB_MODE_HOST)
411190688Sweongyo		return (ENXIO);
412190688Sweongyo	if (uaa->info.bConfigIndex != 0)
413190688Sweongyo		return (ENXIO);
414190688Sweongyo	if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
415190688Sweongyo		return (ENXIO);
416190688Sweongyo
417190688Sweongyo	return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
418190688Sweongyo}
419190688Sweongyo
420190688Sweongyostatic int
421190688Sweongyoural_attach(device_t self)
422190688Sweongyo{
423190688Sweongyo	struct usb_attach_arg *uaa = device_get_ivars(self);
424190688Sweongyo	struct ural_softc *sc = device_get_softc(self);
425190688Sweongyo	struct ifnet *ifp;
426190688Sweongyo	struct ieee80211com *ic;
427190688Sweongyo	uint8_t iface_index, bands;
428190688Sweongyo	int error;
429190688Sweongyo
430190688Sweongyo	device_set_usb_desc(self);
431190688Sweongyo	sc->sc_udev = uaa->device;
432190688Sweongyo	sc->sc_dev = self;
433190688Sweongyo
434190688Sweongyo	mtx_init(&sc->sc_mtx, device_get_nameunit(self),
435190688Sweongyo	    MTX_NETWORK_LOCK, MTX_DEF);
436190688Sweongyo
437190688Sweongyo	iface_index = RAL_IFACE_INDEX;
438190688Sweongyo	error = usbd_transfer_setup(uaa->device,
439190688Sweongyo	    &iface_index, sc->sc_xfer, ural_config,
440190688Sweongyo	    URAL_N_TRANSFER, sc, &sc->sc_mtx);
441207554Ssobomax	if (error) {
442207554Ssobomax		device_printf(self, "could not allocate USB transfers, "
443190688Sweongyo		    "err=%s\n", usbd_errstr(error));
444190688Sweongyo		goto detach;
445190688Sweongyo	}
446190688Sweongyo
447190688Sweongyo	RAL_LOCK(sc);
448190688Sweongyo	/* retrieve RT2570 rev. no */
449190688Sweongyo	sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
450190688Sweongyo
451190688Sweongyo	/* retrieve MAC address and various other things from EEPROM */
452190688Sweongyo	ural_read_eeprom(sc);
453190688Sweongyo	RAL_UNLOCK(sc);
454190688Sweongyo
455190688Sweongyo	device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
456190688Sweongyo	    sc->asic_rev, ural_get_rf(sc->rf_rev));
457190688Sweongyo
458190688Sweongyo	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
459190688Sweongyo	if (ifp == NULL) {
460190688Sweongyo		device_printf(sc->sc_dev, "can not if_alloc()\n");
461190688Sweongyo		goto detach;
462190688Sweongyo	}
463190688Sweongyo	ic = ifp->if_l2com;
464190688Sweongyo
465190688Sweongyo	ifp->if_softc = sc;
466190688Sweongyo	if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
467190688Sweongyo	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
468190688Sweongyo	ifp->if_init = ural_init;
469190688Sweongyo	ifp->if_ioctl = ural_ioctl;
470190688Sweongyo	ifp->if_start = ural_start;
471190688Sweongyo	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
472190688Sweongyo	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
473190688Sweongyo	IFQ_SET_READY(&ifp->if_snd);
474190688Sweongyo
475190688Sweongyo	ic->ic_ifp = ifp;
476190688Sweongyo	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
477190688Sweongyo
478190688Sweongyo	/* set device capabilities */
479190688Sweongyo	ic->ic_caps =
480190688Sweongyo	      IEEE80211_C_STA		/* station mode supported */
481190688Sweongyo	    | IEEE80211_C_IBSS		/* IBSS mode supported */
482190688Sweongyo	    | IEEE80211_C_MONITOR	/* monitor mode supported */
483192468Ssam	    | IEEE80211_C_HOSTAP	/* HostAp mode supported */
484192468Ssam	    | IEEE80211_C_TXPMGT	/* tx power management */
485192468Ssam	    | IEEE80211_C_SHPREAMBLE	/* short preamble supported */
486192468Ssam	    | IEEE80211_C_SHSLOT	/* short slot time supported */
487192468Ssam	    | IEEE80211_C_BGSCAN	/* bg scanning supported */
488190688Sweongyo	    | IEEE80211_C_WPA		/* 802.11i */
489190688Sweongyo	    ;
490190688Sweongyo
491190688Sweongyo	bands = 0;
492190688Sweongyo	setbit(&bands, IEEE80211_MODE_11B);
493190688Sweongyo	setbit(&bands, IEEE80211_MODE_11G);
494190688Sweongyo	if (sc->rf_rev == RAL_RF_5222)
495190688Sweongyo		setbit(&bands, IEEE80211_MODE_11A);
496194228Sthompsa	ieee80211_init_channels(ic, NULL, &bands);
497190688Sweongyo
498190688Sweongyo	ieee80211_ifattach(ic, sc->sc_bssid);
499190688Sweongyo	ic->ic_update_promisc = ural_update_promisc;
500190688Sweongyo	ic->ic_raw_xmit = ural_raw_xmit;
501190688Sweongyo	ic->ic_scan_start = ural_scan_start;
502190688Sweongyo	ic->ic_scan_end = ural_scan_end;
503190688Sweongyo	ic->ic_set_channel = ural_set_channel;
504190688Sweongyo
505190688Sweongyo	ic->ic_vap_create = ural_vap_create;
506190688Sweongyo	ic->ic_vap_delete = ural_vap_delete;
507190688Sweongyo
508190688Sweongyo	ieee80211_radiotap_attach(ic,
509190688Sweongyo	    &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
510190688Sweongyo		RAL_TX_RADIOTAP_PRESENT,
511190688Sweongyo	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
512194329Sweongyo		RAL_RX_RADIOTAP_PRESENT);
513190688Sweongyo
514194329Sweongyo	if (bootverbose)
515194329Sweongyo		ieee80211_announce(ic);
516194329Sweongyo
517190688Sweongyo	return (0);
518190688Sweongyo
519190688Sweongyodetach:
520190688Sweongyo	ural_detach(self);
521190688Sweongyo	return (ENXIO);			/* failure */
522194228Sthompsa}
523190688Sweongyo
524190688Sweongyostatic int
525190688Sweongyoural_detach(device_t self)
526190688Sweongyo{
527190688Sweongyo	struct ural_softc *sc = device_get_softc(self);
528190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
529190688Sweongyo	struct ieee80211com *ic;
530190688Sweongyo
531190688Sweongyo	/* stop all USB transfers */
532190688Sweongyo	usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
533190688Sweongyo
534190688Sweongyo	/* free TX list, if any */
535190688Sweongyo	RAL_LOCK(sc);
536190688Sweongyo	ural_unsetup_tx_list(sc);
537190688Sweongyo	RAL_UNLOCK(sc);
538190688Sweongyo
539190688Sweongyo	if (ifp) {
540190688Sweongyo		ic = ifp->if_l2com;
541190688Sweongyo		ieee80211_ifdetach(ic);
542190688Sweongyo		if_free(ifp);
543190688Sweongyo	}
544190688Sweongyo	mtx_destroy(&sc->sc_mtx);
545190688Sweongyo
546190688Sweongyo	return (0);
547190688Sweongyo}
548190688Sweongyo
549190688Sweongyostatic usb_error_t
550190688Sweongyoural_do_request(struct ural_softc *sc,
551190688Sweongyo    struct usb_device_request *req, void *data)
552190688Sweongyo{
553190688Sweongyo	usb_error_t err;
554190688Sweongyo	int ntries = 10;
555190688Sweongyo
556190688Sweongyo	while (ntries--) {
557190688Sweongyo		err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
558190688Sweongyo		    req, data, 0, NULL, 250 /* ms */);
559190688Sweongyo		if (err == 0)
560190688Sweongyo			break;
561190688Sweongyo
562190688Sweongyo		DPRINTFN(1, "Control request failed, %s (retrying)\n",
563190688Sweongyo		    usbd_errstr(err));
564190688Sweongyo		if (ural_pause(sc, hz / 100))
565190688Sweongyo			break;
566190688Sweongyo	}
567190688Sweongyo	return (err);
568190688Sweongyo}
569190688Sweongyo
570190688Sweongyostatic struct ieee80211vap *
571190688Sweongyoural_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
572190688Sweongyo    enum ieee80211_opmode opmode, int flags,
573190688Sweongyo    const uint8_t bssid[IEEE80211_ADDR_LEN],
574190688Sweongyo    const uint8_t mac[IEEE80211_ADDR_LEN])
575190688Sweongyo{
576190688Sweongyo	struct ural_softc *sc = ic->ic_ifp->if_softc;
577190688Sweongyo	struct ural_vap *uvp;
578190688Sweongyo	struct ieee80211vap *vap;
579190688Sweongyo
580190688Sweongyo	if (!TAILQ_EMPTY(&ic->ic_vaps))		/* only one at a time */
581190688Sweongyo		return NULL;
582190688Sweongyo	uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
583190688Sweongyo	    M_80211_VAP, M_NOWAIT | M_ZERO);
584190688Sweongyo	if (uvp == NULL)
585190688Sweongyo		return NULL;
586190688Sweongyo	vap = &uvp->vap;
587190688Sweongyo	/* enable s/w bmiss handling for sta mode */
588190688Sweongyo	ieee80211_vap_setup(ic, vap, name, unit, opmode,
589190688Sweongyo	    flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
590190688Sweongyo
591190688Sweongyo	/* override state transition machine */
592190688Sweongyo	uvp->newstate = vap->iv_newstate;
593190688Sweongyo	vap->iv_newstate = ural_newstate;
594190688Sweongyo
595190688Sweongyo	usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0);
596190688Sweongyo	TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp);
597190688Sweongyo	ieee80211_ratectl_init(vap);
598190688Sweongyo	ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */);
599190688Sweongyo
600190688Sweongyo	/* complete setup */
601190688Sweongyo	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
602190688Sweongyo	ic->ic_opmode = opmode;
603190688Sweongyo	return vap;
604190688Sweongyo}
605190688Sweongyo
606190688Sweongyostatic void
607190688Sweongyoural_vap_delete(struct ieee80211vap *vap)
608190688Sweongyo{
609190688Sweongyo	struct ural_vap *uvp = URAL_VAP(vap);
610190688Sweongyo	struct ieee80211com *ic = vap->iv_ic;
611190688Sweongyo
612190688Sweongyo	usb_callout_drain(&uvp->ratectl_ch);
613190688Sweongyo	ieee80211_draintask(ic, &uvp->ratectl_task);
614190688Sweongyo	ieee80211_ratectl_deinit(vap);
615190688Sweongyo	ieee80211_vap_detach(vap);
616190688Sweongyo	free(uvp, M_80211_VAP);
617190688Sweongyo}
618190688Sweongyo
619190688Sweongyostatic void
620190688Sweongyoural_tx_free(struct ural_tx_data *data, int txerr)
621190688Sweongyo{
622190688Sweongyo	struct ural_softc *sc = data->sc;
623190688Sweongyo
624190688Sweongyo	if (data->m != NULL) {
625190688Sweongyo		if (data->m->m_flags & M_TXCB)
626190688Sweongyo			ieee80211_process_callback(data->ni, data->m,
627190688Sweongyo			    txerr ? ETIMEDOUT : 0);
628190688Sweongyo		m_freem(data->m);
629190688Sweongyo		data->m = NULL;
630190688Sweongyo
631190688Sweongyo		ieee80211_free_node(data->ni);
632190688Sweongyo		data->ni = NULL;
633190688Sweongyo	}
634190688Sweongyo	STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
635190688Sweongyo	sc->tx_nfree++;
636190688Sweongyo}
637190688Sweongyo
638190688Sweongyostatic void
639190688Sweongyoural_setup_tx_list(struct ural_softc *sc)
640190688Sweongyo{
641190688Sweongyo	struct ural_tx_data *data;
642190688Sweongyo	int i;
643190688Sweongyo
644190688Sweongyo	sc->tx_nfree = 0;
645190688Sweongyo	STAILQ_INIT(&sc->tx_q);
646190688Sweongyo	STAILQ_INIT(&sc->tx_free);
647190688Sweongyo
648190688Sweongyo	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
649190688Sweongyo		data = &sc->tx_data[i];
650190688Sweongyo
651190688Sweongyo		data->sc = sc;
652190688Sweongyo		STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
653190688Sweongyo		sc->tx_nfree++;
654190688Sweongyo	}
655190688Sweongyo}
656190688Sweongyo
657190688Sweongyostatic void
658190688Sweongyoural_unsetup_tx_list(struct ural_softc *sc)
659190688Sweongyo{
660190688Sweongyo	struct ural_tx_data *data;
661190688Sweongyo	int i;
662190688Sweongyo
663190688Sweongyo	/* make sure any subsequent use of the queues will fail */
664190688Sweongyo	sc->tx_nfree = 0;
665190688Sweongyo	STAILQ_INIT(&sc->tx_q);
666190688Sweongyo	STAILQ_INIT(&sc->tx_free);
667190688Sweongyo
668190688Sweongyo	/* free up all node references and mbufs */
669190688Sweongyo	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
670190688Sweongyo		data = &sc->tx_data[i];
671190688Sweongyo
672190688Sweongyo		if (data->m != NULL) {
673190688Sweongyo			m_freem(data->m);
674190688Sweongyo			data->m = NULL;
675190688Sweongyo		}
676190688Sweongyo		if (data->ni != NULL) {
677190688Sweongyo			ieee80211_free_node(data->ni);
678190688Sweongyo			data->ni = NULL;
679190688Sweongyo		}
680190688Sweongyo	}
681190688Sweongyo}
682190688Sweongyo
683190688Sweongyostatic int
684190688Sweongyoural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
685190688Sweongyo{
686190688Sweongyo	struct ural_vap *uvp = URAL_VAP(vap);
687190688Sweongyo	struct ieee80211com *ic = vap->iv_ic;
688190688Sweongyo	struct ural_softc *sc = ic->ic_ifp->if_softc;
689190688Sweongyo	const struct ieee80211_txparam *tp;
690190688Sweongyo	struct ieee80211_node *ni;
691190688Sweongyo	struct mbuf *m;
692190688Sweongyo
693190688Sweongyo	DPRINTF("%s -> %s\n",
694190688Sweongyo		ieee80211_state_name[vap->iv_state],
695190688Sweongyo		ieee80211_state_name[nstate]);
696190688Sweongyo
697190688Sweongyo	IEEE80211_UNLOCK(ic);
698190688Sweongyo	RAL_LOCK(sc);
699190688Sweongyo	usb_callout_stop(&uvp->ratectl_ch);
700190688Sweongyo
701190688Sweongyo	switch (nstate) {
702190688Sweongyo	case IEEE80211_S_INIT:
703190688Sweongyo		if (vap->iv_state == IEEE80211_S_RUN) {
704190688Sweongyo			/* abort TSF synchronization */
705190688Sweongyo			ural_write(sc, RAL_TXRX_CSR19, 0);
706190688Sweongyo
707190688Sweongyo			/* force tx led to stop blinking */
708190688Sweongyo			ural_write(sc, RAL_MAC_CSR20, 0);
709190688Sweongyo		}
710190688Sweongyo		break;
711190688Sweongyo
712190688Sweongyo	case IEEE80211_S_RUN:
713190688Sweongyo		ni = ieee80211_ref_node(vap->iv_bss);
714190688Sweongyo
715190688Sweongyo		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
716190688Sweongyo			ural_update_slot(ic->ic_ifp);
717190688Sweongyo			ural_set_txpreamble(sc);
718190688Sweongyo			ural_set_basicrates(sc, ic->ic_bsschan);
719190688Sweongyo			IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
720190688Sweongyo			ural_set_bssid(sc, sc->sc_bssid);
721190688Sweongyo		}
722190688Sweongyo
723190688Sweongyo		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
724190688Sweongyo		    vap->iv_opmode == IEEE80211_M_IBSS) {
725190688Sweongyo			m = ieee80211_beacon_alloc(ni, &uvp->bo);
726190688Sweongyo			if (m == NULL) {
727190688Sweongyo				device_printf(sc->sc_dev,
728190688Sweongyo				    "could not allocate beacon\n");
729190688Sweongyo				RAL_UNLOCK(sc);
730190688Sweongyo				IEEE80211_LOCK(ic);
731190688Sweongyo				ieee80211_free_node(ni);
732190688Sweongyo				return (-1);
733190688Sweongyo			}
734190688Sweongyo			ieee80211_ref_node(ni);
735190688Sweongyo			if (ural_tx_bcn(sc, m, ni) != 0) {
736190688Sweongyo				device_printf(sc->sc_dev,
737194228Sthompsa				    "could not send beacon\n");
738190688Sweongyo				RAL_UNLOCK(sc);
739190688Sweongyo				IEEE80211_LOCK(ic);
740194228Sthompsa				ieee80211_free_node(ni);
741190688Sweongyo				return (-1);
742190688Sweongyo			}
743190688Sweongyo		}
744190688Sweongyo
745190688Sweongyo		/* make tx led blink on tx (controlled by ASIC) */
746190688Sweongyo		ural_write(sc, RAL_MAC_CSR20, 1);
747190688Sweongyo
748190688Sweongyo		if (vap->iv_opmode != IEEE80211_M_MONITOR)
749190688Sweongyo			ural_enable_tsf_sync(sc);
750190688Sweongyo		else
751190688Sweongyo			ural_enable_tsf(sc);
752190688Sweongyo
753190688Sweongyo		/* enable automatic rate adaptation */
754190688Sweongyo		/* XXX should use ic_bsschan but not valid until after newstate call below */
755190688Sweongyo		tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
756190688Sweongyo		if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
757190688Sweongyo			ural_ratectl_start(sc, ni);
758190688Sweongyo		ieee80211_free_node(ni);
759190688Sweongyo		break;
760190688Sweongyo
761190688Sweongyo	default:
762190688Sweongyo		break;
763190688Sweongyo	}
764190688Sweongyo	RAL_UNLOCK(sc);
765190688Sweongyo	IEEE80211_LOCK(ic);
766190688Sweongyo	return (uvp->newstate(vap, nstate, arg));
767190688Sweongyo}
768190688Sweongyo
769190688Sweongyo
770190688Sweongyostatic void
771190688Sweongyoural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
772190688Sweongyo{
773190688Sweongyo	struct ural_softc *sc = usbd_xfer_softc(xfer);
774190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
775190688Sweongyo	struct ieee80211vap *vap;
776190688Sweongyo	struct ural_tx_data *data;
777190688Sweongyo	struct mbuf *m;
778190688Sweongyo	struct usb_page_cache *pc;
779190688Sweongyo	int len;
780190688Sweongyo
781190688Sweongyo	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
782190688Sweongyo
783190688Sweongyo	switch (USB_GET_STATE(xfer)) {
784190688Sweongyo	case USB_ST_TRANSFERRED:
785190688Sweongyo		DPRINTFN(11, "transfer complete, %d bytes\n", len);
786190688Sweongyo
787190688Sweongyo		/* free resources */
788190688Sweongyo		data = usbd_xfer_get_priv(xfer);
789190688Sweongyo		ural_tx_free(data, 0);
790190688Sweongyo		usbd_xfer_set_priv(xfer, NULL);
791190688Sweongyo
792190688Sweongyo		ifp->if_opackets++;
793190688Sweongyo		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
794190688Sweongyo
795190688Sweongyo		/* FALLTHROUGH */
796190688Sweongyo	case USB_ST_SETUP:
797190688Sweongyotr_setup:
798190688Sweongyo		data = STAILQ_FIRST(&sc->tx_q);
799190688Sweongyo		if (data) {
800190688Sweongyo			STAILQ_REMOVE_HEAD(&sc->tx_q, next);
801190688Sweongyo			m = data->m;
802190688Sweongyo
803190688Sweongyo			if (m->m_pkthdr.len > (int)(RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
804190688Sweongyo				DPRINTFN(0, "data overflow, %u bytes\n",
805190688Sweongyo				    m->m_pkthdr.len);
806190688Sweongyo				m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
807190688Sweongyo			}
808190688Sweongyo			pc = usbd_xfer_get_frame(xfer, 0);
809190688Sweongyo			usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE);
810190688Sweongyo			usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0,
811190688Sweongyo			    m->m_pkthdr.len);
812190688Sweongyo
813190688Sweongyo			vap = data->ni->ni_vap;
814190688Sweongyo			if (ieee80211_radiotap_active_vap(vap)) {
815190688Sweongyo				struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
816190688Sweongyo
817190688Sweongyo				tap->wt_flags = 0;
818190688Sweongyo				tap->wt_rate = data->rate;
819190688Sweongyo				tap->wt_antenna = sc->tx_ant;
820190688Sweongyo
821190688Sweongyo				ieee80211_radiotap_tx(vap, m);
822190688Sweongyo			}
823190688Sweongyo
824190688Sweongyo			/* xfer length needs to be a multiple of two! */
825190688Sweongyo			len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
826190688Sweongyo			if ((len % 64) == 0)
827190688Sweongyo				len += 2;
828190688Sweongyo
829190688Sweongyo			DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
830190688Sweongyo			    m->m_pkthdr.len, len);
831190688Sweongyo
832190688Sweongyo			usbd_xfer_set_frame_len(xfer, 0, len);
833190688Sweongyo			usbd_xfer_set_priv(xfer, data);
834190688Sweongyo
835190688Sweongyo			usbd_transfer_submit(xfer);
836190688Sweongyo		}
837190688Sweongyo		RAL_UNLOCK(sc);
838190688Sweongyo		ural_start(ifp);
839190688Sweongyo		RAL_LOCK(sc);
840190688Sweongyo		break;
841190688Sweongyo
842190688Sweongyo	default:			/* Error */
843190688Sweongyo		DPRINTFN(11, "transfer error, %s\n",
844190688Sweongyo		    usbd_errstr(error));
845190688Sweongyo
846190688Sweongyo		ifp->if_oerrors++;
847190688Sweongyo		data = usbd_xfer_get_priv(xfer);
848190688Sweongyo		if (data != NULL) {
849190688Sweongyo			ural_tx_free(data, error);
850190688Sweongyo			usbd_xfer_set_priv(xfer, NULL);
851190688Sweongyo		}
852190688Sweongyo
853190688Sweongyo		if (error == USB_ERR_STALLED) {
854190688Sweongyo			/* try to clear stall first */
855190688Sweongyo			usbd_xfer_set_stall(xfer);
856190688Sweongyo			goto tr_setup;
857190688Sweongyo		}
858190688Sweongyo		if (error == USB_ERR_TIMEOUT)
859190688Sweongyo			device_printf(sc->sc_dev, "device timeout\n");
860190688Sweongyo		break;
861190688Sweongyo	}
862190688Sweongyo}
863190688Sweongyo
864190688Sweongyostatic void
865190688Sweongyoural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
866190688Sweongyo{
867190688Sweongyo	struct ural_softc *sc = usbd_xfer_softc(xfer);
868190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
869190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
870190688Sweongyo	struct ieee80211_node *ni;
871190688Sweongyo	struct mbuf *m = NULL;
872190688Sweongyo	struct usb_page_cache *pc;
873190688Sweongyo	uint32_t flags;
874190688Sweongyo	int8_t rssi = 0, nf = 0;
875190688Sweongyo	int len;
876190688Sweongyo
877190688Sweongyo	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
878190688Sweongyo
879190688Sweongyo	switch (USB_GET_STATE(xfer)) {
880190688Sweongyo	case USB_ST_TRANSFERRED:
881190688Sweongyo
882190688Sweongyo		DPRINTFN(15, "rx done, actlen=%d\n", len);
883190688Sweongyo
884190688Sweongyo		if (len < (int)(RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN)) {
885190688Sweongyo			DPRINTF("%s: xfer too short %d\n",
886190688Sweongyo			    device_get_nameunit(sc->sc_dev), len);
887190688Sweongyo			ifp->if_ierrors++;
888190688Sweongyo			goto tr_setup;
889190688Sweongyo		}
890190688Sweongyo
891190688Sweongyo		len -= RAL_RX_DESC_SIZE;
892190688Sweongyo		/* rx descriptor is located at the end */
893190688Sweongyo		pc = usbd_xfer_get_frame(xfer, 0);
894190688Sweongyo		usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE);
895190688Sweongyo
896190688Sweongyo		rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
897190688Sweongyo		nf = RAL_NOISE_FLOOR;
898190688Sweongyo		flags = le32toh(sc->sc_rx_desc.flags);
899190688Sweongyo		if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
900190688Sweongyo			/*
901190688Sweongyo		         * This should not happen since we did not
902190688Sweongyo		         * request to receive those frames when we
903190688Sweongyo		         * filled RAL_TXRX_CSR2:
904190688Sweongyo		         */
905190688Sweongyo			DPRINTFN(5, "PHY or CRC error\n");
906190688Sweongyo			ifp->if_ierrors++;
907190688Sweongyo			goto tr_setup;
908190688Sweongyo		}
909190688Sweongyo
910190688Sweongyo		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
911190688Sweongyo		if (m == NULL) {
912190688Sweongyo			DPRINTF("could not allocate mbuf\n");
913190688Sweongyo			ifp->if_ierrors++;
914190688Sweongyo			goto tr_setup;
915190688Sweongyo		}
916190688Sweongyo		usbd_copy_out(pc, 0, mtod(m, uint8_t *), len);
917190688Sweongyo
918190688Sweongyo		/* finalize mbuf */
919190688Sweongyo		m->m_pkthdr.rcvif = ifp;
920190688Sweongyo		m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
921190688Sweongyo
922190688Sweongyo		if (ieee80211_radiotap_active(ic)) {
923190688Sweongyo			struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
924190688Sweongyo
925190688Sweongyo			/* XXX set once */
926190688Sweongyo			tap->wr_flags = 0;
927190688Sweongyo			tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
928190688Sweongyo			    (flags & RAL_RX_OFDM) ?
929190688Sweongyo			    IEEE80211_T_OFDM : IEEE80211_T_CCK);
930190688Sweongyo			tap->wr_antenna = sc->rx_ant;
931190688Sweongyo			tap->wr_antsignal = nf + rssi;
932190688Sweongyo			tap->wr_antnoise = nf;
933190688Sweongyo		}
934190688Sweongyo		/* Strip trailing 802.11 MAC FCS. */
935190688Sweongyo		m_adj(m, -IEEE80211_CRC_LEN);
936190688Sweongyo
937190688Sweongyo		/* FALLTHROUGH */
938190688Sweongyo	case USB_ST_SETUP:
939190688Sweongyotr_setup:
940190688Sweongyo		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
941190688Sweongyo		usbd_transfer_submit(xfer);
942190688Sweongyo
943190688Sweongyo		/*
944190688Sweongyo		 * At the end of a USB callback it is always safe to unlock
945190688Sweongyo		 * the private mutex of a device! That is why we do the
946190688Sweongyo		 * "ieee80211_input" here, and not some lines up!
947190688Sweongyo		 */
948190688Sweongyo		RAL_UNLOCK(sc);
949190688Sweongyo		if (m) {
950190688Sweongyo			ni = ieee80211_find_rxnode(ic,
951190688Sweongyo			    mtod(m, struct ieee80211_frame_min *));
952190688Sweongyo			if (ni != NULL) {
953190688Sweongyo				(void) ieee80211_input(ni, m, rssi, nf);
954190688Sweongyo				ieee80211_free_node(ni);
955190688Sweongyo			} else
956190688Sweongyo				(void) ieee80211_input_all(ic, m, rssi, nf);
957190688Sweongyo		}
958190688Sweongyo		if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
959190688Sweongyo		    !IFQ_IS_EMPTY(&ifp->if_snd))
960190688Sweongyo			ural_start(ifp);
961190688Sweongyo		RAL_LOCK(sc);
962190688Sweongyo		return;
963190688Sweongyo
964190688Sweongyo	default:			/* Error */
965190688Sweongyo		if (error != USB_ERR_CANCELLED) {
966190688Sweongyo			/* try to clear stall first */
967190688Sweongyo			usbd_xfer_set_stall(xfer);
968190688Sweongyo			goto tr_setup;
969190688Sweongyo		}
970190688Sweongyo		return;
971190688Sweongyo	}
972190688Sweongyo}
973190688Sweongyo
974190688Sweongyostatic uint8_t
975190688Sweongyoural_plcp_signal(int rate)
976190688Sweongyo{
977190688Sweongyo	switch (rate) {
978190688Sweongyo	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
979190688Sweongyo	case 12:	return 0xb;
980190688Sweongyo	case 18:	return 0xf;
981190688Sweongyo	case 24:	return 0xa;
982190688Sweongyo	case 36:	return 0xe;
983190688Sweongyo	case 48:	return 0x9;
984190688Sweongyo	case 72:	return 0xd;
985190688Sweongyo	case 96:	return 0x8;
986190688Sweongyo	case 108:	return 0xc;
987190688Sweongyo
988190688Sweongyo	/* CCK rates (NB: not IEEE std, device-specific) */
989190688Sweongyo	case 2:		return 0x0;
990190688Sweongyo	case 4:		return 0x1;
991190688Sweongyo	case 11:	return 0x2;
992190688Sweongyo	case 22:	return 0x3;
993190688Sweongyo	}
994190688Sweongyo	return 0xff;		/* XXX unsupported/unknown rate */
995190688Sweongyo}
996190688Sweongyo
997190688Sweongyostatic void
998190688Sweongyoural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
999190688Sweongyo    uint32_t flags, int len, int rate)
1000190688Sweongyo{
1001190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
1002190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
1003190688Sweongyo	uint16_t plcp_length;
1004190688Sweongyo	int remainder;
1005190688Sweongyo
1006190688Sweongyo	desc->flags = htole32(flags);
1007190688Sweongyo	desc->flags |= htole32(RAL_TX_NEWSEQ);
1008190688Sweongyo	desc->flags |= htole32(len << 16);
1009190688Sweongyo
1010190688Sweongyo	desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1011190688Sweongyo	desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1012190688Sweongyo
1013190688Sweongyo	/* setup PLCP fields */
1014190688Sweongyo	desc->plcp_signal  = ural_plcp_signal(rate);
1015190688Sweongyo	desc->plcp_service = 4;
1016190688Sweongyo
1017190688Sweongyo	len += IEEE80211_CRC_LEN;
1018190688Sweongyo	if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1019190688Sweongyo		desc->flags |= htole32(RAL_TX_OFDM);
1020190688Sweongyo
1021190688Sweongyo		plcp_length = len & 0xfff;
1022190688Sweongyo		desc->plcp_length_hi = plcp_length >> 6;
1023190688Sweongyo		desc->plcp_length_lo = plcp_length & 0x3f;
1024190688Sweongyo	} else {
1025190688Sweongyo		plcp_length = (16 * len + rate - 1) / rate;
1026190688Sweongyo		if (rate == 22) {
1027190688Sweongyo			remainder = (16 * len) % 22;
1028190688Sweongyo			if (remainder != 0 && remainder < 7)
1029190688Sweongyo				desc->plcp_service |= RAL_PLCP_LENGEXT;
1030190688Sweongyo		}
1031190688Sweongyo		desc->plcp_length_hi = plcp_length >> 8;
1032190688Sweongyo		desc->plcp_length_lo = plcp_length & 0xff;
1033190688Sweongyo
1034190688Sweongyo		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1035190688Sweongyo			desc->plcp_signal |= 0x08;
1036190688Sweongyo	}
1037190688Sweongyo
1038190688Sweongyo	desc->iv = 0;
1039190688Sweongyo	desc->eiv = 0;
1040190688Sweongyo}
1041190688Sweongyo
1042190688Sweongyo#define RAL_TX_TIMEOUT	5000
1043190688Sweongyo
1044190688Sweongyostatic int
1045190688Sweongyoural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1046190688Sweongyo{
1047190688Sweongyo	struct ieee80211vap *vap = ni->ni_vap;
1048190688Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1049190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
1050190688Sweongyo	const struct ieee80211_txparam *tp;
1051190688Sweongyo	struct ural_tx_data *data;
1052190688Sweongyo
1053190688Sweongyo	if (sc->tx_nfree == 0) {
1054190688Sweongyo		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1055190688Sweongyo		m_freem(m0);
1056190688Sweongyo		ieee80211_free_node(ni);
1057190688Sweongyo		return EIO;
1058190688Sweongyo	}
1059190688Sweongyo	data = STAILQ_FIRST(&sc->tx_free);
1060190688Sweongyo	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1061190688Sweongyo	sc->tx_nfree--;
1062190688Sweongyo	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1063190688Sweongyo
1064190688Sweongyo	data->m = m0;
1065190688Sweongyo	data->ni = ni;
1066190688Sweongyo	data->rate = tp->mgmtrate;
1067190688Sweongyo
1068190688Sweongyo	ural_setup_tx_desc(sc, &data->desc,
1069190688Sweongyo	    RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1070190688Sweongyo	    tp->mgmtrate);
1071190688Sweongyo
1072190688Sweongyo	DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1073190688Sweongyo	    m0->m_pkthdr.len, tp->mgmtrate);
1074190688Sweongyo
1075190688Sweongyo	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1076190688Sweongyo	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1077190688Sweongyo
1078190688Sweongyo	return (0);
1079190688Sweongyo}
1080190688Sweongyo
1081190688Sweongyostatic int
1082190688Sweongyoural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1083190688Sweongyo{
1084190688Sweongyo	struct ieee80211vap *vap = ni->ni_vap;
1085190688Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1086190688Sweongyo	const struct ieee80211_txparam *tp;
1087190688Sweongyo	struct ural_tx_data *data;
1088190688Sweongyo	struct ieee80211_frame *wh;
1089190688Sweongyo	struct ieee80211_key *k;
1090190688Sweongyo	uint32_t flags;
1091190688Sweongyo	uint16_t dur;
1092190688Sweongyo
1093190688Sweongyo	RAL_LOCK_ASSERT(sc, MA_OWNED);
1094190688Sweongyo
1095190688Sweongyo	data = STAILQ_FIRST(&sc->tx_free);
1096190688Sweongyo	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1097190688Sweongyo	sc->tx_nfree--;
1098190688Sweongyo
1099190688Sweongyo	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1100190688Sweongyo
1101190688Sweongyo	wh = mtod(m0, struct ieee80211_frame *);
1102190688Sweongyo	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1103190688Sweongyo		k = ieee80211_crypto_encap(ni, m0);
1104190688Sweongyo		if (k == NULL) {
1105190688Sweongyo			m_freem(m0);
1106190688Sweongyo			return ENOBUFS;
1107190688Sweongyo		}
1108190688Sweongyo		wh = mtod(m0, struct ieee80211_frame *);
1109190688Sweongyo	}
1110190688Sweongyo
1111190688Sweongyo	data->m = m0;
1112190688Sweongyo	data->ni = ni;
1113190688Sweongyo	data->rate = tp->mgmtrate;
1114190688Sweongyo
1115190688Sweongyo	flags = 0;
1116190688Sweongyo	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1117190688Sweongyo		flags |= RAL_TX_ACK;
1118190688Sweongyo
1119190688Sweongyo		dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1120190688Sweongyo		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1121190688Sweongyo		*(uint16_t *)wh->i_dur = htole16(dur);
1122190688Sweongyo
1123190688Sweongyo		/* tell hardware to add timestamp for probe responses */
1124190688Sweongyo		if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1125190688Sweongyo		    IEEE80211_FC0_TYPE_MGT &&
1126190688Sweongyo		    (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1127190688Sweongyo		    IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1128190688Sweongyo			flags |= RAL_TX_TIMESTAMP;
1129190688Sweongyo	}
1130190688Sweongyo
1131190688Sweongyo	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1132190688Sweongyo
1133190688Sweongyo	DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1134190688Sweongyo	    m0->m_pkthdr.len, tp->mgmtrate);
1135190688Sweongyo
1136190688Sweongyo	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1137190688Sweongyo	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1138190688Sweongyo
1139190688Sweongyo	return 0;
1140190688Sweongyo}
1141190688Sweongyo
1142190688Sweongyostatic int
1143190688Sweongyoural_sendprot(struct ural_softc *sc,
1144190688Sweongyo    const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1145190688Sweongyo{
1146190688Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1147190688Sweongyo	const struct ieee80211_frame *wh;
1148190688Sweongyo	struct ural_tx_data *data;
1149190688Sweongyo	struct mbuf *mprot;
1150190688Sweongyo	int protrate, ackrate, pktlen, flags, isshort;
1151190688Sweongyo	uint16_t dur;
1152190688Sweongyo
1153190688Sweongyo	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1154190688Sweongyo	    ("protection %d", prot));
1155190688Sweongyo
1156190688Sweongyo	wh = mtod(m, const struct ieee80211_frame *);
1157190688Sweongyo	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1158190688Sweongyo
1159190688Sweongyo	protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1160190688Sweongyo	ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1161190688Sweongyo
1162190688Sweongyo	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1163190688Sweongyo	dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1164190688Sweongyo	    + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1165190688Sweongyo	flags = RAL_TX_RETRY(7);
1166190688Sweongyo	if (prot == IEEE80211_PROT_RTSCTS) {
1167190688Sweongyo		/* NB: CTS is the same size as an ACK */
1168190688Sweongyo		dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1169190688Sweongyo		flags |= RAL_TX_ACK;
1170194228Sthompsa		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1171190688Sweongyo	} else {
1172190688Sweongyo		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1173190688Sweongyo	}
1174190688Sweongyo	if (mprot == NULL) {
1175190688Sweongyo		/* XXX stat + msg */
1176190688Sweongyo		return ENOBUFS;
1177190688Sweongyo	}
1178190688Sweongyo	data = STAILQ_FIRST(&sc->tx_free);
1179190688Sweongyo	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1180190688Sweongyo	sc->tx_nfree--;
1181190688Sweongyo
1182190688Sweongyo	data->m = mprot;
1183190688Sweongyo	data->ni = ieee80211_ref_node(ni);
1184190688Sweongyo	data->rate = protrate;
1185190688Sweongyo	ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1186190688Sweongyo
1187190688Sweongyo	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1188190688Sweongyo	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1189190688Sweongyo
1190190688Sweongyo	return 0;
1191190688Sweongyo}
1192190688Sweongyo
1193190688Sweongyostatic int
1194190688Sweongyoural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1195190688Sweongyo    const struct ieee80211_bpf_params *params)
1196190688Sweongyo{
1197190688Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1198190688Sweongyo	struct ural_tx_data *data;
1199190688Sweongyo	uint32_t flags;
1200190688Sweongyo	int error;
1201190688Sweongyo	int rate;
1202190688Sweongyo
1203190688Sweongyo	RAL_LOCK_ASSERT(sc, MA_OWNED);
1204190688Sweongyo	KASSERT(params != NULL, ("no raw xmit params"));
1205190688Sweongyo
1206190688Sweongyo	rate = params->ibp_rate0;
1207190688Sweongyo	if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1208190688Sweongyo		m_freem(m0);
1209190688Sweongyo		return EINVAL;
1210190688Sweongyo	}
1211190688Sweongyo	flags = 0;
1212190688Sweongyo	if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1213190688Sweongyo		flags |= RAL_TX_ACK;
1214190688Sweongyo	if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1215190688Sweongyo		error = ural_sendprot(sc, m0, ni,
1216190688Sweongyo		    params->ibp_flags & IEEE80211_BPF_RTS ?
1217190688Sweongyo			 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1218190688Sweongyo		    rate);
1219190688Sweongyo		if (error || sc->tx_nfree == 0) {
1220190688Sweongyo			m_freem(m0);
1221190688Sweongyo			return ENOBUFS;
1222190688Sweongyo		}
1223190688Sweongyo		flags |= RAL_TX_IFS_SIFS;
1224190688Sweongyo	}
1225190688Sweongyo
1226190688Sweongyo	data = STAILQ_FIRST(&sc->tx_free);
1227190688Sweongyo	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1228190688Sweongyo	sc->tx_nfree--;
1229190688Sweongyo
1230190688Sweongyo	data->m = m0;
1231190688Sweongyo	data->ni = ni;
1232190688Sweongyo	data->rate = rate;
1233190688Sweongyo
1234190688Sweongyo	/* XXX need to setup descriptor ourself */
1235190688Sweongyo	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1236190688Sweongyo
1237190688Sweongyo	DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1238190688Sweongyo	    m0->m_pkthdr.len, rate);
1239190688Sweongyo
1240190688Sweongyo	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1241190688Sweongyo	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1242190688Sweongyo
1243190688Sweongyo	return 0;
1244190688Sweongyo}
1245190688Sweongyo
1246190688Sweongyostatic int
1247190688Sweongyoural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1248190688Sweongyo{
1249190688Sweongyo	struct ieee80211vap *vap = ni->ni_vap;
1250190688Sweongyo	struct ieee80211com *ic = ni->ni_ic;
1251190688Sweongyo	struct ural_tx_data *data;
1252190688Sweongyo	struct ieee80211_frame *wh;
1253190688Sweongyo	const struct ieee80211_txparam *tp;
1254190688Sweongyo	struct ieee80211_key *k;
1255190688Sweongyo	uint32_t flags = 0;
1256190688Sweongyo	uint16_t dur;
1257190688Sweongyo	int error, rate;
1258190688Sweongyo
1259190688Sweongyo	RAL_LOCK_ASSERT(sc, MA_OWNED);
1260190688Sweongyo
1261190688Sweongyo	wh = mtod(m0, struct ieee80211_frame *);
1262190688Sweongyo
1263190688Sweongyo	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1264190688Sweongyo	if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1265190688Sweongyo		rate = tp->mcastrate;
1266190688Sweongyo	else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1267190688Sweongyo		rate = tp->ucastrate;
1268190688Sweongyo	else
1269190688Sweongyo		rate = ni->ni_txrate;
1270190688Sweongyo
1271190688Sweongyo	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1272190688Sweongyo		k = ieee80211_crypto_encap(ni, m0);
1273190688Sweongyo		if (k == NULL) {
1274190688Sweongyo			m_freem(m0);
1275190688Sweongyo			return ENOBUFS;
1276190688Sweongyo		}
1277190688Sweongyo		/* packet header may have moved, reset our local pointer */
1278190688Sweongyo		wh = mtod(m0, struct ieee80211_frame *);
1279190688Sweongyo	}
1280190688Sweongyo
1281190688Sweongyo	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1282190688Sweongyo		int prot = IEEE80211_PROT_NONE;
1283190688Sweongyo		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1284190688Sweongyo			prot = IEEE80211_PROT_RTSCTS;
1285190688Sweongyo		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1286190688Sweongyo		    ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1287190688Sweongyo			prot = ic->ic_protmode;
1288190688Sweongyo		if (prot != IEEE80211_PROT_NONE) {
1289190688Sweongyo			error = ural_sendprot(sc, m0, ni, prot, rate);
1290190688Sweongyo			if (error || sc->tx_nfree == 0) {
1291190688Sweongyo				m_freem(m0);
1292190688Sweongyo				return ENOBUFS;
1293190688Sweongyo			}
1294190688Sweongyo			flags |= RAL_TX_IFS_SIFS;
1295190688Sweongyo		}
1296190688Sweongyo	}
1297190688Sweongyo
1298190688Sweongyo	data = STAILQ_FIRST(&sc->tx_free);
1299190688Sweongyo	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1300190688Sweongyo	sc->tx_nfree--;
1301190688Sweongyo
1302190688Sweongyo	data->m = m0;
1303190688Sweongyo	data->ni = ni;
1304190688Sweongyo	data->rate = rate;
1305190688Sweongyo
1306190688Sweongyo	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1307190688Sweongyo		flags |= RAL_TX_ACK;
1308190688Sweongyo		flags |= RAL_TX_RETRY(7);
1309190688Sweongyo
1310190688Sweongyo		dur = ieee80211_ack_duration(ic->ic_rt, rate,
1311190688Sweongyo		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1312190688Sweongyo		*(uint16_t *)wh->i_dur = htole16(dur);
1313190688Sweongyo	}
1314190688Sweongyo
1315190688Sweongyo	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1316190688Sweongyo
1317190688Sweongyo	DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1318190688Sweongyo	    m0->m_pkthdr.len, rate);
1319190688Sweongyo
1320190688Sweongyo	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1321190688Sweongyo	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1322190688Sweongyo
1323190688Sweongyo	return 0;
1324190688Sweongyo}
1325190688Sweongyo
1326190688Sweongyostatic void
1327190688Sweongyoural_start(struct ifnet *ifp)
1328190688Sweongyo{
1329190688Sweongyo	struct ural_softc *sc = ifp->if_softc;
1330190688Sweongyo	struct ieee80211_node *ni;
1331190688Sweongyo	struct mbuf *m;
1332190688Sweongyo
1333190688Sweongyo	RAL_LOCK(sc);
1334190688Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1335190688Sweongyo		RAL_UNLOCK(sc);
1336190688Sweongyo		return;
1337190688Sweongyo	}
1338190688Sweongyo	for (;;) {
1339190688Sweongyo		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1340190688Sweongyo		if (m == NULL)
1341190688Sweongyo			break;
1342190688Sweongyo		if (sc->tx_nfree < RAL_TX_MINFREE) {
1343190688Sweongyo			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1344190688Sweongyo			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1345190688Sweongyo			break;
1346190688Sweongyo		}
1347190688Sweongyo		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1348190688Sweongyo		if (ural_tx_data(sc, m, ni) != 0) {
1349190688Sweongyo			ieee80211_free_node(ni);
1350190688Sweongyo			ifp->if_oerrors++;
1351190688Sweongyo			break;
1352190688Sweongyo		}
1353190688Sweongyo	}
1354190688Sweongyo	RAL_UNLOCK(sc);
1355190688Sweongyo}
1356190688Sweongyo
1357194228Sthompsastatic int
1358190688Sweongyoural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1359190688Sweongyo{
1360190688Sweongyo	struct ural_softc *sc = ifp->if_softc;
1361190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
1362190688Sweongyo	struct ifreq *ifr = (struct ifreq *) data;
1363190688Sweongyo	int error = 0, startall = 0;
1364190688Sweongyo
1365190688Sweongyo	switch (cmd) {
1366190688Sweongyo	case SIOCSIFFLAGS:
1367190688Sweongyo		RAL_LOCK(sc);
1368190688Sweongyo		if (ifp->if_flags & IFF_UP) {
1369190688Sweongyo			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1370190688Sweongyo				ural_init_locked(sc);
1371190688Sweongyo				startall = 1;
1372190688Sweongyo			} else
1373190688Sweongyo				ural_setpromisc(sc);
1374190688Sweongyo		} else {
1375190688Sweongyo			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1376190688Sweongyo				ural_stop(sc);
1377190688Sweongyo		}
1378190688Sweongyo		RAL_UNLOCK(sc);
1379190688Sweongyo		if (startall)
1380190688Sweongyo			ieee80211_start_all(ic);
1381190688Sweongyo		break;
1382190688Sweongyo	case SIOCGIFMEDIA:
1383190688Sweongyo	case SIOCSIFMEDIA:
1384190688Sweongyo		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1385190688Sweongyo		break;
1386190688Sweongyo	default:
1387190688Sweongyo		error = ether_ioctl(ifp, cmd, data);
1388190688Sweongyo		break;
1389190688Sweongyo	}
1390190688Sweongyo	return error;
1391190688Sweongyo}
1392190688Sweongyo
1393190688Sweongyostatic void
1394190688Sweongyoural_set_testmode(struct ural_softc *sc)
1395190688Sweongyo{
1396190688Sweongyo	struct usb_device_request req;
1397190688Sweongyo	usb_error_t error;
1398190688Sweongyo
1399190688Sweongyo	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1400190688Sweongyo	req.bRequest = RAL_VENDOR_REQUEST;
1401190688Sweongyo	USETW(req.wValue, 4);
1402190688Sweongyo	USETW(req.wIndex, 1);
1403190688Sweongyo	USETW(req.wLength, 0);
1404190688Sweongyo
1405190688Sweongyo	error = ural_do_request(sc, &req, NULL);
1406190688Sweongyo	if (error != 0) {
1407190688Sweongyo		device_printf(sc->sc_dev, "could not set test mode: %s\n",
1408190688Sweongyo		    usbd_errstr(error));
1409190688Sweongyo	}
1410190688Sweongyo}
1411190688Sweongyo
1412190688Sweongyostatic void
1413190688Sweongyoural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1414190688Sweongyo{
1415190688Sweongyo	struct usb_device_request req;
1416190688Sweongyo	usb_error_t error;
1417190688Sweongyo
1418190688Sweongyo	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1419190688Sweongyo	req.bRequest = RAL_READ_EEPROM;
1420190688Sweongyo	USETW(req.wValue, 0);
1421190688Sweongyo	USETW(req.wIndex, addr);
1422190688Sweongyo	USETW(req.wLength, len);
1423190688Sweongyo
1424190688Sweongyo	error = ural_do_request(sc, &req, buf);
1425190688Sweongyo	if (error != 0) {
1426190688Sweongyo		device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1427194228Sthompsa		    usbd_errstr(error));
1428190688Sweongyo	}
1429190688Sweongyo}
1430190688Sweongyo
1431190688Sweongyostatic uint16_t
1432190688Sweongyoural_read(struct ural_softc *sc, uint16_t reg)
1433190688Sweongyo{
1434190688Sweongyo	struct usb_device_request req;
1435190688Sweongyo	usb_error_t error;
1436190688Sweongyo	uint16_t val;
1437190688Sweongyo
1438190688Sweongyo	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1439190688Sweongyo	req.bRequest = RAL_READ_MAC;
1440190688Sweongyo	USETW(req.wValue, 0);
1441190688Sweongyo	USETW(req.wIndex, reg);
1442190688Sweongyo	USETW(req.wLength, sizeof (uint16_t));
1443190688Sweongyo
1444190688Sweongyo	error = ural_do_request(sc, &req, &val);
1445190688Sweongyo	if (error != 0) {
1446190688Sweongyo		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1447190688Sweongyo		    usbd_errstr(error));
1448190688Sweongyo		return 0;
1449190688Sweongyo	}
1450190688Sweongyo
1451190688Sweongyo	return le16toh(val);
1452190688Sweongyo}
1453190688Sweongyo
1454190688Sweongyostatic void
1455190688Sweongyoural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1456190688Sweongyo{
1457190688Sweongyo	struct usb_device_request req;
1458190688Sweongyo	usb_error_t error;
1459190688Sweongyo
1460190688Sweongyo	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1461190688Sweongyo	req.bRequest = RAL_READ_MULTI_MAC;
1462190688Sweongyo	USETW(req.wValue, 0);
1463190688Sweongyo	USETW(req.wIndex, reg);
1464190688Sweongyo	USETW(req.wLength, len);
1465190688Sweongyo
1466190688Sweongyo	error = ural_do_request(sc, &req, buf);
1467190688Sweongyo	if (error != 0) {
1468190688Sweongyo		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1469190688Sweongyo		    usbd_errstr(error));
1470190688Sweongyo	}
1471190688Sweongyo}
1472190688Sweongyo
1473190688Sweongyostatic void
1474190688Sweongyoural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1475190688Sweongyo{
1476190688Sweongyo	struct usb_device_request req;
1477190688Sweongyo	usb_error_t error;
1478190688Sweongyo
1479190688Sweongyo	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1480190688Sweongyo	req.bRequest = RAL_WRITE_MAC;
1481190688Sweongyo	USETW(req.wValue, val);
1482190688Sweongyo	USETW(req.wIndex, reg);
1483190688Sweongyo	USETW(req.wLength, 0);
1484190688Sweongyo
1485190688Sweongyo	error = ural_do_request(sc, &req, NULL);
1486190688Sweongyo	if (error != 0) {
1487190688Sweongyo		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1488190688Sweongyo		    usbd_errstr(error));
1489190688Sweongyo	}
1490190688Sweongyo}
1491190688Sweongyo
1492192257Ssamstatic void
1493190688Sweongyoural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1494192257Ssam{
1495190688Sweongyo	struct usb_device_request req;
1496190688Sweongyo	usb_error_t error;
1497190688Sweongyo
1498190688Sweongyo	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1499190688Sweongyo	req.bRequest = RAL_WRITE_MULTI_MAC;
1500190688Sweongyo	USETW(req.wValue, 0);
1501190688Sweongyo	USETW(req.wIndex, reg);
1502190688Sweongyo	USETW(req.wLength, len);
1503190688Sweongyo
1504190688Sweongyo	error = ural_do_request(sc, &req, buf);
1505190688Sweongyo	if (error != 0) {
1506190688Sweongyo		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1507190688Sweongyo		    usbd_errstr(error));
1508190688Sweongyo	}
1509190688Sweongyo}
1510190688Sweongyo
1511190688Sweongyostatic void
1512190688Sweongyoural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1513190688Sweongyo{
1514190688Sweongyo	uint16_t tmp;
1515190688Sweongyo	int ntries;
1516190688Sweongyo
1517190688Sweongyo	for (ntries = 0; ntries < 100; ntries++) {
1518190688Sweongyo		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1519190688Sweongyo			break;
1520190688Sweongyo		if (ural_pause(sc, hz / 100))
1521190688Sweongyo			break;
1522190688Sweongyo	}
1523190688Sweongyo	if (ntries == 100) {
1524190688Sweongyo		device_printf(sc->sc_dev, "could not write to BBP\n");
1525190688Sweongyo		return;
1526190688Sweongyo	}
1527190688Sweongyo
1528190688Sweongyo	tmp = reg << 8 | val;
1529190688Sweongyo	ural_write(sc, RAL_PHY_CSR7, tmp);
1530190688Sweongyo}
1531190688Sweongyo
1532190688Sweongyostatic uint8_t
1533190688Sweongyoural_bbp_read(struct ural_softc *sc, uint8_t reg)
1534190688Sweongyo{
1535190688Sweongyo	uint16_t val;
1536190688Sweongyo	int ntries;
1537190688Sweongyo
1538190688Sweongyo	val = RAL_BBP_WRITE | reg << 8;
1539190688Sweongyo	ural_write(sc, RAL_PHY_CSR7, val);
1540190688Sweongyo
1541190688Sweongyo	for (ntries = 0; ntries < 100; ntries++) {
1542190688Sweongyo		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1543190688Sweongyo			break;
1544190688Sweongyo		if (ural_pause(sc, hz / 100))
1545190688Sweongyo			break;
1546190688Sweongyo	}
1547190688Sweongyo	if (ntries == 100) {
1548190688Sweongyo		device_printf(sc->sc_dev, "could not read BBP\n");
1549190688Sweongyo		return 0;
1550190688Sweongyo	}
1551190688Sweongyo
1552190688Sweongyo	return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1553190688Sweongyo}
1554190688Sweongyo
1555190688Sweongyostatic void
1556190688Sweongyoural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1557190688Sweongyo{
1558190688Sweongyo	uint32_t tmp;
1559190688Sweongyo	int ntries;
1560190688Sweongyo
1561190688Sweongyo	for (ntries = 0; ntries < 100; ntries++) {
1562190688Sweongyo		if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1563190688Sweongyo			break;
1564190688Sweongyo		if (ural_pause(sc, hz / 100))
1565190688Sweongyo			break;
1566190688Sweongyo	}
1567190688Sweongyo	if (ntries == 100) {
1568190688Sweongyo		device_printf(sc->sc_dev, "could not write to RF\n");
1569190688Sweongyo		return;
1570190688Sweongyo	}
1571190688Sweongyo
1572190688Sweongyo	tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1573190688Sweongyo	ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1574190688Sweongyo	ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1575190688Sweongyo
1576190688Sweongyo	/* remember last written value in sc */
1577190688Sweongyo	sc->rf_regs[reg] = val;
1578190688Sweongyo
1579190688Sweongyo	DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1580190688Sweongyo}
1581190688Sweongyo
1582190688Sweongyostatic void
1583190688Sweongyoural_scan_start(struct ieee80211com *ic)
1584190688Sweongyo{
1585190688Sweongyo	struct ifnet *ifp = ic->ic_ifp;
1586190688Sweongyo	struct ural_softc *sc = ifp->if_softc;
1587190688Sweongyo
1588190688Sweongyo	RAL_LOCK(sc);
1589190688Sweongyo	ural_write(sc, RAL_TXRX_CSR19, 0);
1590190688Sweongyo	ural_set_bssid(sc, ifp->if_broadcastaddr);
1591190688Sweongyo	RAL_UNLOCK(sc);
1592190688Sweongyo}
1593190688Sweongyo
1594190688Sweongyostatic void
1595190688Sweongyoural_scan_end(struct ieee80211com *ic)
1596190688Sweongyo{
1597190688Sweongyo	struct ural_softc *sc = ic->ic_ifp->if_softc;
1598190688Sweongyo
1599190688Sweongyo	RAL_LOCK(sc);
1600191746Sthompsa	ural_enable_tsf_sync(sc);
1601190688Sweongyo	ural_set_bssid(sc, sc->sc_bssid);
1602190688Sweongyo	RAL_UNLOCK(sc);
1603190688Sweongyo
1604190688Sweongyo}
1605190688Sweongyo
1606190688Sweongyostatic void
1607190688Sweongyoural_set_channel(struct ieee80211com *ic)
1608190688Sweongyo{
1609190688Sweongyo	struct ural_softc *sc = ic->ic_ifp->if_softc;
1610190688Sweongyo
1611190688Sweongyo	RAL_LOCK(sc);
1612190688Sweongyo	ural_set_chan(sc, ic->ic_curchan);
1613190688Sweongyo	RAL_UNLOCK(sc);
1614192468Ssam}
1615190688Sweongyo
1616190688Sweongyostatic void
1617190688Sweongyoural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1618190688Sweongyo{
1619190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
1620190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
1621192468Ssam	uint8_t power, tmp;
1622190688Sweongyo	int i, chan;
1623190688Sweongyo
1624190688Sweongyo	chan = ieee80211_chan2ieee(ic, c);
1625190688Sweongyo	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1626190688Sweongyo		return;
1627190688Sweongyo
1628190688Sweongyo	if (IEEE80211_IS_CHAN_2GHZ(c))
1629190688Sweongyo		power = min(sc->txpow[chan - 1], 31);
1630190688Sweongyo	else
1631190688Sweongyo		power = 31;
1632190688Sweongyo
1633190688Sweongyo	/* adjust txpower using ifconfig settings */
1634190688Sweongyo	power -= (100 - ic->ic_txpowlimit) / 8;
1635190688Sweongyo
1636190688Sweongyo	DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1637190688Sweongyo
1638190688Sweongyo	switch (sc->rf_rev) {
1639190688Sweongyo	case RAL_RF_2522:
1640190688Sweongyo		ural_rf_write(sc, RAL_RF1, 0x00814);
1641190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1642190688Sweongyo		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1643190688Sweongyo		break;
1644190688Sweongyo
1645190688Sweongyo	case RAL_RF_2523:
1646190688Sweongyo		ural_rf_write(sc, RAL_RF1, 0x08804);
1647190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1648190688Sweongyo		ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1649190688Sweongyo		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1650190688Sweongyo		break;
1651190688Sweongyo
1652190688Sweongyo	case RAL_RF_2524:
1653190688Sweongyo		ural_rf_write(sc, RAL_RF1, 0x0c808);
1654190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1655190688Sweongyo		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1656190688Sweongyo		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1657190688Sweongyo		break;
1658190688Sweongyo
1659190688Sweongyo	case RAL_RF_2525:
1660190688Sweongyo		ural_rf_write(sc, RAL_RF1, 0x08808);
1661190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1662190688Sweongyo		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1663190688Sweongyo		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1664190688Sweongyo
1665190688Sweongyo		ural_rf_write(sc, RAL_RF1, 0x08808);
1666190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1667190688Sweongyo		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1668190688Sweongyo		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1669190688Sweongyo		break;
1670190688Sweongyo
1671190688Sweongyo	case RAL_RF_2525E:
1672190688Sweongyo		ural_rf_write(sc, RAL_RF1, 0x08808);
1673190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1674191746Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1675191746Sthompsa		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1676191746Sthompsa		break;
1677190688Sweongyo
1678190688Sweongyo	case RAL_RF_2526:
1679190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1680190688Sweongyo		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1681190688Sweongyo		ural_rf_write(sc, RAL_RF1, 0x08804);
1682190688Sweongyo
1683190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1684190688Sweongyo		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1685190688Sweongyo		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1686190688Sweongyo		break;
1687190688Sweongyo
1688190688Sweongyo	/* dual-band RF */
1689190688Sweongyo	case RAL_RF_5222:
1690190688Sweongyo		for (i = 0; ural_rf5222[i].chan != chan; i++);
1691190688Sweongyo
1692190688Sweongyo		ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1693190688Sweongyo		ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1694194228Sthompsa		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1695190688Sweongyo		ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1696190688Sweongyo		break;
1697190688Sweongyo	}
1698190688Sweongyo
1699190688Sweongyo	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1700190688Sweongyo	    (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1701190688Sweongyo		/* set Japan filter bit for channel 14 */
1702190688Sweongyo		tmp = ural_bbp_read(sc, 70);
1703190688Sweongyo
1704190688Sweongyo		tmp &= ~RAL_JAPAN_FILTER;
1705190688Sweongyo		if (chan == 14)
1706190688Sweongyo			tmp |= RAL_JAPAN_FILTER;
1707190688Sweongyo
1708190688Sweongyo		ural_bbp_write(sc, 70, tmp);
1709190688Sweongyo
1710190688Sweongyo		/* clear CRC errors */
1711190688Sweongyo		ural_read(sc, RAL_STA_CSR0);
1712190688Sweongyo
1713190688Sweongyo		ural_pause(sc, hz / 100);
1714190688Sweongyo		ural_disable_rf_tune(sc);
1715190688Sweongyo	}
1716190688Sweongyo
1717190688Sweongyo	/* XXX doesn't belong here */
1718190688Sweongyo	/* update basic rate set */
1719190688Sweongyo	ural_set_basicrates(sc, c);
1720190688Sweongyo
1721190688Sweongyo	/* give the hardware some time to do the switchover */
1722190688Sweongyo	ural_pause(sc, hz / 100);
1723190688Sweongyo}
1724190688Sweongyo
1725190688Sweongyo/*
1726190688Sweongyo * Disable RF auto-tuning.
1727190688Sweongyo */
1728190688Sweongyostatic void
1729190688Sweongyoural_disable_rf_tune(struct ural_softc *sc)
1730190688Sweongyo{
1731190688Sweongyo	uint32_t tmp;
1732190688Sweongyo
1733190688Sweongyo	if (sc->rf_rev != RAL_RF_2523) {
1734190688Sweongyo		tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1735190688Sweongyo		ural_rf_write(sc, RAL_RF1, tmp);
1736190688Sweongyo	}
1737190688Sweongyo
1738190688Sweongyo	tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1739190688Sweongyo	ural_rf_write(sc, RAL_RF3, tmp);
1740190688Sweongyo
1741190688Sweongyo	DPRINTFN(2, "disabling RF autotune\n");
1742190688Sweongyo}
1743190688Sweongyo
1744190688Sweongyo/*
1745190688Sweongyo * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1746190688Sweongyo * synchronization.
1747190688Sweongyo */
1748190688Sweongyostatic void
1749190688Sweongyoural_enable_tsf_sync(struct ural_softc *sc)
1750190688Sweongyo{
1751190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
1752190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
1753190688Sweongyo	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1754190688Sweongyo	uint16_t logcwmin, preload, tmp;
1755190688Sweongyo
1756190688Sweongyo	/* first, disable TSF synchronization */
1757190688Sweongyo	ural_write(sc, RAL_TXRX_CSR19, 0);
1758190688Sweongyo
1759190688Sweongyo	tmp = (16 * vap->iv_bss->ni_intval) << 4;
1760190688Sweongyo	ural_write(sc, RAL_TXRX_CSR18, tmp);
1761190688Sweongyo
1762190688Sweongyo	logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1763190688Sweongyo	preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1764190688Sweongyo	tmp = logcwmin << 12 | preload;
1765190688Sweongyo	ural_write(sc, RAL_TXRX_CSR20, tmp);
1766190688Sweongyo
1767190688Sweongyo	/* finally, enable TSF synchronization */
1768190688Sweongyo	tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1769190688Sweongyo	if (ic->ic_opmode == IEEE80211_M_STA)
1770190688Sweongyo		tmp |= RAL_ENABLE_TSF_SYNC(1);
1771190688Sweongyo	else
1772190688Sweongyo		tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1773190688Sweongyo	ural_write(sc, RAL_TXRX_CSR19, tmp);
1774190688Sweongyo
1775190688Sweongyo	DPRINTF("enabling TSF synchronization\n");
1776190688Sweongyo}
1777190688Sweongyo
1778190688Sweongyostatic void
1779190688Sweongyoural_enable_tsf(struct ural_softc *sc)
1780190688Sweongyo{
1781190688Sweongyo	/* first, disable TSF synchronization */
1782190688Sweongyo	ural_write(sc, RAL_TXRX_CSR19, 0);
1783190688Sweongyo	ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2));
1784190688Sweongyo}
1785190688Sweongyo
1786190688Sweongyo#define RAL_RXTX_TURNAROUND	5	/* us */
1787190688Sweongyostatic void
1788190688Sweongyoural_update_slot(struct ifnet *ifp)
1789190688Sweongyo{
1790190688Sweongyo	struct ural_softc *sc = ifp->if_softc;
1791190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
1792190688Sweongyo	uint16_t slottime, sifs, eifs;
1793190688Sweongyo
1794190688Sweongyo	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1795190688Sweongyo
1796190688Sweongyo	/*
1797190688Sweongyo	 * These settings may sound a bit inconsistent but this is what the
1798190688Sweongyo	 * reference driver does.
1799190688Sweongyo	 */
1800190688Sweongyo	if (ic->ic_curmode == IEEE80211_MODE_11B) {
1801190688Sweongyo		sifs = 16 - RAL_RXTX_TURNAROUND;
1802190688Sweongyo		eifs = 364;
1803190688Sweongyo	} else {
1804190688Sweongyo		sifs = 10 - RAL_RXTX_TURNAROUND;
1805190688Sweongyo		eifs = 64;
1806190688Sweongyo	}
1807190688Sweongyo
1808190688Sweongyo	ural_write(sc, RAL_MAC_CSR10, slottime);
1809190688Sweongyo	ural_write(sc, RAL_MAC_CSR11, sifs);
1810190688Sweongyo	ural_write(sc, RAL_MAC_CSR12, eifs);
1811190688Sweongyo}
1812190688Sweongyo
1813190688Sweongyostatic void
1814190688Sweongyoural_set_txpreamble(struct ural_softc *sc)
1815190688Sweongyo{
1816190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
1817190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
1818190688Sweongyo	uint16_t tmp;
1819190688Sweongyo
1820190688Sweongyo	tmp = ural_read(sc, RAL_TXRX_CSR10);
1821190688Sweongyo
1822190688Sweongyo	tmp &= ~RAL_SHORT_PREAMBLE;
1823190688Sweongyo	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1824190688Sweongyo		tmp |= RAL_SHORT_PREAMBLE;
1825190688Sweongyo
1826190688Sweongyo	ural_write(sc, RAL_TXRX_CSR10, tmp);
1827190688Sweongyo}
1828190688Sweongyo
1829190688Sweongyostatic void
1830190688Sweongyoural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1831190688Sweongyo{
1832190688Sweongyo	/* XXX wrong, take from rate set */
1833190688Sweongyo	/* update basic rate set */
1834190688Sweongyo	if (IEEE80211_IS_CHAN_5GHZ(c)) {
1835190688Sweongyo		/* 11a basic rates: 6, 12, 24Mbps */
1836190688Sweongyo		ural_write(sc, RAL_TXRX_CSR11, 0x150);
1837190688Sweongyo	} else if (IEEE80211_IS_CHAN_ANYG(c)) {
1838190688Sweongyo		/* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1839190688Sweongyo		ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1840190688Sweongyo	} else {
1841190688Sweongyo		/* 11b basic rates: 1, 2Mbps */
1842190688Sweongyo		ural_write(sc, RAL_TXRX_CSR11, 0x3);
1843190688Sweongyo	}
1844190688Sweongyo}
1845190688Sweongyo
1846190688Sweongyostatic void
1847190688Sweongyoural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1848190688Sweongyo{
1849190688Sweongyo	uint16_t tmp;
1850190688Sweongyo
1851190688Sweongyo	tmp = bssid[0] | bssid[1] << 8;
1852190688Sweongyo	ural_write(sc, RAL_MAC_CSR5, tmp);
1853190688Sweongyo
1854190688Sweongyo	tmp = bssid[2] | bssid[3] << 8;
1855190688Sweongyo	ural_write(sc, RAL_MAC_CSR6, tmp);
1856190688Sweongyo
1857190688Sweongyo	tmp = bssid[4] | bssid[5] << 8;
1858190688Sweongyo	ural_write(sc, RAL_MAC_CSR7, tmp);
1859194329Sweongyo
1860194329Sweongyo	DPRINTF("setting BSSID to %6D\n", bssid, ":");
1861190688Sweongyo}
1862190688Sweongyo
1863190688Sweongyostatic void
1864190688Sweongyoural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1865190688Sweongyo{
1866190688Sweongyo	uint16_t tmp;
1867190688Sweongyo
1868190688Sweongyo	tmp = addr[0] | addr[1] << 8;
1869190688Sweongyo	ural_write(sc, RAL_MAC_CSR2, tmp);
1870190688Sweongyo
1871190688Sweongyo	tmp = addr[2] | addr[3] << 8;
1872190688Sweongyo	ural_write(sc, RAL_MAC_CSR3, tmp);
1873190688Sweongyo
1874190688Sweongyo	tmp = addr[4] | addr[5] << 8;
1875190688Sweongyo	ural_write(sc, RAL_MAC_CSR4, tmp);
1876190688Sweongyo
1877190688Sweongyo	DPRINTF("setting MAC address to %6D\n", addr, ":");
1878190688Sweongyo}
1879190688Sweongyo
1880190688Sweongyostatic void
1881190688Sweongyoural_setpromisc(struct ural_softc *sc)
1882190688Sweongyo{
1883190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
1884190688Sweongyo	uint32_t tmp;
1885190688Sweongyo
1886190688Sweongyo	tmp = ural_read(sc, RAL_TXRX_CSR2);
1887190688Sweongyo
1888190688Sweongyo	tmp &= ~RAL_DROP_NOT_TO_ME;
1889190688Sweongyo	if (!(ifp->if_flags & IFF_PROMISC))
1890190688Sweongyo		tmp |= RAL_DROP_NOT_TO_ME;
1891190688Sweongyo
1892190688Sweongyo	ural_write(sc, RAL_TXRX_CSR2, tmp);
1893190688Sweongyo
1894190688Sweongyo	DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1895190688Sweongyo	    "entering" : "leaving");
1896190688Sweongyo}
1897190688Sweongyo
1898190688Sweongyostatic void
1899190688Sweongyoural_update_promisc(struct ifnet *ifp)
1900190688Sweongyo{
1901190688Sweongyo	struct ural_softc *sc = ifp->if_softc;
1902190688Sweongyo
1903190688Sweongyo	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1904190688Sweongyo		return;
1905190688Sweongyo
1906190688Sweongyo	RAL_LOCK(sc);
1907190688Sweongyo	ural_setpromisc(sc);
1908190688Sweongyo	RAL_UNLOCK(sc);
1909190688Sweongyo}
1910194329Sweongyo
1911194329Sweongyostatic const char *
1912194329Sweongyoural_get_rf(int rev)
1913194329Sweongyo{
1914194329Sweongyo	switch (rev) {
1915190688Sweongyo	case RAL_RF_2522:	return "RT2522";
1916190688Sweongyo	case RAL_RF_2523:	return "RT2523";
1917190688Sweongyo	case RAL_RF_2524:	return "RT2524";
1918190688Sweongyo	case RAL_RF_2525:	return "RT2525";
1919190688Sweongyo	case RAL_RF_2525E:	return "RT2525e";
1920190688Sweongyo	case RAL_RF_2526:	return "RT2526";
1921190688Sweongyo	case RAL_RF_5222:	return "RT5222";
1922192468Ssam	default:		return "unknown";
1923190688Sweongyo	}
1924190688Sweongyo}
1925190688Sweongyo
1926190688Sweongyostatic void
1927190688Sweongyoural_read_eeprom(struct ural_softc *sc)
1928190688Sweongyo{
1929190688Sweongyo	uint16_t val;
1930192468Ssam
1931194329Sweongyo	ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1932194329Sweongyo	val = le16toh(val);
1933194329Sweongyo	sc->rf_rev =   (val >> 11) & 0x7;
1934194329Sweongyo	sc->hw_radio = (val >> 10) & 0x1;
1935194329Sweongyo	sc->led_mode = (val >> 6)  & 0x7;
1936190688Sweongyo	sc->rx_ant =   (val >> 4)  & 0x3;
1937190688Sweongyo	sc->tx_ant =   (val >> 2)  & 0x3;
1938190688Sweongyo	sc->nb_ant =   val & 0x3;
1939190688Sweongyo
1940192468Ssam	/* read MAC address */
1941192468Ssam	ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1942192468Ssam
1943190688Sweongyo	/* read default values for BBP registers */
1944190688Sweongyo	ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1945190688Sweongyo
1946190688Sweongyo	/* read Tx power for all b/g channels */
1947190688Sweongyo	ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1948190688Sweongyo}
1949190688Sweongyo
1950192468Ssamstatic int
1951194329Sweongyoural_bbp_init(struct ural_softc *sc)
1952194329Sweongyo{
1953194329Sweongyo#define N(a)	((int)(sizeof (a) / sizeof ((a)[0])))
1954194329Sweongyo	int i, ntries;
1955194329Sweongyo
1956192468Ssam	/* wait for BBP to be ready */
1957192468Ssam	for (ntries = 0; ntries < 100; ntries++) {
1958192468Ssam		if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1959192468Ssam			break;
1960192468Ssam		if (ural_pause(sc, hz / 100))
1961192468Ssam			break;
1962192468Ssam	}
1963190688Sweongyo	if (ntries == 100) {
1964190688Sweongyo		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1965190688Sweongyo		return EIO;
1966190688Sweongyo	}
1967190688Sweongyo
1968190688Sweongyo	/* initialize BBP registers to default values */
1969190688Sweongyo	for (i = 0; i < N(ural_def_bbp); i++)
1970190688Sweongyo		ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1971190688Sweongyo
1972190688Sweongyo#if 0
1973190688Sweongyo	/* initialize BBP registers to values stored in EEPROM */
1974190688Sweongyo	for (i = 0; i < 16; i++) {
1975190688Sweongyo		if (sc->bbp_prom[i].reg == 0xff)
1976190688Sweongyo			continue;
1977190688Sweongyo		ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1978190688Sweongyo	}
1979190688Sweongyo#endif
1980190688Sweongyo
1981190688Sweongyo	return 0;
1982190688Sweongyo#undef N
1983190688Sweongyo}
1984190688Sweongyo
1985190688Sweongyostatic void
1986190688Sweongyoural_set_txantenna(struct ural_softc *sc, int antenna)
1987190688Sweongyo{
1988190688Sweongyo	uint16_t tmp;
1989190688Sweongyo	uint8_t tx;
1990190688Sweongyo
1991190688Sweongyo	tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
1992190688Sweongyo	if (antenna == 1)
1993190688Sweongyo		tx |= RAL_BBP_ANTA;
1994190688Sweongyo	else if (antenna == 2)
1995190688Sweongyo		tx |= RAL_BBP_ANTB;
1996190688Sweongyo	else
1997190688Sweongyo		tx |= RAL_BBP_DIVERSITY;
1998190688Sweongyo
1999190688Sweongyo	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2000190688Sweongyo	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2001190688Sweongyo	    sc->rf_rev == RAL_RF_5222)
2002190688Sweongyo		tx |= RAL_BBP_FLIPIQ;
2003190688Sweongyo
2004190688Sweongyo	ural_bbp_write(sc, RAL_BBP_TX, tx);
2005190688Sweongyo
2006190688Sweongyo	/* update values in PHY_CSR5 and PHY_CSR6 */
2007190688Sweongyo	tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2008190688Sweongyo	ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2009190688Sweongyo
2010190688Sweongyo	tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2011190688Sweongyo	ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2012190688Sweongyo}
2013190688Sweongyo
2014190688Sweongyostatic void
2015190688Sweongyoural_set_rxantenna(struct ural_softc *sc, int antenna)
2016190688Sweongyo{
2017190688Sweongyo	uint8_t rx;
2018190688Sweongyo
2019190688Sweongyo	rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2020190688Sweongyo	if (antenna == 1)
2021190688Sweongyo		rx |= RAL_BBP_ANTA;
2022190688Sweongyo	else if (antenna == 2)
2023190688Sweongyo		rx |= RAL_BBP_ANTB;
2024190688Sweongyo	else
2025190688Sweongyo		rx |= RAL_BBP_DIVERSITY;
2026190688Sweongyo
2027190688Sweongyo	/* need to force no I/Q flip for RF 2525e and 2526 */
2028190688Sweongyo	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2029190688Sweongyo		rx &= ~RAL_BBP_FLIPIQ;
2030190688Sweongyo
2031190688Sweongyo	ural_bbp_write(sc, RAL_BBP_RX, rx);
2032190688Sweongyo}
2033190688Sweongyo
2034190688Sweongyostatic void
2035190688Sweongyoural_init_locked(struct ural_softc *sc)
2036190688Sweongyo{
2037190688Sweongyo#define N(a)	((int)(sizeof (a) / sizeof ((a)[0])))
2038190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
2039190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
2040190688Sweongyo	uint16_t tmp;
2041190688Sweongyo	int i, ntries;
2042190688Sweongyo
2043190688Sweongyo	RAL_LOCK_ASSERT(sc, MA_OWNED);
2044190688Sweongyo
2045190688Sweongyo	ural_set_testmode(sc);
2046190688Sweongyo	ural_write(sc, 0x308, 0x00f0);	/* XXX magic */
2047190688Sweongyo
2048190688Sweongyo	ural_stop(sc);
2049190688Sweongyo
2050190688Sweongyo	/* initialize MAC registers to default values */
2051190688Sweongyo	for (i = 0; i < N(ural_def_mac); i++)
2052190688Sweongyo		ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2053190688Sweongyo
2054190688Sweongyo	/* wait for BBP and RF to wake up (this can take a long time!) */
2055190688Sweongyo	for (ntries = 0; ntries < 100; ntries++) {
2056190688Sweongyo		tmp = ural_read(sc, RAL_MAC_CSR17);
2057190688Sweongyo		if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2058190688Sweongyo		    (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2059190688Sweongyo			break;
2060190688Sweongyo		if (ural_pause(sc, hz / 100))
2061190688Sweongyo			break;
2062190688Sweongyo	}
2063190688Sweongyo	if (ntries == 100) {
2064190688Sweongyo		device_printf(sc->sc_dev,
2065190688Sweongyo		    "timeout waiting for BBP/RF to wakeup\n");
2066190688Sweongyo		goto fail;
2067190688Sweongyo	}
2068190688Sweongyo
2069190688Sweongyo	/* we're ready! */
2070190688Sweongyo	ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2071190688Sweongyo
2072190688Sweongyo	/* set basic rate set (will be updated later) */
2073190688Sweongyo	ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2074190688Sweongyo
2075190688Sweongyo	if (ural_bbp_init(sc) != 0)
2076190688Sweongyo		goto fail;
2077191746Sthompsa
2078190688Sweongyo	ural_set_chan(sc, ic->ic_curchan);
2079190688Sweongyo
2080190688Sweongyo	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2081190688Sweongyo	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2082190688Sweongyo
2083190688Sweongyo	ural_set_txantenna(sc, sc->tx_ant);
2084190688Sweongyo	ural_set_rxantenna(sc, sc->rx_ant);
2085190688Sweongyo
2086190688Sweongyo	ural_set_macaddr(sc, IF_LLADDR(ifp));
2087190688Sweongyo
2088190688Sweongyo	/*
2089190688Sweongyo	 * Allocate Tx and Rx xfer queues.
2090190688Sweongyo	 */
2091190688Sweongyo	ural_setup_tx_list(sc);
2092190688Sweongyo
2093190688Sweongyo	/* kick Rx */
2094190688Sweongyo	tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2095190688Sweongyo	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2096190688Sweongyo		tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2097190688Sweongyo		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2098190688Sweongyo			tmp |= RAL_DROP_TODS;
2099190688Sweongyo		if (!(ifp->if_flags & IFF_PROMISC))
2100190688Sweongyo			tmp |= RAL_DROP_NOT_TO_ME;
2101190688Sweongyo	}
2102190688Sweongyo	ural_write(sc, RAL_TXRX_CSR2, tmp);
2103190688Sweongyo
2104190688Sweongyo	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2105190688Sweongyo	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2106190688Sweongyo	usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2107190688Sweongyo	usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2108190688Sweongyo	return;
2109190688Sweongyo
2110190688Sweongyofail:	ural_stop(sc);
2111190688Sweongyo#undef N
2112190688Sweongyo}
2113190688Sweongyo
2114190688Sweongyostatic void
2115190688Sweongyoural_init(void *priv)
2116190688Sweongyo{
2117190688Sweongyo	struct ural_softc *sc = priv;
2118190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
2119190688Sweongyo	struct ieee80211com *ic = ifp->if_l2com;
2120190688Sweongyo
2121190688Sweongyo	RAL_LOCK(sc);
2122190688Sweongyo	ural_init_locked(sc);
2123190688Sweongyo	RAL_UNLOCK(sc);
2124190688Sweongyo
2125190688Sweongyo	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2126190688Sweongyo		ieee80211_start_all(ic);		/* start all vap's */
2127190688Sweongyo}
2128190688Sweongyo
2129190688Sweongyostatic void
2130190688Sweongyoural_stop(struct ural_softc *sc)
2131190688Sweongyo{
2132190688Sweongyo	struct ifnet *ifp = sc->sc_ifp;
2133190688Sweongyo
2134190688Sweongyo	RAL_LOCK_ASSERT(sc, MA_OWNED);
2135190688Sweongyo
2136190688Sweongyo	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2137190688Sweongyo
2138190688Sweongyo	/*
2139190688Sweongyo	 * Drain all the transfers, if not already drained:
2140190688Sweongyo	 */
2141190688Sweongyo	RAL_UNLOCK(sc);
2142190688Sweongyo	usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2143190688Sweongyo	usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2144190688Sweongyo	RAL_LOCK(sc);
2145190688Sweongyo
2146190688Sweongyo	ural_unsetup_tx_list(sc);
2147190688Sweongyo
2148190688Sweongyo	/* disable Rx */
2149190688Sweongyo	ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2150190688Sweongyo	/* reset ASIC and BBP (but won't reset MAC registers!) */
2151190688Sweongyo	ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2152190688Sweongyo	/* wait a little */
2153190688Sweongyo	ural_pause(sc, hz / 10);
2154190688Sweongyo	ural_write(sc, RAL_MAC_CSR1, 0);
2155191746Sthompsa	/* wait a little */
2156190688Sweongyo	ural_pause(sc, hz / 10);
2157190688Sweongyo}
2158190688Sweongyo
2159190688Sweongyostatic int
2160190688Sweongyoural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2161190688Sweongyo	const struct ieee80211_bpf_params *params)
2162190688Sweongyo{
2163190688Sweongyo	struct ieee80211com *ic = ni->ni_ic;
2164190688Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2165190688Sweongyo	struct ural_softc *sc = ifp->if_softc;
2166190688Sweongyo
2167190688Sweongyo	RAL_LOCK(sc);
2168190688Sweongyo	/* prevent management frames from being sent if we're not ready */
2169190688Sweongyo	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2170190688Sweongyo		RAL_UNLOCK(sc);
2171190688Sweongyo		m_freem(m);
2172190688Sweongyo		ieee80211_free_node(ni);
2173190688Sweongyo		return ENETDOWN;
2174190688Sweongyo	}
2175190688Sweongyo	if (sc->tx_nfree < RAL_TX_MINFREE) {
2176190688Sweongyo		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2177190688Sweongyo		RAL_UNLOCK(sc);
2178190688Sweongyo		m_freem(m);
2179190688Sweongyo		ieee80211_free_node(ni);
2180190688Sweongyo		return EIO;
2181190688Sweongyo	}
2182190688Sweongyo
2183190688Sweongyo	ifp->if_opackets++;
2184190688Sweongyo
2185190688Sweongyo	if (params == NULL) {
2186190688Sweongyo		/*
2187190688Sweongyo		 * Legacy path; interpret frame contents to decide
2188190688Sweongyo		 * precisely how to send the frame.
2189190688Sweongyo		 */
2190190688Sweongyo		if (ural_tx_mgt(sc, m, ni) != 0)
2191190688Sweongyo			goto bad;
2192190688Sweongyo	} else {
2193190688Sweongyo		/*
2194190688Sweongyo		 * Caller supplied explicit parameters to use in
2195190688Sweongyo		 * sending the frame.
2196190688Sweongyo		 */
2197190688Sweongyo		if (ural_tx_raw(sc, m, ni, params) != 0)
2198190688Sweongyo			goto bad;
2199190688Sweongyo	}
2200190688Sweongyo	RAL_UNLOCK(sc);
2201190688Sweongyo	return 0;
2202190688Sweongyobad:
2203190688Sweongyo	ifp->if_oerrors++;
2204190688Sweongyo	RAL_UNLOCK(sc);
2205190688Sweongyo	ieee80211_free_node(ni);
2206190688Sweongyo	return EIO;		/* XXX */
2207190688Sweongyo}
2208190688Sweongyo
2209190688Sweongyostatic void
2210190688Sweongyoural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni)
2211190688Sweongyo{
2212190688Sweongyo	struct ieee80211vap *vap = ni->ni_vap;
2213190688Sweongyo	struct ural_vap *uvp = URAL_VAP(vap);
2214190688Sweongyo
2215190688Sweongyo	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2216190688Sweongyo	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2217190688Sweongyo
2218190688Sweongyo	usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2219190688Sweongyo}
2220190688Sweongyo
2221190688Sweongyostatic void
2222190688Sweongyoural_ratectl_timeout(void *arg)
2223190688Sweongyo{
2224190688Sweongyo	struct ural_vap *uvp = arg;
2225190688Sweongyo	struct ieee80211vap *vap = &uvp->vap;
2226190688Sweongyo	struct ieee80211com *ic = vap->iv_ic;
2227190688Sweongyo
2228190688Sweongyo	ieee80211_runtask(ic, &uvp->ratectl_task);
2229190688Sweongyo}
2230190688Sweongyo
2231190688Sweongyostatic void
2232190688Sweongyoural_ratectl_task(void *arg, int pending)
2233190688Sweongyo{
2234190688Sweongyo	struct ural_vap *uvp = arg;
2235190688Sweongyo	struct ieee80211vap *vap = &uvp->vap;
2236190688Sweongyo	struct ieee80211com *ic = vap->iv_ic;
2237190688Sweongyo	struct ifnet *ifp = ic->ic_ifp;
2238190688Sweongyo	struct ural_softc *sc = ifp->if_softc;
2239190688Sweongyo	struct ieee80211_node *ni;
2240190688Sweongyo	int ok, fail;
2241190688Sweongyo	int sum, retrycnt;
2242190688Sweongyo
2243190688Sweongyo	ni = ieee80211_ref_node(vap->iv_bss);
2244190688Sweongyo	RAL_LOCK(sc);
2245190688Sweongyo	/* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2246190688Sweongyo	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2247190688Sweongyo
2248190688Sweongyo	ok = sc->sta[7] +		/* TX ok w/o retry */
2249190688Sweongyo	     sc->sta[8];		/* TX ok w/ retry */
2250190688Sweongyo	fail = sc->sta[9];		/* TX retry-fail count */
2251190688Sweongyo	sum = ok+fail;
2252190688Sweongyo	retrycnt = sc->sta[8] + fail;
2253190688Sweongyo
2254190688Sweongyo	ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt);
2255190688Sweongyo	(void) ieee80211_ratectl_rate(ni, NULL, 0);
2256190688Sweongyo
2257190688Sweongyo	ifp->if_oerrors += fail;	/* count TX retry-fail as Tx errors */
2258190688Sweongyo
2259190688Sweongyo	usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2260190688Sweongyo	RAL_UNLOCK(sc);
2261190688Sweongyo	ieee80211_free_node(ni);
2262190688Sweongyo}
2263190688Sweongyo
2264190688Sweongyostatic int
2265190688Sweongyoural_pause(struct ural_softc *sc, int timeout)
2266190688Sweongyo{
2267190688Sweongyo
2268190688Sweongyo	usb_pause_mtx(&sc->sc_mtx, timeout);
2269190688Sweongyo	return (0);
2270190688Sweongyo}
2271190688Sweongyo