if_ural.c revision 227309
168349Sobrien/*	$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 227309 2011-11-07 15:43:11Z ed $	*/
268349Sobrien
368349Sobrien/*-
468349Sobrien * Copyright (c) 2005, 2006
568349Sobrien *	Damien Bergamini <damien.bergamini@free.fr>
668349Sobrien *
768349Sobrien * Copyright (c) 2006, 2008
868349Sobrien *	Hans Petter Selasky <hselasky@FreeBSD.org>
968349Sobrien *
1068349Sobrien * Permission to use, copy, modify, and distribute this software for any
1168349Sobrien * purpose with or without fee is hereby granted, provided that the above
1268349Sobrien * copyright notice and this permission notice appear in all copies.
1368349Sobrien *
1468349Sobrien * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1568349Sobrien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1668349Sobrien * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1768349Sobrien * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1868349Sobrien * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1968349Sobrien * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
2068349Sobrien * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
2168349Sobrien */
2268349Sobrien
2368349Sobrien#include <sys/cdefs.h>
2468349Sobrien__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 227309 2011-11-07 15:43:11Z ed $");
2568349Sobrien
2668349Sobrien/*-
2768349Sobrien * Ralink Technology RT2500USB chipset driver
2868349Sobrien * http://www.ralinktech.com/
2968349Sobrien */
3068349Sobrien
3168349Sobrien#include <sys/param.h>
3268349Sobrien#include <sys/sockio.h>
3368349Sobrien#include <sys/sysctl.h>
3468349Sobrien#include <sys/lock.h>
3568349Sobrien#include <sys/mutex.h>
3668349Sobrien#include <sys/mbuf.h>
3768349Sobrien#include <sys/kernel.h>
3868349Sobrien#include <sys/socket.h>
3968349Sobrien#include <sys/systm.h>
4068349Sobrien#include <sys/malloc.h>
4168349Sobrien#include <sys/module.h>
4268349Sobrien#include <sys/bus.h>
4368349Sobrien#include <sys/endian.h>
4468349Sobrien#include <sys/kdb.h>
4568349Sobrien
4668349Sobrien#include <machine/bus.h>
4768349Sobrien#include <machine/resource.h>
4868349Sobrien#include <sys/rman.h>
4968349Sobrien
5068349Sobrien#include <net/bpf.h>
5168349Sobrien#include <net/if.h>
5268349Sobrien#include <net/if_arp.h>
5368349Sobrien#include <net/ethernet.h>
5468349Sobrien#include <net/if_dl.h>
5568349Sobrien#include <net/if_media.h>
5668349Sobrien#include <net/if_types.h>
5768349Sobrien
5868349Sobrien#ifdef INET
5968349Sobrien#include <netinet/in.h>
6068349Sobrien#include <netinet/in_systm.h>
6168349Sobrien#include <netinet/in_var.h>
6268349Sobrien#include <netinet/if_ether.h>
6368349Sobrien#include <netinet/ip.h>
6468349Sobrien#endif
6568349Sobrien
6668349Sobrien#include <net80211/ieee80211_var.h>
6768349Sobrien#include <net80211/ieee80211_regdomain.h>
6868349Sobrien#include <net80211/ieee80211_radiotap.h>
6968349Sobrien#include <net80211/ieee80211_ratectl.h>
7068349Sobrien
7168349Sobrien#include <dev/usb/usb.h>
7268349Sobrien#include <dev/usb/usbdi.h>
7368349Sobrien#include "usbdevs.h"
7468349Sobrien
7568349Sobrien#define	USB_DEBUG_VAR ural_debug
7668349Sobrien#include <dev/usb/usb_debug.h>
7768349Sobrien
7868349Sobrien#include <dev/usb/wlan/if_uralreg.h>
7968349Sobrien#include <dev/usb/wlan/if_uralvar.h>
8068349Sobrien
8168349Sobrien#ifdef USB_DEBUG
8268349Sobrienstatic int ural_debug = 0;
8368349Sobrien
8468349Sobrienstatic SYSCTL_NODE(_hw_usb, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
8568349SobrienSYSCTL_INT(_hw_usb_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
8668349Sobrien    "Debug level");
8768349Sobrien#endif
8868349Sobrien
8968349Sobrien#define URAL_RSSI(rssi)					\
9068349Sobrien	((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ?	\
9168349Sobrien	 ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
9268349Sobrien
9368349Sobrien/* various supported device vendors/products */
9468349Sobrienstatic const STRUCT_USB_HOST_ID ural_devs[] = {
9568349Sobrien#define	URAL_DEV(v,p)  { USB_VP(USB_VENDOR_##v, USB_PRODUCT_##v##_##p) }
9668349Sobrien	URAL_DEV(ASUS, WL167G),
9768349Sobrien	URAL_DEV(ASUS, RT2570),
9868349Sobrien	URAL_DEV(BELKIN, F5D7050),
9968349Sobrien	URAL_DEV(BELKIN, F5D7051),
10068349Sobrien	URAL_DEV(CISCOLINKSYS, HU200TS),
10168349Sobrien	URAL_DEV(CISCOLINKSYS, WUSB54G),
10268349Sobrien	URAL_DEV(CISCOLINKSYS, WUSB54GP),
10368349Sobrien	URAL_DEV(CONCEPTRONIC2, C54RU),
10468349Sobrien	URAL_DEV(DLINK, DWLG122),
10568349Sobrien	URAL_DEV(GIGABYTE, GN54G),
10668349Sobrien	URAL_DEV(GIGABYTE, GNWBKG),
10768349Sobrien	URAL_DEV(GUILLEMOT, HWGUSB254),
10868349Sobrien	URAL_DEV(MELCO, KG54),
10968349Sobrien	URAL_DEV(MELCO, KG54AI),
11068349Sobrien	URAL_DEV(MELCO, KG54YB),
11168349Sobrien	URAL_DEV(MELCO, NINWIFI),
11268349Sobrien	URAL_DEV(MSI, RT2570),
11368349Sobrien	URAL_DEV(MSI, RT2570_2),
11468349Sobrien	URAL_DEV(MSI, RT2570_3),
11568349Sobrien	URAL_DEV(NOVATECH, NV902),
11668349Sobrien	URAL_DEV(RALINK, RT2570),
11768349Sobrien	URAL_DEV(RALINK, RT2570_2),
11868349Sobrien	URAL_DEV(RALINK, RT2570_3),
11968349Sobrien	URAL_DEV(SIEMENS2, WL54G),
12068349Sobrien	URAL_DEV(SMC, 2862WG),
12168349Sobrien	URAL_DEV(SPHAIRON, UB801R),
12268349Sobrien	URAL_DEV(SURECOM, RT2570),
12368349Sobrien	URAL_DEV(VTECH, RT2570),
12468349Sobrien	URAL_DEV(ZINWELL, RT2570),
12568349Sobrien#undef URAL_DEV
12668349Sobrien};
12768349Sobrien
12868349Sobrienstatic usb_callback_t ural_bulk_read_callback;
12968349Sobrienstatic usb_callback_t ural_bulk_write_callback;
13068349Sobrien
13168349Sobrienstatic usb_error_t	ural_do_request(struct ural_softc *sc,
13268349Sobrien			    struct usb_device_request *req, void *data);
13368349Sobrienstatic struct ieee80211vap *ural_vap_create(struct ieee80211com *,
13468349Sobrien			    const char name[IFNAMSIZ], int unit, int opmode,
13568349Sobrien			    int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
13668349Sobrien			    const uint8_t mac[IEEE80211_ADDR_LEN]);
13768349Sobrienstatic void		ural_vap_delete(struct ieee80211vap *);
13868349Sobrienstatic void		ural_tx_free(struct ural_tx_data *, int);
13968349Sobrienstatic void		ural_setup_tx_list(struct ural_softc *);
14068349Sobrienstatic void		ural_unsetup_tx_list(struct ural_softc *);
14168349Sobrienstatic int		ural_newstate(struct ieee80211vap *,
14268349Sobrien			    enum ieee80211_state, int);
14368349Sobrienstatic void		ural_setup_tx_desc(struct ural_softc *,
14468349Sobrien			    struct ural_tx_desc *, uint32_t, int, int);
14568349Sobrienstatic int		ural_tx_bcn(struct ural_softc *, struct mbuf *,
14668349Sobrien			    struct ieee80211_node *);
14768349Sobrienstatic int		ural_tx_mgt(struct ural_softc *, struct mbuf *,
14868349Sobrien			    struct ieee80211_node *);
14968349Sobrienstatic int		ural_tx_data(struct ural_softc *, struct mbuf *,
15068349Sobrien			    struct ieee80211_node *);
15168349Sobrienstatic void		ural_start(struct ifnet *);
15268349Sobrienstatic int		ural_ioctl(struct ifnet *, u_long, caddr_t);
15368349Sobrienstatic void		ural_set_testmode(struct ural_softc *);
15468349Sobrienstatic void		ural_eeprom_read(struct ural_softc *, uint16_t, void *,
15568349Sobrien			    int);
15668349Sobrienstatic uint16_t		ural_read(struct ural_softc *, uint16_t);
15768349Sobrienstatic void		ural_read_multi(struct ural_softc *, uint16_t, void *,
15868349Sobrien			    int);
15968349Sobrienstatic void		ural_write(struct ural_softc *, uint16_t, uint16_t);
16068349Sobrienstatic void		ural_write_multi(struct ural_softc *, uint16_t, void *,
16168349Sobrien			    int) __unused;
16268349Sobrienstatic void		ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
16368349Sobrienstatic uint8_t		ural_bbp_read(struct ural_softc *, uint8_t);
16468349Sobrienstatic void		ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
16568349Sobrienstatic void		ural_scan_start(struct ieee80211com *);
16668349Sobrienstatic void		ural_scan_end(struct ieee80211com *);
16768349Sobrienstatic void		ural_set_channel(struct ieee80211com *);
16868349Sobrienstatic void		ural_set_chan(struct ural_softc *,
16968349Sobrien			    struct ieee80211_channel *);
17068349Sobrienstatic void		ural_disable_rf_tune(struct ural_softc *);
17168349Sobrienstatic void		ural_enable_tsf_sync(struct ural_softc *);
17268349Sobrienstatic void 		ural_enable_tsf(struct ural_softc *);
17368349Sobrienstatic void		ural_update_slot(struct ifnet *);
17468349Sobrienstatic void		ural_set_txpreamble(struct ural_softc *);
17568349Sobrienstatic void		ural_set_basicrates(struct ural_softc *,
17668349Sobrien			    const struct ieee80211_channel *);
17768349Sobrienstatic void		ural_set_bssid(struct ural_softc *, const uint8_t *);
17868349Sobrienstatic void		ural_set_macaddr(struct ural_softc *, uint8_t *);
17968349Sobrienstatic void		ural_update_promisc(struct ifnet *);
18068349Sobrienstatic void		ural_setpromisc(struct ural_softc *);
18168349Sobrienstatic const char	*ural_get_rf(int);
18268349Sobrienstatic void		ural_read_eeprom(struct ural_softc *);
18368349Sobrienstatic int		ural_bbp_init(struct ural_softc *);
18468349Sobrienstatic void		ural_set_txantenna(struct ural_softc *, int);
18568349Sobrienstatic void		ural_set_rxantenna(struct ural_softc *, int);
18668349Sobrienstatic void		ural_init_locked(struct ural_softc *);
18768349Sobrienstatic void		ural_init(void *);
18868349Sobrienstatic void		ural_stop(struct ural_softc *);
18968349Sobrienstatic int		ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
19068349Sobrien			    const struct ieee80211_bpf_params *);
19168349Sobrienstatic void		ural_ratectl_start(struct ural_softc *,
19268349Sobrien			    struct ieee80211_node *);
19368349Sobrienstatic void		ural_ratectl_timeout(void *);
19468349Sobrienstatic void		ural_ratectl_task(void *, int);
19568349Sobrienstatic int		ural_pause(struct ural_softc *sc, int timeout);
19668349Sobrien
19768349Sobrien/*
19868349Sobrien * Default values for MAC registers; values taken from the reference driver.
19968349Sobrien */
20068349Sobrienstatic const struct {
20168349Sobrien	uint16_t	reg;
20268349Sobrien	uint16_t	val;
20368349Sobrien} ural_def_mac[] = {
20468349Sobrien	{ RAL_TXRX_CSR5,  0x8c8d },
20568349Sobrien	{ RAL_TXRX_CSR6,  0x8b8a },
20668349Sobrien	{ RAL_TXRX_CSR7,  0x8687 },
20768349Sobrien	{ RAL_TXRX_CSR8,  0x0085 },
20868349Sobrien	{ RAL_MAC_CSR13,  0x1111 },
20968349Sobrien	{ RAL_MAC_CSR14,  0x1e11 },
21068349Sobrien	{ RAL_TXRX_CSR21, 0xe78f },
21168349Sobrien	{ RAL_MAC_CSR9,   0xff1d },
21268349Sobrien	{ RAL_MAC_CSR11,  0x0002 },
21368349Sobrien	{ RAL_MAC_CSR22,  0x0053 },
21468349Sobrien	{ RAL_MAC_CSR15,  0x0000 },
21568349Sobrien	{ RAL_MAC_CSR8,   RAL_FRAME_SIZE },
21668349Sobrien	{ RAL_TXRX_CSR19, 0x0000 },
21768349Sobrien	{ RAL_TXRX_CSR18, 0x005a },
21868349Sobrien	{ RAL_PHY_CSR2,   0x0000 },
21968349Sobrien	{ RAL_TXRX_CSR0,  0x1ec0 },
22068349Sobrien	{ RAL_PHY_CSR4,   0x000f }
22168349Sobrien};
22268349Sobrien
22368349Sobrien/*
22468349Sobrien * Default values for BBP registers; values taken from the reference driver.
22568349Sobrien */
22668349Sobrienstatic const struct {
22768349Sobrien	uint8_t	reg;
22868349Sobrien	uint8_t	val;
22968349Sobrien} ural_def_bbp[] = {
23068349Sobrien	{  3, 0x02 },
23168349Sobrien	{  4, 0x19 },
23268349Sobrien	{ 14, 0x1c },
23368349Sobrien	{ 15, 0x30 },
23468349Sobrien	{ 16, 0xac },
23568349Sobrien	{ 17, 0x48 },
23668349Sobrien	{ 18, 0x18 },
23768349Sobrien	{ 19, 0xff },
23868349Sobrien	{ 20, 0x1e },
23968349Sobrien	{ 21, 0x08 },
24068349Sobrien	{ 22, 0x08 },
24168349Sobrien	{ 23, 0x08 },
24268349Sobrien	{ 24, 0x80 },
24368349Sobrien	{ 25, 0x50 },
24468349Sobrien	{ 26, 0x08 },
24568349Sobrien	{ 27, 0x23 },
24668349Sobrien	{ 30, 0x10 },
24768349Sobrien	{ 31, 0x2b },
24868349Sobrien	{ 32, 0xb9 },
24968349Sobrien	{ 34, 0x12 },
25068349Sobrien	{ 35, 0x50 },
25168349Sobrien	{ 39, 0xc4 },
25268349Sobrien	{ 40, 0x02 },
25368349Sobrien	{ 41, 0x60 },
25468349Sobrien	{ 53, 0x10 },
25568349Sobrien	{ 54, 0x18 },
25668349Sobrien	{ 56, 0x08 },
25768349Sobrien	{ 57, 0x10 },
25868349Sobrien	{ 58, 0x08 },
25968349Sobrien	{ 61, 0x60 },
26068349Sobrien	{ 62, 0x10 },
26168349Sobrien	{ 75, 0xff }
26268349Sobrien};
26368349Sobrien
26468349Sobrien/*
26568349Sobrien * Default values for RF register R2 indexed by channel numbers.
26668349Sobrien */
26768349Sobrienstatic const uint32_t ural_rf2522_r2[] = {
26868349Sobrien	0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
26968349Sobrien	0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
27068349Sobrien};
27168349Sobrien
27268349Sobrienstatic const uint32_t ural_rf2523_r2[] = {
27368349Sobrien	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
27468349Sobrien	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
27568349Sobrien};
27668349Sobrien
27768349Sobrienstatic const uint32_t ural_rf2524_r2[] = {
27868349Sobrien	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
27968349Sobrien	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
28068349Sobrien};
28168349Sobrien
28268349Sobrienstatic const uint32_t ural_rf2525_r2[] = {
28368349Sobrien	0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
28468349Sobrien	0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
28568349Sobrien};
28668349Sobrien
28768349Sobrienstatic const uint32_t ural_rf2525_hi_r2[] = {
28868349Sobrien	0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
28968349Sobrien	0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
29068349Sobrien};
29168349Sobrien
29268349Sobrienstatic const uint32_t ural_rf2525e_r2[] = {
29368349Sobrien	0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
29468349Sobrien	0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
29568349Sobrien};
29668349Sobrien
29768349Sobrienstatic const uint32_t ural_rf2526_hi_r2[] = {
29868349Sobrien	0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
29968349Sobrien	0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
30068349Sobrien};
30168349Sobrien
30268349Sobrienstatic const uint32_t ural_rf2526_r2[] = {
30368349Sobrien	0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
30468349Sobrien	0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
30568349Sobrien};
30668349Sobrien
30768349Sobrien/*
30868349Sobrien * For dual-band RF, RF registers R1 and R4 also depend on channel number;
30968349Sobrien * values taken from the reference driver.
31068349Sobrien */
31168349Sobrienstatic const struct {
31268349Sobrien	uint8_t		chan;
31368349Sobrien	uint32_t	r1;
31468349Sobrien	uint32_t	r2;
31568349Sobrien	uint32_t	r4;
31668349Sobrien} ural_rf5222[] = {
31768349Sobrien	{   1, 0x08808, 0x0044d, 0x00282 },
31868349Sobrien	{   2, 0x08808, 0x0044e, 0x00282 },
31968349Sobrien	{   3, 0x08808, 0x0044f, 0x00282 },
32068349Sobrien	{   4, 0x08808, 0x00460, 0x00282 },
32168349Sobrien	{   5, 0x08808, 0x00461, 0x00282 },
32268349Sobrien	{   6, 0x08808, 0x00462, 0x00282 },
32368349Sobrien	{   7, 0x08808, 0x00463, 0x00282 },
32468349Sobrien	{   8, 0x08808, 0x00464, 0x00282 },
32568349Sobrien	{   9, 0x08808, 0x00465, 0x00282 },
32668349Sobrien	{  10, 0x08808, 0x00466, 0x00282 },
32768349Sobrien	{  11, 0x08808, 0x00467, 0x00282 },
32868349Sobrien	{  12, 0x08808, 0x00468, 0x00282 },
32968349Sobrien	{  13, 0x08808, 0x00469, 0x00282 },
33068349Sobrien	{  14, 0x08808, 0x0046b, 0x00286 },
33168349Sobrien
33268349Sobrien	{  36, 0x08804, 0x06225, 0x00287 },
33368349Sobrien	{  40, 0x08804, 0x06226, 0x00287 },
33468349Sobrien	{  44, 0x08804, 0x06227, 0x00287 },
33568349Sobrien	{  48, 0x08804, 0x06228, 0x00287 },
33668349Sobrien	{  52, 0x08804, 0x06229, 0x00287 },
33768349Sobrien	{  56, 0x08804, 0x0622a, 0x00287 },
33868349Sobrien	{  60, 0x08804, 0x0622b, 0x00287 },
33968349Sobrien	{  64, 0x08804, 0x0622c, 0x00287 },
34068349Sobrien
34168349Sobrien	{ 100, 0x08804, 0x02200, 0x00283 },
34268349Sobrien	{ 104, 0x08804, 0x02201, 0x00283 },
34368349Sobrien	{ 108, 0x08804, 0x02202, 0x00283 },
34468349Sobrien	{ 112, 0x08804, 0x02203, 0x00283 },
34568349Sobrien	{ 116, 0x08804, 0x02204, 0x00283 },
34668349Sobrien	{ 120, 0x08804, 0x02205, 0x00283 },
34768349Sobrien	{ 124, 0x08804, 0x02206, 0x00283 },
34868349Sobrien	{ 128, 0x08804, 0x02207, 0x00283 },
34968349Sobrien	{ 132, 0x08804, 0x02208, 0x00283 },
35068349Sobrien	{ 136, 0x08804, 0x02209, 0x00283 },
35168349Sobrien	{ 140, 0x08804, 0x0220a, 0x00283 },
35268349Sobrien
35368349Sobrien	{ 149, 0x08808, 0x02429, 0x00281 },
35468349Sobrien	{ 153, 0x08808, 0x0242b, 0x00281 },
35568349Sobrien	{ 157, 0x08808, 0x0242d, 0x00281 },
35668349Sobrien	{ 161, 0x08808, 0x0242f, 0x00281 }
35768349Sobrien};
35868349Sobrien
35968349Sobrienstatic const struct usb_config ural_config[URAL_N_TRANSFER] = {
36068349Sobrien	[URAL_BULK_WR] = {
36168349Sobrien		.type = UE_BULK,
36268349Sobrien		.endpoint = UE_ADDR_ANY,
36368349Sobrien		.direction = UE_DIR_OUT,
36468349Sobrien		.bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
36568349Sobrien		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
36668349Sobrien		.callback = ural_bulk_write_callback,
36768349Sobrien		.timeout = 5000,	/* ms */
36868349Sobrien	},
36968349Sobrien	[URAL_BULK_RD] = {
37068349Sobrien		.type = UE_BULK,
37168349Sobrien		.endpoint = UE_ADDR_ANY,
37268349Sobrien		.direction = UE_DIR_IN,
37368349Sobrien		.bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
37468349Sobrien		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
37568349Sobrien		.callback = ural_bulk_read_callback,
37668349Sobrien	},
37768349Sobrien};
37868349Sobrien
37968349Sobrienstatic device_probe_t ural_match;
38068349Sobrienstatic device_attach_t ural_attach;
38168349Sobrienstatic device_detach_t ural_detach;
38268349Sobrien
38368349Sobrienstatic device_method_t ural_methods[] = {
38468349Sobrien	/* Device interface */
38568349Sobrien	DEVMETHOD(device_probe,		ural_match),
38668349Sobrien	DEVMETHOD(device_attach,	ural_attach),
38768349Sobrien	DEVMETHOD(device_detach,	ural_detach),
38868349Sobrien
38968349Sobrien	{ 0, 0 }
39068349Sobrien};
39168349Sobrien
39268349Sobrienstatic driver_t ural_driver = {
39368349Sobrien	.name = "ural",
39468349Sobrien	.methods = ural_methods,
39568349Sobrien	.size = sizeof(struct ural_softc),
39668349Sobrien};
39768349Sobrien
39868349Sobrienstatic devclass_t ural_devclass;
39968349Sobrien
40068349SobrienDRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
40168349SobrienMODULE_DEPEND(ural, usb, 1, 1, 1);
40268349SobrienMODULE_DEPEND(ural, wlan, 1, 1, 1);
40368349SobrienMODULE_VERSION(ural, 1);
40468349Sobrien
40568349Sobrienstatic int
40668349Sobrienural_match(device_t self)
40768349Sobrien{
40868349Sobrien	struct usb_attach_arg *uaa = device_get_ivars(self);
40968349Sobrien
41068349Sobrien	if (uaa->usb_mode != USB_MODE_HOST)
41168349Sobrien		return (ENXIO);
41268349Sobrien	if (uaa->info.bConfigIndex != 0)
41368349Sobrien		return (ENXIO);
41468349Sobrien	if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
41568349Sobrien		return (ENXIO);
41668349Sobrien
41768349Sobrien	return (usbd_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
41868349Sobrien}
41968349Sobrien
42068349Sobrienstatic int
42168349Sobrienural_attach(device_t self)
42268349Sobrien{
42368349Sobrien	struct usb_attach_arg *uaa = device_get_ivars(self);
42468349Sobrien	struct ural_softc *sc = device_get_softc(self);
42568349Sobrien	struct ifnet *ifp;
42668349Sobrien	struct ieee80211com *ic;
42768349Sobrien	uint8_t iface_index, bands;
42868349Sobrien	int error;
42968349Sobrien
43068349Sobrien	device_set_usb_desc(self);
43168349Sobrien	sc->sc_udev = uaa->device;
43268349Sobrien	sc->sc_dev = self;
43368349Sobrien
43468349Sobrien	mtx_init(&sc->sc_mtx, device_get_nameunit(self),
43568349Sobrien	    MTX_NETWORK_LOCK, MTX_DEF);
43668349Sobrien
43768349Sobrien	iface_index = RAL_IFACE_INDEX;
43868349Sobrien	error = usbd_transfer_setup(uaa->device,
43968349Sobrien	    &iface_index, sc->sc_xfer, ural_config,
44068349Sobrien	    URAL_N_TRANSFER, sc, &sc->sc_mtx);
44168349Sobrien	if (error) {
44268349Sobrien		device_printf(self, "could not allocate USB transfers, "
44368349Sobrien		    "err=%s\n", usbd_errstr(error));
44468349Sobrien		goto detach;
44568349Sobrien	}
44668349Sobrien
44768349Sobrien	RAL_LOCK(sc);
44868349Sobrien	/* retrieve RT2570 rev. no */
44968349Sobrien	sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
45068349Sobrien
45168349Sobrien	/* retrieve MAC address and various other things from EEPROM */
45268349Sobrien	ural_read_eeprom(sc);
45368349Sobrien	RAL_UNLOCK(sc);
45468349Sobrien
45568349Sobrien	device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
45668349Sobrien	    sc->asic_rev, ural_get_rf(sc->rf_rev));
45768349Sobrien
45868349Sobrien	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
45968349Sobrien	if (ifp == NULL) {
46068349Sobrien		device_printf(sc->sc_dev, "can not if_alloc()\n");
46168349Sobrien		goto detach;
46268349Sobrien	}
46368349Sobrien	ic = ifp->if_l2com;
46468349Sobrien
46568349Sobrien	ifp->if_softc = sc;
46668349Sobrien	if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
46768349Sobrien	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
46868349Sobrien	ifp->if_init = ural_init;
46968349Sobrien	ifp->if_ioctl = ural_ioctl;
47068349Sobrien	ifp->if_start = ural_start;
47168349Sobrien	IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
47268349Sobrien	ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
47368349Sobrien	IFQ_SET_READY(&ifp->if_snd);
47468349Sobrien
47568349Sobrien	ic->ic_ifp = ifp;
47668349Sobrien	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
47768349Sobrien
47868349Sobrien	/* set device capabilities */
47968349Sobrien	ic->ic_caps =
48068349Sobrien	      IEEE80211_C_STA		/* station mode supported */
48168349Sobrien	    | IEEE80211_C_IBSS		/* IBSS mode supported */
48268349Sobrien	    | IEEE80211_C_MONITOR	/* monitor mode supported */
48368349Sobrien	    | IEEE80211_C_HOSTAP	/* HostAp mode supported */
48468349Sobrien	    | IEEE80211_C_TXPMGT	/* tx power management */
48568349Sobrien	    | IEEE80211_C_SHPREAMBLE	/* short preamble supported */
48668349Sobrien	    | IEEE80211_C_SHSLOT	/* short slot time supported */
48768349Sobrien	    | IEEE80211_C_BGSCAN	/* bg scanning supported */
48868349Sobrien	    | IEEE80211_C_WPA		/* 802.11i */
48968349Sobrien	    ;
49068349Sobrien
49168349Sobrien	bands = 0;
49268349Sobrien	setbit(&bands, IEEE80211_MODE_11B);
49368349Sobrien	setbit(&bands, IEEE80211_MODE_11G);
49468349Sobrien	if (sc->rf_rev == RAL_RF_5222)
49568349Sobrien		setbit(&bands, IEEE80211_MODE_11A);
49668349Sobrien	ieee80211_init_channels(ic, NULL, &bands);
49768349Sobrien
49868349Sobrien	ieee80211_ifattach(ic, sc->sc_bssid);
49968349Sobrien	ic->ic_update_promisc = ural_update_promisc;
50068349Sobrien	ic->ic_raw_xmit = ural_raw_xmit;
50168349Sobrien	ic->ic_scan_start = ural_scan_start;
50268349Sobrien	ic->ic_scan_end = ural_scan_end;
50368349Sobrien	ic->ic_set_channel = ural_set_channel;
50468349Sobrien
50568349Sobrien	ic->ic_vap_create = ural_vap_create;
50668349Sobrien	ic->ic_vap_delete = ural_vap_delete;
50768349Sobrien
50868349Sobrien	ieee80211_radiotap_attach(ic,
50968349Sobrien	    &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
51068349Sobrien		RAL_TX_RADIOTAP_PRESENT,
51168349Sobrien	    &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
51268349Sobrien		RAL_RX_RADIOTAP_PRESENT);
51368349Sobrien
51468349Sobrien	if (bootverbose)
51568349Sobrien		ieee80211_announce(ic);
51668349Sobrien
51768349Sobrien	return (0);
51868349Sobrien
51968349Sobriendetach:
52068349Sobrien	ural_detach(self);
52168349Sobrien	return (ENXIO);			/* failure */
52268349Sobrien}
52368349Sobrien
52468349Sobrienstatic int
52568349Sobrienural_detach(device_t self)
52668349Sobrien{
52768349Sobrien	struct ural_softc *sc = device_get_softc(self);
52868349Sobrien	struct ifnet *ifp = sc->sc_ifp;
52968349Sobrien	struct ieee80211com *ic;
53068349Sobrien
53168349Sobrien	/* stop all USB transfers */
53268349Sobrien	usbd_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
53368349Sobrien
53468349Sobrien	/* free TX list, if any */
53568349Sobrien	RAL_LOCK(sc);
53668349Sobrien	ural_unsetup_tx_list(sc);
53768349Sobrien	RAL_UNLOCK(sc);
53868349Sobrien
53968349Sobrien	if (ifp) {
54068349Sobrien		ic = ifp->if_l2com;
54168349Sobrien		ieee80211_ifdetach(ic);
54268349Sobrien		if_free(ifp);
54368349Sobrien	}
54468349Sobrien	mtx_destroy(&sc->sc_mtx);
54568349Sobrien
54668349Sobrien	return (0);
54768349Sobrien}
54868349Sobrien
54968349Sobrienstatic usb_error_t
55068349Sobrienural_do_request(struct ural_softc *sc,
55168349Sobrien    struct usb_device_request *req, void *data)
55268349Sobrien{
55368349Sobrien	usb_error_t err;
55468349Sobrien	int ntries = 10;
55568349Sobrien
55668349Sobrien	while (ntries--) {
55768349Sobrien		err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx,
55868349Sobrien		    req, data, 0, NULL, 250 /* ms */);
55968349Sobrien		if (err == 0)
56068349Sobrien			break;
56168349Sobrien
56268349Sobrien		DPRINTFN(1, "Control request failed, %s (retrying)\n",
56368349Sobrien		    usbd_errstr(err));
56468349Sobrien		if (ural_pause(sc, hz / 100))
56568349Sobrien			break;
56668349Sobrien	}
56768349Sobrien	return (err);
56868349Sobrien}
56968349Sobrien
57068349Sobrienstatic struct ieee80211vap *
57168349Sobrienural_vap_create(struct ieee80211com *ic,
57268349Sobrien	const char name[IFNAMSIZ], int unit, int opmode, int flags,
57368349Sobrien	const uint8_t bssid[IEEE80211_ADDR_LEN],
57468349Sobrien	const uint8_t mac[IEEE80211_ADDR_LEN])
57568349Sobrien{
57668349Sobrien	struct ural_softc *sc = ic->ic_ifp->if_softc;
57768349Sobrien	struct ural_vap *uvp;
57868349Sobrien	struct ieee80211vap *vap;
57968349Sobrien
58068349Sobrien	if (!TAILQ_EMPTY(&ic->ic_vaps))		/* only one at a time */
58168349Sobrien		return NULL;
58268349Sobrien	uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
58368349Sobrien	    M_80211_VAP, M_NOWAIT | M_ZERO);
58468349Sobrien	if (uvp == NULL)
58568349Sobrien		return NULL;
58668349Sobrien	vap = &uvp->vap;
58768349Sobrien	/* enable s/w bmiss handling for sta mode */
58868349Sobrien	ieee80211_vap_setup(ic, vap, name, unit, opmode,
58968349Sobrien	    flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
59068349Sobrien
59168349Sobrien	/* override state transition machine */
59268349Sobrien	uvp->newstate = vap->iv_newstate;
59368349Sobrien	vap->iv_newstate = ural_newstate;
59468349Sobrien
59568349Sobrien	usb_callout_init_mtx(&uvp->ratectl_ch, &sc->sc_mtx, 0);
59668349Sobrien	TASK_INIT(&uvp->ratectl_task, 0, ural_ratectl_task, uvp);
59768349Sobrien	ieee80211_ratectl_init(vap);
59868349Sobrien	ieee80211_ratectl_setinterval(vap, 1000 /* 1 sec */);
59968349Sobrien
60068349Sobrien	/* complete setup */
60168349Sobrien	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
60268349Sobrien	ic->ic_opmode = opmode;
60368349Sobrien	return vap;
60468349Sobrien}
60568349Sobrien
60668349Sobrienstatic void
60768349Sobrienural_vap_delete(struct ieee80211vap *vap)
60868349Sobrien{
60968349Sobrien	struct ural_vap *uvp = URAL_VAP(vap);
61068349Sobrien	struct ieee80211com *ic = vap->iv_ic;
61168349Sobrien
61268349Sobrien	usb_callout_drain(&uvp->ratectl_ch);
61368349Sobrien	ieee80211_draintask(ic, &uvp->ratectl_task);
61468349Sobrien	ieee80211_ratectl_deinit(vap);
61568349Sobrien	ieee80211_vap_detach(vap);
61668349Sobrien	free(uvp, M_80211_VAP);
61768349Sobrien}
61868349Sobrien
61968349Sobrienstatic void
62068349Sobrienural_tx_free(struct ural_tx_data *data, int txerr)
62168349Sobrien{
62268349Sobrien	struct ural_softc *sc = data->sc;
62368349Sobrien
62468349Sobrien	if (data->m != NULL) {
62568349Sobrien		if (data->m->m_flags & M_TXCB)
62668349Sobrien			ieee80211_process_callback(data->ni, data->m,
62768349Sobrien			    txerr ? ETIMEDOUT : 0);
62868349Sobrien		m_freem(data->m);
62968349Sobrien		data->m = NULL;
63068349Sobrien
63168349Sobrien		ieee80211_free_node(data->ni);
63268349Sobrien		data->ni = NULL;
63368349Sobrien	}
63468349Sobrien	STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
63568349Sobrien	sc->tx_nfree++;
63668349Sobrien}
63768349Sobrien
63868349Sobrienstatic void
63968349Sobrienural_setup_tx_list(struct ural_softc *sc)
64068349Sobrien{
64168349Sobrien	struct ural_tx_data *data;
64268349Sobrien	int i;
64368349Sobrien
64468349Sobrien	sc->tx_nfree = 0;
64568349Sobrien	STAILQ_INIT(&sc->tx_q);
64668349Sobrien	STAILQ_INIT(&sc->tx_free);
64768349Sobrien
64868349Sobrien	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
64968349Sobrien		data = &sc->tx_data[i];
65068349Sobrien
65168349Sobrien		data->sc = sc;
65268349Sobrien		STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
65368349Sobrien		sc->tx_nfree++;
65468349Sobrien	}
65568349Sobrien}
65668349Sobrien
65768349Sobrienstatic void
65868349Sobrienural_unsetup_tx_list(struct ural_softc *sc)
65968349Sobrien{
66068349Sobrien	struct ural_tx_data *data;
66168349Sobrien	int i;
66268349Sobrien
66368349Sobrien	/* make sure any subsequent use of the queues will fail */
66468349Sobrien	sc->tx_nfree = 0;
66568349Sobrien	STAILQ_INIT(&sc->tx_q);
66668349Sobrien	STAILQ_INIT(&sc->tx_free);
66768349Sobrien
66868349Sobrien	/* free up all node references and mbufs */
66968349Sobrien	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
67068349Sobrien		data = &sc->tx_data[i];
67168349Sobrien
67268349Sobrien		if (data->m != NULL) {
673			m_freem(data->m);
674			data->m = NULL;
675		}
676		if (data->ni != NULL) {
677			ieee80211_free_node(data->ni);
678			data->ni = NULL;
679		}
680	}
681}
682
683static int
684ural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
685{
686	struct ural_vap *uvp = URAL_VAP(vap);
687	struct ieee80211com *ic = vap->iv_ic;
688	struct ural_softc *sc = ic->ic_ifp->if_softc;
689	const struct ieee80211_txparam *tp;
690	struct ieee80211_node *ni;
691	struct mbuf *m;
692
693	DPRINTF("%s -> %s\n",
694		ieee80211_state_name[vap->iv_state],
695		ieee80211_state_name[nstate]);
696
697	IEEE80211_UNLOCK(ic);
698	RAL_LOCK(sc);
699	usb_callout_stop(&uvp->ratectl_ch);
700
701	switch (nstate) {
702	case IEEE80211_S_INIT:
703		if (vap->iv_state == IEEE80211_S_RUN) {
704			/* abort TSF synchronization */
705			ural_write(sc, RAL_TXRX_CSR19, 0);
706
707			/* force tx led to stop blinking */
708			ural_write(sc, RAL_MAC_CSR20, 0);
709		}
710		break;
711
712	case IEEE80211_S_RUN:
713		ni = ieee80211_ref_node(vap->iv_bss);
714
715		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
716			ural_update_slot(ic->ic_ifp);
717			ural_set_txpreamble(sc);
718			ural_set_basicrates(sc, ic->ic_bsschan);
719			IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
720			ural_set_bssid(sc, sc->sc_bssid);
721		}
722
723		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
724		    vap->iv_opmode == IEEE80211_M_IBSS) {
725			m = ieee80211_beacon_alloc(ni, &uvp->bo);
726			if (m == NULL) {
727				device_printf(sc->sc_dev,
728				    "could not allocate beacon\n");
729				RAL_UNLOCK(sc);
730				IEEE80211_LOCK(ic);
731				ieee80211_free_node(ni);
732				return (-1);
733			}
734			ieee80211_ref_node(ni);
735			if (ural_tx_bcn(sc, m, ni) != 0) {
736				device_printf(sc->sc_dev,
737				    "could not send beacon\n");
738				RAL_UNLOCK(sc);
739				IEEE80211_LOCK(ic);
740				ieee80211_free_node(ni);
741				return (-1);
742			}
743		}
744
745		/* make tx led blink on tx (controlled by ASIC) */
746		ural_write(sc, RAL_MAC_CSR20, 1);
747
748		if (vap->iv_opmode != IEEE80211_M_MONITOR)
749			ural_enable_tsf_sync(sc);
750		else
751			ural_enable_tsf(sc);
752
753		/* enable automatic rate adaptation */
754		/* XXX should use ic_bsschan but not valid until after newstate call below */
755		tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
756		if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
757			ural_ratectl_start(sc, ni);
758		ieee80211_free_node(ni);
759		break;
760
761	default:
762		break;
763	}
764	RAL_UNLOCK(sc);
765	IEEE80211_LOCK(ic);
766	return (uvp->newstate(vap, nstate, arg));
767}
768
769
770static void
771ural_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
772{
773	struct ural_softc *sc = usbd_xfer_softc(xfer);
774	struct ifnet *ifp = sc->sc_ifp;
775	struct ieee80211vap *vap;
776	struct ural_tx_data *data;
777	struct mbuf *m;
778	struct usb_page_cache *pc;
779	int len;
780
781	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
782
783	switch (USB_GET_STATE(xfer)) {
784	case USB_ST_TRANSFERRED:
785		DPRINTFN(11, "transfer complete, %d bytes\n", len);
786
787		/* free resources */
788		data = usbd_xfer_get_priv(xfer);
789		ural_tx_free(data, 0);
790		usbd_xfer_set_priv(xfer, NULL);
791
792		ifp->if_opackets++;
793		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
794
795		/* FALLTHROUGH */
796	case USB_ST_SETUP:
797tr_setup:
798		data = STAILQ_FIRST(&sc->tx_q);
799		if (data) {
800			STAILQ_REMOVE_HEAD(&sc->tx_q, next);
801			m = data->m;
802
803			if (m->m_pkthdr.len > (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
804				DPRINTFN(0, "data overflow, %u bytes\n",
805				    m->m_pkthdr.len);
806				m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
807			}
808			pc = usbd_xfer_get_frame(xfer, 0);
809			usbd_copy_in(pc, 0, &data->desc, RAL_TX_DESC_SIZE);
810			usbd_m_copy_in(pc, RAL_TX_DESC_SIZE, m, 0,
811			    m->m_pkthdr.len);
812
813			vap = data->ni->ni_vap;
814			if (ieee80211_radiotap_active_vap(vap)) {
815				struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
816
817				tap->wt_flags = 0;
818				tap->wt_rate = data->rate;
819				tap->wt_antenna = sc->tx_ant;
820
821				ieee80211_radiotap_tx(vap, m);
822			}
823
824			/* xfer length needs to be a multiple of two! */
825			len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
826			if ((len % 64) == 0)
827				len += 2;
828
829			DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
830			    m->m_pkthdr.len, len);
831
832			usbd_xfer_set_frame_len(xfer, 0, len);
833			usbd_xfer_set_priv(xfer, data);
834
835			usbd_transfer_submit(xfer);
836		}
837		RAL_UNLOCK(sc);
838		ural_start(ifp);
839		RAL_LOCK(sc);
840		break;
841
842	default:			/* Error */
843		DPRINTFN(11, "transfer error, %s\n",
844		    usbd_errstr(error));
845
846		ifp->if_oerrors++;
847		data = usbd_xfer_get_priv(xfer);
848		if (data != NULL) {
849			ural_tx_free(data, error);
850			usbd_xfer_set_priv(xfer, NULL);
851		}
852
853		if (error == USB_ERR_STALLED) {
854			/* try to clear stall first */
855			usbd_xfer_set_stall(xfer);
856			goto tr_setup;
857		}
858		if (error == USB_ERR_TIMEOUT)
859			device_printf(sc->sc_dev, "device timeout\n");
860		break;
861	}
862}
863
864static void
865ural_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
866{
867	struct ural_softc *sc = usbd_xfer_softc(xfer);
868	struct ifnet *ifp = sc->sc_ifp;
869	struct ieee80211com *ic = ifp->if_l2com;
870	struct ieee80211_node *ni;
871	struct mbuf *m = NULL;
872	struct usb_page_cache *pc;
873	uint32_t flags;
874	int8_t rssi = 0, nf = 0;
875	int len;
876
877	usbd_xfer_status(xfer, &len, NULL, NULL, NULL);
878
879	switch (USB_GET_STATE(xfer)) {
880	case USB_ST_TRANSFERRED:
881
882		DPRINTFN(15, "rx done, actlen=%d\n", len);
883
884		if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
885			DPRINTF("%s: xfer too short %d\n",
886			    device_get_nameunit(sc->sc_dev), len);
887			ifp->if_ierrors++;
888			goto tr_setup;
889		}
890
891		len -= RAL_RX_DESC_SIZE;
892		/* rx descriptor is located at the end */
893		pc = usbd_xfer_get_frame(xfer, 0);
894		usbd_copy_out(pc, len, &sc->sc_rx_desc, RAL_RX_DESC_SIZE);
895
896		rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
897		nf = RAL_NOISE_FLOOR;
898		flags = le32toh(sc->sc_rx_desc.flags);
899		if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
900			/*
901		         * This should not happen since we did not
902		         * request to receive those frames when we
903		         * filled RAL_TXRX_CSR2:
904		         */
905			DPRINTFN(5, "PHY or CRC error\n");
906			ifp->if_ierrors++;
907			goto tr_setup;
908		}
909
910		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
911		if (m == NULL) {
912			DPRINTF("could not allocate mbuf\n");
913			ifp->if_ierrors++;
914			goto tr_setup;
915		}
916		usbd_copy_out(pc, 0, mtod(m, uint8_t *), len);
917
918		/* finalize mbuf */
919		m->m_pkthdr.rcvif = ifp;
920		m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
921
922		if (ieee80211_radiotap_active(ic)) {
923			struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
924
925			/* XXX set once */
926			tap->wr_flags = 0;
927			tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
928			    (flags & RAL_RX_OFDM) ?
929			    IEEE80211_T_OFDM : IEEE80211_T_CCK);
930			tap->wr_antenna = sc->rx_ant;
931			tap->wr_antsignal = nf + rssi;
932			tap->wr_antnoise = nf;
933		}
934		/* Strip trailing 802.11 MAC FCS. */
935		m_adj(m, -IEEE80211_CRC_LEN);
936
937		/* FALLTHROUGH */
938	case USB_ST_SETUP:
939tr_setup:
940		usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
941		usbd_transfer_submit(xfer);
942
943		/*
944		 * At the end of a USB callback it is always safe to unlock
945		 * the private mutex of a device! That is why we do the
946		 * "ieee80211_input" here, and not some lines up!
947		 */
948		RAL_UNLOCK(sc);
949		if (m) {
950			ni = ieee80211_find_rxnode(ic,
951			    mtod(m, struct ieee80211_frame_min *));
952			if (ni != NULL) {
953				(void) ieee80211_input(ni, m, rssi, nf);
954				ieee80211_free_node(ni);
955			} else
956				(void) ieee80211_input_all(ic, m, rssi, nf);
957		}
958		if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 &&
959		    !IFQ_IS_EMPTY(&ifp->if_snd))
960			ural_start(ifp);
961		RAL_LOCK(sc);
962		return;
963
964	default:			/* Error */
965		if (error != USB_ERR_CANCELLED) {
966			/* try to clear stall first */
967			usbd_xfer_set_stall(xfer);
968			goto tr_setup;
969		}
970		return;
971	}
972}
973
974static uint8_t
975ural_plcp_signal(int rate)
976{
977	switch (rate) {
978	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
979	case 12:	return 0xb;
980	case 18:	return 0xf;
981	case 24:	return 0xa;
982	case 36:	return 0xe;
983	case 48:	return 0x9;
984	case 72:	return 0xd;
985	case 96:	return 0x8;
986	case 108:	return 0xc;
987
988	/* CCK rates (NB: not IEEE std, device-specific) */
989	case 2:		return 0x0;
990	case 4:		return 0x1;
991	case 11:	return 0x2;
992	case 22:	return 0x3;
993	}
994	return 0xff;		/* XXX unsupported/unknown rate */
995}
996
997static void
998ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
999    uint32_t flags, int len, int rate)
1000{
1001	struct ifnet *ifp = sc->sc_ifp;
1002	struct ieee80211com *ic = ifp->if_l2com;
1003	uint16_t plcp_length;
1004	int remainder;
1005
1006	desc->flags = htole32(flags);
1007	desc->flags |= htole32(RAL_TX_NEWSEQ);
1008	desc->flags |= htole32(len << 16);
1009
1010	desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1011	desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1012
1013	/* setup PLCP fields */
1014	desc->plcp_signal  = ural_plcp_signal(rate);
1015	desc->plcp_service = 4;
1016
1017	len += IEEE80211_CRC_LEN;
1018	if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1019		desc->flags |= htole32(RAL_TX_OFDM);
1020
1021		plcp_length = len & 0xfff;
1022		desc->plcp_length_hi = plcp_length >> 6;
1023		desc->plcp_length_lo = plcp_length & 0x3f;
1024	} else {
1025		plcp_length = (16 * len + rate - 1) / rate;
1026		if (rate == 22) {
1027			remainder = (16 * len) % 22;
1028			if (remainder != 0 && remainder < 7)
1029				desc->plcp_service |= RAL_PLCP_LENGEXT;
1030		}
1031		desc->plcp_length_hi = plcp_length >> 8;
1032		desc->plcp_length_lo = plcp_length & 0xff;
1033
1034		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1035			desc->plcp_signal |= 0x08;
1036	}
1037
1038	desc->iv = 0;
1039	desc->eiv = 0;
1040}
1041
1042#define RAL_TX_TIMEOUT	5000
1043
1044static int
1045ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1046{
1047	struct ieee80211vap *vap = ni->ni_vap;
1048	struct ieee80211com *ic = ni->ni_ic;
1049	struct ifnet *ifp = sc->sc_ifp;
1050	const struct ieee80211_txparam *tp;
1051	struct ural_tx_data *data;
1052
1053	if (sc->tx_nfree == 0) {
1054		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1055		m_freem(m0);
1056		ieee80211_free_node(ni);
1057		return EIO;
1058	}
1059	data = STAILQ_FIRST(&sc->tx_free);
1060	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1061	sc->tx_nfree--;
1062	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1063
1064	data->m = m0;
1065	data->ni = ni;
1066	data->rate = tp->mgmtrate;
1067
1068	ural_setup_tx_desc(sc, &data->desc,
1069	    RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1070	    tp->mgmtrate);
1071
1072	DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1073	    m0->m_pkthdr.len, tp->mgmtrate);
1074
1075	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1076	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1077
1078	return (0);
1079}
1080
1081static int
1082ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1083{
1084	struct ieee80211vap *vap = ni->ni_vap;
1085	struct ieee80211com *ic = ni->ni_ic;
1086	const struct ieee80211_txparam *tp;
1087	struct ural_tx_data *data;
1088	struct ieee80211_frame *wh;
1089	struct ieee80211_key *k;
1090	uint32_t flags;
1091	uint16_t dur;
1092
1093	RAL_LOCK_ASSERT(sc, MA_OWNED);
1094
1095	data = STAILQ_FIRST(&sc->tx_free);
1096	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1097	sc->tx_nfree--;
1098
1099	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1100
1101	wh = mtod(m0, struct ieee80211_frame *);
1102	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1103		k = ieee80211_crypto_encap(ni, m0);
1104		if (k == NULL) {
1105			m_freem(m0);
1106			return ENOBUFS;
1107		}
1108		wh = mtod(m0, struct ieee80211_frame *);
1109	}
1110
1111	data->m = m0;
1112	data->ni = ni;
1113	data->rate = tp->mgmtrate;
1114
1115	flags = 0;
1116	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1117		flags |= RAL_TX_ACK;
1118
1119		dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1120		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1121		*(uint16_t *)wh->i_dur = htole16(dur);
1122
1123		/* tell hardware to add timestamp for probe responses */
1124		if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1125		    IEEE80211_FC0_TYPE_MGT &&
1126		    (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1127		    IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1128			flags |= RAL_TX_TIMESTAMP;
1129	}
1130
1131	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1132
1133	DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1134	    m0->m_pkthdr.len, tp->mgmtrate);
1135
1136	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1137	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1138
1139	return 0;
1140}
1141
1142static int
1143ural_sendprot(struct ural_softc *sc,
1144    const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1145{
1146	struct ieee80211com *ic = ni->ni_ic;
1147	const struct ieee80211_frame *wh;
1148	struct ural_tx_data *data;
1149	struct mbuf *mprot;
1150	int protrate, ackrate, pktlen, flags, isshort;
1151	uint16_t dur;
1152
1153	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1154	    ("protection %d", prot));
1155
1156	wh = mtod(m, const struct ieee80211_frame *);
1157	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1158
1159	protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1160	ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1161
1162	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1163	dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1164	    + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1165	flags = RAL_TX_RETRY(7);
1166	if (prot == IEEE80211_PROT_RTSCTS) {
1167		/* NB: CTS is the same size as an ACK */
1168		dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1169		flags |= RAL_TX_ACK;
1170		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1171	} else {
1172		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1173	}
1174	if (mprot == NULL) {
1175		/* XXX stat + msg */
1176		return ENOBUFS;
1177	}
1178	data = STAILQ_FIRST(&sc->tx_free);
1179	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1180	sc->tx_nfree--;
1181
1182	data->m = mprot;
1183	data->ni = ieee80211_ref_node(ni);
1184	data->rate = protrate;
1185	ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1186
1187	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1188	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1189
1190	return 0;
1191}
1192
1193static int
1194ural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1195    const struct ieee80211_bpf_params *params)
1196{
1197	struct ieee80211com *ic = ni->ni_ic;
1198	struct ural_tx_data *data;
1199	uint32_t flags;
1200	int error;
1201	int rate;
1202
1203	RAL_LOCK_ASSERT(sc, MA_OWNED);
1204	KASSERT(params != NULL, ("no raw xmit params"));
1205
1206	rate = params->ibp_rate0;
1207	if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1208		m_freem(m0);
1209		return EINVAL;
1210	}
1211	flags = 0;
1212	if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1213		flags |= RAL_TX_ACK;
1214	if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1215		error = ural_sendprot(sc, m0, ni,
1216		    params->ibp_flags & IEEE80211_BPF_RTS ?
1217			 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1218		    rate);
1219		if (error || sc->tx_nfree == 0) {
1220			m_freem(m0);
1221			return ENOBUFS;
1222		}
1223		flags |= RAL_TX_IFS_SIFS;
1224	}
1225
1226	data = STAILQ_FIRST(&sc->tx_free);
1227	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1228	sc->tx_nfree--;
1229
1230	data->m = m0;
1231	data->ni = ni;
1232	data->rate = rate;
1233
1234	/* XXX need to setup descriptor ourself */
1235	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1236
1237	DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1238	    m0->m_pkthdr.len, rate);
1239
1240	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1241	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1242
1243	return 0;
1244}
1245
1246static int
1247ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1248{
1249	struct ieee80211vap *vap = ni->ni_vap;
1250	struct ieee80211com *ic = ni->ni_ic;
1251	struct ural_tx_data *data;
1252	struct ieee80211_frame *wh;
1253	const struct ieee80211_txparam *tp;
1254	struct ieee80211_key *k;
1255	uint32_t flags = 0;
1256	uint16_t dur;
1257	int error, rate;
1258
1259	RAL_LOCK_ASSERT(sc, MA_OWNED);
1260
1261	wh = mtod(m0, struct ieee80211_frame *);
1262
1263	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1264	if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1265		rate = tp->mcastrate;
1266	else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1267		rate = tp->ucastrate;
1268	else
1269		rate = ni->ni_txrate;
1270
1271	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1272		k = ieee80211_crypto_encap(ni, m0);
1273		if (k == NULL) {
1274			m_freem(m0);
1275			return ENOBUFS;
1276		}
1277		/* packet header may have moved, reset our local pointer */
1278		wh = mtod(m0, struct ieee80211_frame *);
1279	}
1280
1281	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1282		int prot = IEEE80211_PROT_NONE;
1283		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1284			prot = IEEE80211_PROT_RTSCTS;
1285		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1286		    ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1287			prot = ic->ic_protmode;
1288		if (prot != IEEE80211_PROT_NONE) {
1289			error = ural_sendprot(sc, m0, ni, prot, rate);
1290			if (error || sc->tx_nfree == 0) {
1291				m_freem(m0);
1292				return ENOBUFS;
1293			}
1294			flags |= RAL_TX_IFS_SIFS;
1295		}
1296	}
1297
1298	data = STAILQ_FIRST(&sc->tx_free);
1299	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1300	sc->tx_nfree--;
1301
1302	data->m = m0;
1303	data->ni = ni;
1304	data->rate = rate;
1305
1306	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1307		flags |= RAL_TX_ACK;
1308		flags |= RAL_TX_RETRY(7);
1309
1310		dur = ieee80211_ack_duration(ic->ic_rt, rate,
1311		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1312		*(uint16_t *)wh->i_dur = htole16(dur);
1313	}
1314
1315	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1316
1317	DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1318	    m0->m_pkthdr.len, rate);
1319
1320	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1321	usbd_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1322
1323	return 0;
1324}
1325
1326static void
1327ural_start(struct ifnet *ifp)
1328{
1329	struct ural_softc *sc = ifp->if_softc;
1330	struct ieee80211_node *ni;
1331	struct mbuf *m;
1332
1333	RAL_LOCK(sc);
1334	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1335		RAL_UNLOCK(sc);
1336		return;
1337	}
1338	for (;;) {
1339		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1340		if (m == NULL)
1341			break;
1342		if (sc->tx_nfree < RAL_TX_MINFREE) {
1343			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1344			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1345			break;
1346		}
1347		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1348		if (ural_tx_data(sc, m, ni) != 0) {
1349			ieee80211_free_node(ni);
1350			ifp->if_oerrors++;
1351			break;
1352		}
1353	}
1354	RAL_UNLOCK(sc);
1355}
1356
1357static int
1358ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1359{
1360	struct ural_softc *sc = ifp->if_softc;
1361	struct ieee80211com *ic = ifp->if_l2com;
1362	struct ifreq *ifr = (struct ifreq *) data;
1363	int error = 0, startall = 0;
1364
1365	switch (cmd) {
1366	case SIOCSIFFLAGS:
1367		RAL_LOCK(sc);
1368		if (ifp->if_flags & IFF_UP) {
1369			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1370				ural_init_locked(sc);
1371				startall = 1;
1372			} else
1373				ural_setpromisc(sc);
1374		} else {
1375			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1376				ural_stop(sc);
1377		}
1378		RAL_UNLOCK(sc);
1379		if (startall)
1380			ieee80211_start_all(ic);
1381		break;
1382	case SIOCGIFMEDIA:
1383	case SIOCSIFMEDIA:
1384		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1385		break;
1386	default:
1387		error = ether_ioctl(ifp, cmd, data);
1388		break;
1389	}
1390	return error;
1391}
1392
1393static void
1394ural_set_testmode(struct ural_softc *sc)
1395{
1396	struct usb_device_request req;
1397	usb_error_t error;
1398
1399	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1400	req.bRequest = RAL_VENDOR_REQUEST;
1401	USETW(req.wValue, 4);
1402	USETW(req.wIndex, 1);
1403	USETW(req.wLength, 0);
1404
1405	error = ural_do_request(sc, &req, NULL);
1406	if (error != 0) {
1407		device_printf(sc->sc_dev, "could not set test mode: %s\n",
1408		    usbd_errstr(error));
1409	}
1410}
1411
1412static void
1413ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1414{
1415	struct usb_device_request req;
1416	usb_error_t error;
1417
1418	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1419	req.bRequest = RAL_READ_EEPROM;
1420	USETW(req.wValue, 0);
1421	USETW(req.wIndex, addr);
1422	USETW(req.wLength, len);
1423
1424	error = ural_do_request(sc, &req, buf);
1425	if (error != 0) {
1426		device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1427		    usbd_errstr(error));
1428	}
1429}
1430
1431static uint16_t
1432ural_read(struct ural_softc *sc, uint16_t reg)
1433{
1434	struct usb_device_request req;
1435	usb_error_t error;
1436	uint16_t val;
1437
1438	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1439	req.bRequest = RAL_READ_MAC;
1440	USETW(req.wValue, 0);
1441	USETW(req.wIndex, reg);
1442	USETW(req.wLength, sizeof (uint16_t));
1443
1444	error = ural_do_request(sc, &req, &val);
1445	if (error != 0) {
1446		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1447		    usbd_errstr(error));
1448		return 0;
1449	}
1450
1451	return le16toh(val);
1452}
1453
1454static void
1455ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1456{
1457	struct usb_device_request req;
1458	usb_error_t error;
1459
1460	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1461	req.bRequest = RAL_READ_MULTI_MAC;
1462	USETW(req.wValue, 0);
1463	USETW(req.wIndex, reg);
1464	USETW(req.wLength, len);
1465
1466	error = ural_do_request(sc, &req, buf);
1467	if (error != 0) {
1468		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1469		    usbd_errstr(error));
1470	}
1471}
1472
1473static void
1474ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1475{
1476	struct usb_device_request req;
1477	usb_error_t error;
1478
1479	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1480	req.bRequest = RAL_WRITE_MAC;
1481	USETW(req.wValue, val);
1482	USETW(req.wIndex, reg);
1483	USETW(req.wLength, 0);
1484
1485	error = ural_do_request(sc, &req, NULL);
1486	if (error != 0) {
1487		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1488		    usbd_errstr(error));
1489	}
1490}
1491
1492static void
1493ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1494{
1495	struct usb_device_request req;
1496	usb_error_t error;
1497
1498	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1499	req.bRequest = RAL_WRITE_MULTI_MAC;
1500	USETW(req.wValue, 0);
1501	USETW(req.wIndex, reg);
1502	USETW(req.wLength, len);
1503
1504	error = ural_do_request(sc, &req, buf);
1505	if (error != 0) {
1506		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1507		    usbd_errstr(error));
1508	}
1509}
1510
1511static void
1512ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1513{
1514	uint16_t tmp;
1515	int ntries;
1516
1517	for (ntries = 0; ntries < 100; ntries++) {
1518		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1519			break;
1520		if (ural_pause(sc, hz / 100))
1521			break;
1522	}
1523	if (ntries == 100) {
1524		device_printf(sc->sc_dev, "could not write to BBP\n");
1525		return;
1526	}
1527
1528	tmp = reg << 8 | val;
1529	ural_write(sc, RAL_PHY_CSR7, tmp);
1530}
1531
1532static uint8_t
1533ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1534{
1535	uint16_t val;
1536	int ntries;
1537
1538	val = RAL_BBP_WRITE | reg << 8;
1539	ural_write(sc, RAL_PHY_CSR7, val);
1540
1541	for (ntries = 0; ntries < 100; ntries++) {
1542		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1543			break;
1544		if (ural_pause(sc, hz / 100))
1545			break;
1546	}
1547	if (ntries == 100) {
1548		device_printf(sc->sc_dev, "could not read BBP\n");
1549		return 0;
1550	}
1551
1552	return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1553}
1554
1555static void
1556ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1557{
1558	uint32_t tmp;
1559	int ntries;
1560
1561	for (ntries = 0; ntries < 100; ntries++) {
1562		if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1563			break;
1564		if (ural_pause(sc, hz / 100))
1565			break;
1566	}
1567	if (ntries == 100) {
1568		device_printf(sc->sc_dev, "could not write to RF\n");
1569		return;
1570	}
1571
1572	tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1573	ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1574	ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1575
1576	/* remember last written value in sc */
1577	sc->rf_regs[reg] = val;
1578
1579	DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1580}
1581
1582static void
1583ural_scan_start(struct ieee80211com *ic)
1584{
1585	struct ifnet *ifp = ic->ic_ifp;
1586	struct ural_softc *sc = ifp->if_softc;
1587
1588	RAL_LOCK(sc);
1589	ural_write(sc, RAL_TXRX_CSR19, 0);
1590	ural_set_bssid(sc, ifp->if_broadcastaddr);
1591	RAL_UNLOCK(sc);
1592}
1593
1594static void
1595ural_scan_end(struct ieee80211com *ic)
1596{
1597	struct ural_softc *sc = ic->ic_ifp->if_softc;
1598
1599	RAL_LOCK(sc);
1600	ural_enable_tsf_sync(sc);
1601	ural_set_bssid(sc, sc->sc_bssid);
1602	RAL_UNLOCK(sc);
1603
1604}
1605
1606static void
1607ural_set_channel(struct ieee80211com *ic)
1608{
1609	struct ural_softc *sc = ic->ic_ifp->if_softc;
1610
1611	RAL_LOCK(sc);
1612	ural_set_chan(sc, ic->ic_curchan);
1613	RAL_UNLOCK(sc);
1614}
1615
1616static void
1617ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1618{
1619	struct ifnet *ifp = sc->sc_ifp;
1620	struct ieee80211com *ic = ifp->if_l2com;
1621	uint8_t power, tmp;
1622	int i, chan;
1623
1624	chan = ieee80211_chan2ieee(ic, c);
1625	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1626		return;
1627
1628	if (IEEE80211_IS_CHAN_2GHZ(c))
1629		power = min(sc->txpow[chan - 1], 31);
1630	else
1631		power = 31;
1632
1633	/* adjust txpower using ifconfig settings */
1634	power -= (100 - ic->ic_txpowlimit) / 8;
1635
1636	DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1637
1638	switch (sc->rf_rev) {
1639	case RAL_RF_2522:
1640		ural_rf_write(sc, RAL_RF1, 0x00814);
1641		ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1642		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1643		break;
1644
1645	case RAL_RF_2523:
1646		ural_rf_write(sc, RAL_RF1, 0x08804);
1647		ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1648		ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1649		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1650		break;
1651
1652	case RAL_RF_2524:
1653		ural_rf_write(sc, RAL_RF1, 0x0c808);
1654		ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1655		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1656		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1657		break;
1658
1659	case RAL_RF_2525:
1660		ural_rf_write(sc, RAL_RF1, 0x08808);
1661		ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1662		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1663		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1664
1665		ural_rf_write(sc, RAL_RF1, 0x08808);
1666		ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1667		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1668		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1669		break;
1670
1671	case RAL_RF_2525E:
1672		ural_rf_write(sc, RAL_RF1, 0x08808);
1673		ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1674		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1675		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1676		break;
1677
1678	case RAL_RF_2526:
1679		ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1680		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1681		ural_rf_write(sc, RAL_RF1, 0x08804);
1682
1683		ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1684		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1685		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1686		break;
1687
1688	/* dual-band RF */
1689	case RAL_RF_5222:
1690		for (i = 0; ural_rf5222[i].chan != chan; i++);
1691
1692		ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1693		ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1694		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1695		ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1696		break;
1697	}
1698
1699	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1700	    (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1701		/* set Japan filter bit for channel 14 */
1702		tmp = ural_bbp_read(sc, 70);
1703
1704		tmp &= ~RAL_JAPAN_FILTER;
1705		if (chan == 14)
1706			tmp |= RAL_JAPAN_FILTER;
1707
1708		ural_bbp_write(sc, 70, tmp);
1709
1710		/* clear CRC errors */
1711		ural_read(sc, RAL_STA_CSR0);
1712
1713		ural_pause(sc, hz / 100);
1714		ural_disable_rf_tune(sc);
1715	}
1716
1717	/* XXX doesn't belong here */
1718	/* update basic rate set */
1719	ural_set_basicrates(sc, c);
1720
1721	/* give the hardware some time to do the switchover */
1722	ural_pause(sc, hz / 100);
1723}
1724
1725/*
1726 * Disable RF auto-tuning.
1727 */
1728static void
1729ural_disable_rf_tune(struct ural_softc *sc)
1730{
1731	uint32_t tmp;
1732
1733	if (sc->rf_rev != RAL_RF_2523) {
1734		tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1735		ural_rf_write(sc, RAL_RF1, tmp);
1736	}
1737
1738	tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1739	ural_rf_write(sc, RAL_RF3, tmp);
1740
1741	DPRINTFN(2, "disabling RF autotune\n");
1742}
1743
1744/*
1745 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1746 * synchronization.
1747 */
1748static void
1749ural_enable_tsf_sync(struct ural_softc *sc)
1750{
1751	struct ifnet *ifp = sc->sc_ifp;
1752	struct ieee80211com *ic = ifp->if_l2com;
1753	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1754	uint16_t logcwmin, preload, tmp;
1755
1756	/* first, disable TSF synchronization */
1757	ural_write(sc, RAL_TXRX_CSR19, 0);
1758
1759	tmp = (16 * vap->iv_bss->ni_intval) << 4;
1760	ural_write(sc, RAL_TXRX_CSR18, tmp);
1761
1762	logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1763	preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1764	tmp = logcwmin << 12 | preload;
1765	ural_write(sc, RAL_TXRX_CSR20, tmp);
1766
1767	/* finally, enable TSF synchronization */
1768	tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1769	if (ic->ic_opmode == IEEE80211_M_STA)
1770		tmp |= RAL_ENABLE_TSF_SYNC(1);
1771	else
1772		tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1773	ural_write(sc, RAL_TXRX_CSR19, tmp);
1774
1775	DPRINTF("enabling TSF synchronization\n");
1776}
1777
1778static void
1779ural_enable_tsf(struct ural_softc *sc)
1780{
1781	/* first, disable TSF synchronization */
1782	ural_write(sc, RAL_TXRX_CSR19, 0);
1783	ural_write(sc, RAL_TXRX_CSR19, RAL_ENABLE_TSF | RAL_ENABLE_TSF_SYNC(2));
1784}
1785
1786#define RAL_RXTX_TURNAROUND	5	/* us */
1787static void
1788ural_update_slot(struct ifnet *ifp)
1789{
1790	struct ural_softc *sc = ifp->if_softc;
1791	struct ieee80211com *ic = ifp->if_l2com;
1792	uint16_t slottime, sifs, eifs;
1793
1794	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1795
1796	/*
1797	 * These settings may sound a bit inconsistent but this is what the
1798	 * reference driver does.
1799	 */
1800	if (ic->ic_curmode == IEEE80211_MODE_11B) {
1801		sifs = 16 - RAL_RXTX_TURNAROUND;
1802		eifs = 364;
1803	} else {
1804		sifs = 10 - RAL_RXTX_TURNAROUND;
1805		eifs = 64;
1806	}
1807
1808	ural_write(sc, RAL_MAC_CSR10, slottime);
1809	ural_write(sc, RAL_MAC_CSR11, sifs);
1810	ural_write(sc, RAL_MAC_CSR12, eifs);
1811}
1812
1813static void
1814ural_set_txpreamble(struct ural_softc *sc)
1815{
1816	struct ifnet *ifp = sc->sc_ifp;
1817	struct ieee80211com *ic = ifp->if_l2com;
1818	uint16_t tmp;
1819
1820	tmp = ural_read(sc, RAL_TXRX_CSR10);
1821
1822	tmp &= ~RAL_SHORT_PREAMBLE;
1823	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1824		tmp |= RAL_SHORT_PREAMBLE;
1825
1826	ural_write(sc, RAL_TXRX_CSR10, tmp);
1827}
1828
1829static void
1830ural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1831{
1832	/* XXX wrong, take from rate set */
1833	/* update basic rate set */
1834	if (IEEE80211_IS_CHAN_5GHZ(c)) {
1835		/* 11a basic rates: 6, 12, 24Mbps */
1836		ural_write(sc, RAL_TXRX_CSR11, 0x150);
1837	} else if (IEEE80211_IS_CHAN_ANYG(c)) {
1838		/* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1839		ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1840	} else {
1841		/* 11b basic rates: 1, 2Mbps */
1842		ural_write(sc, RAL_TXRX_CSR11, 0x3);
1843	}
1844}
1845
1846static void
1847ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1848{
1849	uint16_t tmp;
1850
1851	tmp = bssid[0] | bssid[1] << 8;
1852	ural_write(sc, RAL_MAC_CSR5, tmp);
1853
1854	tmp = bssid[2] | bssid[3] << 8;
1855	ural_write(sc, RAL_MAC_CSR6, tmp);
1856
1857	tmp = bssid[4] | bssid[5] << 8;
1858	ural_write(sc, RAL_MAC_CSR7, tmp);
1859
1860	DPRINTF("setting BSSID to %6D\n", bssid, ":");
1861}
1862
1863static void
1864ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1865{
1866	uint16_t tmp;
1867
1868	tmp = addr[0] | addr[1] << 8;
1869	ural_write(sc, RAL_MAC_CSR2, tmp);
1870
1871	tmp = addr[2] | addr[3] << 8;
1872	ural_write(sc, RAL_MAC_CSR3, tmp);
1873
1874	tmp = addr[4] | addr[5] << 8;
1875	ural_write(sc, RAL_MAC_CSR4, tmp);
1876
1877	DPRINTF("setting MAC address to %6D\n", addr, ":");
1878}
1879
1880static void
1881ural_setpromisc(struct ural_softc *sc)
1882{
1883	struct ifnet *ifp = sc->sc_ifp;
1884	uint32_t tmp;
1885
1886	tmp = ural_read(sc, RAL_TXRX_CSR2);
1887
1888	tmp &= ~RAL_DROP_NOT_TO_ME;
1889	if (!(ifp->if_flags & IFF_PROMISC))
1890		tmp |= RAL_DROP_NOT_TO_ME;
1891
1892	ural_write(sc, RAL_TXRX_CSR2, tmp);
1893
1894	DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1895	    "entering" : "leaving");
1896}
1897
1898static void
1899ural_update_promisc(struct ifnet *ifp)
1900{
1901	struct ural_softc *sc = ifp->if_softc;
1902
1903	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1904		return;
1905
1906	RAL_LOCK(sc);
1907	ural_setpromisc(sc);
1908	RAL_UNLOCK(sc);
1909}
1910
1911static const char *
1912ural_get_rf(int rev)
1913{
1914	switch (rev) {
1915	case RAL_RF_2522:	return "RT2522";
1916	case RAL_RF_2523:	return "RT2523";
1917	case RAL_RF_2524:	return "RT2524";
1918	case RAL_RF_2525:	return "RT2525";
1919	case RAL_RF_2525E:	return "RT2525e";
1920	case RAL_RF_2526:	return "RT2526";
1921	case RAL_RF_5222:	return "RT5222";
1922	default:		return "unknown";
1923	}
1924}
1925
1926static void
1927ural_read_eeprom(struct ural_softc *sc)
1928{
1929	uint16_t val;
1930
1931	ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1932	val = le16toh(val);
1933	sc->rf_rev =   (val >> 11) & 0x7;
1934	sc->hw_radio = (val >> 10) & 0x1;
1935	sc->led_mode = (val >> 6)  & 0x7;
1936	sc->rx_ant =   (val >> 4)  & 0x3;
1937	sc->tx_ant =   (val >> 2)  & 0x3;
1938	sc->nb_ant =   val & 0x3;
1939
1940	/* read MAC address */
1941	ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1942
1943	/* read default values for BBP registers */
1944	ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1945
1946	/* read Tx power for all b/g channels */
1947	ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1948}
1949
1950static int
1951ural_bbp_init(struct ural_softc *sc)
1952{
1953#define N(a)	(sizeof (a) / sizeof ((a)[0]))
1954	int i, ntries;
1955
1956	/* wait for BBP to be ready */
1957	for (ntries = 0; ntries < 100; ntries++) {
1958		if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1959			break;
1960		if (ural_pause(sc, hz / 100))
1961			break;
1962	}
1963	if (ntries == 100) {
1964		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1965		return EIO;
1966	}
1967
1968	/* initialize BBP registers to default values */
1969	for (i = 0; i < N(ural_def_bbp); i++)
1970		ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1971
1972#if 0
1973	/* initialize BBP registers to values stored in EEPROM */
1974	for (i = 0; i < 16; i++) {
1975		if (sc->bbp_prom[i].reg == 0xff)
1976			continue;
1977		ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1978	}
1979#endif
1980
1981	return 0;
1982#undef N
1983}
1984
1985static void
1986ural_set_txantenna(struct ural_softc *sc, int antenna)
1987{
1988	uint16_t tmp;
1989	uint8_t tx;
1990
1991	tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
1992	if (antenna == 1)
1993		tx |= RAL_BBP_ANTA;
1994	else if (antenna == 2)
1995		tx |= RAL_BBP_ANTB;
1996	else
1997		tx |= RAL_BBP_DIVERSITY;
1998
1999	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2000	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2001	    sc->rf_rev == RAL_RF_5222)
2002		tx |= RAL_BBP_FLIPIQ;
2003
2004	ural_bbp_write(sc, RAL_BBP_TX, tx);
2005
2006	/* update values in PHY_CSR5 and PHY_CSR6 */
2007	tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2008	ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2009
2010	tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2011	ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2012}
2013
2014static void
2015ural_set_rxantenna(struct ural_softc *sc, int antenna)
2016{
2017	uint8_t rx;
2018
2019	rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2020	if (antenna == 1)
2021		rx |= RAL_BBP_ANTA;
2022	else if (antenna == 2)
2023		rx |= RAL_BBP_ANTB;
2024	else
2025		rx |= RAL_BBP_DIVERSITY;
2026
2027	/* need to force no I/Q flip for RF 2525e and 2526 */
2028	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2029		rx &= ~RAL_BBP_FLIPIQ;
2030
2031	ural_bbp_write(sc, RAL_BBP_RX, rx);
2032}
2033
2034static void
2035ural_init_locked(struct ural_softc *sc)
2036{
2037#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2038	struct ifnet *ifp = sc->sc_ifp;
2039	struct ieee80211com *ic = ifp->if_l2com;
2040	uint16_t tmp;
2041	int i, ntries;
2042
2043	RAL_LOCK_ASSERT(sc, MA_OWNED);
2044
2045	ural_set_testmode(sc);
2046	ural_write(sc, 0x308, 0x00f0);	/* XXX magic */
2047
2048	ural_stop(sc);
2049
2050	/* initialize MAC registers to default values */
2051	for (i = 0; i < N(ural_def_mac); i++)
2052		ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2053
2054	/* wait for BBP and RF to wake up (this can take a long time!) */
2055	for (ntries = 0; ntries < 100; ntries++) {
2056		tmp = ural_read(sc, RAL_MAC_CSR17);
2057		if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2058		    (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2059			break;
2060		if (ural_pause(sc, hz / 100))
2061			break;
2062	}
2063	if (ntries == 100) {
2064		device_printf(sc->sc_dev,
2065		    "timeout waiting for BBP/RF to wakeup\n");
2066		goto fail;
2067	}
2068
2069	/* we're ready! */
2070	ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2071
2072	/* set basic rate set (will be updated later) */
2073	ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2074
2075	if (ural_bbp_init(sc) != 0)
2076		goto fail;
2077
2078	ural_set_chan(sc, ic->ic_curchan);
2079
2080	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2081	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2082
2083	ural_set_txantenna(sc, sc->tx_ant);
2084	ural_set_rxantenna(sc, sc->rx_ant);
2085
2086	ural_set_macaddr(sc, IF_LLADDR(ifp));
2087
2088	/*
2089	 * Allocate Tx and Rx xfer queues.
2090	 */
2091	ural_setup_tx_list(sc);
2092
2093	/* kick Rx */
2094	tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2095	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2096		tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2097		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2098			tmp |= RAL_DROP_TODS;
2099		if (!(ifp->if_flags & IFF_PROMISC))
2100			tmp |= RAL_DROP_NOT_TO_ME;
2101	}
2102	ural_write(sc, RAL_TXRX_CSR2, tmp);
2103
2104	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2105	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2106	usbd_xfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2107	usbd_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2108	return;
2109
2110fail:	ural_stop(sc);
2111#undef N
2112}
2113
2114static void
2115ural_init(void *priv)
2116{
2117	struct ural_softc *sc = priv;
2118	struct ifnet *ifp = sc->sc_ifp;
2119	struct ieee80211com *ic = ifp->if_l2com;
2120
2121	RAL_LOCK(sc);
2122	ural_init_locked(sc);
2123	RAL_UNLOCK(sc);
2124
2125	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2126		ieee80211_start_all(ic);		/* start all vap's */
2127}
2128
2129static void
2130ural_stop(struct ural_softc *sc)
2131{
2132	struct ifnet *ifp = sc->sc_ifp;
2133
2134	RAL_LOCK_ASSERT(sc, MA_OWNED);
2135
2136	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2137
2138	/*
2139	 * Drain all the transfers, if not already drained:
2140	 */
2141	RAL_UNLOCK(sc);
2142	usbd_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2143	usbd_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2144	RAL_LOCK(sc);
2145
2146	ural_unsetup_tx_list(sc);
2147
2148	/* disable Rx */
2149	ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2150	/* reset ASIC and BBP (but won't reset MAC registers!) */
2151	ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2152	/* wait a little */
2153	ural_pause(sc, hz / 10);
2154	ural_write(sc, RAL_MAC_CSR1, 0);
2155	/* wait a little */
2156	ural_pause(sc, hz / 10);
2157}
2158
2159static int
2160ural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2161	const struct ieee80211_bpf_params *params)
2162{
2163	struct ieee80211com *ic = ni->ni_ic;
2164	struct ifnet *ifp = ic->ic_ifp;
2165	struct ural_softc *sc = ifp->if_softc;
2166
2167	RAL_LOCK(sc);
2168	/* prevent management frames from being sent if we're not ready */
2169	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2170		RAL_UNLOCK(sc);
2171		m_freem(m);
2172		ieee80211_free_node(ni);
2173		return ENETDOWN;
2174	}
2175	if (sc->tx_nfree < RAL_TX_MINFREE) {
2176		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2177		RAL_UNLOCK(sc);
2178		m_freem(m);
2179		ieee80211_free_node(ni);
2180		return EIO;
2181	}
2182
2183	ifp->if_opackets++;
2184
2185	if (params == NULL) {
2186		/*
2187		 * Legacy path; interpret frame contents to decide
2188		 * precisely how to send the frame.
2189		 */
2190		if (ural_tx_mgt(sc, m, ni) != 0)
2191			goto bad;
2192	} else {
2193		/*
2194		 * Caller supplied explicit parameters to use in
2195		 * sending the frame.
2196		 */
2197		if (ural_tx_raw(sc, m, ni, params) != 0)
2198			goto bad;
2199	}
2200	RAL_UNLOCK(sc);
2201	return 0;
2202bad:
2203	ifp->if_oerrors++;
2204	RAL_UNLOCK(sc);
2205	ieee80211_free_node(ni);
2206	return EIO;		/* XXX */
2207}
2208
2209static void
2210ural_ratectl_start(struct ural_softc *sc, struct ieee80211_node *ni)
2211{
2212	struct ieee80211vap *vap = ni->ni_vap;
2213	struct ural_vap *uvp = URAL_VAP(vap);
2214
2215	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2216	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2217
2218	usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2219}
2220
2221static void
2222ural_ratectl_timeout(void *arg)
2223{
2224	struct ural_vap *uvp = arg;
2225	struct ieee80211vap *vap = &uvp->vap;
2226	struct ieee80211com *ic = vap->iv_ic;
2227
2228	ieee80211_runtask(ic, &uvp->ratectl_task);
2229}
2230
2231static void
2232ural_ratectl_task(void *arg, int pending)
2233{
2234	struct ural_vap *uvp = arg;
2235	struct ieee80211vap *vap = &uvp->vap;
2236	struct ieee80211com *ic = vap->iv_ic;
2237	struct ifnet *ifp = ic->ic_ifp;
2238	struct ural_softc *sc = ifp->if_softc;
2239	struct ieee80211_node *ni;
2240	int ok, fail;
2241	int sum, retrycnt;
2242
2243	ni = ieee80211_ref_node(vap->iv_bss);
2244	RAL_LOCK(sc);
2245	/* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2246	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2247
2248	ok = sc->sta[7] +		/* TX ok w/o retry */
2249	     sc->sta[8];		/* TX ok w/ retry */
2250	fail = sc->sta[9];		/* TX retry-fail count */
2251	sum = ok+fail;
2252	retrycnt = sc->sta[8] + fail;
2253
2254	ieee80211_ratectl_tx_update(vap, ni, &sum, &ok, &retrycnt);
2255	(void) ieee80211_ratectl_rate(ni, NULL, 0);
2256
2257	ifp->if_oerrors += fail;	/* count TX retry-fail as Tx errors */
2258
2259	usb_callout_reset(&uvp->ratectl_ch, hz, ural_ratectl_timeout, uvp);
2260	RAL_UNLOCK(sc);
2261	ieee80211_free_node(ni);
2262}
2263
2264static int
2265ural_pause(struct ural_softc *sc, int timeout)
2266{
2267
2268	usb_pause_mtx(&sc->sc_mtx, timeout);
2269	return (0);
2270}
2271