if_ural.c revision 191746
11844Swollman/*	$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 191746 2009-05-02 15:14:18Z thompsa $	*/
250476Speter
323549Swosch/*-
423549Swosch * Copyright (c) 2005, 2006
5139761Skrion *	Damien Bergamini <damien.bergamini@free.fr>
623549Swosch *
723549Swosch * Copyright (c) 2006, 2008
823549Swosch *	Hans Petter Selasky <hselasky@FreeBSD.org>
923549Swosch *
1023549Swosch * Permission to use, copy, modify, and distribute this software for any
1123549Swosch * purpose with or without fee is hereby granted, provided that the above
1223549Swosch * copyright notice and this permission notice appear in all copies.
1323549Swosch *
1423549Swosch * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
1595327Sobrien * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
1623549Swosch * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
1723549Swosch * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
1823549Swosch * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
1923549Swosch * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
2023549Swosch * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
2123549Swosch */
2223549Swosch
2323549Swosch#include <sys/cdefs.h>
2423549Swosch__FBSDID("$FreeBSD: head/sys/dev/usb/wlan/if_ural.c 191746 2009-05-02 15:14:18Z thompsa $");
2523549Swosch
2623549Swosch/*-
27200178Sed * Ralink Technology RT2500USB chipset driver
28200178Sed * http://www.ralinktech.com/
29200178Sed */
3023549Swosch
311638Srgrimes#include <sys/param.h>
32242711Ssjg#include <sys/sockio.h>
33242711Ssjg#include <sys/sysctl.h>
34242711Ssjg#include <sys/lock.h>
3594940Sru#include <sys/mutex.h>
3623549Swosch#include <sys/mbuf.h>
3799875Sru#include <sys/kernel.h>
3899875Sru#include <sys/socket.h>
39251749Ssjg#include <sys/systm.h>
4099875Sru#include <sys/malloc.h>
41133369Sharti#include <sys/module.h>
4299875Sru#include <sys/bus.h>
4399875Sru#include <sys/endian.h>
4499875Sru#include <sys/kdb.h>
4599875Sru
46251749Ssjg#include <machine/bus.h>
4799875Sru#include <machine/resource.h>
48265934Sian#include <sys/rman.h>
4995306Sru
50270187Sian#include <net/bpf.h>
5190311Sru#include <net/if.h>
5290311Sru#include <net/if_arp.h>
5390311Sru#include <net/ethernet.h>
54270187Sian#include <net/if_dl.h>
5590311Sru#include <net/if_media.h>
5690311Sru#include <net/if_types.h>
5790311Sru
58270187Sian#ifdef INET
5995306Sru#include <netinet/in.h>
601638Srgrimes#include <netinet/in_systm.h>
6195306Sru#include <netinet/in_var.h>
621638Srgrimes#include <netinet/if_ether.h>
63265934Sian#include <netinet/ip.h>
64133369Sharti#endif
6553152Smarcel
661638Srgrimes#include <net80211/ieee80211_var.h>
671638Srgrimes#include <net80211/ieee80211_regdomain.h>
681638Srgrimes#include <net80211/ieee80211_radiotap.h>
69146817Sru#include <net80211/ieee80211_amrr.h>
701638Srgrimes
71265934Sian#define	USB_DEBUG_VAR ural_debug
72265934Sian
7395509Sru#include <dev/usb/usb.h>
74200178Sed#include <dev/usb/usb_error.h>
75200178Sed#include <dev/usb/usb_core.h>
76264303Sdim#include <dev/usb/usb_lookup.h>
77265934Sian#include <dev/usb/usb_debug.h>
78264303Sdim#include <dev/usb/usb_request.h>
79265934Sian#include <dev/usb/usb_busdma.h>
80265934Sian#include <dev/usb/usb_util.h>
81265934Sian#include "usbdevs.h"
82265934Sian
83270187Sian
84270187Sian#include <dev/usb/wlan/if_uralreg.h>
85270187Sian#include <dev/usb/wlan/if_uralvar.h>
86270187Sian
87291777Sbdrewery#if USB_DEBUG
88270187Sianstatic int ural_debug = 0;
89264303Sdim
90264303SdimSYSCTL_NODE(_hw_usb2, OID_AUTO, ural, CTLFLAG_RW, 0, "USB ural");
91264303SdimSYSCTL_INT(_hw_usb2_ural, OID_AUTO, debug, CTLFLAG_RW, &ural_debug, 0,
92264303Sdim    "Debug level");
93264303Sdim#endif
94264303Sdim
95264303Sdim#define URAL_RSSI(rssi)					\
96264303Sdim	((rssi) > (RAL_NOISE_FLOOR + RAL_RSSI_CORR) ?	\
97264303Sdim	 ((rssi) - (RAL_NOISE_FLOOR + RAL_RSSI_CORR)) : 0)
98264303Sdim
99264303Sdim/* various supported device vendors/products */
100264303Sdimstatic const struct usb2_device_id ural_devs[] = {
101265934Sian	{ USB_VP(USB_VENDOR_ASUS, USB_PRODUCT_ASUS_WL167G) },
102270187Sian	{ USB_VP(USB_VENDOR_ASUS, USB_PRODUCT_RALINK_RT2570) },
103264303Sdim	{ USB_VP(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050) },
104265934Sian	{ USB_VP(USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7051) },
105264303Sdim	{ USB_VP(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS) },
106270187Sian	{ USB_VP(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G) },
107270187Sian	{ USB_VP(USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP) },
108264303Sdim	{ USB_VP(USB_VENDOR_CONCEPTRONIC2, USB_PRODUCT_CONCEPTRONIC2_C54RU) },
10915061Swosch	{ USB_VP(USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122) },
1101638Srgrimes	{ USB_VP(USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GN54G) },
11197769Sru	{ USB_VP(USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG) },
11296668Sru	{ USB_VP(USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254) },
11396668Sru	{ USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54) },
11496668Sru	{ USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI) },
115270187Sian	{ USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB) },
116270187Sian	{ USB_VP(USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI) },
11796668Sru	{ USB_VP(USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570) },
11896668Sru	{ USB_VP(USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_2) },
119270187Sian	{ USB_VP(USB_VENDOR_MSI, USB_PRODUCT_MSI_RT2570_3) },
120251749Ssjg	{ USB_VP(USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902) },
121241298Smarcel	{ USB_VP(USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570) },
122270187Sian	{ USB_VP(USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2) },
12396668Sru	{ USB_VP(USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3) },
12496668Sru	{ USB_VP(USB_VENDOR_SIEMENS2, USB_PRODUCT_SIEMENS2_WL54G) },
1251638Srgrimes	{ USB_VP(USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG) },
1261638Srgrimes	{ USB_VP(USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R) },
1271638Srgrimes	{ USB_VP(USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_RT2570) },
1281638Srgrimes	{ USB_VP(USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570) },
1291638Srgrimes	{ USB_VP(USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_RT2570) },
1301638Srgrimes};
1311638Srgrimes
13299215Srustatic usb2_callback_t ural_bulk_read_callback;
13399215Srustatic usb2_callback_t ural_bulk_write_callback;
1341638Srgrimes
135242711Ssjgstatic usb2_error_t	ural_do_request(struct ural_softc *sc,
136242711Ssjg			    struct usb2_device_request *req, void *data);
137static struct ieee80211vap *ural_vap_create(struct ieee80211com *,
138			    const char name[IFNAMSIZ], int unit, int opmode,
139			    int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
140			    const uint8_t mac[IEEE80211_ADDR_LEN]);
141static void		ural_vap_delete(struct ieee80211vap *);
142static void		ural_tx_free(struct ural_tx_data *, int);
143static void		ural_setup_tx_list(struct ural_softc *);
144static void		ural_unsetup_tx_list(struct ural_softc *);
145static int		ural_newstate(struct ieee80211vap *,
146			    enum ieee80211_state, int);
147static void		ural_setup_tx_desc(struct ural_softc *,
148			    struct ural_tx_desc *, uint32_t, int, int);
149static int		ural_tx_bcn(struct ural_softc *, struct mbuf *,
150			    struct ieee80211_node *);
151static int		ural_tx_mgt(struct ural_softc *, struct mbuf *,
152			    struct ieee80211_node *);
153static int		ural_tx_data(struct ural_softc *, struct mbuf *,
154			    struct ieee80211_node *);
155static void		ural_start(struct ifnet *);
156static int		ural_ioctl(struct ifnet *, u_long, caddr_t);
157static void		ural_set_testmode(struct ural_softc *);
158static void		ural_eeprom_read(struct ural_softc *, uint16_t, void *,
159			    int);
160static uint16_t		ural_read(struct ural_softc *, uint16_t);
161static void		ural_read_multi(struct ural_softc *, uint16_t, void *,
162			    int);
163static void		ural_write(struct ural_softc *, uint16_t, uint16_t);
164static void		ural_write_multi(struct ural_softc *, uint16_t, void *,
165			    int) __unused;
166static void		ural_bbp_write(struct ural_softc *, uint8_t, uint8_t);
167static uint8_t		ural_bbp_read(struct ural_softc *, uint8_t);
168static void		ural_rf_write(struct ural_softc *, uint8_t, uint32_t);
169static struct ieee80211_node *ural_node_alloc(struct ieee80211vap *,
170			    const uint8_t mac[IEEE80211_ADDR_LEN]);
171static void		ural_newassoc(struct ieee80211_node *, int);
172static void		ural_scan_start(struct ieee80211com *);
173static void		ural_scan_end(struct ieee80211com *);
174static void		ural_set_channel(struct ieee80211com *);
175static void		ural_set_chan(struct ural_softc *,
176			    struct ieee80211_channel *);
177static void		ural_disable_rf_tune(struct ural_softc *);
178static void		ural_enable_tsf_sync(struct ural_softc *);
179static void		ural_update_slot(struct ifnet *);
180static void		ural_set_txpreamble(struct ural_softc *);
181static void		ural_set_basicrates(struct ural_softc *,
182			    const struct ieee80211_channel *);
183static void		ural_set_bssid(struct ural_softc *, const uint8_t *);
184static void		ural_set_macaddr(struct ural_softc *, uint8_t *);
185static void		ural_update_promisc(struct ifnet *);
186static void		ural_setpromisc(struct ural_softc *);
187static const char	*ural_get_rf(int);
188static void		ural_read_eeprom(struct ural_softc *);
189static int		ural_bbp_init(struct ural_softc *);
190static void		ural_set_txantenna(struct ural_softc *, int);
191static void		ural_set_rxantenna(struct ural_softc *, int);
192static void		ural_init_locked(struct ural_softc *);
193static void		ural_init(void *);
194static void		ural_stop(struct ural_softc *);
195static int		ural_raw_xmit(struct ieee80211_node *, struct mbuf *,
196			    const struct ieee80211_bpf_params *);
197static void		ural_amrr_start(struct ural_softc *,
198			    struct ieee80211_node *);
199static void		ural_amrr_timeout(void *);
200static void		ural_amrr_task(void *, int);
201static int		ural_pause(struct ural_softc *sc, int timeout);
202
203/*
204 * Default values for MAC registers; values taken from the reference driver.
205 */
206static const struct {
207	uint16_t	reg;
208	uint16_t	val;
209} ural_def_mac[] = {
210	{ RAL_TXRX_CSR5,  0x8c8d },
211	{ RAL_TXRX_CSR6,  0x8b8a },
212	{ RAL_TXRX_CSR7,  0x8687 },
213	{ RAL_TXRX_CSR8,  0x0085 },
214	{ RAL_MAC_CSR13,  0x1111 },
215	{ RAL_MAC_CSR14,  0x1e11 },
216	{ RAL_TXRX_CSR21, 0xe78f },
217	{ RAL_MAC_CSR9,   0xff1d },
218	{ RAL_MAC_CSR11,  0x0002 },
219	{ RAL_MAC_CSR22,  0x0053 },
220	{ RAL_MAC_CSR15,  0x0000 },
221	{ RAL_MAC_CSR8,   RAL_FRAME_SIZE },
222	{ RAL_TXRX_CSR19, 0x0000 },
223	{ RAL_TXRX_CSR18, 0x005a },
224	{ RAL_PHY_CSR2,   0x0000 },
225	{ RAL_TXRX_CSR0,  0x1ec0 },
226	{ RAL_PHY_CSR4,   0x000f }
227};
228
229/*
230 * Default values for BBP registers; values taken from the reference driver.
231 */
232static const struct {
233	uint8_t	reg;
234	uint8_t	val;
235} ural_def_bbp[] = {
236	{  3, 0x02 },
237	{  4, 0x19 },
238	{ 14, 0x1c },
239	{ 15, 0x30 },
240	{ 16, 0xac },
241	{ 17, 0x48 },
242	{ 18, 0x18 },
243	{ 19, 0xff },
244	{ 20, 0x1e },
245	{ 21, 0x08 },
246	{ 22, 0x08 },
247	{ 23, 0x08 },
248	{ 24, 0x80 },
249	{ 25, 0x50 },
250	{ 26, 0x08 },
251	{ 27, 0x23 },
252	{ 30, 0x10 },
253	{ 31, 0x2b },
254	{ 32, 0xb9 },
255	{ 34, 0x12 },
256	{ 35, 0x50 },
257	{ 39, 0xc4 },
258	{ 40, 0x02 },
259	{ 41, 0x60 },
260	{ 53, 0x10 },
261	{ 54, 0x18 },
262	{ 56, 0x08 },
263	{ 57, 0x10 },
264	{ 58, 0x08 },
265	{ 61, 0x60 },
266	{ 62, 0x10 },
267	{ 75, 0xff }
268};
269
270/*
271 * Default values for RF register R2 indexed by channel numbers.
272 */
273static const uint32_t ural_rf2522_r2[] = {
274	0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
275	0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
276};
277
278static const uint32_t ural_rf2523_r2[] = {
279	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
280	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
281};
282
283static const uint32_t ural_rf2524_r2[] = {
284	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
285	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
286};
287
288static const uint32_t ural_rf2525_r2[] = {
289	0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
290	0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
291};
292
293static const uint32_t ural_rf2525_hi_r2[] = {
294	0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
295	0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
296};
297
298static const uint32_t ural_rf2525e_r2[] = {
299	0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
300	0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
301};
302
303static const uint32_t ural_rf2526_hi_r2[] = {
304	0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
305	0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
306};
307
308static const uint32_t ural_rf2526_r2[] = {
309	0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
310	0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
311};
312
313/*
314 * For dual-band RF, RF registers R1 and R4 also depend on channel number;
315 * values taken from the reference driver.
316 */
317static const struct {
318	uint8_t		chan;
319	uint32_t	r1;
320	uint32_t	r2;
321	uint32_t	r4;
322} ural_rf5222[] = {
323	{   1, 0x08808, 0x0044d, 0x00282 },
324	{   2, 0x08808, 0x0044e, 0x00282 },
325	{   3, 0x08808, 0x0044f, 0x00282 },
326	{   4, 0x08808, 0x00460, 0x00282 },
327	{   5, 0x08808, 0x00461, 0x00282 },
328	{   6, 0x08808, 0x00462, 0x00282 },
329	{   7, 0x08808, 0x00463, 0x00282 },
330	{   8, 0x08808, 0x00464, 0x00282 },
331	{   9, 0x08808, 0x00465, 0x00282 },
332	{  10, 0x08808, 0x00466, 0x00282 },
333	{  11, 0x08808, 0x00467, 0x00282 },
334	{  12, 0x08808, 0x00468, 0x00282 },
335	{  13, 0x08808, 0x00469, 0x00282 },
336	{  14, 0x08808, 0x0046b, 0x00286 },
337
338	{  36, 0x08804, 0x06225, 0x00287 },
339	{  40, 0x08804, 0x06226, 0x00287 },
340	{  44, 0x08804, 0x06227, 0x00287 },
341	{  48, 0x08804, 0x06228, 0x00287 },
342	{  52, 0x08804, 0x06229, 0x00287 },
343	{  56, 0x08804, 0x0622a, 0x00287 },
344	{  60, 0x08804, 0x0622b, 0x00287 },
345	{  64, 0x08804, 0x0622c, 0x00287 },
346
347	{ 100, 0x08804, 0x02200, 0x00283 },
348	{ 104, 0x08804, 0x02201, 0x00283 },
349	{ 108, 0x08804, 0x02202, 0x00283 },
350	{ 112, 0x08804, 0x02203, 0x00283 },
351	{ 116, 0x08804, 0x02204, 0x00283 },
352	{ 120, 0x08804, 0x02205, 0x00283 },
353	{ 124, 0x08804, 0x02206, 0x00283 },
354	{ 128, 0x08804, 0x02207, 0x00283 },
355	{ 132, 0x08804, 0x02208, 0x00283 },
356	{ 136, 0x08804, 0x02209, 0x00283 },
357	{ 140, 0x08804, 0x0220a, 0x00283 },
358
359	{ 149, 0x08808, 0x02429, 0x00281 },
360	{ 153, 0x08808, 0x0242b, 0x00281 },
361	{ 157, 0x08808, 0x0242d, 0x00281 },
362	{ 161, 0x08808, 0x0242f, 0x00281 }
363};
364
365static const struct usb2_config ural_config[URAL_N_TRANSFER] = {
366	[URAL_BULK_WR] = {
367		.type = UE_BULK,
368		.endpoint = UE_ADDR_ANY,
369		.direction = UE_DIR_OUT,
370		.bufsize = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE + 4),
371		.flags = {.pipe_bof = 1,.force_short_xfer = 1,},
372		.callback = ural_bulk_write_callback,
373		.timeout = 5000,	/* ms */
374	},
375	[URAL_BULK_RD] = {
376		.type = UE_BULK,
377		.endpoint = UE_ADDR_ANY,
378		.direction = UE_DIR_IN,
379		.bufsize = (RAL_FRAME_SIZE + RAL_RX_DESC_SIZE),
380		.flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
381		.callback = ural_bulk_read_callback,
382	},
383};
384
385static device_probe_t ural_match;
386static device_attach_t ural_attach;
387static device_detach_t ural_detach;
388
389static device_method_t ural_methods[] = {
390	/* Device interface */
391	DEVMETHOD(device_probe,		ural_match),
392	DEVMETHOD(device_attach,	ural_attach),
393	DEVMETHOD(device_detach,	ural_detach),
394
395	{ 0, 0 }
396};
397
398static driver_t ural_driver = {
399	.name = "ural",
400	.methods = ural_methods,
401	.size = sizeof(struct ural_softc),
402};
403
404static devclass_t ural_devclass;
405
406DRIVER_MODULE(ural, uhub, ural_driver, ural_devclass, NULL, 0);
407MODULE_DEPEND(ural, usb, 1, 1, 1);
408MODULE_DEPEND(ural, wlan, 1, 1, 1);
409MODULE_DEPEND(ural, wlan_amrr, 1, 1, 1);
410
411static int
412ural_match(device_t self)
413{
414	struct usb2_attach_arg *uaa = device_get_ivars(self);
415
416	if (uaa->usb2_mode != USB_MODE_HOST)
417		return (ENXIO);
418	if (uaa->info.bConfigIndex != 0)
419		return (ENXIO);
420	if (uaa->info.bIfaceIndex != RAL_IFACE_INDEX)
421		return (ENXIO);
422
423	return (usb2_lookup_id_by_uaa(ural_devs, sizeof(ural_devs), uaa));
424}
425
426static int
427ural_attach(device_t self)
428{
429	struct usb2_attach_arg *uaa = device_get_ivars(self);
430	struct ural_softc *sc = device_get_softc(self);
431	struct ifnet *ifp;
432	struct ieee80211com *ic;
433	uint8_t iface_index, bands;
434	int error;
435
436	device_set_usb2_desc(self);
437	sc->sc_udev = uaa->device;
438	sc->sc_dev = self;
439
440	mtx_init(&sc->sc_mtx, device_get_nameunit(self),
441	    MTX_NETWORK_LOCK, MTX_DEF);
442
443	iface_index = RAL_IFACE_INDEX;
444	error = usb2_transfer_setup(uaa->device,
445	    &iface_index, sc->sc_xfer, ural_config,
446	    URAL_N_TRANSFER, sc, &sc->sc_mtx);
447	if (error) {
448		device_printf(self, "could not allocate USB transfers, "
449		    "err=%s\n", usb2_errstr(error));
450		goto detach;
451	}
452
453	RAL_LOCK(sc);
454	/* retrieve RT2570 rev. no */
455	sc->asic_rev = ural_read(sc, RAL_MAC_CSR0);
456
457	/* retrieve MAC address and various other things from EEPROM */
458	ural_read_eeprom(sc);
459	RAL_UNLOCK(sc);
460
461	device_printf(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n",
462	    sc->asic_rev, ural_get_rf(sc->rf_rev));
463
464	ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
465	if (ifp == NULL) {
466		device_printf(sc->sc_dev, "can not if_alloc()\n");
467		goto detach;
468	}
469	ic = ifp->if_l2com;
470
471	ifp->if_softc = sc;
472	if_initname(ifp, "ural", device_get_unit(sc->sc_dev));
473	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
474	ifp->if_init = ural_init;
475	ifp->if_ioctl = ural_ioctl;
476	ifp->if_start = ural_start;
477	IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN);
478	ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN;
479	IFQ_SET_READY(&ifp->if_snd);
480
481	ic->ic_ifp = ifp;
482	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
483
484	/* set device capabilities */
485	ic->ic_caps =
486	      IEEE80211_C_STA		/* station mode supported */
487	    | IEEE80211_C_IBSS		/* IBSS mode supported */
488	    | IEEE80211_C_MONITOR	/* monitor mode supported */
489	    | IEEE80211_C_HOSTAP	/* HostAp mode supported */
490	    | IEEE80211_C_TXPMGT	/* tx power management */
491	    | IEEE80211_C_SHPREAMBLE	/* short preamble supported */
492	    | IEEE80211_C_SHSLOT	/* short slot time supported */
493	    | IEEE80211_C_BGSCAN	/* bg scanning supported */
494	    | IEEE80211_C_WPA		/* 802.11i */
495	    ;
496
497	bands = 0;
498	setbit(&bands, IEEE80211_MODE_11B);
499	setbit(&bands, IEEE80211_MODE_11G);
500	if (sc->rf_rev == RAL_RF_5222)
501		setbit(&bands, IEEE80211_MODE_11A);
502	ieee80211_init_channels(ic, NULL, &bands);
503
504	ieee80211_ifattach(ic, sc->sc_bssid);
505	ic->ic_update_promisc = ural_update_promisc;
506	ic->ic_newassoc = ural_newassoc;
507	ic->ic_raw_xmit = ural_raw_xmit;
508	ic->ic_node_alloc = ural_node_alloc;
509	ic->ic_scan_start = ural_scan_start;
510	ic->ic_scan_end = ural_scan_end;
511	ic->ic_set_channel = ural_set_channel;
512
513	ic->ic_vap_create = ural_vap_create;
514	ic->ic_vap_delete = ural_vap_delete;
515
516	bpfattach(ifp, DLT_IEEE802_11_RADIO,
517	    sizeof (struct ieee80211_frame) + sizeof(sc->sc_txtap));
518
519	sc->sc_rxtap_len = sizeof sc->sc_rxtap;
520	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
521	sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT);
522
523	sc->sc_txtap_len = sizeof sc->sc_txtap;
524	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
525	sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT);
526
527	if (bootverbose)
528		ieee80211_announce(ic);
529
530	return (0);
531
532detach:
533	ural_detach(self);
534	return (ENXIO);			/* failure */
535}
536
537static int
538ural_detach(device_t self)
539{
540	struct ural_softc *sc = device_get_softc(self);
541	struct ifnet *ifp = sc->sc_ifp;
542	struct ieee80211com *ic;
543
544	/* stop all USB transfers */
545	usb2_transfer_unsetup(sc->sc_xfer, URAL_N_TRANSFER);
546
547	/* free TX list, if any */
548	RAL_LOCK(sc);
549	ural_unsetup_tx_list(sc);
550	RAL_UNLOCK(sc);
551
552	if (ifp) {
553		ic = ifp->if_l2com;
554		bpfdetach(ifp);
555		ieee80211_ifdetach(ic);
556		if_free(ifp);
557	}
558	mtx_destroy(&sc->sc_mtx);
559
560	return (0);
561}
562
563static usb2_error_t
564ural_do_request(struct ural_softc *sc,
565    struct usb2_device_request *req, void *data)
566{
567	usb2_error_t err;
568	int ntries = 10;
569
570	while (ntries--) {
571		err = usb2_do_request_flags(sc->sc_udev, &sc->sc_mtx,
572		    req, data, 0, NULL, 250 /* ms */);
573		if (err == 0)
574			break;
575
576		DPRINTFN(1, "Control request failed, %s (retrying)\n",
577		    usb2_errstr(err));
578		if (ural_pause(sc, hz / 100))
579			break;
580	}
581	return (err);
582}
583
584static struct ieee80211vap *
585ural_vap_create(struct ieee80211com *ic,
586	const char name[IFNAMSIZ], int unit, int opmode, int flags,
587	const uint8_t bssid[IEEE80211_ADDR_LEN],
588	const uint8_t mac[IEEE80211_ADDR_LEN])
589{
590	struct ural_softc *sc = ic->ic_ifp->if_softc;
591	struct ural_vap *uvp;
592	struct ieee80211vap *vap;
593
594	if (!TAILQ_EMPTY(&ic->ic_vaps))		/* only one at a time */
595		return NULL;
596	uvp = (struct ural_vap *) malloc(sizeof(struct ural_vap),
597	    M_80211_VAP, M_NOWAIT | M_ZERO);
598	if (uvp == NULL)
599		return NULL;
600	vap = &uvp->vap;
601	/* enable s/w bmiss handling for sta mode */
602	ieee80211_vap_setup(ic, vap, name, unit, opmode,
603	    flags | IEEE80211_CLONE_NOBEACONS, bssid, mac);
604
605	/* override state transition machine */
606	uvp->newstate = vap->iv_newstate;
607	vap->iv_newstate = ural_newstate;
608
609	usb2_callout_init_mtx(&uvp->amrr_ch, &sc->sc_mtx, 0);
610	TASK_INIT(&uvp->amrr_task, 0, ural_amrr_task, uvp);
611	ieee80211_amrr_init(&uvp->amrr, vap,
612	    IEEE80211_AMRR_MIN_SUCCESS_THRESHOLD,
613	    IEEE80211_AMRR_MAX_SUCCESS_THRESHOLD,
614	    1000 /* 1 sec */);
615
616	/* complete setup */
617	ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
618	ic->ic_opmode = opmode;
619	return vap;
620}
621
622static void
623ural_vap_delete(struct ieee80211vap *vap)
624{
625	struct ural_vap *uvp = URAL_VAP(vap);
626	struct ieee80211com *ic = vap->iv_ic;
627
628	usb2_callout_drain(&uvp->amrr_ch);
629	ieee80211_draintask(ic, &uvp->amrr_task);
630	ieee80211_amrr_cleanup(&uvp->amrr);
631	ieee80211_vap_detach(vap);
632	free(uvp, M_80211_VAP);
633}
634
635static void
636ural_tx_free(struct ural_tx_data *data, int txerr)
637{
638	struct ural_softc *sc = data->sc;
639
640	if (data->m != NULL) {
641		if (data->m->m_flags & M_TXCB)
642			ieee80211_process_callback(data->ni, data->m,
643			    txerr ? ETIMEDOUT : 0);
644		m_freem(data->m);
645		data->m = NULL;
646
647		ieee80211_free_node(data->ni);
648		data->ni = NULL;
649	}
650	STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
651	sc->tx_nfree++;
652}
653
654static void
655ural_setup_tx_list(struct ural_softc *sc)
656{
657	struct ural_tx_data *data;
658	int i;
659
660	sc->tx_nfree = 0;
661	STAILQ_INIT(&sc->tx_q);
662	STAILQ_INIT(&sc->tx_free);
663
664	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
665		data = &sc->tx_data[i];
666
667		data->sc = sc;
668		STAILQ_INSERT_TAIL(&sc->tx_free, data, next);
669		sc->tx_nfree++;
670	}
671}
672
673static void
674ural_unsetup_tx_list(struct ural_softc *sc)
675{
676	struct ural_tx_data *data;
677	int i;
678
679	/* make sure any subsequent use of the queues will fail */
680	sc->tx_nfree = 0;
681	STAILQ_INIT(&sc->tx_q);
682	STAILQ_INIT(&sc->tx_free);
683
684	/* free up all node references and mbufs */
685	for (i = 0; i < RAL_TX_LIST_COUNT; i++) {
686		data = &sc->tx_data[i];
687
688		if (data->m != NULL) {
689			m_freem(data->m);
690			data->m = NULL;
691		}
692		if (data->ni != NULL) {
693			ieee80211_free_node(data->ni);
694			data->ni = NULL;
695		}
696	}
697}
698
699static int
700ural_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
701{
702	struct ural_vap *uvp = URAL_VAP(vap);
703	struct ieee80211com *ic = vap->iv_ic;
704	struct ural_softc *sc = ic->ic_ifp->if_softc;
705	const struct ieee80211_txparam *tp;
706	struct ieee80211_node *ni;
707	struct mbuf *m;
708
709	DPRINTF("%s -> %s\n",
710		ieee80211_state_name[vap->iv_state],
711		ieee80211_state_name[nstate]);
712
713	IEEE80211_UNLOCK(ic);
714	RAL_LOCK(sc);
715	usb2_callout_stop(&uvp->amrr_ch);
716
717	switch (nstate) {
718	case IEEE80211_S_INIT:
719		if (vap->iv_state == IEEE80211_S_RUN) {
720			/* abort TSF synchronization */
721			ural_write(sc, RAL_TXRX_CSR19, 0);
722
723			/* force tx led to stop blinking */
724			ural_write(sc, RAL_MAC_CSR20, 0);
725		}
726		break;
727
728	case IEEE80211_S_RUN:
729		ni = vap->iv_bss;
730
731		if (vap->iv_opmode != IEEE80211_M_MONITOR) {
732			ural_update_slot(ic->ic_ifp);
733			ural_set_txpreamble(sc);
734			ural_set_basicrates(sc, ic->ic_bsschan);
735			IEEE80211_ADDR_COPY(sc->sc_bssid, ni->ni_bssid);
736			ural_set_bssid(sc, sc->sc_bssid);
737		}
738
739		if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
740		    vap->iv_opmode == IEEE80211_M_IBSS) {
741			m = ieee80211_beacon_alloc(ni, &uvp->bo);
742			if (m == NULL) {
743				device_printf(sc->sc_dev,
744				    "could not allocate beacon\n");
745				RAL_UNLOCK(sc);
746				IEEE80211_LOCK(ic);
747				return (-1);
748			}
749			ieee80211_ref_node(ni);
750			if (ural_tx_bcn(sc, m, ni) != 0) {
751				device_printf(sc->sc_dev,
752				    "could not send beacon\n");
753				RAL_UNLOCK(sc);
754				IEEE80211_LOCK(ic);
755				return (-1);
756			}
757		}
758
759		/* make tx led blink on tx (controlled by ASIC) */
760		ural_write(sc, RAL_MAC_CSR20, 1);
761
762		if (vap->iv_opmode != IEEE80211_M_MONITOR)
763			ural_enable_tsf_sync(sc);
764
765		/* enable automatic rate adaptation */
766		tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
767		if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE)
768			ural_amrr_start(sc, ni);
769
770		break;
771
772	default:
773		break;
774	}
775	RAL_UNLOCK(sc);
776	IEEE80211_LOCK(ic);
777	return (uvp->newstate(vap, nstate, arg));
778}
779
780
781static void
782ural_bulk_write_callback(struct usb2_xfer *xfer)
783{
784	struct ural_softc *sc = xfer->priv_sc;
785	struct ifnet *ifp = sc->sc_ifp;
786	struct ieee80211com *ic = ifp->if_l2com;
787	struct ieee80211_channel *c = ic->ic_curchan;
788	struct ural_tx_data *data;
789	struct mbuf *m;
790	unsigned int len;
791
792	switch (USB_GET_STATE(xfer)) {
793	case USB_ST_TRANSFERRED:
794		DPRINTFN(11, "transfer complete, %d bytes\n", xfer->actlen);
795
796		/* free resources */
797		data = xfer->priv_fifo;
798		ural_tx_free(data, 0);
799		xfer->priv_fifo = NULL;
800
801		ifp->if_opackets++;
802		ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
803
804		/* FALLTHROUGH */
805	case USB_ST_SETUP:
806tr_setup:
807		data = STAILQ_FIRST(&sc->tx_q);
808		if (data) {
809			STAILQ_REMOVE_HEAD(&sc->tx_q, next);
810			m = data->m;
811
812			if (m->m_pkthdr.len > (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE)) {
813				DPRINTFN(0, "data overflow, %u bytes\n",
814				    m->m_pkthdr.len);
815				m->m_pkthdr.len = (RAL_FRAME_SIZE + RAL_TX_DESC_SIZE);
816			}
817			usb2_copy_in(xfer->frbuffers, 0, &data->desc,
818			    RAL_TX_DESC_SIZE);
819			usb2_m_copy_in(xfer->frbuffers, RAL_TX_DESC_SIZE, m, 0,
820			    m->m_pkthdr.len);
821
822			if (bpf_peers_present(ifp->if_bpf)) {
823				struct ural_tx_radiotap_header *tap = &sc->sc_txtap;
824
825				tap->wt_flags = 0;
826				tap->wt_rate = data->rate;
827				tap->wt_chan_freq = htole16(c->ic_freq);
828				tap->wt_chan_flags = htole16(c->ic_flags);
829				tap->wt_antenna = sc->tx_ant;
830
831				bpf_mtap2(ifp->if_bpf, tap, sc->sc_txtap_len, m);
832			}
833
834			/* xfer length needs to be a multiple of two! */
835			len = (RAL_TX_DESC_SIZE + m->m_pkthdr.len + 1) & ~1;
836			if ((len % 64) == 0)
837				len += 2;
838
839			DPRINTFN(11, "sending frame len=%u xferlen=%u\n",
840			    m->m_pkthdr.len, len);
841
842			xfer->frlengths[0] = len;
843			xfer->priv_fifo = data;
844
845			usb2_start_hardware(xfer);
846		}
847		break;
848
849	default:			/* Error */
850		DPRINTFN(11, "transfer error, %s\n",
851		    usb2_errstr(xfer->error));
852
853		ifp->if_oerrors++;
854		data = xfer->priv_fifo;
855		if (data != NULL) {
856			ural_tx_free(data, xfer->error);
857			xfer->priv_fifo = NULL;
858		}
859
860		if (xfer->error == USB_ERR_STALLED) {
861			/* try to clear stall first */
862			xfer->flags.stall_pipe = 1;
863			goto tr_setup;
864		}
865		if (xfer->error == USB_ERR_TIMEOUT)
866			device_printf(sc->sc_dev, "device timeout\n");
867		break;
868	}
869}
870
871static void
872ural_bulk_read_callback(struct usb2_xfer *xfer)
873{
874	struct ural_softc *sc = xfer->priv_sc;
875	struct ifnet *ifp = sc->sc_ifp;
876	struct ieee80211com *ic = ifp->if_l2com;
877	struct ieee80211_node *ni;
878	struct mbuf *m = NULL;
879	uint32_t flags;
880	uint8_t rssi = 0;
881	unsigned int len;
882
883	switch (USB_GET_STATE(xfer)) {
884	case USB_ST_TRANSFERRED:
885
886		DPRINTFN(15, "rx done, actlen=%d\n", xfer->actlen);
887
888		len = xfer->actlen;
889		if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) {
890			DPRINTF("%s: xfer too short %d\n",
891			    device_get_nameunit(sc->sc_dev), len);
892			ifp->if_ierrors++;
893			goto tr_setup;
894		}
895
896		len -= RAL_RX_DESC_SIZE;
897		/* rx descriptor is located at the end */
898		usb2_copy_out(xfer->frbuffers, len, &sc->sc_rx_desc,
899		    RAL_RX_DESC_SIZE);
900
901		rssi = URAL_RSSI(sc->sc_rx_desc.rssi);
902		flags = le32toh(sc->sc_rx_desc.flags);
903		if (flags & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) {
904			/*
905		         * This should not happen since we did not
906		         * request to receive those frames when we
907		         * filled RAL_TXRX_CSR2:
908		         */
909			DPRINTFN(5, "PHY or CRC error\n");
910			ifp->if_ierrors++;
911			goto tr_setup;
912		}
913
914		m = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR);
915		if (m == NULL) {
916			DPRINTF("could not allocate mbuf\n");
917			ifp->if_ierrors++;
918			goto tr_setup;
919		}
920		usb2_copy_out(xfer->frbuffers, 0, mtod(m, uint8_t *), len);
921
922		/* finalize mbuf */
923		m->m_pkthdr.rcvif = ifp;
924		m->m_pkthdr.len = m->m_len = (flags >> 16) & 0xfff;
925
926		if (bpf_peers_present(ifp->if_bpf)) {
927			struct ural_rx_radiotap_header *tap = &sc->sc_rxtap;
928
929			tap->wr_flags = IEEE80211_RADIOTAP_F_FCS;
930			tap->wr_rate = ieee80211_plcp2rate(sc->sc_rx_desc.rate,
931			    (flags & RAL_RX_OFDM) ?
932			    IEEE80211_T_OFDM : IEEE80211_T_CCK);
933			tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq);
934			tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags);
935			tap->wr_antenna = sc->rx_ant;
936			tap->wr_antsignal = rssi;
937
938			bpf_mtap2(ifp->if_bpf, tap, sc->sc_rxtap_len, m);
939		}
940		/* Strip trailing 802.11 MAC FCS. */
941		m_adj(m, -IEEE80211_CRC_LEN);
942
943		/* FALLTHROUGH */
944	case USB_ST_SETUP:
945tr_setup:
946		xfer->frlengths[0] = xfer->max_data_length;
947		usb2_start_hardware(xfer);
948
949		/*
950		 * At the end of a USB callback it is always safe to unlock
951		 * the private mutex of a device! That is why we do the
952		 * "ieee80211_input" here, and not some lines up!
953		 */
954		if (m) {
955			RAL_UNLOCK(sc);
956			ni = ieee80211_find_rxnode(ic,
957			    mtod(m, struct ieee80211_frame_min *));
958			if (ni != NULL) {
959				(void) ieee80211_input(ni, m, rssi,
960				    RAL_NOISE_FLOOR, 0);
961				ieee80211_free_node(ni);
962			} else
963				(void) ieee80211_input_all(ic, m, rssi,
964				    RAL_NOISE_FLOOR, 0);
965			RAL_LOCK(sc);
966		}
967		return;
968
969	default:			/* Error */
970		if (xfer->error != USB_ERR_CANCELLED) {
971			/* try to clear stall first */
972			xfer->flags.stall_pipe = 1;
973			goto tr_setup;
974		}
975		return;
976	}
977}
978
979static uint8_t
980ural_plcp_signal(int rate)
981{
982	switch (rate) {
983	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
984	case 12:	return 0xb;
985	case 18:	return 0xf;
986	case 24:	return 0xa;
987	case 36:	return 0xe;
988	case 48:	return 0x9;
989	case 72:	return 0xd;
990	case 96:	return 0x8;
991	case 108:	return 0xc;
992
993	/* CCK rates (NB: not IEEE std, device-specific) */
994	case 2:		return 0x0;
995	case 4:		return 0x1;
996	case 11:	return 0x2;
997	case 22:	return 0x3;
998	}
999	return 0xff;		/* XXX unsupported/unknown rate */
1000}
1001
1002static void
1003ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc,
1004    uint32_t flags, int len, int rate)
1005{
1006	struct ifnet *ifp = sc->sc_ifp;
1007	struct ieee80211com *ic = ifp->if_l2com;
1008	uint16_t plcp_length;
1009	int remainder;
1010
1011	desc->flags = htole32(flags);
1012	desc->flags |= htole32(RAL_TX_NEWSEQ);
1013	desc->flags |= htole32(len << 16);
1014
1015	desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5));
1016	desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame)));
1017
1018	/* setup PLCP fields */
1019	desc->plcp_signal  = ural_plcp_signal(rate);
1020	desc->plcp_service = 4;
1021
1022	len += IEEE80211_CRC_LEN;
1023	if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1024		desc->flags |= htole32(RAL_TX_OFDM);
1025
1026		plcp_length = len & 0xfff;
1027		desc->plcp_length_hi = plcp_length >> 6;
1028		desc->plcp_length_lo = plcp_length & 0x3f;
1029	} else {
1030		plcp_length = (16 * len + rate - 1) / rate;
1031		if (rate == 22) {
1032			remainder = (16 * len) % 22;
1033			if (remainder != 0 && remainder < 7)
1034				desc->plcp_service |= RAL_PLCP_LENGEXT;
1035		}
1036		desc->plcp_length_hi = plcp_length >> 8;
1037		desc->plcp_length_lo = plcp_length & 0xff;
1038
1039		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1040			desc->plcp_signal |= 0x08;
1041	}
1042
1043	desc->iv = 0;
1044	desc->eiv = 0;
1045}
1046
1047#define RAL_TX_TIMEOUT	5000
1048
1049static int
1050ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1051{
1052	struct ieee80211vap *vap = ni->ni_vap;
1053	struct ieee80211com *ic = ni->ni_ic;
1054	struct ifnet *ifp = sc->sc_ifp;
1055	const struct ieee80211_txparam *tp;
1056	struct ural_tx_data *data;
1057
1058	if (sc->tx_nfree == 0) {
1059		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1060		m_freem(m0);
1061		ieee80211_free_node(ni);
1062		return EIO;
1063	}
1064	data = STAILQ_FIRST(&sc->tx_free);
1065	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1066	sc->tx_nfree--;
1067	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_bsschan)];
1068
1069	data->m = m0;
1070	data->ni = ni;
1071	data->rate = tp->mgmtrate;
1072
1073	ural_setup_tx_desc(sc, &data->desc,
1074	    RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, m0->m_pkthdr.len,
1075	    tp->mgmtrate);
1076
1077	DPRINTFN(10, "sending beacon frame len=%u rate=%u\n",
1078	    m0->m_pkthdr.len, tp->mgmtrate);
1079
1080	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1081	usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1082
1083	return (0);
1084}
1085
1086static int
1087ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1088{
1089	struct ieee80211vap *vap = ni->ni_vap;
1090	struct ieee80211com *ic = ni->ni_ic;
1091	const struct ieee80211_txparam *tp;
1092	struct ural_tx_data *data;
1093	struct ieee80211_frame *wh;
1094	struct ieee80211_key *k;
1095	uint32_t flags;
1096	uint16_t dur;
1097
1098	RAL_LOCK_ASSERT(sc, MA_OWNED);
1099
1100	data = STAILQ_FIRST(&sc->tx_free);
1101	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1102	sc->tx_nfree--;
1103
1104	tp = &vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)];
1105
1106	wh = mtod(m0, struct ieee80211_frame *);
1107	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1108		k = ieee80211_crypto_encap(ni, m0);
1109		if (k == NULL) {
1110			m_freem(m0);
1111			return ENOBUFS;
1112		}
1113		wh = mtod(m0, struct ieee80211_frame *);
1114	}
1115
1116	data->m = m0;
1117	data->ni = ni;
1118	data->rate = tp->mgmtrate;
1119
1120	flags = 0;
1121	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1122		flags |= RAL_TX_ACK;
1123
1124		dur = ieee80211_ack_duration(ic->ic_rt, tp->mgmtrate,
1125		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1126		*(uint16_t *)wh->i_dur = htole16(dur);
1127
1128		/* tell hardware to add timestamp for probe responses */
1129		if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1130		    IEEE80211_FC0_TYPE_MGT &&
1131		    (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1132		    IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1133			flags |= RAL_TX_TIMESTAMP;
1134	}
1135
1136	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, tp->mgmtrate);
1137
1138	DPRINTFN(10, "sending mgt frame len=%u rate=%u\n",
1139	    m0->m_pkthdr.len, tp->mgmtrate);
1140
1141	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1142	usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1143
1144	return 0;
1145}
1146
1147static int
1148ural_sendprot(struct ural_softc *sc,
1149    const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1150{
1151	struct ieee80211com *ic = ni->ni_ic;
1152	const struct ieee80211_frame *wh;
1153	struct ural_tx_data *data;
1154	struct mbuf *mprot;
1155	int protrate, ackrate, pktlen, flags, isshort;
1156	uint16_t dur;
1157
1158	KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1159	    ("protection %d", prot));
1160
1161	wh = mtod(m, const struct ieee80211_frame *);
1162	pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1163
1164	protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1165	ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1166
1167	isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1168	dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort);
1169	    + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1170	flags = RAL_TX_RETRY(7);
1171	if (prot == IEEE80211_PROT_RTSCTS) {
1172		/* NB: CTS is the same size as an ACK */
1173		dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1174		flags |= RAL_TX_ACK;
1175		mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1176	} else {
1177		mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1178	}
1179	if (mprot == NULL) {
1180		/* XXX stat + msg */
1181		return ENOBUFS;
1182	}
1183	data = STAILQ_FIRST(&sc->tx_free);
1184	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1185	sc->tx_nfree--;
1186
1187	data->m = mprot;
1188	data->ni = ieee80211_ref_node(ni);
1189	data->rate = protrate;
1190	ural_setup_tx_desc(sc, &data->desc, flags, mprot->m_pkthdr.len, protrate);
1191
1192	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1193	usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1194
1195	return 0;
1196}
1197
1198static int
1199ural_tx_raw(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni,
1200    const struct ieee80211_bpf_params *params)
1201{
1202	struct ural_tx_data *data;
1203	uint32_t flags;
1204	int error;
1205	int rate;
1206
1207	RAL_LOCK_ASSERT(sc, MA_OWNED);
1208	KASSERT(params != NULL, ("no raw xmit params"));
1209
1210	rate = params->ibp_rate0 & IEEE80211_RATE_VAL;
1211	/* XXX validate */
1212	if (rate == 0) {
1213		m_freem(m0);
1214		return EINVAL;
1215	}
1216	flags = 0;
1217	if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1218		flags |= RAL_TX_ACK;
1219	if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1220		error = ural_sendprot(sc, m0, ni,
1221		    params->ibp_flags & IEEE80211_BPF_RTS ?
1222			 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1223		    rate);
1224		if (error || sc->tx_nfree == 0) {
1225			m_freem(m0);
1226			return ENOBUFS;
1227		}
1228		flags |= RAL_TX_IFS_SIFS;
1229	}
1230
1231	data = STAILQ_FIRST(&sc->tx_free);
1232	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1233	sc->tx_nfree--;
1234
1235	data->m = m0;
1236	data->ni = ni;
1237	data->rate = rate;
1238
1239	/* XXX need to setup descriptor ourself */
1240	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1241
1242	DPRINTFN(10, "sending raw frame len=%u rate=%u\n",
1243	    m0->m_pkthdr.len, rate);
1244
1245	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1246	usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1247
1248	return 0;
1249}
1250
1251static int
1252ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni)
1253{
1254	struct ieee80211vap *vap = ni->ni_vap;
1255	struct ieee80211com *ic = ni->ni_ic;
1256	struct ural_tx_data *data;
1257	struct ieee80211_frame *wh;
1258	const struct ieee80211_txparam *tp;
1259	struct ieee80211_key *k;
1260	uint32_t flags = 0;
1261	uint16_t dur;
1262	int error, rate;
1263
1264	RAL_LOCK_ASSERT(sc, MA_OWNED);
1265
1266	wh = mtod(m0, struct ieee80211_frame *);
1267
1268	tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1269	if (IEEE80211_IS_MULTICAST(wh->i_addr1))
1270		rate = tp->mcastrate;
1271	else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
1272		rate = tp->ucastrate;
1273	else
1274		rate = ni->ni_txrate;
1275
1276	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1277		k = ieee80211_crypto_encap(ni, m0);
1278		if (k == NULL) {
1279			m_freem(m0);
1280			return ENOBUFS;
1281		}
1282		/* packet header may have moved, reset our local pointer */
1283		wh = mtod(m0, struct ieee80211_frame *);
1284	}
1285
1286	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1287		int prot = IEEE80211_PROT_NONE;
1288		if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1289			prot = IEEE80211_PROT_RTSCTS;
1290		else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1291		    ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1292			prot = ic->ic_protmode;
1293		if (prot != IEEE80211_PROT_NONE) {
1294			error = ural_sendprot(sc, m0, ni, prot, rate);
1295			if (error || sc->tx_nfree == 0) {
1296				m_freem(m0);
1297				return ENOBUFS;
1298			}
1299			flags |= RAL_TX_IFS_SIFS;
1300		}
1301	}
1302
1303	data = STAILQ_FIRST(&sc->tx_free);
1304	STAILQ_REMOVE_HEAD(&sc->tx_free, next);
1305	sc->tx_nfree--;
1306
1307	data->m = m0;
1308	data->ni = ni;
1309	data->rate = rate;
1310
1311	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1312		flags |= RAL_TX_ACK;
1313		flags |= RAL_TX_RETRY(7);
1314
1315		dur = ieee80211_ack_duration(ic->ic_rt, rate,
1316		    ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1317		*(uint16_t *)wh->i_dur = htole16(dur);
1318	}
1319
1320	ural_setup_tx_desc(sc, &data->desc, flags, m0->m_pkthdr.len, rate);
1321
1322	DPRINTFN(10, "sending data frame len=%u rate=%u\n",
1323	    m0->m_pkthdr.len, rate);
1324
1325	STAILQ_INSERT_TAIL(&sc->tx_q, data, next);
1326	usb2_transfer_start(sc->sc_xfer[URAL_BULK_WR]);
1327
1328	return 0;
1329}
1330
1331static void
1332ural_start(struct ifnet *ifp)
1333{
1334	struct ural_softc *sc = ifp->if_softc;
1335	struct ieee80211_node *ni;
1336	struct mbuf *m;
1337
1338	RAL_LOCK(sc);
1339	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1340		RAL_UNLOCK(sc);
1341		return;
1342	}
1343	for (;;) {
1344		IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1345		if (m == NULL)
1346			break;
1347		if (sc->tx_nfree < RAL_TX_MINFREE) {
1348			IFQ_DRV_PREPEND(&ifp->if_snd, m);
1349			ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1350			break;
1351		}
1352		ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1353		if (ural_tx_data(sc, m, ni) != 0) {
1354			ieee80211_free_node(ni);
1355			ifp->if_oerrors++;
1356			break;
1357		}
1358	}
1359	RAL_UNLOCK(sc);
1360}
1361
1362static int
1363ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1364{
1365	struct ural_softc *sc = ifp->if_softc;
1366	struct ieee80211com *ic = ifp->if_l2com;
1367	struct ifreq *ifr = (struct ifreq *) data;
1368	int error = 0, startall = 0;
1369
1370	switch (cmd) {
1371	case SIOCSIFFLAGS:
1372		RAL_LOCK(sc);
1373		if (ifp->if_flags & IFF_UP) {
1374			if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1375				ural_init_locked(sc);
1376				startall = 1;
1377			} else
1378				ural_setpromisc(sc);
1379		} else {
1380			if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1381				ural_stop(sc);
1382		}
1383		RAL_UNLOCK(sc);
1384		if (startall)
1385			ieee80211_start_all(ic);
1386		break;
1387	case SIOCGIFMEDIA:
1388	case SIOCSIFMEDIA:
1389		error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1390		break;
1391	default:
1392		error = ether_ioctl(ifp, cmd, data);
1393		break;
1394	}
1395	return error;
1396}
1397
1398static void
1399ural_set_testmode(struct ural_softc *sc)
1400{
1401	struct usb2_device_request req;
1402	usb2_error_t error;
1403
1404	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1405	req.bRequest = RAL_VENDOR_REQUEST;
1406	USETW(req.wValue, 4);
1407	USETW(req.wIndex, 1);
1408	USETW(req.wLength, 0);
1409
1410	error = ural_do_request(sc, &req, NULL);
1411	if (error != 0) {
1412		device_printf(sc->sc_dev, "could not set test mode: %s\n",
1413		    usb2_errstr(error));
1414	}
1415}
1416
1417static void
1418ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len)
1419{
1420	struct usb2_device_request req;
1421	usb2_error_t error;
1422
1423	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1424	req.bRequest = RAL_READ_EEPROM;
1425	USETW(req.wValue, 0);
1426	USETW(req.wIndex, addr);
1427	USETW(req.wLength, len);
1428
1429	error = ural_do_request(sc, &req, buf);
1430	if (error != 0) {
1431		device_printf(sc->sc_dev, "could not read EEPROM: %s\n",
1432		    usb2_errstr(error));
1433	}
1434}
1435
1436static uint16_t
1437ural_read(struct ural_softc *sc, uint16_t reg)
1438{
1439	struct usb2_device_request req;
1440	usb2_error_t error;
1441	uint16_t val;
1442
1443	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1444	req.bRequest = RAL_READ_MAC;
1445	USETW(req.wValue, 0);
1446	USETW(req.wIndex, reg);
1447	USETW(req.wLength, sizeof (uint16_t));
1448
1449	error = ural_do_request(sc, &req, &val);
1450	if (error != 0) {
1451		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1452		    usb2_errstr(error));
1453		return 0;
1454	}
1455
1456	return le16toh(val);
1457}
1458
1459static void
1460ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1461{
1462	struct usb2_device_request req;
1463	usb2_error_t error;
1464
1465	req.bmRequestType = UT_READ_VENDOR_DEVICE;
1466	req.bRequest = RAL_READ_MULTI_MAC;
1467	USETW(req.wValue, 0);
1468	USETW(req.wIndex, reg);
1469	USETW(req.wLength, len);
1470
1471	error = ural_do_request(sc, &req, buf);
1472	if (error != 0) {
1473		device_printf(sc->sc_dev, "could not read MAC register: %s\n",
1474		    usb2_errstr(error));
1475	}
1476}
1477
1478static void
1479ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val)
1480{
1481	struct usb2_device_request req;
1482	usb2_error_t error;
1483
1484	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1485	req.bRequest = RAL_WRITE_MAC;
1486	USETW(req.wValue, val);
1487	USETW(req.wIndex, reg);
1488	USETW(req.wLength, 0);
1489
1490	error = ural_do_request(sc, &req, NULL);
1491	if (error != 0) {
1492		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1493		    usb2_errstr(error));
1494	}
1495}
1496
1497static void
1498ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len)
1499{
1500	struct usb2_device_request req;
1501	usb2_error_t error;
1502
1503	req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
1504	req.bRequest = RAL_WRITE_MULTI_MAC;
1505	USETW(req.wValue, 0);
1506	USETW(req.wIndex, reg);
1507	USETW(req.wLength, len);
1508
1509	error = ural_do_request(sc, &req, buf);
1510	if (error != 0) {
1511		device_printf(sc->sc_dev, "could not write MAC register: %s\n",
1512		    usb2_errstr(error));
1513	}
1514}
1515
1516static void
1517ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val)
1518{
1519	uint16_t tmp;
1520	int ntries;
1521
1522	for (ntries = 0; ntries < 100; ntries++) {
1523		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1524			break;
1525		if (ural_pause(sc, hz / 100))
1526			break;
1527	}
1528	if (ntries == 100) {
1529		device_printf(sc->sc_dev, "could not write to BBP\n");
1530		return;
1531	}
1532
1533	tmp = reg << 8 | val;
1534	ural_write(sc, RAL_PHY_CSR7, tmp);
1535}
1536
1537static uint8_t
1538ural_bbp_read(struct ural_softc *sc, uint8_t reg)
1539{
1540	uint16_t val;
1541	int ntries;
1542
1543	val = RAL_BBP_WRITE | reg << 8;
1544	ural_write(sc, RAL_PHY_CSR7, val);
1545
1546	for (ntries = 0; ntries < 100; ntries++) {
1547		if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY))
1548			break;
1549		if (ural_pause(sc, hz / 100))
1550			break;
1551	}
1552	if (ntries == 100) {
1553		device_printf(sc->sc_dev, "could not read BBP\n");
1554		return 0;
1555	}
1556
1557	return ural_read(sc, RAL_PHY_CSR7) & 0xff;
1558}
1559
1560static void
1561ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val)
1562{
1563	uint32_t tmp;
1564	int ntries;
1565
1566	for (ntries = 0; ntries < 100; ntries++) {
1567		if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY))
1568			break;
1569		if (ural_pause(sc, hz / 100))
1570			break;
1571	}
1572	if (ntries == 100) {
1573		device_printf(sc->sc_dev, "could not write to RF\n");
1574		return;
1575	}
1576
1577	tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3);
1578	ural_write(sc, RAL_PHY_CSR9,  tmp & 0xffff);
1579	ural_write(sc, RAL_PHY_CSR10, tmp >> 16);
1580
1581	/* remember last written value in sc */
1582	sc->rf_regs[reg] = val;
1583
1584	DPRINTFN(15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
1585}
1586
1587/* ARGUSED */
1588static struct ieee80211_node *
1589ural_node_alloc(struct ieee80211vap *vap __unused,
1590	const uint8_t mac[IEEE80211_ADDR_LEN] __unused)
1591{
1592	struct ural_node *un;
1593
1594	un = malloc(sizeof(struct ural_node), M_80211_NODE, M_NOWAIT | M_ZERO);
1595	return un != NULL ? &un->ni : NULL;
1596}
1597
1598static void
1599ural_newassoc(struct ieee80211_node *ni, int isnew)
1600{
1601	struct ieee80211vap *vap = ni->ni_vap;
1602
1603	ieee80211_amrr_node_init(&URAL_VAP(vap)->amrr, &URAL_NODE(ni)->amn, ni);
1604}
1605
1606static void
1607ural_scan_start(struct ieee80211com *ic)
1608{
1609	struct ifnet *ifp = ic->ic_ifp;
1610	struct ural_softc *sc = ifp->if_softc;
1611
1612	RAL_LOCK(sc);
1613	ural_write(sc, RAL_TXRX_CSR19, 0);
1614	ural_set_bssid(sc, ifp->if_broadcastaddr);
1615	RAL_UNLOCK(sc);
1616}
1617
1618static void
1619ural_scan_end(struct ieee80211com *ic)
1620{
1621	struct ural_softc *sc = ic->ic_ifp->if_softc;
1622
1623	RAL_LOCK(sc);
1624	ural_enable_tsf_sync(sc);
1625	ural_set_bssid(sc, sc->sc_bssid);
1626	RAL_UNLOCK(sc);
1627
1628}
1629
1630static void
1631ural_set_channel(struct ieee80211com *ic)
1632{
1633	struct ural_softc *sc = ic->ic_ifp->if_softc;
1634
1635	RAL_LOCK(sc);
1636	ural_set_chan(sc, ic->ic_curchan);
1637	RAL_UNLOCK(sc);
1638}
1639
1640static void
1641ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c)
1642{
1643	struct ifnet *ifp = sc->sc_ifp;
1644	struct ieee80211com *ic = ifp->if_l2com;
1645	uint8_t power, tmp;
1646	int i, chan;
1647
1648	chan = ieee80211_chan2ieee(ic, c);
1649	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
1650		return;
1651
1652	if (IEEE80211_IS_CHAN_2GHZ(c))
1653		power = min(sc->txpow[chan - 1], 31);
1654	else
1655		power = 31;
1656
1657	/* adjust txpower using ifconfig settings */
1658	power -= (100 - ic->ic_txpowlimit) / 8;
1659
1660	DPRINTFN(2, "setting channel to %u, txpower to %u\n", chan, power);
1661
1662	switch (sc->rf_rev) {
1663	case RAL_RF_2522:
1664		ural_rf_write(sc, RAL_RF1, 0x00814);
1665		ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]);
1666		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1667		break;
1668
1669	case RAL_RF_2523:
1670		ural_rf_write(sc, RAL_RF1, 0x08804);
1671		ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]);
1672		ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
1673		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1674		break;
1675
1676	case RAL_RF_2524:
1677		ural_rf_write(sc, RAL_RF1, 0x0c808);
1678		ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]);
1679		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1680		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1681		break;
1682
1683	case RAL_RF_2525:
1684		ural_rf_write(sc, RAL_RF1, 0x08808);
1685		ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]);
1686		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1687		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1688
1689		ural_rf_write(sc, RAL_RF1, 0x08808);
1690		ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]);
1691		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1692		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
1693		break;
1694
1695	case RAL_RF_2525E:
1696		ural_rf_write(sc, RAL_RF1, 0x08808);
1697		ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]);
1698		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1699		ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
1700		break;
1701
1702	case RAL_RF_2526:
1703		ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]);
1704		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1705		ural_rf_write(sc, RAL_RF1, 0x08804);
1706
1707		ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]);
1708		ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
1709		ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
1710		break;
1711
1712	/* dual-band RF */
1713	case RAL_RF_5222:
1714		for (i = 0; ural_rf5222[i].chan != chan; i++);
1715
1716		ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1);
1717		ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2);
1718		ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
1719		ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4);
1720		break;
1721	}
1722
1723	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
1724	    (ic->ic_flags & IEEE80211_F_SCAN) == 0) {
1725		/* set Japan filter bit for channel 14 */
1726		tmp = ural_bbp_read(sc, 70);
1727
1728		tmp &= ~RAL_JAPAN_FILTER;
1729		if (chan == 14)
1730			tmp |= RAL_JAPAN_FILTER;
1731
1732		ural_bbp_write(sc, 70, tmp);
1733
1734		/* clear CRC errors */
1735		ural_read(sc, RAL_STA_CSR0);
1736
1737		ural_pause(sc, hz / 100);
1738		ural_disable_rf_tune(sc);
1739	}
1740
1741	/* XXX doesn't belong here */
1742	/* update basic rate set */
1743	ural_set_basicrates(sc, c);
1744
1745	/* give the hardware some time to do the switchover */
1746	ural_pause(sc, hz / 100);
1747}
1748
1749/*
1750 * Disable RF auto-tuning.
1751 */
1752static void
1753ural_disable_rf_tune(struct ural_softc *sc)
1754{
1755	uint32_t tmp;
1756
1757	if (sc->rf_rev != RAL_RF_2523) {
1758		tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
1759		ural_rf_write(sc, RAL_RF1, tmp);
1760	}
1761
1762	tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
1763	ural_rf_write(sc, RAL_RF3, tmp);
1764
1765	DPRINTFN(2, "disabling RF autotune\n");
1766}
1767
1768/*
1769 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
1770 * synchronization.
1771 */
1772static void
1773ural_enable_tsf_sync(struct ural_softc *sc)
1774{
1775	struct ifnet *ifp = sc->sc_ifp;
1776	struct ieee80211com *ic = ifp->if_l2com;
1777	struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1778	uint16_t logcwmin, preload, tmp;
1779
1780	/* first, disable TSF synchronization */
1781	ural_write(sc, RAL_TXRX_CSR19, 0);
1782
1783	tmp = (16 * vap->iv_bss->ni_intval) << 4;
1784	ural_write(sc, RAL_TXRX_CSR18, tmp);
1785
1786	logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0;
1787	preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6;
1788	tmp = logcwmin << 12 | preload;
1789	ural_write(sc, RAL_TXRX_CSR20, tmp);
1790
1791	/* finally, enable TSF synchronization */
1792	tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN;
1793	if (ic->ic_opmode == IEEE80211_M_STA)
1794		tmp |= RAL_ENABLE_TSF_SYNC(1);
1795	else
1796		tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR;
1797	ural_write(sc, RAL_TXRX_CSR19, tmp);
1798
1799	DPRINTF("enabling TSF synchronization\n");
1800}
1801
1802#define RAL_RXTX_TURNAROUND	5	/* us */
1803static void
1804ural_update_slot(struct ifnet *ifp)
1805{
1806	struct ural_softc *sc = ifp->if_softc;
1807	struct ieee80211com *ic = ifp->if_l2com;
1808	uint16_t slottime, sifs, eifs;
1809
1810	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
1811
1812	/*
1813	 * These settings may sound a bit inconsistent but this is what the
1814	 * reference driver does.
1815	 */
1816	if (ic->ic_curmode == IEEE80211_MODE_11B) {
1817		sifs = 16 - RAL_RXTX_TURNAROUND;
1818		eifs = 364;
1819	} else {
1820		sifs = 10 - RAL_RXTX_TURNAROUND;
1821		eifs = 64;
1822	}
1823
1824	ural_write(sc, RAL_MAC_CSR10, slottime);
1825	ural_write(sc, RAL_MAC_CSR11, sifs);
1826	ural_write(sc, RAL_MAC_CSR12, eifs);
1827}
1828
1829static void
1830ural_set_txpreamble(struct ural_softc *sc)
1831{
1832	struct ifnet *ifp = sc->sc_ifp;
1833	struct ieee80211com *ic = ifp->if_l2com;
1834	uint16_t tmp;
1835
1836	tmp = ural_read(sc, RAL_TXRX_CSR10);
1837
1838	tmp &= ~RAL_SHORT_PREAMBLE;
1839	if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1840		tmp |= RAL_SHORT_PREAMBLE;
1841
1842	ural_write(sc, RAL_TXRX_CSR10, tmp);
1843}
1844
1845static void
1846ural_set_basicrates(struct ural_softc *sc, const struct ieee80211_channel *c)
1847{
1848	/* XXX wrong, take from rate set */
1849	/* update basic rate set */
1850	if (IEEE80211_IS_CHAN_5GHZ(c)) {
1851		/* 11a basic rates: 6, 12, 24Mbps */
1852		ural_write(sc, RAL_TXRX_CSR11, 0x150);
1853	} else if (IEEE80211_IS_CHAN_ANYG(c)) {
1854		/* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
1855		ural_write(sc, RAL_TXRX_CSR11, 0x15f);
1856	} else {
1857		/* 11b basic rates: 1, 2Mbps */
1858		ural_write(sc, RAL_TXRX_CSR11, 0x3);
1859	}
1860}
1861
1862static void
1863ural_set_bssid(struct ural_softc *sc, const uint8_t *bssid)
1864{
1865	uint16_t tmp;
1866
1867	tmp = bssid[0] | bssid[1] << 8;
1868	ural_write(sc, RAL_MAC_CSR5, tmp);
1869
1870	tmp = bssid[2] | bssid[3] << 8;
1871	ural_write(sc, RAL_MAC_CSR6, tmp);
1872
1873	tmp = bssid[4] | bssid[5] << 8;
1874	ural_write(sc, RAL_MAC_CSR7, tmp);
1875
1876	DPRINTF("setting BSSID to %6D\n", bssid, ":");
1877}
1878
1879static void
1880ural_set_macaddr(struct ural_softc *sc, uint8_t *addr)
1881{
1882	uint16_t tmp;
1883
1884	tmp = addr[0] | addr[1] << 8;
1885	ural_write(sc, RAL_MAC_CSR2, tmp);
1886
1887	tmp = addr[2] | addr[3] << 8;
1888	ural_write(sc, RAL_MAC_CSR3, tmp);
1889
1890	tmp = addr[4] | addr[5] << 8;
1891	ural_write(sc, RAL_MAC_CSR4, tmp);
1892
1893	DPRINTF("setting MAC address to %6D\n", addr, ":");
1894}
1895
1896static void
1897ural_setpromisc(struct ural_softc *sc)
1898{
1899	struct ifnet *ifp = sc->sc_ifp;
1900	uint32_t tmp;
1901
1902	tmp = ural_read(sc, RAL_TXRX_CSR2);
1903
1904	tmp &= ~RAL_DROP_NOT_TO_ME;
1905	if (!(ifp->if_flags & IFF_PROMISC))
1906		tmp |= RAL_DROP_NOT_TO_ME;
1907
1908	ural_write(sc, RAL_TXRX_CSR2, tmp);
1909
1910	DPRINTF("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
1911	    "entering" : "leaving");
1912}
1913
1914static void
1915ural_update_promisc(struct ifnet *ifp)
1916{
1917	struct ural_softc *sc = ifp->if_softc;
1918
1919	if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0)
1920		return;
1921
1922	RAL_LOCK(sc);
1923	ural_setpromisc(sc);
1924	RAL_UNLOCK(sc);
1925}
1926
1927static const char *
1928ural_get_rf(int rev)
1929{
1930	switch (rev) {
1931	case RAL_RF_2522:	return "RT2522";
1932	case RAL_RF_2523:	return "RT2523";
1933	case RAL_RF_2524:	return "RT2524";
1934	case RAL_RF_2525:	return "RT2525";
1935	case RAL_RF_2525E:	return "RT2525e";
1936	case RAL_RF_2526:	return "RT2526";
1937	case RAL_RF_5222:	return "RT5222";
1938	default:		return "unknown";
1939	}
1940}
1941
1942static void
1943ural_read_eeprom(struct ural_softc *sc)
1944{
1945	uint16_t val;
1946
1947	ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2);
1948	val = le16toh(val);
1949	sc->rf_rev =   (val >> 11) & 0x7;
1950	sc->hw_radio = (val >> 10) & 0x1;
1951	sc->led_mode = (val >> 6)  & 0x7;
1952	sc->rx_ant =   (val >> 4)  & 0x3;
1953	sc->tx_ant =   (val >> 2)  & 0x3;
1954	sc->nb_ant =   val & 0x3;
1955
1956	/* read MAC address */
1957	ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, sc->sc_bssid, 6);
1958
1959	/* read default values for BBP registers */
1960	ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16);
1961
1962	/* read Tx power for all b/g channels */
1963	ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14);
1964}
1965
1966static int
1967ural_bbp_init(struct ural_softc *sc)
1968{
1969#define N(a)	(sizeof (a) / sizeof ((a)[0]))
1970	int i, ntries;
1971
1972	/* wait for BBP to be ready */
1973	for (ntries = 0; ntries < 100; ntries++) {
1974		if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0)
1975			break;
1976		if (ural_pause(sc, hz / 100))
1977			break;
1978	}
1979	if (ntries == 100) {
1980		device_printf(sc->sc_dev, "timeout waiting for BBP\n");
1981		return EIO;
1982	}
1983
1984	/* initialize BBP registers to default values */
1985	for (i = 0; i < N(ural_def_bbp); i++)
1986		ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val);
1987
1988#if 0
1989	/* initialize BBP registers to values stored in EEPROM */
1990	for (i = 0; i < 16; i++) {
1991		if (sc->bbp_prom[i].reg == 0xff)
1992			continue;
1993		ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
1994	}
1995#endif
1996
1997	return 0;
1998#undef N
1999}
2000
2001static void
2002ural_set_txantenna(struct ural_softc *sc, int antenna)
2003{
2004	uint16_t tmp;
2005	uint8_t tx;
2006
2007	tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK;
2008	if (antenna == 1)
2009		tx |= RAL_BBP_ANTA;
2010	else if (antenna == 2)
2011		tx |= RAL_BBP_ANTB;
2012	else
2013		tx |= RAL_BBP_DIVERSITY;
2014
2015	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2016	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 ||
2017	    sc->rf_rev == RAL_RF_5222)
2018		tx |= RAL_BBP_FLIPIQ;
2019
2020	ural_bbp_write(sc, RAL_BBP_TX, tx);
2021
2022	/* update values in PHY_CSR5 and PHY_CSR6 */
2023	tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7;
2024	ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7));
2025
2026	tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7;
2027	ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7));
2028}
2029
2030static void
2031ural_set_rxantenna(struct ural_softc *sc, int antenna)
2032{
2033	uint8_t rx;
2034
2035	rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK;
2036	if (antenna == 1)
2037		rx |= RAL_BBP_ANTA;
2038	else if (antenna == 2)
2039		rx |= RAL_BBP_ANTB;
2040	else
2041		rx |= RAL_BBP_DIVERSITY;
2042
2043	/* need to force no I/Q flip for RF 2525e and 2526 */
2044	if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526)
2045		rx &= ~RAL_BBP_FLIPIQ;
2046
2047	ural_bbp_write(sc, RAL_BBP_RX, rx);
2048}
2049
2050static void
2051ural_init_locked(struct ural_softc *sc)
2052{
2053#define N(a)	(sizeof (a) / sizeof ((a)[0]))
2054	struct ifnet *ifp = sc->sc_ifp;
2055	struct ieee80211com *ic = ifp->if_l2com;
2056	uint16_t tmp;
2057	int i, ntries;
2058
2059	RAL_LOCK_ASSERT(sc, MA_OWNED);
2060
2061	ural_set_testmode(sc);
2062	ural_write(sc, 0x308, 0x00f0);	/* XXX magic */
2063
2064	ural_stop(sc);
2065
2066	/* initialize MAC registers to default values */
2067	for (i = 0; i < N(ural_def_mac); i++)
2068		ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val);
2069
2070	/* wait for BBP and RF to wake up (this can take a long time!) */
2071	for (ntries = 0; ntries < 100; ntries++) {
2072		tmp = ural_read(sc, RAL_MAC_CSR17);
2073		if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) ==
2074		    (RAL_BBP_AWAKE | RAL_RF_AWAKE))
2075			break;
2076		if (ural_pause(sc, hz / 100))
2077			break;
2078	}
2079	if (ntries == 100) {
2080		device_printf(sc->sc_dev,
2081		    "timeout waiting for BBP/RF to wakeup\n");
2082		goto fail;
2083	}
2084
2085	/* we're ready! */
2086	ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY);
2087
2088	/* set basic rate set (will be updated later) */
2089	ural_write(sc, RAL_TXRX_CSR11, 0x15f);
2090
2091	if (ural_bbp_init(sc) != 0)
2092		goto fail;
2093
2094	ural_set_chan(sc, ic->ic_curchan);
2095
2096	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2097	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2098
2099	ural_set_txantenna(sc, sc->tx_ant);
2100	ural_set_rxantenna(sc, sc->rx_ant);
2101
2102	ural_set_macaddr(sc, IF_LLADDR(ifp));
2103
2104	/*
2105	 * Allocate Tx and Rx xfer queues.
2106	 */
2107	ural_setup_tx_list(sc);
2108
2109	/* kick Rx */
2110	tmp = RAL_DROP_PHY | RAL_DROP_CRC;
2111	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2112		tmp |= RAL_DROP_CTL | RAL_DROP_BAD_VERSION;
2113		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2114			tmp |= RAL_DROP_TODS;
2115		if (!(ifp->if_flags & IFF_PROMISC))
2116			tmp |= RAL_DROP_NOT_TO_ME;
2117	}
2118	ural_write(sc, RAL_TXRX_CSR2, tmp);
2119
2120	ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2121	ifp->if_drv_flags |= IFF_DRV_RUNNING;
2122	usb2_transfer_set_stall(sc->sc_xfer[URAL_BULK_WR]);
2123	usb2_transfer_start(sc->sc_xfer[URAL_BULK_RD]);
2124	return;
2125
2126fail:	ural_stop(sc);
2127#undef N
2128}
2129
2130static void
2131ural_init(void *priv)
2132{
2133	struct ural_softc *sc = priv;
2134	struct ifnet *ifp = sc->sc_ifp;
2135	struct ieee80211com *ic = ifp->if_l2com;
2136
2137	RAL_LOCK(sc);
2138	ural_init_locked(sc);
2139	RAL_UNLOCK(sc);
2140
2141	if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2142		ieee80211_start_all(ic);		/* start all vap's */
2143}
2144
2145static void
2146ural_stop(struct ural_softc *sc)
2147{
2148	struct ifnet *ifp = sc->sc_ifp;
2149
2150	RAL_LOCK_ASSERT(sc, MA_OWNED);
2151
2152	ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2153
2154	/*
2155	 * Drain all the transfers, if not already drained:
2156	 */
2157	RAL_UNLOCK(sc);
2158	usb2_transfer_drain(sc->sc_xfer[URAL_BULK_WR]);
2159	usb2_transfer_drain(sc->sc_xfer[URAL_BULK_RD]);
2160	RAL_LOCK(sc);
2161
2162	ural_unsetup_tx_list(sc);
2163
2164	/* disable Rx */
2165	ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX);
2166	/* reset ASIC and BBP (but won't reset MAC registers!) */
2167	ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP);
2168	/* wait a little */
2169	ural_pause(sc, hz / 10);
2170	ural_write(sc, RAL_MAC_CSR1, 0);
2171	/* wait a little */
2172	ural_pause(sc, hz / 10);
2173}
2174
2175static int
2176ural_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2177	const struct ieee80211_bpf_params *params)
2178{
2179	struct ieee80211com *ic = ni->ni_ic;
2180	struct ifnet *ifp = ic->ic_ifp;
2181	struct ural_softc *sc = ifp->if_softc;
2182
2183	RAL_LOCK(sc);
2184	/* prevent management frames from being sent if we're not ready */
2185	if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2186		RAL_UNLOCK(sc);
2187		m_freem(m);
2188		ieee80211_free_node(ni);
2189		return ENETDOWN;
2190	}
2191	if (sc->tx_nfree < RAL_TX_MINFREE) {
2192		ifp->if_drv_flags |= IFF_DRV_OACTIVE;
2193		RAL_UNLOCK(sc);
2194		m_freem(m);
2195		ieee80211_free_node(ni);
2196		return EIO;
2197	}
2198
2199	ifp->if_opackets++;
2200
2201	if (params == NULL) {
2202		/*
2203		 * Legacy path; interpret frame contents to decide
2204		 * precisely how to send the frame.
2205		 */
2206		if (ural_tx_mgt(sc, m, ni) != 0)
2207			goto bad;
2208	} else {
2209		/*
2210		 * Caller supplied explicit parameters to use in
2211		 * sending the frame.
2212		 */
2213		if (ural_tx_raw(sc, m, ni, params) != 0)
2214			goto bad;
2215	}
2216	RAL_UNLOCK(sc);
2217	return 0;
2218bad:
2219	ifp->if_oerrors++;
2220	RAL_UNLOCK(sc);
2221	ieee80211_free_node(ni);
2222	return EIO;		/* XXX */
2223}
2224
2225static void
2226ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni)
2227{
2228	struct ieee80211vap *vap = ni->ni_vap;
2229	struct ural_vap *uvp = URAL_VAP(vap);
2230
2231	/* clear statistic registers (STA_CSR0 to STA_CSR10) */
2232	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta);
2233
2234	ieee80211_amrr_node_init(&uvp->amrr, &URAL_NODE(ni)->amn, ni);
2235
2236	usb2_callout_reset(&uvp->amrr_ch, hz, ural_amrr_timeout, uvp);
2237}
2238
2239static void
2240ural_amrr_timeout(void *arg)
2241{
2242	struct ural_vap *uvp = arg;
2243	struct ieee80211vap *vap = &uvp->vap;
2244	struct ieee80211com *ic = vap->iv_ic;
2245
2246	ieee80211_runtask(ic, &uvp->amrr_task);
2247}
2248
2249static void
2250ural_amrr_task(void *arg, int pending)
2251{
2252	struct ural_vap *uvp = arg;
2253	struct ieee80211vap *vap = &uvp->vap;
2254	struct ieee80211com *ic = vap->iv_ic;
2255	struct ifnet *ifp = ic->ic_ifp;
2256	struct ural_softc *sc = ifp->if_softc;
2257	struct ieee80211_node *ni = vap->iv_bss;
2258	int ok, fail;
2259
2260	RAL_LOCK(sc);
2261	/* read and clear statistic registers (STA_CSR0 to STA_CSR10) */
2262	ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta));
2263
2264	ok = sc->sta[7] +		/* TX ok w/o retry */
2265	     sc->sta[8];		/* TX ok w/ retry */
2266	fail = sc->sta[9];		/* TX retry-fail count */
2267
2268	ieee80211_amrr_tx_update(&URAL_NODE(ni)->amn,
2269	    ok+fail, ok, sc->sta[8] + fail);
2270	(void) ieee80211_amrr_choose(ni, &URAL_NODE(ni)->amn);
2271
2272	ifp->if_oerrors += fail;	/* count TX retry-fail as Tx errors */
2273
2274	usb2_callout_reset(&uvp->amrr_ch, hz, ural_amrr_timeout, uvp);
2275	RAL_UNLOCK(sc);
2276}
2277
2278static int
2279ural_pause(struct ural_softc *sc, int timeout)
2280{
2281
2282	usb2_pause_mtx(&sc->sc_mtx, timeout);
2283	return (0);
2284}
2285