uart_bus.h revision 197721
1215976Sjmallett/*- 2232812Sjmallett * Copyright (c) 2003 Marcel Moolenaar 3215976Sjmallett * All rights reserved. 4215976Sjmallett * 5215976Sjmallett * Redistribution and use in source and binary forms, with or without 6215976Sjmallett * modification, are permitted provided that the following conditions 7215976Sjmallett * are met: 8215976Sjmallett * 9215976Sjmallett * 1. Redistributions of source code must retain the above copyright 10215976Sjmallett * notice, this list of conditions and the following disclaimer. 11215976Sjmallett * 2. Redistributions in binary form must reproduce the above copyright 12215976Sjmallett * notice, this list of conditions and the following disclaimer in the 13215976Sjmallett * documentation and/or other materials provided with the distribution. 14215976Sjmallett * 15215976Sjmallett * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16215976Sjmallett * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17215976Sjmallett * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18232812Sjmallett * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19215976Sjmallett * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20215976Sjmallett * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21215976Sjmallett * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22215976Sjmallett * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23215976Sjmallett * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24215976Sjmallett * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25215976Sjmallett * 26215976Sjmallett * $FreeBSD: head/sys/dev/uart/uart_bus.h 197721 2009-10-02 22:30:44Z marcel $ 27215976Sjmallett */ 28215976Sjmallett 29232812Sjmallett#ifndef _DEV_UART_BUS_H_ 30215976Sjmallett#define _DEV_UART_BUS_H_ 31215976Sjmallett 32215976Sjmallett#ifndef KLD_MODULE 33215976Sjmallett#include "opt_uart.h" 34215976Sjmallett#endif 35215976Sjmallett 36215976Sjmallett#include <sys/serial.h> 37215976Sjmallett#include <sys/timepps.h> 38215976Sjmallett 39215976Sjmallett/* Drain and flush targets. */ 40215976Sjmallett#define UART_DRAIN_RECEIVER 0x0001 41215976Sjmallett#define UART_DRAIN_TRANSMITTER 0x0002 42215976Sjmallett#define UART_FLUSH_RECEIVER UART_DRAIN_RECEIVER 43215976Sjmallett#define UART_FLUSH_TRANSMITTER UART_DRAIN_TRANSMITTER 44215976Sjmallett 45215976Sjmallett/* Received character status bits. */ 46215976Sjmallett#define UART_STAT_BREAK 0x0100 47215976Sjmallett#define UART_STAT_FRAMERR 0x0200 48215976Sjmallett#define UART_STAT_OVERRUN 0x0400 49215976Sjmallett#define UART_STAT_PARERR 0x0800 50215976Sjmallett 51215976Sjmallett#ifdef UART_PPS_ON_CTS 52215976Sjmallett#define UART_SIG_DPPS SER_DCTS 53215976Sjmallett#define UART_SIG_PPS SER_CTS 54215976Sjmallett#else 55232812Sjmallett#define UART_SIG_DPPS SER_DDCD 56232812Sjmallett#define UART_SIG_PPS SER_DCD 57232812Sjmallett#endif 58215976Sjmallett 59215976Sjmallett/* UART_IOCTL() requests */ 60215976Sjmallett#define UART_IOCTL_BREAK 1 61215976Sjmallett#define UART_IOCTL_IFLOW 2 62215976Sjmallett#define UART_IOCTL_OFLOW 3 63215976Sjmallett#define UART_IOCTL_BAUD 4 64215976Sjmallett 65215976Sjmallett/* 66215976Sjmallett * UART class & instance (=softc) 67215976Sjmallett */ 68215976Sjmallettstruct uart_class { 69215976Sjmallett KOBJ_CLASS_FIELDS; 70215976Sjmallett struct uart_ops *uc_ops; /* Low-level console operations. */ 71215976Sjmallett u_int uc_range; /* Bus space address range. */ 72215976Sjmallett u_int uc_rclk; /* Default rclk for this device. */ 73215976Sjmallett}; 74215976Sjmallett 75215976Sjmallettstruct uart_softc { 76215976Sjmallett KOBJ_FIELDS; 77215976Sjmallett struct uart_class *sc_class; 78215976Sjmallett struct uart_bas sc_bas; 79215976Sjmallett device_t sc_dev; 80215976Sjmallett 81215976Sjmallett struct mtx sc_hwmtx_s; /* Spinlock protecting hardware. */ 82215976Sjmallett struct mtx *sc_hwmtx; 83215976Sjmallett 84215976Sjmallett struct resource *sc_rres; /* Register resource. */ 85215976Sjmallett int sc_rrid; 86215976Sjmallett int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */ 87215976Sjmallett struct resource *sc_ires; /* Interrupt resource. */ 88215976Sjmallett void *sc_icookie; 89215976Sjmallett int sc_irid; 90215976Sjmallett 91215976Sjmallett int sc_callout:1; /* This UART is opened for callout. */ 92215976Sjmallett int sc_fastintr:1; /* This UART uses fast interrupts. */ 93215976Sjmallett int sc_hwiflow:1; /* This UART has HW input flow ctl. */ 94215976Sjmallett int sc_hwoflow:1; /* This UART has HW output flow ctl. */ 95232812Sjmallett int sc_leaving:1; /* This UART is going away. */ 96215976Sjmallett int sc_opened:1; /* This UART is open for business. */ 97232812Sjmallett int sc_polled:1; /* This UART has no interrupts. */ 98232812Sjmallett int sc_txbusy:1; /* This UART is transmitting. */ 99232812Sjmallett int sc_isquelch:1; /* This UART has input squelched. */ 100232812Sjmallett 101232812Sjmallett struct uart_devinfo *sc_sysdev; /* System device (or NULL). */ 102232812Sjmallett 103232812Sjmallett int sc_altbrk; /* State for alt break sequence. */ 104232812Sjmallett uint32_t sc_hwsig; /* Signal state. Used by HW driver. */ 105232812Sjmallett 106232812Sjmallett /* Receiver data. */ 107232812Sjmallett uint16_t *sc_rxbuf; 108232812Sjmallett int sc_rxbufsz; 109232812Sjmallett int sc_rxput; 110232812Sjmallett int sc_rxget; 111232812Sjmallett int sc_rxfifosz; /* Size of RX FIFO. */ 112232812Sjmallett 113232812Sjmallett /* Transmitter data. */ 114232812Sjmallett uint8_t *sc_txbuf; 115232812Sjmallett int sc_txdatasz; 116232812Sjmallett int sc_txfifosz; /* Size of TX FIFO and buffer. */ 117232812Sjmallett 118232812Sjmallett /* Pulse capturing support (PPS). */ 119232812Sjmallett struct pps_state sc_pps; 120232812Sjmallett 121232812Sjmallett /* Upper layer data. */ 122232812Sjmallett void *sc_softih; 123232812Sjmallett uint32_t sc_ttypend; 124232812Sjmallett union { 125232812Sjmallett /* TTY specific data. */ 126232812Sjmallett struct { 127232812Sjmallett struct tty *tp; 128232812Sjmallett } u_tty; 129232812Sjmallett /* Keyboard specific data. */ 130232812Sjmallett struct { 131232812Sjmallett } u_kbd; 132232812Sjmallett } sc_u; 133232812Sjmallett}; 134232812Sjmallett 135232812Sjmallettextern devclass_t uart_devclass; 136232812Sjmallettextern char uart_driver_name[]; 137232812Sjmallett 138232812Sjmallettint uart_bus_attach(device_t dev); 139232812Sjmallettint uart_bus_detach(device_t dev); 140232812Sjmallettserdev_intr_t *uart_bus_ihand(device_t dev, int ipend); 141232812Sjmallettint uart_bus_ipend(device_t dev); 142232812Sjmallettint uart_bus_probe(device_t dev, int regshft, int rclk, int rid, int chan); 143232812Sjmallettint uart_bus_sysdev(device_t dev); 144232812Sjmallett 145232812Sjmallettvoid uart_sched_softih(struct uart_softc *, uint32_t); 146232812Sjmallett 147232812Sjmallettint uart_tty_attach(struct uart_softc *); 148232812Sjmallettint uart_tty_detach(struct uart_softc *); 149232812Sjmallettvoid uart_tty_intr(void *arg); 150232812Sjmallett 151232812Sjmallett/* 152232812Sjmallett * Receive buffer operations. 153232812Sjmallett */ 154232812Sjmallettstatic __inline int 155232812Sjmallettuart_rx_empty(struct uart_softc *sc) 156232812Sjmallett{ 157232812Sjmallett return ((sc->sc_rxget == sc->sc_rxput) ? 1 : 0); 158232812Sjmallett} 159232812Sjmallett 160232812Sjmallettstatic __inline int 161232812Sjmallettuart_rx_full(struct uart_softc *sc) 162232812Sjmallett{ 163232812Sjmallett return ((sc->sc_rxput + 1 < sc->sc_rxbufsz) 164232812Sjmallett ? (sc->sc_rxput + 1 == sc->sc_rxget) : (sc->sc_rxget == 0)); 165232812Sjmallett} 166232812Sjmallett 167232812Sjmallettstatic __inline int 168232812Sjmallettuart_rx_get(struct uart_softc *sc) 169215976Sjmallett{ 170215976Sjmallett int ptr, xc; 171215976Sjmallett 172215976Sjmallett ptr = sc->sc_rxget; 173215976Sjmallett if (ptr == sc->sc_rxput) 174215976Sjmallett return (-1); 175215976Sjmallett xc = sc->sc_rxbuf[ptr++]; 176215976Sjmallett sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; 177215976Sjmallett return (xc); 178215976Sjmallett} 179215976Sjmallett 180215976Sjmallettstatic __inline int 181215976Sjmallettuart_rx_next(struct uart_softc *sc) 182215976Sjmallett{ 183215976Sjmallett int ptr; 184215976Sjmallett 185215976Sjmallett ptr = sc->sc_rxget; 186215976Sjmallett if (ptr == sc->sc_rxput) 187232812Sjmallett return (-1); 188232812Sjmallett ptr += 1; 189215976Sjmallett sc->sc_rxget = (ptr < sc->sc_rxbufsz) ? ptr : 0; 190215976Sjmallett return (0); 191215976Sjmallett} 192215976Sjmallett 193215976Sjmallettstatic __inline int 194215976Sjmallettuart_rx_peek(struct uart_softc *sc) 195215976Sjmallett{ 196215976Sjmallett int ptr; 197215976Sjmallett 198215976Sjmallett ptr = sc->sc_rxget; 199215976Sjmallett return ((ptr == sc->sc_rxput) ? -1 : sc->sc_rxbuf[ptr]); 200215976Sjmallett} 201215976Sjmallett 202215976Sjmallettstatic __inline int 203215976Sjmallettuart_rx_put(struct uart_softc *sc, int xc) 204215976Sjmallett{ 205215976Sjmallett int ptr; 206215976Sjmallett 207232812Sjmallett ptr = (sc->sc_rxput + 1 < sc->sc_rxbufsz) ? sc->sc_rxput + 1 : 0; 208215976Sjmallett if (ptr == sc->sc_rxget) 209215976Sjmallett return (ENOSPC); 210215976Sjmallett sc->sc_rxbuf[sc->sc_rxput] = xc; 211215976Sjmallett sc->sc_rxput = ptr; 212215976Sjmallett return (0); 213215976Sjmallett} 214215976Sjmallett 215215976Sjmallett#endif /* _DEV_UART_BUS_H_ */ 216215976Sjmallett