hdac_private.h revision 171141 
1/*-
2 * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: head/sys/dev/sound/pci/hda/hdac_private.h 171141 2007-07-01 17:31:20Z ariff $
27 */
28
29#ifndef _HDAC_PRIVATE_H_
30#define _HDAC_PRIVATE_H_
31
32
33/****************************************************************************
34 * Miscellaneous defines
35 ****************************************************************************/
36#define HDAC_DMA_ALIGNMENT	128
37#define HDAC_CODEC_MAX		16
38
39#define HDAC_MTX_NAME		"hdac driver mutex"
40
41/****************************************************************************
42 * Helper Macros
43 ****************************************************************************/
44#define HDAC_READ_1(mem, offset)					\
45	bus_space_read_1((mem)->mem_tag, (mem)->mem_handle, (offset))
46#define HDAC_READ_2(mem, offset)					\
47	bus_space_read_2((mem)->mem_tag, (mem)->mem_handle, (offset))
48#define HDAC_READ_4(mem, offset)					\
49	bus_space_read_4((mem)->mem_tag, (mem)->mem_handle, (offset))
50#define HDAC_WRITE_1(mem, offset, value)				\
51	bus_space_write_1((mem)->mem_tag, (mem)->mem_handle, (offset), (value))
52#define HDAC_WRITE_2(mem, offset, value)				\
53	bus_space_write_2((mem)->mem_tag, (mem)->mem_handle, (offset), (value))
54#define HDAC_WRITE_4(mem, offset, value)				\
55	bus_space_write_4((mem)->mem_tag, (mem)->mem_handle, (offset), (value))
56
57#define HDAC_ISDCTL(sc, n)	(_HDAC_ISDCTL((n), (sc)->num_iss, (sc)->num_oss))
58#define HDAC_ISDSTS(sc, n)	(_HDAC_ISDSTS((n), (sc)->num_iss, (sc)->num_oss))
59#define HDAC_ISDPICB(sc, n)	(_HDAC_ISDPICB((n), (sc)->num_iss, (sc)->num_oss))
60#define HDAC_ISDCBL(sc, n)	(_HDAC_ISDCBL((n), (sc)->num_iss, (sc)->num_oss))
61#define HDAC_ISDLVI(sc, n)	(_HDAC_ISDLVI((n), (sc)->num_iss, (sc)->num_oss))
62#define HDAC_ISDFIFOD(sc, n)	(_HDAC_ISDFIFOD((n), (sc)->num_iss, (sc)->num_oss))
63#define HDAC_ISDFMT(sc, n)	(_HDAC_ISDFMT((n), (sc)->num_iss, (sc)->num_oss))
64#define HDAC_ISDBDPL(sc, n)	(_HDAC_ISDBDPL((n), (sc)->num_iss, (sc)->num_oss))
65#define HDAC_ISDBDPU(sc, n)	(_HDAC_ISDBDPU((n), (sc)->num_iss, (sc)->num_oss))
66
67#define HDAC_OSDCTL(sc, n)	(_HDAC_OSDCTL((n), (sc)->num_iss, (sc)->num_oss))
68#define HDAC_OSDSTS(sc, n)	(_HDAC_OSDSTS((n), (sc)->num_iss, (sc)->num_oss))
69#define HDAC_OSDPICB(sc, n)	(_HDAC_OSDPICB((n), (sc)->num_iss, (sc)->num_oss))
70#define HDAC_OSDCBL(sc, n)	(_HDAC_OSDCBL((n), (sc)->num_iss, (sc)->num_oss))
71#define HDAC_OSDLVI(sc, n)	(_HDAC_OSDLVI((n), (sc)->num_iss, (sc)->num_oss))
72#define HDAC_OSDFIFOD(sc, n)	(_HDAC_OSDFIFOD((n), (sc)->num_iss, (sc)->num_oss))
73#define HDAC_OSDBDPL(sc, n)	(_HDAC_OSDBDPL((n), (sc)->num_iss, (sc)->num_oss))
74#define HDAC_OSDBDPU(sc, n)	(_HDAC_OSDBDPU((n), (sc)->num_iss, (sc)->num_oss))
75
76#define HDAC_BSDCTL(sc, n)	(_HDAC_BSDCTL((n), (sc)->num_iss, (sc)->num_oss))
77#define HDAC_BSDSTS(sc, n)	(_HDAC_BSDSTS((n), (sc)->num_iss, (sc)->num_oss))
78#define HDAC_BSDPICB(sc, n)	(_HDAC_BSDPICB((n), (sc)->num_iss, (sc)->num_oss))
79#define HDAC_BSDCBL(sc, n)	(_HDAC_BSDCBL((n), (sc)->num_iss, (sc)->num_oss))
80#define HDAC_BSDLVI(sc, n)	(_HDAC_BSDLVI((n), (sc)->num_iss, (sc)->num_oss))
81#define HDAC_BSDFIFOD(sc, n)	(_HDAC_BSDFIFOD((n), (sc)->num_iss, (sc)->num_oss))
82#define HDAC_BSDBDPL(sc, n)	(_HDAC_BSDBDPL((n), (sc)->num_iss, (sc)->num_oss))
83#define HDAC_BSDBDPU(sc, n)	(_HDAC_BSDBDPU((n), (sc)->num_iss, (sc)->num_oss))
84
85
86/****************************************************************************
87 * Custom hdac malloc type
88 ****************************************************************************/
89MALLOC_DECLARE(M_HDAC);
90
91/****************************************************************************
92 * struct hdac_mem
93 *
94 * Holds the resources necessary to describe the physical memory associated
95 * with the device.
96 ****************************************************************************/
97struct hdac_mem {
98	struct resource		*mem_res;
99	int			mem_rid;
100	bus_space_tag_t		mem_tag;
101	bus_space_handle_t	mem_handle;
102};
103
104/****************************************************************************
105 * struct hdac_irq
106 *
107 * Holds the resources necessary to describe the irq associated with the
108 * device.
109 ****************************************************************************/
110struct hdac_irq {
111	struct resource		*irq_res;
112	int			irq_rid;
113	void			*irq_handle;
114};
115
116/****************************************************************************
117 * struct hdac_dma
118 *
119 * This structure is used to hold all the information to manage the dma
120 * states.
121 ****************************************************************************/
122struct hdac_dma {
123	bus_dma_tag_t	dma_tag;
124	bus_dmamap_t	dma_map;
125	bus_addr_t	dma_paddr;
126	bus_size_t	dma_size;
127	caddr_t		dma_vaddr;
128};
129
130/****************************************************************************
131 * struct hdac_rirb
132 *
133 * Hold a response from a verb sent to a codec received via the rirb.
134 ****************************************************************************/
135struct hdac_rirb {
136	uint32_t	response;
137	uint32_t	response_ex;
138};
139
140#define HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK	0x0000000f
141#define HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET	0
142#define HDAC_RIRB_RESPONSE_EX_UNSOLICITED	0x00000010
143
144#define HDAC_RIRB_RESPONSE_EX_SDATA_IN(response_ex)			\
145    (((response_ex) & HDAC_RIRB_RESPONSE_EX_SDATA_IN_MASK) >>		\
146    HDAC_RIRB_RESPONSE_EX_SDATA_IN_OFFSET)
147
148/****************************************************************************
149 * struct hdac_command_list
150 *
151 * This structure holds the list of verbs that are to be sent to the codec
152 * via the corb and the responses received via the rirb. It's allocated by
153 * the codec driver and is owned by it.
154 ****************************************************************************/
155struct hdac_command_list {
156	int		num_commands;
157	uint32_t	*verbs;
158	uint32_t	*responses;
159};
160
161typedef int nid_t;
162
163struct hdac_softc;
164/****************************************************************************
165 * struct hdac_codec
166 *
167 ****************************************************************************/
168struct hdac_codec {
169	int	verbs_sent;
170	int	responses_received;
171	nid_t	cad;
172	struct hdac_command_list *commands;
173	struct hdac_softc *sc;
174};
175
176struct hdac_bdle {
177	volatile uint32_t addrl;
178	volatile uint32_t addrh;
179	volatile uint32_t len;
180	volatile uint32_t ioc;
181} __packed;
182
183#define HDA_MAX_CONNS	32
184#define HDA_MAX_NAMELEN	32
185
186struct hdac_devinfo;
187
188struct hdac_widget {
189	nid_t nid;
190	int type;
191	int enable;
192	int nconns, selconn;
193	uint32_t pflags, ctlflags;
194	nid_t conns[HDA_MAX_CONNS];
195	char name[HDA_MAX_NAMELEN];
196	struct hdac_devinfo *devinfo;
197	struct {
198		uint32_t widget_cap;
199		uint32_t outamp_cap;
200		uint32_t inamp_cap;
201		uint32_t supp_stream_formats;
202		uint32_t supp_pcm_size_rate;
203		uint32_t eapdbtl;
204		int outpath;
205	} param;
206	union {
207		struct {
208			uint32_t config;
209			uint32_t cap;
210			uint32_t ctrl;
211		} pin;
212	} wclass;
213};
214
215struct hdac_audio_ctl {
216	struct hdac_widget *widget, *childwidget;
217	int enable;
218	int index;
219	int mute, step, size, offset;
220	int left, right;
221	uint32_t muted;
222	int ossdev;
223	uint32_t dir, ossmask, ossval;
224};
225
226/****************************************************************************
227 * struct hdac_devinfo
228 *
229 * Holds all the parameters of a given codec function group. This is stored
230 * in the ivar of each child of the hdac bus
231 ****************************************************************************/
232struct hdac_devinfo {
233	device_t dev;
234	uint16_t vendor_id;
235	uint16_t device_id;
236	uint8_t revision_id;
237	uint8_t stepping_id;
238	uint8_t node_type;
239	nid_t nid;
240	nid_t startnode, endnode;
241	int nodecnt;
242	struct hdac_codec *codec;
243	struct hdac_widget *widget;
244	union {
245		struct {
246			uint32_t outamp_cap;
247			uint32_t inamp_cap;
248			uint32_t supp_stream_formats;
249			uint32_t supp_pcm_size_rate;
250			int ctlcnt, pcnt, rcnt;
251			struct hdac_audio_ctl *ctl;
252			uint32_t mvol;
253			uint32_t quirks;
254			uint32_t gpio;
255			int ossidx;
256			int playcnt, reccnt;
257			int parsing_strategy;
258		} audio;
259		/* XXX undefined: modem, hdmi. */
260	} function;
261};
262
263struct hdac_chan {
264	struct snd_dbuf *b;
265	struct pcm_channel *c;
266	struct pcmchan_caps caps;
267	struct hdac_devinfo *devinfo;
268	struct hdac_dma	bdl_dma;
269	uint32_t spd, fmt, fmtlist[8], pcmrates[16];
270	uint32_t supp_stream_formats, supp_pcm_size_rate;
271	uint32_t ptr, prevptr, blkcnt, blksz;
272	uint32_t *dmapos;
273	int active;
274	int dir;
275	int off;
276	int sid;
277	int bit16, bit32;
278	nid_t io[16];
279};
280
281/****************************************************************************
282 * struct hdac_softc
283 *
284 * This structure holds the current state of the hdac driver.
285 ****************************************************************************/
286struct hdac_softc {
287	device_t	dev;
288	device_t	hdabus;
289	struct mtx	*lock;
290
291	struct intr_config_hook intrhook;
292
293	struct hdac_mem	mem;
294	struct hdac_irq	irq;
295	uint32_t pci_subvendor;
296
297	int		nocache;
298
299	int		num_iss;
300	int		num_oss;
301	int		num_bss;
302	int		support_64bit;
303	int		streamcnt;
304
305	int		corb_size;
306	struct hdac_dma corb_dma;
307	int		corb_wp;
308
309	int		rirb_size;
310	struct hdac_dma	rirb_dma;
311	int		rirb_rp;
312
313	struct hdac_dma	pos_dma;
314
315	struct hdac_chan	play, rec;
316	bus_dma_tag_t		chan_dmat;
317	int			chan_size;
318	int			chan_blkcnt;
319
320	/*
321	 * Polling
322	 */
323	int			polling;
324	int			poll_ticks;
325	int			poll_ival;
326	struct callout		poll_hda;
327	struct callout		poll_hdac;
328	struct callout		poll_jack;
329
330	struct task		unsolq_task;
331
332#define HDAC_UNSOLQ_MAX		64
333#define HDAC_UNSOLQ_READY	0
334#define HDAC_UNSOLQ_BUSY	1
335	int		unsolq_rp;
336	int		unsolq_wp;
337	int		unsolq_st;
338	uint32_t	unsolq[HDAC_UNSOLQ_MAX];
339
340	struct hdac_codec *codecs[HDAC_CODEC_MAX];
341
342	int		registered;
343};
344
345/****************************************************************************
346 * struct hdac_command flags
347 ****************************************************************************/
348#define HDAC_COMMAND_FLAG_WAITOK	0x0000
349#define HDAC_COMMAND_FLAG_NOWAIT	0x0001
350
351#endif
352