scc_dev_z8530.c revision 160689
1/*- 2 * Copyright (c) 2004-2006 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/scc/scc_dev_z8530.c 160689 2006-07-26 03:10:01Z marcel $"); 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/conf.h> 34#include <machine/bus.h> 35#include <sys/rman.h> 36#include <sys/serial.h> 37 38#include <dev/scc/scc_bfe.h> 39#include <dev/scc/scc_bus.h> 40 41#include <dev/ic/z8530.h> 42 43#include "scc_if.h" 44 45static int z8530_bfe_attach(struct scc_softc *, int); 46static int z8530_bfe_iclear(struct scc_softc *, struct scc_chan *); 47static int z8530_bfe_ipend(struct scc_softc *); 48static int z8530_bfe_probe(struct scc_softc *); 49 50static kobj_method_t z8530_methods[] = { 51 KOBJMETHOD(scc_attach, z8530_bfe_attach), 52 KOBJMETHOD(scc_iclear, z8530_bfe_iclear), 53 KOBJMETHOD(scc_ipend, z8530_bfe_ipend), 54 KOBJMETHOD(scc_probe, z8530_bfe_probe), 55 { 0, 0 } 56}; 57 58struct scc_class scc_z8530_class = { 59 "z8530 class", 60 z8530_methods, 61 sizeof(struct scc_softc), 62 .cl_channels = 2, 63 .cl_class = SCC_CLASS_Z8530, 64 .cl_modes = SCC_MODE_ASYNC | SCC_MODE_BISYNC | SCC_MODE_HDLC, 65 .cl_range = CHAN_B - CHAN_A, 66}; 67 68/* Multiplexed I/O. */ 69static __inline void 70scc_setmreg(struct scc_bas *bas, int ch, int reg, int val) 71{ 72 73 scc_setreg(bas, ch + REG_CTRL, reg); 74 scc_barrier(bas); 75 scc_setreg(bas, ch + REG_CTRL, val); 76} 77 78static __inline uint8_t 79scc_getmreg(struct scc_bas *bas, int ch, int reg) 80{ 81 82 scc_setreg(bas, ch + REG_CTRL, reg); 83 scc_barrier(bas); 84 return (scc_getreg(bas, ch + REG_CTRL)); 85} 86 87static int 88z8530_bfe_attach(struct scc_softc *sc, int reset) 89{ 90 struct scc_bas *bas; 91 92 bas = &sc->sc_bas; 93 return (0); 94} 95 96static int 97z8530_bfe_iclear(struct scc_softc *sc, struct scc_chan *ch) 98{ 99 struct scc_bas *bas; 100 int c; 101 102 bas = &sc->sc_bas; 103 c = (ch->ch_nr == 1) ? CHAN_A : CHAN_B; 104 mtx_lock_spin(&sc->sc_hwmtx); 105 if (ch->ch_ipend & SER_INT_TXIDLE) { 106 scc_setreg(bas, c + REG_CTRL, CR_RSTTXI); 107 scc_barrier(bas); 108 } 109 if (ch->ch_ipend & SER_INT_RXREADY) { 110 scc_getreg(bas, c + REG_DATA); 111 scc_barrier(bas); 112 } 113 if (ch->ch_ipend & (SER_INT_OVERRUN|SER_INT_BREAK)) 114 scc_setreg(bas, c + REG_CTRL, CR_RSTERR); 115 mtx_unlock_spin(&sc->sc_hwmtx); 116 return (0); 117} 118 119#define SIGCHG(c, i, s, d) \ 120 if (c) { \ 121 i |= (i & s) ? s : s | d; \ 122 } else { \ 123 i = (i & s) ? (i & ~s) | d : i; \ 124 } 125 126static int 127z8530_bfe_ipend(struct scc_softc *sc) 128{ 129 struct scc_bas *bas; 130 struct scc_chan *ch[2]; 131 uint32_t sig; 132 uint8_t bes, ip, src; 133 134 bas = &sc->sc_bas; 135 ch[0] = &sc->sc_chan[0]; 136 ch[1] = &sc->sc_chan[1]; 137 ch[0]->ch_ipend = 0; 138 ch[1]->ch_ipend = 0; 139 140 mtx_lock_spin(&sc->sc_hwmtx); 141 ip = scc_getmreg(bas, CHAN_A, RR_IP); 142 if (ip & IP_RIA) 143 ch[0]->ch_ipend |= SER_INT_RXREADY; 144 if (ip & IP_RIB) 145 ch[1]->ch_ipend |= SER_INT_RXREADY; 146 if (ip & IP_TIA) 147 ch[0]->ch_ipend |= SER_INT_TXIDLE; 148 if (ip & IP_TIB) 149 ch[1]->ch_ipend |= SER_INT_TXIDLE; 150 if (ip & IP_SIA) { 151 scc_setreg(bas, CHAN_A + REG_CTRL, CR_RSTXSI); 152 scc_barrier(bas); 153 bes = scc_getreg(bas, CHAN_A + REG_CTRL); 154 if (bes & BES_BRK) 155 ch[0]->ch_ipend |= SER_INT_BREAK; 156 sig = ch[0]->ch_hwsig; 157 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 158 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 159 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 160 if (sig & SER_MASK_DELTA) { 161 ch[0]->ch_hwsig = sig; 162 ch[0]->ch_ipend |= SER_INT_SIGCHG; 163 } 164 src = scc_getmreg(bas, CHAN_A, RR_SRC); 165 if (src & SRC_OVR) 166 ch[0]->ch_ipend |= SER_INT_OVERRUN; 167 } 168 if (ip & IP_SIB) { 169 scc_setreg(bas, CHAN_B + REG_CTRL, CR_RSTXSI); 170 scc_barrier(bas); 171 bes = scc_getreg(bas, CHAN_B + REG_CTRL); 172 if (bes & BES_BRK) 173 ch[1]->ch_ipend |= SER_INT_BREAK; 174 sig = ch[1]->ch_hwsig; 175 SIGCHG(bes & BES_CTS, sig, SER_CTS, SER_DCTS); 176 SIGCHG(bes & BES_DCD, sig, SER_DCD, SER_DDCD); 177 SIGCHG(bes & BES_SYNC, sig, SER_DSR, SER_DDSR); 178 if (sig & SER_MASK_DELTA) { 179 ch[1]->ch_hwsig = sig; 180 ch[1]->ch_ipend |= SER_INT_SIGCHG; 181 } 182 src = scc_getmreg(bas, CHAN_B, RR_SRC); 183 if (src & SRC_OVR) 184 ch[1]->ch_ipend |= SER_INT_OVERRUN; 185 } 186 mtx_unlock_spin(&sc->sc_hwmtx); 187 188 return (ch[0]->ch_ipend | ch[1]->ch_ipend); 189} 190 191static int 192z8530_bfe_probe(struct scc_softc *sc) 193{ 194 struct scc_bas *bas; 195 196 bas = &sc->sc_bas; 197 return (0); 198} 199