1139749Simp#- 265176Sdfr# Copyright (c) 2000 Doug Rabson 365176Sdfr# All rights reserved. 465176Sdfr# 565176Sdfr# Redistribution and use in source and binary forms, with or without 665176Sdfr# modification, are permitted provided that the following conditions 765176Sdfr# are met: 865176Sdfr# 1. Redistributions of source code must retain the above copyright 965176Sdfr# notice, this list of conditions and the following disclaimer. 1065176Sdfr# 2. Redistributions in binary form must reproduce the above copyright 1165176Sdfr# notice, this list of conditions and the following disclaimer in the 1265176Sdfr# documentation and/or other materials provided with the distribution. 1365176Sdfr# 1465176Sdfr# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1565176Sdfr# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1665176Sdfr# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1765176Sdfr# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1865176Sdfr# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1965176Sdfr# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2065176Sdfr# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2165176Sdfr# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2265176Sdfr# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2365176Sdfr# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2465176Sdfr# SUCH DAMAGE. 2565176Sdfr# 2665176Sdfr# $FreeBSD: releng/10.3/sys/dev/pci/pcib_if.m 279472 2015-03-01 04:28:30Z rstone $ 2765176Sdfr# 2865176Sdfr 2965176Sdfr#include <sys/bus.h> 30279470Srstone#include <sys/rman.h> 31145026Simp#include <dev/pci/pcivar.h> 32279470Srstone#include <dev/pci/pcib_private.h> 3365176Sdfr 3465176SdfrINTERFACE pcib; 3565176Sdfr 36145019SimpCODE { 37145019Simp static int 38145019Simp null_route_interrupt(device_t pcib, device_t dev, int pin) 39145019Simp { 40145019Simp return (PCI_INVALID_IRQ); 41145019Simp } 42145019Simp}; 43145019Simp 4465176Sdfr# 4565176Sdfr# Return the number of slots on the attached PCI bus. 4665176Sdfr# 4765176SdfrMETHOD int maxslots { 4865176Sdfr device_t dev; 4965176Sdfr}; 5065176Sdfr 5165176Sdfr# 52279470Srstone# 53279470Srstone# Return the number of functions on the attached PCI bus. 54279470Srstone# 55279470SrstoneMETHOD int maxfuncs { 56279470Srstone device_t dev; 57279470Srstone} DEFAULT pcib_maxfuncs; 58279470Srstone 59279470Srstone# 6065176Sdfr# Read configuration space on the PCI bus. The bus, slot and func 6165176Sdfr# arguments determine the device which is being read and the reg 6265176Sdfr# argument is a byte offset into configuration space for that 6365176Sdfr# device. The width argument (which should be 1, 2 or 4) specifies how 6465176Sdfr# many byte of configuration space to read from that offset. 6565176Sdfr# 6665176SdfrMETHOD u_int32_t read_config { 6765176Sdfr device_t dev; 6869480Sgallatin u_int bus; 6969480Sgallatin u_int slot; 7069480Sgallatin u_int func; 7169480Sgallatin u_int reg; 7265176Sdfr int width; 7365176Sdfr}; 7465176Sdfr 7565176Sdfr# 7665176Sdfr# Write configuration space on the PCI bus. The bus, slot and func 7765176Sdfr# arguments determine the device which is being written and the reg 7865176Sdfr# argument is a byte offset into configuration space for that 7965176Sdfr# device. The value field is written to the configuration space, with 8065176Sdfr# the number of bytes written depending on the width argument. 8165176Sdfr# 8265176SdfrMETHOD void write_config { 8365176Sdfr device_t dev; 8469480Sgallatin u_int bus; 8569480Sgallatin u_int slot; 8669480Sgallatin u_int func; 8769480Sgallatin u_int reg; 8865176Sdfr u_int32_t value; 8965176Sdfr int width; 9065176Sdfr}; 9167222Simp 9267222Simp# 9367222Simp# Route an interrupt. Returns a value suitable for stuffing into 9467222Simp# a device's interrupt register. 9567222Simp# 9667222SimpMETHOD int route_interrupt { 97164067Sjhb device_t pcib; 98164067Sjhb device_t dev; 99164067Sjhb int pin; 100145026Simp} DEFAULT null_route_interrupt; 101164264Sjhb 102164264Sjhb# 103164264Sjhb# Allocate 'count' MSI messsages mapped onto 'count' IRQs. 'irq' points 104164264Sjhb# to an array of at least 'count' ints. The max number of messages this 105164264Sjhb# device supports is included so that the MD code can take that into 106164264Sjhb# account when assigning resources so that the proper number of low bits 107164264Sjhb# are clear in the resulting message data value. 108164264Sjhb# 109164264SjhbMETHOD int alloc_msi { 110164264Sjhb device_t pcib; 111164264Sjhb device_t dev; 112164264Sjhb int count; 113164264Sjhb int maxcount; 114164264Sjhb int *irqs; 115164264Sjhb}; 116164264Sjhb 117164264Sjhb# 118169221Sjhb# Release 'count' MSI messages mapped onto 'count' IRQs stored in the 119169221Sjhb# array pointed to by 'irqs'. 120164264Sjhb# 121164264SjhbMETHOD int release_msi { 122164264Sjhb device_t pcib; 123164264Sjhb device_t dev; 124164264Sjhb int count; 125164264Sjhb int *irqs; 126164264Sjhb}; 127164264Sjhb 128164264Sjhb# 129164264Sjhb# Allocate a single MSI-X message mapped onto '*irq'. 130164264Sjhb# 131164264SjhbMETHOD int alloc_msix { 132164264Sjhb device_t pcib; 133164264Sjhb device_t dev; 134164264Sjhb int *irq; 135164264Sjhb}; 136164264Sjhb 137164264Sjhb# 138169221Sjhb# Release a single MSI-X message mapped onto 'irq'. 139166176Sjhb# 140169221SjhbMETHOD int release_msix { 141166176Sjhb device_t pcib; 142166176Sjhb device_t dev; 143166176Sjhb int irq; 144166176Sjhb}; 145166176Sjhb 146166176Sjhb# 147169221Sjhb# Determine the MSI/MSI-X message address and data for 'irq'. The address 148169221Sjhb# is returned in '*addr', and the data in '*data'. 149164264Sjhb# 150169221SjhbMETHOD int map_msi { 151164264Sjhb device_t pcib; 152164264Sjhb device_t dev; 153164264Sjhb int irq; 154169221Sjhb uint64_t *addr; 155169221Sjhb uint32_t *data; 156164264Sjhb}; 157211430Sjhb 158211430Sjhb# 159211430Sjhb# Return the device power state to be used during a system sleep state 160211430Sjhb# transition such as suspend and resume. 161211430Sjhb# 162211430SjhbMETHOD int power_for_sleep { 163211430Sjhb device_t pcib; 164211430Sjhb device_t dev; 165211430Sjhb int *pstate; 166211430Sjhb}; 167279470Srstone 168279470Srstone# 169279470Srstone# Return the PCI Routing Identifier (RID) for the device. 170279470Srstone# 171279470SrstoneMETHOD uint16_t get_rid { 172279472Srstone device_t pcib; 173279472Srstone device_t dev; 174279470Srstone} DEFAULT pcib_get_rid; 175279470Srstone 176279470Srstone# 177279470Srstone# Enable Alternative RID Interpretation if both the downstream port (pcib) 178279470Srstone# and the endpoint device (dev) both support it. 179279470Srstone# 180279470SrstoneMETHOD int try_enable_ari { 181279470Srstone device_t pcib; 182279470Srstone device_t dev; 183279470Srstone}; 184279470Srstone 185