if_nve.c revision 153134
1/* 2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>. 3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $Id: if_nv.c,v 1.19 2004/08/12 14:00:05 q Exp $ 28 */ 29 30/* 31 * NVIDIA nForce MCP Networking Adapter driver 32 * 33 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA 34 * through their web site. 35 * 36 * All mainstream nForce and nForce2 motherboards are supported. This module 37 * is as stable, sometimes more stable, than the linux version. (Recent 38 * Linux stability issues seem to be related to some issues with newer 39 * distributions using GCC 3.x, however this don't appear to effect FreeBSD 40 * 5.x). 41 * 42 * In accordance with the NVIDIA distribution license it is necessary to 43 * link this module against the nvlibnet.o binary object included in the 44 * Linux driver source distribution. The binary component is not modified in 45 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c 46 * linux kernel module "wrapper". 47 * 48 * The Linux driver uses a common code API that is shared between Win32 and 49 * i386 Linux. This abstracts the low level driver functions and uses 50 * callbacks and hooks to access the underlying hardware device. By using 51 * this same API in a FreeBSD kernel module it is possible to support the 52 * hardware without breaching the Linux source distributions licensing 53 * requirements, or obtaining the hardware programming specifications. 54 * 55 * Although not conventional, it works, and given the relatively small 56 * amount of hardware centric code, it's hopefully no more buggy than its 57 * linux counterpart. 58 * 59 * NVIDIA now support the nForce3 AMD64 platform, however I have been 60 * unable to access such a system to verify support. However, the code is 61 * reported to work with little modification when compiled with the AMD64 62 * version of the NVIDIA Linux library. All that should be necessary to make 63 * the driver work is to link it directly into the kernel, instead of as a 64 * module, and apply the docs/amd64.diff patch in this source distribution to 65 * the NVIDIA Linux driver source. 66 * 67 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well 68 * as recent versions of DragonFly. 69 * 70 * Written by Quinton Dolan <q@onthenet.com.au> 71 * Portions based on existing FreeBSD network drivers. 72 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files. 73 * 74 */ 75 76#include <sys/cdefs.h> 77__FBSDID("$FreeBSD: head/sys/dev/nve/if_nve.c 153134 2005-12-05 20:49:45Z jhb $"); 78 79#include <sys/param.h> 80#include <sys/systm.h> 81#include <sys/sockio.h> 82#include <sys/mbuf.h> 83#include <sys/malloc.h> 84#include <sys/kernel.h> 85#include <sys/socket.h> 86#include <sys/sysctl.h> 87#include <sys/queue.h> 88#include <sys/module.h> 89 90#include <net/if.h> 91#include <net/if_arp.h> 92#include <net/ethernet.h> 93#include <net/if_dl.h> 94#include <net/if_media.h> 95#include <net/if_types.h> 96#include <net/bpf.h> 97#include <net/if_vlan_var.h> 98 99#include <machine/bus.h> 100#include <machine/resource.h> 101 102#include <vm/vm.h> /* for vtophys */ 103#include <vm/pmap.h> /* for vtophys */ 104#include <machine/clock.h> /* for DELAY */ 105#include <sys/bus.h> 106#include <sys/rman.h> 107 108#include <dev/pci/pcireg.h> 109#include <dev/pci/pcivar.h> 110#include <dev/mii/mii.h> 111#include <dev/mii/miivar.h> 112#include "miibus_if.h" 113 114/* Include NVIDIA Linux driver header files */ 115#define linux 116#include <contrib/dev/nve/basetype.h> 117#include <contrib/dev/nve/phy.h> 118#include "os+%DIKED-nve.h" 119#include <contrib/dev/nve/drvinfo.h> 120#include <contrib/dev/nve/adapter.h> 121#undef linux 122 123#include <dev/nve/if_nvereg.h> 124 125MODULE_DEPEND(nve, pci, 1, 1, 1); 126MODULE_DEPEND(nve, ether, 1, 1, 1); 127MODULE_DEPEND(nve, miibus, 1, 1, 1); 128 129static int nve_probe(device_t); 130static int nve_attach(device_t); 131static int nve_detach(device_t); 132static void nve_init(void *); 133static void nve_init_locked(struct nve_softc *); 134static void nve_stop(struct nve_softc *); 135static void nve_shutdown(device_t); 136static int nve_init_rings(struct nve_softc *); 137static void nve_free_rings(struct nve_softc *); 138 139static void nve_ifstart(struct ifnet *); 140static void nve_ifstart_locked(struct ifnet *); 141static int nve_ioctl(struct ifnet *, u_long, caddr_t); 142static void nve_intr(void *); 143static void nve_tick(void *); 144static void nve_setmulti(struct nve_softc *); 145static void nve_watchdog(struct ifnet *); 146static void nve_update_stats(struct nve_softc *); 147 148static int nve_ifmedia_upd(struct ifnet *); 149static void nve_ifmedia_upd_locked(struct ifnet *); 150static void nve_ifmedia_sts(struct ifnet *, struct ifmediareq *); 151static int nve_miibus_readreg(device_t, int, int); 152static void nve_miibus_writereg(device_t, int, int, int); 153 154static void nve_dmamap_cb(void *, bus_dma_segment_t *, int, int); 155static void nve_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int); 156 157static NV_SINT32 nve_osalloc(PNV_VOID, PMEMORY_BLOCK); 158static NV_SINT32 nve_osfree(PNV_VOID, PMEMORY_BLOCK); 159static NV_SINT32 nve_osallocex(PNV_VOID, PMEMORY_BLOCKEX); 160static NV_SINT32 nve_osfreeex(PNV_VOID, PMEMORY_BLOCKEX); 161static NV_SINT32 nve_osclear(PNV_VOID, PNV_VOID, NV_SINT32); 162static NV_SINT32 nve_osdelay(PNV_VOID, NV_UINT32); 163static NV_SINT32 nve_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *); 164static NV_SINT32 nve_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID); 165static NV_SINT32 nve_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32); 166static NV_SINT32 nve_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8); 167static NV_SINT32 nve_oslinkchg(PNV_VOID, NV_SINT32); 168static NV_SINT32 nve_osalloctimer(PNV_VOID, PNV_VOID *); 169static NV_SINT32 nve_osfreetimer(PNV_VOID, PNV_VOID); 170static NV_SINT32 nve_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID); 171static NV_SINT32 nve_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32); 172static NV_SINT32 nve_oscanceltimer(PNV_VOID, PNV_VOID); 173 174static NV_SINT32 nve_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8); 175static PNV_VOID nve_ospreprocpktnopq(PNV_VOID, PNV_VOID); 176static NV_SINT32 nve_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32); 177static NV_SINT32 nve_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *); 178static NV_SINT32 nve_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID); 179static NV_SINT32 nve_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID); 180static PNV_VOID nve_osreturnbufvirt(PNV_VOID, PNV_VOID); 181 182static device_method_t nve_methods[] = { 183 /* Device interface */ 184 DEVMETHOD(device_probe, nve_probe), 185 DEVMETHOD(device_attach, nve_attach), 186 DEVMETHOD(device_detach, nve_detach), 187 DEVMETHOD(device_shutdown, nve_shutdown), 188 189 /* Bus interface */ 190 DEVMETHOD(bus_print_child, bus_generic_print_child), 191 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 192 193 /* MII interface */ 194 DEVMETHOD(miibus_readreg, nve_miibus_readreg), 195 DEVMETHOD(miibus_writereg, nve_miibus_writereg), 196 197 {0, 0} 198}; 199 200static driver_t nve_driver = { 201 "nve", 202 nve_methods, 203 sizeof(struct nve_softc) 204}; 205 206static devclass_t nve_devclass; 207 208static int nve_pollinterval = 0; 209SYSCTL_INT(_hw, OID_AUTO, nve_pollinterval, CTLFLAG_RW, 210 &nve_pollinterval, 0, "delay between interface polls"); 211 212DRIVER_MODULE(nve, pci, nve_driver, nve_devclass, 0, 0); 213DRIVER_MODULE(miibus, nve, miibus_driver, miibus_devclass, 0, 0); 214 215static struct nve_type nve_devs[] = { 216 {NVIDIA_VENDORID, NFORCE_MCPNET1_DEVICEID, 217 "NVIDIA nForce MCP Networking Adapter"}, 218 {NVIDIA_VENDORID, NFORCE_MCPNET2_DEVICEID, 219 "NVIDIA nForce MCP2 Networking Adapter"}, 220 {NVIDIA_VENDORID, NFORCE_MCPNET3_DEVICEID, 221 "NVIDIA nForce MCP3 Networking Adapter"}, 222 {NVIDIA_VENDORID, NFORCE_MCPNET4_DEVICEID, 223 "NVIDIA nForce MCP4 Networking Adapter"}, 224 {NVIDIA_VENDORID, NFORCE_MCPNET5_DEVICEID, 225 "NVIDIA nForce MCP5 Networking Adapter"}, 226 {NVIDIA_VENDORID, NFORCE_MCPNET6_DEVICEID, 227 "NVIDIA nForce MCP6 Networking Adapter"}, 228 {NVIDIA_VENDORID, NFORCE_MCPNET7_DEVICEID, 229 "NVIDIA nForce MCP7 Networking Adapter"}, 230 {NVIDIA_VENDORID, NFORCE_MCPNET8_DEVICEID, 231 "NVIDIA nForce MCP8 Networking Adapter"}, 232 {NVIDIA_VENDORID, NFORCE_MCPNET9_DEVICEID, 233 "NVIDIA nForce MCP9 Networking Adapter"}, 234 {NVIDIA_VENDORID, NFORCE_MCPNET10_DEVICEID, 235 "NVIDIA nForce MCP10 Networking Adapter"}, 236 {NVIDIA_VENDORID, NFORCE_MCPNET11_DEVICEID, 237 "NVIDIA nForce MCP11 Networking Adapter"}, 238 {0, 0, NULL} 239}; 240 241/* DMA MEM map callback function to get data segment physical address */ 242static void 243nve_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error) 244{ 245 if (error) 246 return; 247 248 KASSERT(nsegs == 1, 249 ("Too many DMA segments returned when mapping DMA memory")); 250 *(bus_addr_t *)arg = segs->ds_addr; 251} 252 253/* DMA RX map callback function to get data segment physical address */ 254static void 255nve_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, 256 bus_size_t mapsize, int error) 257{ 258 if (error) 259 return; 260 *(bus_addr_t *)arg = segs->ds_addr; 261} 262 263/* 264 * DMA TX buffer callback function to allocate fragment data segment 265 * addresses 266 */ 267static void 268nve_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error) 269{ 270 struct nve_tx_desc *info; 271 272 info = arg; 273 if (error) 274 return; 275 KASSERT(nsegs < NV_MAX_FRAGS, 276 ("Too many DMA segments returned when mapping mbuf")); 277 info->numfrags = nsegs; 278 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t)); 279} 280 281/* Probe for supported hardware ID's */ 282static int 283nve_probe(device_t dev) 284{ 285 struct nve_type *t; 286 287 t = nve_devs; 288 /* Check for matching PCI DEVICE ID's */ 289 while (t->name != NULL) { 290 if ((pci_get_vendor(dev) == t->vid_id) && 291 (pci_get_device(dev) == t->dev_id)) { 292 device_set_desc(dev, t->name); 293 return (0); 294 } 295 t++; 296 } 297 298 return (ENXIO); 299} 300 301/* Attach driver and initialise hardware for use */ 302static int 303nve_attach(device_t dev) 304{ 305 u_char eaddr[ETHER_ADDR_LEN]; 306 struct nve_softc *sc; 307 struct ifnet *ifp; 308 OS_API *osapi; 309 ADAPTER_OPEN_PARAMS OpenParams; 310 int error = 0, i, rid; 311 312 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - entry\n"); 313 314 sc = device_get_softc(dev); 315 316 /* Allocate mutex */ 317 mtx_init(&sc->mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 318 MTX_DEF); 319 callout_init_mtx(&sc->stat_callout, &sc->mtx, 0); 320 321 sc->dev = dev; 322 323 /* Preinitialize data structures */ 324 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS)); 325 326 /* Enable bus mastering */ 327 pci_enable_busmaster(dev); 328 329 /* Allocate memory mapped address space */ 330 rid = NV_RID; 331 sc->res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1, 332 RF_ACTIVE); 333 334 if (sc->res == NULL) { 335 device_printf(dev, "couldn't map memory\n"); 336 error = ENXIO; 337 goto fail; 338 } 339 sc->sc_st = rman_get_bustag(sc->res); 340 sc->sc_sh = rman_get_bushandle(sc->res); 341 342 /* Allocate interrupt */ 343 rid = 0; 344 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 345 RF_SHAREABLE | RF_ACTIVE); 346 347 if (sc->irq == NULL) { 348 device_printf(dev, "couldn't map interrupt\n"); 349 error = ENXIO; 350 goto fail; 351 } 352 /* Allocate DMA tags */ 353 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 354 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS, 355 NV_MAX_FRAGS, MCLBYTES, 0, 356 busdma_lock_mutex, &Giant, 357 &sc->mtag); 358 if (error) { 359 device_printf(dev, "couldn't allocate dma tag\n"); 360 goto fail; 361 } 362 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 363 BUS_SPACE_MAXADDR, NULL, NULL, 364 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 1, 365 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 0, 366 busdma_lock_mutex, &Giant, 367 &sc->rtag); 368 if (error) { 369 device_printf(dev, "couldn't allocate dma tag\n"); 370 goto fail; 371 } 372 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 373 BUS_SPACE_MAXADDR, NULL, NULL, 374 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 1, 375 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 0, 376 busdma_lock_mutex, &Giant, 377 &sc->ttag); 378 if (error) { 379 device_printf(dev, "couldn't allocate dma tag\n"); 380 goto fail; 381 } 382 /* Allocate DMA safe memory and get the DMA addresses. */ 383 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc, 384 BUS_DMA_WAITOK, &sc->tmap); 385 if (error) { 386 device_printf(dev, "couldn't allocate dma memory\n"); 387 goto fail; 388 } 389 bzero(sc->tx_desc, sizeof(struct nve_tx_desc) * TX_RING_SIZE); 390 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc, 391 sizeof(struct nve_tx_desc) * TX_RING_SIZE, nve_dmamap_cb, 392 &sc->tx_addr, 0); 393 if (error) { 394 device_printf(dev, "couldn't map dma memory\n"); 395 goto fail; 396 } 397 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc, 398 BUS_DMA_WAITOK, &sc->rmap); 399 if (error) { 400 device_printf(dev, "couldn't allocate dma memory\n"); 401 goto fail; 402 } 403 bzero(sc->rx_desc, sizeof(struct nve_rx_desc) * RX_RING_SIZE); 404 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc, 405 sizeof(struct nve_rx_desc) * RX_RING_SIZE, nve_dmamap_cb, 406 &sc->rx_addr, 0); 407 if (error) { 408 device_printf(dev, "couldn't map dma memory\n"); 409 goto fail; 410 } 411 /* Initialize rings. */ 412 if (nve_init_rings(sc)) { 413 device_printf(dev, "failed to init rings\n"); 414 error = ENXIO; 415 goto fail; 416 } 417 /* Setup NVIDIA API callback routines */ 418 osapi = &sc->osapi; 419 osapi->pOSCX = sc; 420 osapi->pfnAllocMemory = nve_osalloc; 421 osapi->pfnFreeMemory = nve_osfree; 422 osapi->pfnAllocMemoryEx = nve_osallocex; 423 osapi->pfnFreeMemoryEx = nve_osfreeex; 424 osapi->pfnClearMemory = nve_osclear; 425 osapi->pfnStallExecution = nve_osdelay; 426 osapi->pfnAllocReceiveBuffer = nve_osallocrxbuf; 427 osapi->pfnFreeReceiveBuffer = nve_osfreerxbuf; 428 osapi->pfnPacketWasSent = nve_ospackettx; 429 osapi->pfnPacketWasReceived = nve_ospacketrx; 430 osapi->pfnLinkStateHasChanged = nve_oslinkchg; 431 osapi->pfnAllocTimer = nve_osalloctimer; 432 osapi->pfnFreeTimer = nve_osfreetimer; 433 osapi->pfnInitializeTimer = nve_osinittimer; 434 osapi->pfnSetTimer = nve_ossettimer; 435 osapi->pfnCancelTimer = nve_oscanceltimer; 436 osapi->pfnPreprocessPacket = nve_ospreprocpkt; 437 osapi->pfnPreprocessPacketNopq = nve_ospreprocpktnopq; 438 osapi->pfnIndicatePackets = nve_osindicatepkt; 439 osapi->pfnLockAlloc = nve_oslockalloc; 440 osapi->pfnLockAcquire = nve_oslockacquire; 441 osapi->pfnLockRelease = nve_oslockrelease; 442 osapi->pfnReturnBufferVirtual = nve_osreturnbufvirt; 443 444 sc->linkup = FALSE; 445 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN; 446 447 /* TODO - We don't support hardware offload yet */ 448 sc->hwmode = 1; 449 sc->media = 0; 450 451 /* Set NVIDIA API startup parameters */ 452 OpenParams.MaxDpcLoop = 2; 453 OpenParams.MaxRxPkt = RX_RING_SIZE; 454 OpenParams.MaxTxPkt = TX_RING_SIZE; 455 OpenParams.SentPacketStatusSuccess = 1; 456 OpenParams.SentPacketStatusFailure = 0; 457 OpenParams.MaxRxPktToAccumulate = 6; 458 OpenParams.ulPollInterval = nve_pollinterval; 459 OpenParams.SetForcedModeEveryNthRxPacket = 0; 460 OpenParams.SetForcedModeEveryNthTxPacket = 0; 461 OpenParams.RxForcedInterrupt = 0; 462 OpenParams.TxForcedInterrupt = 0; 463 OpenParams.pOSApi = osapi; 464 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res); 465 OpenParams.bASFEnabled = 0; 466 OpenParams.ulDescriptorVersion = sc->hwmode; 467 OpenParams.ulMaxPacketSize = sc->max_frame_size; 468 OpenParams.DeviceId = pci_get_device(dev); 469 470 /* Open NVIDIA Hardware API */ 471 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr); 472 if (error) { 473 device_printf(dev, 474 "failed to open NVIDIA Hardware API: 0x%x\n", error); 475 goto fail; 476 } 477 478 /* TODO - Add support for MODE2 hardware offload */ 479 480 bzero(&sc->adapterdata, sizeof(sc->adapterdata)); 481 482 sc->adapterdata.ulMediaIF = sc->media; 483 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1; 484 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata); 485 486 /* MAC is loaded backwards into h/w reg */ 487 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr); 488 for (i = 0; i < 6; i++) { 489 eaddr[i] = sc->original_mac_addr[5 - i]; 490 } 491 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr); 492 493 /* Display ethernet address ,... */ 494 device_printf(dev, "Ethernet address %6D\n", eaddr, ":"); 495 496 /* Allocate interface structures */ 497 ifp = sc->ifp = if_alloc(IFT_ETHER); 498 if (ifp == NULL) { 499 device_printf(dev, "can not if_alloc()\n"); 500 error = ENOSPC; 501 goto fail; 502 } 503 504 /* Probe device for MII interface to PHY */ 505 DEBUGOUT(NVE_DEBUG_INIT, "nve: do mii_phy_probe\n"); 506 if (mii_phy_probe(dev, &sc->miibus, nve_ifmedia_upd, nve_ifmedia_sts)) { 507 device_printf(dev, "MII without any phy!\n"); 508 error = ENXIO; 509 goto fail; 510 } 511 512 /* Setup interface parameters */ 513 ifp->if_softc = sc; 514 if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 515 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 516 ifp->if_ioctl = nve_ioctl; 517 ifp->if_output = ether_output; 518 ifp->if_start = nve_ifstart; 519 ifp->if_watchdog = nve_watchdog; 520 ifp->if_timer = 0; 521 ifp->if_init = nve_init; 522 ifp->if_mtu = ETHERMTU; 523 ifp->if_baudrate = IF_Mbps(100); 524 ifp->if_snd.ifq_maxlen = TX_RING_SIZE - 1; 525 ifp->if_capabilities |= IFCAP_VLAN_MTU; 526 527 /* Attach to OS's managers. */ 528 ether_ifattach(ifp, eaddr); 529 530 /* Activate our interrupt handler. - attach last to avoid lock */ 531 error = bus_setup_intr(sc->dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE, 532 nve_intr, sc, &sc->sc_ih); 533 if (error) { 534 device_printf(sc->dev, "couldn't set up interrupt handler\n"); 535 goto fail; 536 } 537 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - exit\n"); 538 539fail: 540 if (error) 541 nve_detach(dev); 542 543 return (error); 544} 545 546/* Detach interface for module unload */ 547static int 548nve_detach(device_t dev) 549{ 550 struct nve_softc *sc = device_get_softc(dev); 551 struct ifnet *ifp; 552 553 KASSERT(mtx_initialized(&sc->mtx), ("mutex not initialized")); 554 555 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - entry\n"); 556 557 ifp = sc->ifp; 558 559 if (device_is_attached(dev)) { 560 NVE_LOCK(sc); 561 nve_stop(sc); 562 NVE_UNLOCK(sc); 563 callout_drain(&sc->stat_callout); 564 ether_ifdetach(ifp); 565 } 566 567 if (sc->miibus) 568 device_delete_child(dev, sc->miibus); 569 bus_generic_detach(dev); 570 571 /* Reload unreversed address back into MAC in original state */ 572 if (sc->original_mac_addr) 573 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, 574 sc->original_mac_addr); 575 576 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnClose\n"); 577 /* Detach from NVIDIA hardware API */ 578 if (sc->hwapi->pfnClose) 579 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE); 580 /* Release resources */ 581 if (sc->sc_ih) 582 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih); 583 if (sc->irq) 584 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq); 585 if (sc->res) 586 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res); 587 588 nve_free_rings(sc); 589 590 if (sc->tx_desc) { 591 bus_dmamap_unload(sc->rtag, sc->rmap); 592 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap); 593 bus_dmamap_destroy(sc->rtag, sc->rmap); 594 } 595 if (sc->mtag) 596 bus_dma_tag_destroy(sc->mtag); 597 if (sc->ttag) 598 bus_dma_tag_destroy(sc->ttag); 599 if (sc->rtag) 600 bus_dma_tag_destroy(sc->rtag); 601 602 if (ifp) 603 if_free(ifp); 604 mtx_destroy(&sc->mtx); 605 606 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - exit\n"); 607 608 return (0); 609} 610 611/* Initialise interface and start it "RUNNING" */ 612static void 613nve_init(void *xsc) 614{ 615 struct nve_softc *sc = xsc; 616 617 NVE_LOCK(sc); 618 nve_init_locked(sc); 619 NVE_UNLOCK(sc); 620} 621 622static void 623nve_init_locked(struct nve_softc *sc) 624{ 625 struct ifnet *ifp; 626 int error; 627 628 NVE_LOCK_ASSERT(sc); 629 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - entry (%d)\n", sc->linkup); 630 631 ifp = sc->ifp; 632 633 /* Do nothing if already running */ 634 if (ifp->if_drv_flags & IFF_DRV_RUNNING) 635 return; 636 637 nve_stop(sc); 638 DEBUGOUT(NVE_DEBUG_INIT, "nve: do pfnInit\n"); 639 640 /* Setup Hardware interface and allocate memory structures */ 641 error = sc->hwapi->pfnInit(sc->hwapi->pADCX, 642 0, /* force speed */ 643 0, /* force full duplex */ 644 0, /* force mode */ 645 0, /* force async mode */ 646 &sc->linkup); 647 648 if (error) { 649 device_printf(sc->dev, 650 "failed to start NVIDIA Hardware interface\n"); 651 return; 652 } 653 /* Set the MAC address */ 654 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, IF_LLADDR(sc->ifp)); 655 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 656 sc->hwapi->pfnStart(sc->hwapi->pADCX); 657 658 /* Setup multicast filter */ 659 nve_setmulti(sc); 660 nve_ifmedia_upd_locked(ifp); 661 662 /* Update interface parameters */ 663 ifp->if_drv_flags |= IFF_DRV_RUNNING; 664 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 665 666 callout_reset(&sc->stat_callout, hz, nve_tick, sc); 667 668 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - exit\n"); 669 670 return; 671} 672 673/* Stop interface activity ie. not "RUNNING" */ 674static void 675nve_stop(struct nve_softc *sc) 676{ 677 struct ifnet *ifp; 678 679 NVE_LOCK_ASSERT(sc); 680 681 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - entry\n"); 682 683 ifp = sc->ifp; 684 ifp->if_timer = 0; 685 686 /* Cancel tick timer */ 687 callout_stop(&sc->stat_callout); 688 689 /* Stop hardware activity */ 690 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX); 691 sc->hwapi->pfnStop(sc->hwapi->pADCX, 0); 692 693 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnDeinit\n"); 694 /* Shutdown interface and deallocate memory buffers */ 695 if (sc->hwapi->pfnDeinit) 696 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0); 697 698 sc->linkup = 0; 699 sc->cur_rx = 0; 700 sc->pending_rxs = 0; 701 sc->pending_txs = 0; 702 703 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 704 705 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - exit\n"); 706 707 return; 708} 709 710/* Shutdown interface for unload/reboot */ 711static void 712nve_shutdown(device_t dev) 713{ 714 struct nve_softc *sc; 715 716 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_shutdown\n"); 717 718 sc = device_get_softc(dev); 719 720 /* Stop hardware activity */ 721 NVE_LOCK(sc); 722 nve_stop(sc); 723 NVE_UNLOCK(sc); 724} 725 726/* Allocate TX ring buffers */ 727static int 728nve_init_rings(struct nve_softc *sc) 729{ 730 int error, i; 731 732 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - entry\n"); 733 734 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0; 735 /* Initialise RX ring */ 736 for (i = 0; i < RX_RING_SIZE; i++) { 737 struct nve_rx_desc *desc = sc->rx_desc + i; 738 struct nve_map_buffer *buf = &desc->buf; 739 740 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 741 if (buf->mbuf == NULL) { 742 device_printf(sc->dev, "couldn't allocate mbuf\n"); 743 nve_free_rings(sc); 744 return (ENOBUFS); 745 } 746 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES; 747 m_adj(buf->mbuf, ETHER_ALIGN); 748 749 error = bus_dmamap_create(sc->mtag, 0, &buf->map); 750 if (error) { 751 device_printf(sc->dev, "couldn't create dma map\n"); 752 nve_free_rings(sc); 753 return (error); 754 } 755 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf, 756 nve_dmamap_rx_cb, &desc->paddr, 0); 757 if (error) { 758 device_printf(sc->dev, "couldn't dma map mbuf\n"); 759 nve_free_rings(sc); 760 return (error); 761 } 762 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD); 763 764 desc->buflength = buf->mbuf->m_len; 765 desc->vaddr = mtod(buf->mbuf, caddr_t); 766 } 767 bus_dmamap_sync(sc->rtag, sc->rmap, 768 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 769 770 /* Initialize TX ring */ 771 for (i = 0; i < TX_RING_SIZE; i++) { 772 struct nve_tx_desc *desc = sc->tx_desc + i; 773 struct nve_map_buffer *buf = &desc->buf; 774 775 buf->mbuf = NULL; 776 777 error = bus_dmamap_create(sc->mtag, 0, &buf->map); 778 if (error) { 779 device_printf(sc->dev, "couldn't create dma map\n"); 780 nve_free_rings(sc); 781 return (error); 782 } 783 } 784 bus_dmamap_sync(sc->ttag, sc->tmap, 785 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 786 787 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - exit\n"); 788 789 return (error); 790} 791 792/* Free the TX ring buffers */ 793static void 794nve_free_rings(struct nve_softc *sc) 795{ 796 int i; 797 798 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - entry\n"); 799 800 for (i = 0; i < RX_RING_SIZE; i++) { 801 struct nve_rx_desc *desc = sc->rx_desc + i; 802 struct nve_map_buffer *buf = &desc->buf; 803 804 if (buf->mbuf) { 805 bus_dmamap_unload(sc->mtag, buf->map); 806 bus_dmamap_destroy(sc->mtag, buf->map); 807 m_freem(buf->mbuf); 808 } 809 buf->mbuf = NULL; 810 } 811 812 for (i = 0; i < TX_RING_SIZE; i++) { 813 struct nve_tx_desc *desc = sc->tx_desc + i; 814 struct nve_map_buffer *buf = &desc->buf; 815 816 if (buf->mbuf) { 817 bus_dmamap_unload(sc->mtag, buf->map); 818 bus_dmamap_destroy(sc->mtag, buf->map); 819 m_freem(buf->mbuf); 820 } 821 buf->mbuf = NULL; 822 } 823 824 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - exit\n"); 825} 826 827/* Main loop for sending packets from OS to interface */ 828static void 829nve_ifstart(struct ifnet *ifp) 830{ 831 struct nve_softc *sc = ifp->if_softc; 832 833 NVE_LOCK(sc); 834 nve_ifstart_locked(ifp); 835 NVE_UNLOCK(sc); 836} 837 838static void 839nve_ifstart_locked(struct ifnet *ifp) 840{ 841 struct nve_softc *sc = ifp->if_softc; 842 struct nve_map_buffer *buf; 843 struct mbuf *m0, *m; 844 struct nve_tx_desc *desc; 845 ADAPTER_WRITE_DATA txdata; 846 int error, i; 847 848 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - entry\n"); 849 850 NVE_LOCK_ASSERT(sc); 851 852 /* If link is down/busy or queue is empty do nothing */ 853 if (ifp->if_drv_flags & IFF_DRV_OACTIVE || 854 IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 855 return; 856 857 /* Transmit queued packets until sent or TX ring is full */ 858 while (sc->pending_txs < TX_RING_SIZE) { 859 desc = sc->tx_desc + sc->cur_tx; 860 buf = &desc->buf; 861 862 /* Get next packet to send. */ 863 IF_DEQUEUE(&ifp->if_snd, m0); 864 865 /* If nothing to send, return. */ 866 if (m0 == NULL) 867 return; 868 869 /* Map MBUF for DMA access */ 870 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0, 871 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT); 872 873 if (error && error != EFBIG) { 874 m_freem(m0); 875 sc->tx_errors++; 876 continue; 877 } 878 /* 879 * Packet has too many fragments - defrag into new mbuf 880 * cluster 881 */ 882 if (error) { 883 m = m_defrag(m0, M_DONTWAIT); 884 if (m == NULL) { 885 m_freem(m0); 886 sc->tx_errors++; 887 continue; 888 } 889 m0 = m; 890 891 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m, 892 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT); 893 if (error) { 894 m_freem(m); 895 sc->tx_errors++; 896 continue; 897 } 898 } 899 /* Do sync on DMA bounce buffer */ 900 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE); 901 902 buf->mbuf = m0; 903 txdata.ulNumberOfElements = desc->numfrags; 904 txdata.pvID = (PVOID)desc; 905 906 /* Put fragments into API element list */ 907 txdata.ulTotalLength = buf->mbuf->m_len; 908 for (i = 0; i < desc->numfrags; i++) { 909 txdata.sElement[i].ulLength = 910 (ulong)desc->frags[i].ds_len; 911 txdata.sElement[i].pPhysical = 912 (PVOID)desc->frags[i].ds_addr; 913 } 914 915 /* Send packet to Nvidia API for transmission */ 916 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata); 917 918 switch (error) { 919 case ADAPTERERR_NONE: 920 /* Packet was queued in API TX queue successfully */ 921 sc->pending_txs++; 922 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE; 923 break; 924 925 case ADAPTERERR_TRANSMIT_QUEUE_FULL: 926 /* The API TX queue is full - requeue the packet */ 927 device_printf(sc->dev, 928 "nve_ifstart: transmit queue is full\n"); 929 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 930 bus_dmamap_unload(sc->mtag, buf->map); 931 IF_PREPEND(&ifp->if_snd, buf->mbuf); 932 buf->mbuf = NULL; 933 return; 934 935 default: 936 /* The API failed to queue/send the packet so dump it */ 937 device_printf(sc->dev, "nve_ifstart: transmit error\n"); 938 bus_dmamap_unload(sc->mtag, buf->map); 939 m_freem(buf->mbuf); 940 buf->mbuf = NULL; 941 sc->tx_errors++; 942 return; 943 } 944 /* Set watchdog timer. */ 945 ifp->if_timer = 8; 946 947 /* Copy packet to BPF tap */ 948 BPF_MTAP(ifp, m0); 949 } 950 ifp->if_drv_flags |= IFF_DRV_OACTIVE; 951 952 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - exit\n"); 953} 954 955/* Handle IOCTL events */ 956static int 957nve_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 958{ 959 struct nve_softc *sc = ifp->if_softc; 960 struct ifreq *ifr = (struct ifreq *) data; 961 struct mii_data *mii; 962 int error = 0; 963 964 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - entry\n"); 965 966 switch (command) { 967 case SIOCSIFMTU: 968 /* Set MTU size */ 969 NVE_LOCK(sc); 970 if (ifp->if_mtu == ifr->ifr_mtu) { 971 NVE_UNLOCK(sc); 972 break; 973 } 974 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) { 975 ifp->if_mtu = ifr->ifr_mtu; 976 nve_stop(sc); 977 nve_init_locked(sc); 978 } else 979 error = EINVAL; 980 NVE_UNLOCK(sc); 981 break; 982 983 case SIOCSIFFLAGS: 984 /* Setup interface flags */ 985 NVE_LOCK(sc); 986 if (ifp->if_flags & IFF_UP) { 987 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) { 988 nve_init_locked(sc); 989 NVE_UNLOCK(sc); 990 break; 991 } 992 } else { 993 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 994 nve_stop(sc); 995 NVE_UNLOCK(sc); 996 break; 997 } 998 } 999 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */ 1000 nve_setmulti(sc); 1001 NVE_UNLOCK(sc); 1002 break; 1003 1004 case SIOCADDMULTI: 1005 case SIOCDELMULTI: 1006 /* Setup multicast filter */ 1007 NVE_LOCK(sc); 1008 if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1009 nve_setmulti(sc); 1010 } 1011 NVE_UNLOCK(sc); 1012 break; 1013 1014 case SIOCGIFMEDIA: 1015 case SIOCSIFMEDIA: 1016 /* Get/Set interface media parameters */ 1017 mii = device_get_softc(sc->miibus); 1018 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 1019 break; 1020 1021 default: 1022 /* Everything else we forward to generic ether ioctl */ 1023 error = ether_ioctl(ifp, (int)command, data); 1024 break; 1025 } 1026 1027 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - exit\n"); 1028 1029 return (error); 1030} 1031 1032/* Interrupt service routine */ 1033static void 1034nve_intr(void *arg) 1035{ 1036 struct nve_softc *sc = arg; 1037 struct ifnet *ifp = sc->ifp; 1038 1039 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - entry\n"); 1040 1041 NVE_LOCK(sc); 1042 if (!ifp->if_flags & IFF_UP) { 1043 nve_stop(sc); 1044 NVE_UNLOCK(sc); 1045 return; 1046 } 1047 /* Handle interrupt event */ 1048 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) { 1049 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX); 1050 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 1051 } 1052 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1053 nve_ifstart_locked(ifp); 1054 1055 /* If no pending packets we don't need a timeout */ 1056 if (sc->pending_txs == 0) 1057 sc->ifp->if_timer = 0; 1058 NVE_UNLOCK(sc); 1059 1060 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - exit\n"); 1061 1062 return; 1063} 1064 1065/* Setup multicast filters */ 1066static void 1067nve_setmulti(struct nve_softc *sc) 1068{ 1069 struct ifnet *ifp; 1070 struct ifmultiaddr *ifma; 1071 PACKET_FILTER hwfilter; 1072 int i; 1073 u_int8_t andaddr[6], oraddr[6]; 1074 1075 NVE_LOCK_ASSERT(sc); 1076 1077 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - entry\n"); 1078 1079 ifp = sc->ifp; 1080 1081 /* Initialize filter */ 1082 hwfilter.ulFilterFlags = 0; 1083 for (i = 0; i < 6; i++) { 1084 hwfilter.acMulticastAddress[i] = 0; 1085 hwfilter.acMulticastMask[i] = 0; 1086 } 1087 1088 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { 1089 /* Accept all packets */ 1090 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS; 1091 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter); 1092 return; 1093 } 1094 /* Setup multicast filter */ 1095 IF_ADDR_LOCK(ifp); 1096 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1097 u_char *addrp; 1098 1099 if (ifma->ifma_addr->sa_family != AF_LINK) 1100 continue; 1101 1102 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1103 for (i = 0; i < 6; i++) { 1104 u_int8_t mcaddr = addrp[i]; 1105 andaddr[i] &= mcaddr; 1106 oraddr[i] |= mcaddr; 1107 } 1108 } 1109 IF_ADDR_UNLOCK(ifp); 1110 for (i = 0; i < 6; i++) { 1111 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i]; 1112 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]); 1113 } 1114 1115 /* Send filter to NVIDIA API */ 1116 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter); 1117 1118 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - exit\n"); 1119 1120 return; 1121} 1122 1123/* Change the current media/mediaopts */ 1124static int 1125nve_ifmedia_upd(struct ifnet *ifp) 1126{ 1127 struct nve_softc *sc = ifp->if_softc; 1128 1129 NVE_LOCK(sc); 1130 nve_ifmedia_upd_locked(ifp); 1131 NVE_UNLOCK(sc); 1132 return (0); 1133} 1134 1135static void 1136nve_ifmedia_upd_locked(struct ifnet *ifp) 1137{ 1138 struct nve_softc *sc = ifp->if_softc; 1139 struct mii_data *mii; 1140 1141 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_upd\n"); 1142 1143 NVE_LOCK_ASSERT(sc); 1144 mii = device_get_softc(sc->miibus); 1145 1146 if (mii->mii_instance) { 1147 struct mii_softc *miisc; 1148 for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1149 miisc = LIST_NEXT(miisc, mii_list)) { 1150 mii_phy_reset(miisc); 1151 } 1152 } 1153 mii_mediachg(mii); 1154} 1155 1156/* Update current miibus PHY status of media */ 1157static void 1158nve_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1159{ 1160 struct nve_softc *sc; 1161 struct mii_data *mii; 1162 1163 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_sts\n"); 1164 1165 sc = ifp->if_softc; 1166 NVE_LOCK(sc); 1167 mii = device_get_softc(sc->miibus); 1168 mii_pollstat(mii); 1169 NVE_UNLOCK(sc); 1170 1171 ifmr->ifm_active = mii->mii_media_active; 1172 ifmr->ifm_status = mii->mii_media_status; 1173 1174 return; 1175} 1176 1177/* miibus tick timer - maintain link status */ 1178static void 1179nve_tick(void *xsc) 1180{ 1181 struct nve_softc *sc = xsc; 1182 struct mii_data *mii; 1183 struct ifnet *ifp; 1184 1185 NVE_LOCK_ASSERT(sc); 1186 1187 ifp = sc->ifp; 1188 nve_update_stats(sc); 1189 1190 mii = device_get_softc(sc->miibus); 1191 mii_tick(mii); 1192 1193 if (mii->mii_media_status & IFM_ACTIVE && 1194 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 1195 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1196 nve_ifstart_locked(ifp); 1197 } 1198 callout_reset(&sc->stat_callout, hz, nve_tick, sc); 1199 1200 return; 1201} 1202 1203/* Update ifnet data structure with collected interface stats from API */ 1204static void 1205nve_update_stats(struct nve_softc *sc) 1206{ 1207 struct ifnet *ifp = sc->ifp; 1208 ADAPTER_STATS stats; 1209 1210 NVE_LOCK_ASSERT(sc); 1211 1212 if (sc->hwapi) { 1213 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats); 1214 1215 ifp->if_ipackets = stats.ulSuccessfulReceptions; 1216 ifp->if_ierrors = stats.ulMissedFrames + 1217 stats.ulFailedReceptions + 1218 stats.ulCRCErrors + 1219 stats.ulFramingErrors + 1220 stats.ulOverFlowErrors; 1221 1222 ifp->if_opackets = stats.ulSuccessfulTransmissions; 1223 ifp->if_oerrors = sc->tx_errors + 1224 stats.ulFailedTransmissions + 1225 stats.ulRetryErrors + 1226 stats.ulUnderflowErrors + 1227 stats.ulLossOfCarrierErrors + 1228 stats.ulLateCollisionErrors; 1229 1230 ifp->if_collisions = stats.ulLateCollisionErrors; 1231 } 1232 1233 return; 1234} 1235 1236/* miibus Read PHY register wrapper - calls Nvidia API entry point */ 1237static int 1238nve_miibus_readreg(device_t dev, int phy, int reg) 1239{ 1240 struct nve_softc *sc = device_get_softc(dev); 1241 ULONG data; 1242 1243 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - entry\n"); 1244 1245 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data); 1246 1247 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - exit\n"); 1248 1249 return (data); 1250} 1251 1252/* miibus Write PHY register wrapper - calls Nvidia API entry point */ 1253static void 1254nve_miibus_writereg(device_t dev, int phy, int reg, int data) 1255{ 1256 struct nve_softc *sc = device_get_softc(dev); 1257 1258 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - entry\n"); 1259 1260 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data); 1261 1262 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - exit\n"); 1263 1264 return; 1265} 1266 1267/* Watchdog timer to prevent PHY lockups */ 1268static void 1269nve_watchdog(struct ifnet *ifp) 1270{ 1271 struct nve_softc *sc = ifp->if_softc; 1272 1273 device_printf(sc->dev, "device timeout (%d)\n", sc->pending_txs); 1274 1275 NVE_LOCK(sc); 1276 sc->tx_errors++; 1277 1278 nve_stop(sc); 1279 ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1280 nve_init_locked(sc); 1281 1282 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 1283 nve_ifstart_locked(ifp); 1284 NVE_UNLOCK(sc); 1285 1286 return; 1287} 1288 1289/* --- Start of NVOSAPI interface --- */ 1290 1291/* Allocate DMA enabled general use memory for API */ 1292static NV_SINT32 1293nve_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem) 1294{ 1295 struct nve_softc *sc; 1296 bus_addr_t mem_physical; 1297 1298 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc - %d\n", mem->uiLength); 1299 1300 sc = (struct nve_softc *)ctx; 1301 1302 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF, 1303 M_NOWAIT | M_ZERO, 0, ~0, PAGE_SIZE, 0); 1304 1305 if (!mem->pLogical) { 1306 device_printf(sc->dev, "memory allocation failed\n"); 1307 return (0); 1308 } 1309 memset(mem->pLogical, 0, (ulong)mem->uiLength); 1310 mem_physical = vtophys(mem->pLogical); 1311 mem->pPhysical = (PVOID)mem_physical; 1312 1313 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc 0x%x/0x%x - %d\n", 1314 (uint)mem->pLogical, (uint)mem->pPhysical, (uint)mem->uiLength); 1315 1316 return (1); 1317} 1318 1319/* Free allocated memory */ 1320static NV_SINT32 1321nve_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem) 1322{ 1323 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfree - 0x%x - %d\n", 1324 (uint)mem->pLogical, (uint) mem->uiLength); 1325 1326 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF); 1327 return (1); 1328} 1329 1330/* Copied directly from nvnet.c */ 1331static NV_SINT32 1332nve_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex) 1333{ 1334 MEMORY_BLOCK mem_block; 1335 1336 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocex\n"); 1337 1338 mem_block_ex->pLogical = NULL; 1339 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength; 1340 1341 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) && 1342 (mem_block_ex->AlignmentSize > 1)) { 1343 DEBUGOUT(NVE_DEBUG_API, " aligning on %d\n", 1344 mem_block_ex->AlignmentSize); 1345 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize; 1346 } 1347 mem_block.uiLength = mem_block_ex->uiLengthOrig; 1348 1349 if (nve_osalloc(ctx, &mem_block) == 0) { 1350 return (0); 1351 } 1352 mem_block_ex->pLogicalOrig = mem_block.pLogical; 1353 mem_block_ex->pPhysicalOrigLow = (unsigned long)mem_block.pPhysical; 1354 mem_block_ex->pPhysicalOrigHigh = 0; 1355 1356 mem_block_ex->pPhysical = mem_block.pPhysical; 1357 mem_block_ex->pLogical = mem_block.pLogical; 1358 1359 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) { 1360 unsigned int offset; 1361 offset = mem_block_ex->pPhysicalOrigLow & 1362 (mem_block_ex->AlignmentSize - 1); 1363 1364 if (offset) { 1365 mem_block_ex->pPhysical = 1366 (PVOID)((ulong)mem_block_ex->pPhysical + 1367 mem_block_ex->AlignmentSize - offset); 1368 mem_block_ex->pLogical = 1369 (PVOID)((ulong)mem_block_ex->pLogical + 1370 mem_block_ex->AlignmentSize - offset); 1371 } /* if (offset) */ 1372 } /* if (mem_block_ex->uiLength != *mem_block_ex->uiLengthOrig) */ 1373 return (1); 1374} 1375 1376/* Copied directly from nvnet.c */ 1377static NV_SINT32 1378nve_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex) 1379{ 1380 MEMORY_BLOCK mem_block; 1381 1382 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreeex\n"); 1383 1384 mem_block.pLogical = mem_block_ex->pLogicalOrig; 1385 mem_block.pPhysical = (PVOID)((ulong)mem_block_ex->pPhysicalOrigLow); 1386 mem_block.uiLength = mem_block_ex->uiLengthOrig; 1387 1388 return (nve_osfree(ctx, &mem_block)); 1389} 1390 1391/* Clear memory region */ 1392static NV_SINT32 1393nve_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length) 1394{ 1395 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osclear\n"); 1396 memset(mem, 0, length); 1397 return (1); 1398} 1399 1400/* Sleep for a tick */ 1401static NV_SINT32 1402nve_osdelay(PNV_VOID ctx, NV_UINT32 usec) 1403{ 1404 DELAY(usec); 1405 return (1); 1406} 1407 1408/* Allocate memory for rx buffer */ 1409static NV_SINT32 1410nve_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id) 1411{ 1412 struct nve_softc *sc = ctx; 1413 struct nve_rx_desc *desc; 1414 struct nve_map_buffer *buf; 1415 int error; 1416 1417 if (device_is_attached(sc->dev)) 1418 NVE_LOCK_ASSERT(sc); 1419 1420 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocrxbuf\n"); 1421 1422 if (sc->pending_rxs == RX_RING_SIZE) { 1423 device_printf(sc->dev, "rx ring buffer is full\n"); 1424 goto fail; 1425 } 1426 desc = sc->rx_desc + sc->cur_rx; 1427 buf = &desc->buf; 1428 1429 if (buf->mbuf == NULL) { 1430 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1431 if (buf->mbuf == NULL) { 1432 device_printf(sc->dev, "failed to allocate memory\n"); 1433 goto fail; 1434 } 1435 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES; 1436 m_adj(buf->mbuf, ETHER_ALIGN); 1437 1438 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf, 1439 nve_dmamap_rx_cb, &desc->paddr, 0); 1440 if (error) { 1441 device_printf(sc->dev, "failed to dmamap mbuf\n"); 1442 m_freem(buf->mbuf); 1443 buf->mbuf = NULL; 1444 goto fail; 1445 } 1446 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD); 1447 desc->buflength = buf->mbuf->m_len; 1448 desc->vaddr = mtod(buf->mbuf, caddr_t); 1449 } 1450 sc->pending_rxs++; 1451 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE; 1452 1453 mem->pLogical = (void *)desc->vaddr; 1454 mem->pPhysical = (void *)desc->paddr; 1455 mem->uiLength = desc->buflength; 1456 *id = (void *)desc; 1457 1458 return (1); 1459 1460fail: 1461 return (0); 1462} 1463 1464/* Free the rx buffer */ 1465static NV_SINT32 1466nve_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id) 1467{ 1468 struct nve_softc *sc = ctx; 1469 struct nve_rx_desc *desc; 1470 struct nve_map_buffer *buf; 1471 1472 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreerxbuf\n"); 1473 1474 desc = (struct nve_rx_desc *) id; 1475 buf = &desc->buf; 1476 1477 if (buf->mbuf) { 1478 bus_dmamap_unload(sc->mtag, buf->map); 1479 bus_dmamap_destroy(sc->mtag, buf->map); 1480 m_freem(buf->mbuf); 1481 } 1482 sc->pending_rxs--; 1483 buf->mbuf = NULL; 1484 1485 return (1); 1486} 1487 1488/* This gets called by the Nvidia API after our TX packet has been sent */ 1489static NV_SINT32 1490nve_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success) 1491{ 1492 struct nve_softc *sc = ctx; 1493 struct nve_map_buffer *buf; 1494 struct nve_tx_desc *desc = (struct nve_tx_desc *) id; 1495 struct ifnet *ifp; 1496 1497 NVE_LOCK_ASSERT(sc); 1498 1499 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospackettx\n"); 1500 1501 ifp = sc->ifp; 1502 buf = &desc->buf; 1503 sc->pending_txs--; 1504 1505 /* Unload and free mbuf cluster */ 1506 if (buf->mbuf == NULL) 1507 goto fail; 1508 1509 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE); 1510 bus_dmamap_unload(sc->mtag, buf->map); 1511 m_freem(buf->mbuf); 1512 buf->mbuf = NULL; 1513 1514 /* Send more packets if we have them */ 1515 if (sc->pending_txs < TX_RING_SIZE) 1516 sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1517 1518 if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd) && sc->pending_txs < TX_RING_SIZE) 1519 nve_ifstart_locked(ifp); 1520 1521fail: 1522 1523 return (1); 1524} 1525 1526/* This gets called by the Nvidia API when a new packet has been received */ 1527/* XXX What is newbuf used for? XXX */ 1528static NV_SINT32 1529nve_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success, NV_UINT8 *newbuf, 1530 NV_UINT8 priority) 1531{ 1532 struct nve_softc *sc = ctx; 1533 struct ifnet *ifp; 1534 struct nve_rx_desc *desc; 1535 struct nve_map_buffer *buf; 1536 ADAPTER_READ_DATA *readdata; 1537 struct mbuf *m; 1538 1539 NVE_LOCK_ASSERT(sc); 1540 1541 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospacketrx\n"); 1542 1543 ifp = sc->ifp; 1544 1545 readdata = (ADAPTER_READ_DATA *) data; 1546 desc = readdata->pvID; 1547 buf = &desc->buf; 1548 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1549 1550 if (success) { 1551 /* Sync DMA bounce buffer. */ 1552 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1553 1554 /* First mbuf in packet holds the ethernet and packet headers */ 1555 buf->mbuf->m_pkthdr.rcvif = ifp; 1556 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len = 1557 readdata->ulTotalLength; 1558 1559 bus_dmamap_unload(sc->mtag, buf->map); 1560 1561 /* Blat the mbuf pointer, kernel will free the mbuf cluster */ 1562 m = buf->mbuf; 1563 buf->mbuf = NULL; 1564 1565 /* Give mbuf to OS. */ 1566 NVE_UNLOCK(sc); 1567 (*ifp->if_input)(ifp, m); 1568 NVE_LOCK(sc); 1569 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH) 1570 ifp->if_imcasts++; 1571 1572 } else { 1573 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1574 bus_dmamap_unload(sc->mtag, buf->map); 1575 m_freem(buf->mbuf); 1576 buf->mbuf = NULL; 1577 } 1578 1579 sc->cur_rx = desc - sc->rx_desc; 1580 sc->pending_rxs--; 1581 1582 return (1); 1583} 1584 1585/* This gets called by NVIDIA API when the PHY link state changes */ 1586static NV_SINT32 1587nve_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled) 1588{ 1589 struct nve_softc *sc = (struct nve_softc *)ctx; 1590 1591 DEBUGOUT(NVE_DEBUG_API, "nve: nve_oslinkchg\n"); 1592 1593 return (1); 1594} 1595 1596/* Setup a watchdog timer */ 1597static NV_SINT32 1598nve_osalloctimer(PNV_VOID ctx, PNV_VOID *timer) 1599{ 1600 struct nve_softc *sc = (struct nve_softc *)ctx; 1601 1602 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osalloctimer\n"); 1603 1604 callout_init(&sc->ostimer, CALLOUT_MPSAFE); 1605 *timer = &sc->ostimer; 1606 1607 return (1); 1608} 1609 1610/* Free the timer */ 1611static NV_SINT32 1612nve_osfreetimer(PNV_VOID ctx, PNV_VOID timer) 1613{ 1614 1615 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osfreetimer\n"); 1616 1617 callout_drain((struct callout *)timer); 1618 1619 return (1); 1620} 1621 1622/* Setup timer parameters */ 1623static NV_SINT32 1624nve_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters) 1625{ 1626 struct nve_softc *sc = (struct nve_softc *)ctx; 1627 1628 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osinittimer\n"); 1629 1630 sc->ostimer_func = func; 1631 sc->ostimer_params = parameters; 1632 1633 return (1); 1634} 1635 1636/* Set the timer to go off */ 1637static NV_SINT32 1638nve_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay) 1639{ 1640 struct nve_softc *sc = ctx; 1641 1642 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ossettimer\n"); 1643 1644 callout_reset((struct callout *)timer, delay, sc->ostimer_func, 1645 sc->ostimer_params); 1646 1647 return (1); 1648} 1649 1650/* Cancel the timer */ 1651static NV_SINT32 1652nve_oscanceltimer(PNV_VOID ctx, PNV_VOID timer) 1653{ 1654 1655 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_oscanceltimer\n"); 1656 1657 callout_stop((struct callout *)timer); 1658 1659 return (1); 1660} 1661 1662static NV_SINT32 1663nve_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id, 1664 NV_UINT8 *newbuffer, NV_UINT8 priority) 1665{ 1666 1667 /* Not implemented */ 1668 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n"); 1669 1670 return (1); 1671} 1672 1673static PNV_VOID 1674nve_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata) 1675{ 1676 1677 /* Not implemented */ 1678 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n"); 1679 1680 return (NULL); 1681} 1682 1683static NV_SINT32 1684nve_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno) 1685{ 1686 1687 /* Not implemented */ 1688 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osindicatepkt\n"); 1689 1690 return (1); 1691} 1692 1693/* Allocate mutex context (already done in nve_attach) */ 1694static NV_SINT32 1695nve_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock) 1696{ 1697 struct nve_softc *sc = (struct nve_softc *)ctx; 1698 1699 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockalloc\n"); 1700 1701 *pLock = (void **)sc; 1702 1703 return (1); 1704} 1705 1706/* Obtain a spin lock */ 1707static NV_SINT32 1708nve_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock) 1709{ 1710 1711 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockacquire\n"); 1712 1713 return (1); 1714} 1715 1716/* Release lock */ 1717static NV_SINT32 1718nve_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock) 1719{ 1720 1721 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockrelease\n"); 1722 1723 return (1); 1724} 1725 1726/* I have no idea what this is for */ 1727static PNV_VOID 1728nve_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata) 1729{ 1730 1731 /* Not implemented */ 1732 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_osreturnbufvirt\n"); 1733 panic("nve: nve_osreturnbufvirtual not implemented\n"); 1734 1735 return (NULL); 1736} 1737 1738/* --- End on NVOSAPI interface --- */ 1739