if_nve.c revision 144073
1/* 2 * Copyright (c) 2005 by David E. O'Brien <obrien@FreeBSD.org>. 3 * Copyright (c) 2003,2004 by Quinton Dolan <q@onthenet.com.au>. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY 16 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 18 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 19 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 22 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $Id: if_nv.c,v 1.19 2004/08/12 14:00:05 q Exp $ 28 */ 29 30/* 31 * NVIDIA nForce MCP Networking Adapter driver 32 * 33 * This is a port of the NVIDIA MCP Linux ethernet driver distributed by NVIDIA 34 * through their web site. 35 * 36 * All mainstream nForce and nForce2 motherboards are supported. This module 37 * is as stable, sometimes more stable, than the linux version. (Recent 38 * Linux stability issues seem to be related to some issues with newer 39 * distributions using GCC 3.x, however this don't appear to effect FreeBSD 40 * 5.x). 41 * 42 * In accordance with the NVIDIA distribution license it is necessary to 43 * link this module against the nvlibnet.o binary object included in the 44 * Linux driver source distribution. The binary component is not modified in 45 * any way and is simply linked against a FreeBSD equivalent of the nvnet.c 46 * linux kernel module "wrapper". 47 * 48 * The Linux driver uses a common code API that is shared between Win32 and 49 * i386 Linux. This abstracts the low level driver functions and uses 50 * callbacks and hooks to access the underlying hardware device. By using 51 * this same API in a FreeBSD kernel module it is possible to support the 52 * hardware without breaching the Linux source distributions licensing 53 * requirements, or obtaining the hardware programming specifications. 54 * 55 * Although not conventional, it works, and given the relatively small 56 * amount of hardware centric code, it's hopefully no more buggy than its 57 * linux counterpart. 58 * 59 * NVIDIA now suppport the nForce3 AMD64 platform, however I have been 60 * unable to access such a system to verify support. However, the code is 61 * reported to work with little modification when compiled with the AMD64 62 * version of the NVIDIA Linux library. All that should be necessary to make 63 * the driver work is to link it directly into the kernel, instead of as a 64 * module, and apply the docs/amd64.diff patch in this source distribution to 65 * the NVIDIA Linux driver source. 66 * 67 * This driver should work on all versions of FreeBSD since 4.9/5.1 as well 68 * as recent versions of DragonFly. 69 * 70 * Written by Quinton Dolan <q@onthenet.com.au> 71 * Portions based on existing FreeBSD network drivers. 72 * NVIDIA API usage derived from distributed NVIDIA NVNET driver source files. 73 * 74 */ 75 76#include <sys/cdefs.h> 77__FBSDID("$FreeBSD: head/sys/dev/nve/if_nve.c 144073 2005-03-24 18:55:07Z obrien $"); 78 79#include <sys/param.h> 80#include <sys/systm.h> 81#include <sys/sockio.h> 82#include <sys/mbuf.h> 83#include <sys/malloc.h> 84#include <sys/kernel.h> 85#include <sys/socket.h> 86#include <sys/sysctl.h> 87#include <sys/queue.h> 88#include <sys/module.h> 89 90#include <net/if.h> 91#include <net/if_arp.h> 92#include <net/ethernet.h> 93#include <net/if_dl.h> 94#include <net/if_media.h> 95#include <net/bpf.h> 96#include <net/if_vlan_var.h> 97 98#include <machine/bus_memio.h> 99#include <machine/bus.h> 100#include <machine/resource.h> 101 102#include <vm/vm.h> /* for vtophys */ 103#include <vm/pmap.h> /* for vtophys */ 104#include <machine/clock.h> /* for DELAY */ 105#include <sys/bus.h> 106#include <sys/rman.h> 107 108#include <dev/pci/pcireg.h> 109#include <dev/pci/pcivar.h> 110#include <dev/mii/mii.h> 111#include <dev/mii/miivar.h> 112#include "miibus_if.h" 113 114/* Include NVIDIA Linux driver header files */ 115#define linux 116#include <contrib/dev/nve/basetype.h> 117#include <contrib/dev/nve/phy.h> 118#include "os+%DIKED-nve.h" 119#include <contrib/dev/nve/drvinfo.h> 120#include <contrib/dev/nve/adapter.h> 121#undef linux 122 123#include <dev/nve/if_nvereg.h> 124 125MODULE_DEPEND(nve, pci, 1, 1, 1); 126MODULE_DEPEND(nve, ether, 1, 1, 1); 127MODULE_DEPEND(nve, miibus, 1, 1, 1); 128 129static int nve_probe(device_t); 130static int nve_attach(device_t); 131static int nve_detach(device_t); 132static void nve_init(void *); 133static void nve_stop(struct nve_softc *); 134static void nve_shutdown(device_t); 135static int nve_init_rings(struct nve_softc *); 136static void nve_free_rings(struct nve_softc *); 137 138static void nve_ifstart(struct ifnet *); 139static int nve_ioctl(struct ifnet *, u_long, caddr_t); 140static void nve_intr(void *); 141static void nve_tick(void *); 142static void nve_setmulti(struct nve_softc *); 143static void nve_watchdog(struct ifnet *); 144static void nve_update_stats(struct nve_softc *); 145 146static int nve_ifmedia_upd(struct ifnet *); 147static void nve_ifmedia_sts(struct ifnet *, struct ifmediareq *); 148static int nve_miibus_readreg(device_t, int, int); 149static void nve_miibus_writereg(device_t, int, int, int); 150 151static void nve_dmamap_cb(void *, bus_dma_segment_t *, int, int); 152static void nve_dmamap_tx_cb(void *, bus_dma_segment_t *, int, bus_size_t, int); 153 154static NV_SINT32 nve_osalloc(PNV_VOID, PMEMORY_BLOCK); 155static NV_SINT32 nve_osfree(PNV_VOID, PMEMORY_BLOCK); 156static NV_SINT32 nve_osallocex(PNV_VOID, PMEMORY_BLOCKEX); 157static NV_SINT32 nve_osfreeex(PNV_VOID, PMEMORY_BLOCKEX); 158static NV_SINT32 nve_osclear(PNV_VOID, PNV_VOID, NV_SINT32); 159static NV_SINT32 nve_osdelay(PNV_VOID, NV_UINT32); 160static NV_SINT32 nve_osallocrxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID *); 161static NV_SINT32 nve_osfreerxbuf(PNV_VOID, PMEMORY_BLOCK, PNV_VOID); 162static NV_SINT32 nve_ospackettx(PNV_VOID, PNV_VOID, NV_UINT32); 163static NV_SINT32 nve_ospacketrx(PNV_VOID, PNV_VOID, NV_UINT32, NV_UINT8 *, NV_UINT8); 164static NV_SINT32 nve_oslinkchg(PNV_VOID, NV_SINT32); 165static NV_SINT32 nve_osalloctimer(PNV_VOID, PNV_VOID *); 166static NV_SINT32 nve_osfreetimer(PNV_VOID, PNV_VOID); 167static NV_SINT32 nve_osinittimer(PNV_VOID, PNV_VOID, PTIMER_FUNC, PNV_VOID); 168static NV_SINT32 nve_ossettimer(PNV_VOID, PNV_VOID, NV_UINT32); 169static NV_SINT32 nve_oscanceltimer(PNV_VOID, PNV_VOID); 170 171static NV_SINT32 nve_ospreprocpkt(PNV_VOID, PNV_VOID, PNV_VOID *, NV_UINT8 *, NV_UINT8); 172static PNV_VOID nve_ospreprocpktnopq(PNV_VOID, PNV_VOID); 173static NV_SINT32 nve_osindicatepkt(PNV_VOID, PNV_VOID *, NV_UINT32); 174static NV_SINT32 nve_oslockalloc(PNV_VOID, NV_SINT32, PNV_VOID *); 175static NV_SINT32 nve_oslockacquire(PNV_VOID, NV_SINT32, PNV_VOID); 176static NV_SINT32 nve_oslockrelease(PNV_VOID, NV_SINT32, PNV_VOID); 177static PNV_VOID nve_osreturnbufvirt(PNV_VOID, PNV_VOID); 178 179static device_method_t nve_methods[] = { 180 /* Device interface */ 181 DEVMETHOD(device_probe, nve_probe), 182 DEVMETHOD(device_attach, nve_attach), 183 DEVMETHOD(device_detach, nve_detach), 184 DEVMETHOD(device_shutdown, nve_shutdown), 185 186 /* Bus interface */ 187 DEVMETHOD(bus_print_child, bus_generic_print_child), 188 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 189 190 /* MII interface */ 191 DEVMETHOD(miibus_readreg, nve_miibus_readreg), 192 DEVMETHOD(miibus_writereg, nve_miibus_writereg), 193 194 {0, 0} 195}; 196 197static driver_t nve_driver = { 198 "nv", 199 nve_methods, 200 sizeof(struct nve_softc) 201}; 202 203static devclass_t nve_devclass; 204 205static int nve_pollinterval = 0; 206SYSCTL_INT(_hw, OID_AUTO, nve_pollinterval, CTLFLAG_RW, 207 &nve_pollinterval, 0, "delay between interface polls"); 208 209DRIVER_MODULE(nve, pci, nve_driver, nve_devclass, 0, 0); 210DRIVER_MODULE(miibus, nve, miibus_driver, miibus_devclass, 0, 0); 211 212static struct nve_type nve_devs[] = { 213 {NVIDIA_VENDORID, NFORCE_MCPNET1_DEVICEID, 214 "NVIDIA nForce MCP Networking Adapter"}, 215 {NVIDIA_VENDORID, NFORCE_MCPNET2_DEVICEID, 216 "NVIDIA nForce MCP2 Networking Adapter"}, 217 {NVIDIA_VENDORID, NFORCE_MCPNET3_DEVICEID, 218 "NVIDIA nForce MCP3 Networking Adapter"}, 219 {NVIDIA_VENDORID, NFORCE_MCPNET4_DEVICEID, 220 "NVIDIA nForce MCP4 Networking Adapter"}, 221 {NVIDIA_VENDORID, NFORCE_MCPNET5_DEVICEID, 222 "NVIDIA nForce MCP5 Networking Adapter"}, 223 {NVIDIA_VENDORID, NFORCE_MCPNET6_DEVICEID, 224 "NVIDIA nForce MCP6 Networking Adapter"}, 225 {NVIDIA_VENDORID, NFORCE_MCPNET7_DEVICEID, 226 "NVIDIA nForce MCP7 Networking Adapter"}, 227 {NVIDIA_VENDORID, NFORCE_MCPNET8_DEVICEID, 228 "NVIDIA nForce MCP8 Networking Adapter"}, 229 {NVIDIA_VENDORID, NFORCE_MCPNET9_DEVICEID, 230 "NVIDIA nForce MCP9 Networking Adapter"}, 231 {NVIDIA_VENDORID, NFORCE_MCPNET10_DEVICEID, 232 "NVIDIA nForce MCP10 Networking Adapter"}, 233 {NVIDIA_VENDORID, NFORCE_MCPNET11_DEVICEID, 234 "NVIDIA nForce MCP11 Networking Adapter"}, 235 {0, 0, NULL} 236}; 237 238/* DMA MEM map callback function to get data segment physical address */ 239static void 240nve_dmamap_cb(void *arg, bus_dma_segment_t * segs, int nsegs, int error) 241{ 242 if (error) 243 return; 244 245 KASSERT(nsegs == 1, 246 ("Too many DMA segments returned when mapping DMA memory")); 247 *(bus_addr_t *)arg = segs->ds_addr; 248} 249 250/* DMA RX map callback function to get data segment physical address */ 251static void 252nve_dmamap_rx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, 253 bus_size_t mapsize, int error) 254{ 255 if (error) 256 return; 257 *(bus_addr_t *)arg = segs->ds_addr; 258} 259 260/* 261 * DMA TX buffer callback function to allocate fragment data segment 262 * addresses 263 */ 264static void 265nve_dmamap_tx_cb(void *arg, bus_dma_segment_t * segs, int nsegs, bus_size_t mapsize, int error) 266{ 267 struct nve_tx_desc *info; 268 269 info = arg; 270 if (error) 271 return; 272 KASSERT(nsegs < NV_MAX_FRAGS, 273 ("Too many DMA segments returned when mapping mbuf")); 274 info->numfrags = nsegs; 275 bcopy(segs, info->frags, nsegs * sizeof(bus_dma_segment_t)); 276} 277 278/* Probe for supported hardware ID's */ 279static int 280nve_probe(device_t dev) 281{ 282 struct nve_type *t; 283 284 t = nve_devs; 285 /* Check for matching PCI DEVICE ID's */ 286 while (t->name != NULL) { 287 if ((pci_get_vendor(dev) == t->vid_id) && 288 (pci_get_device(dev) == t->dev_id)) { 289 device_set_desc(dev, t->name); 290 return (0); 291 } 292 t++; 293 } 294 295 return (ENXIO); 296} 297 298/* Attach driver and initialise hardware for use */ 299static int 300nve_attach(device_t dev) 301{ 302 u_char eaddr[ETHER_ADDR_LEN]; 303 struct nve_softc *sc; 304 struct ifnet *ifp; 305 OS_API *osapi; 306 ADAPTER_OPEN_PARAMS OpenParams; 307 int error = 0, i, rid, unit; 308 309 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - entry\n"); 310 311 sc = device_get_softc(dev); 312 unit = device_get_unit(dev); 313 314 /* Allocate mutex */ 315 mtx_init(&sc->mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 316 MTX_DEF | MTX_RECURSE); 317 mtx_init(&sc->osmtx, device_get_nameunit(dev), NULL, MTX_SPIN); 318 319 sc->dev = dev; 320 sc->unit = unit; 321 322 /* Preinitialize data structures */ 323 bzero(&OpenParams, sizeof(ADAPTER_OPEN_PARAMS)); 324 325 /* Enable bus mastering */ 326 pci_enable_busmaster(dev); 327 328 /* Allocate memory mapped address space */ 329 rid = NV_RID; 330 sc->res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 0, ~0, 1, 331 RF_ACTIVE); 332 333 if (sc->res == NULL) { 334 device_printf(dev, "couldn't map memory\n"); 335 error = ENXIO; 336 goto fail; 337 } 338 sc->sc_st = rman_get_bustag(sc->res); 339 sc->sc_sh = rman_get_bushandle(sc->res); 340 341 /* Allocate interrupt */ 342 rid = 0; 343 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 344 RF_SHAREABLE | RF_ACTIVE); 345 346 if (sc->irq == NULL) { 347 device_printf(dev, "couldn't map interrupt\n"); 348 error = ENXIO; 349 goto fail; 350 } 351 /* Allocate DMA tags */ 352 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 353 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES * NV_MAX_FRAGS, 354 NV_MAX_FRAGS, MCLBYTES, 0, 355 busdma_lock_mutex, &Giant, 356 &sc->mtag); 357 if (error) { 358 device_printf(dev, "couldn't allocate dma tag\n"); 359 goto fail; 360 } 361 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 362 BUS_SPACE_MAXADDR, NULL, NULL, 363 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 1, 364 sizeof(struct nve_rx_desc) * RX_RING_SIZE, 0, 365 busdma_lock_mutex, &Giant, 366 &sc->rtag); 367 if (error) { 368 device_printf(dev, "couldn't allocate dma tag\n"); 369 goto fail; 370 } 371 error = bus_dma_tag_create(NULL, 4, 0, BUS_SPACE_MAXADDR_32BIT, 372 BUS_SPACE_MAXADDR, NULL, NULL, 373 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 1, 374 sizeof(struct nve_tx_desc) * TX_RING_SIZE, 0, 375 busdma_lock_mutex, &Giant, 376 &sc->ttag); 377 if (error) { 378 device_printf(dev, "couldn't allocate dma tag\n"); 379 goto fail; 380 } 381 /* Allocate DMA safe memory and get the DMA addresses. */ 382 error = bus_dmamem_alloc(sc->ttag, (void **)&sc->tx_desc, 383 BUS_DMA_WAITOK, &sc->tmap); 384 if (error) { 385 device_printf(dev, "couldn't allocate dma memory\n"); 386 goto fail; 387 } 388 bzero(sc->tx_desc, sizeof(struct nve_tx_desc) * TX_RING_SIZE); 389 error = bus_dmamap_load(sc->ttag, sc->tmap, sc->tx_desc, 390 sizeof(struct nve_tx_desc) * TX_RING_SIZE, nve_dmamap_cb, 391 &sc->tx_addr, 0); 392 if (error) { 393 device_printf(dev, "couldn't map dma memory\n"); 394 goto fail; 395 } 396 error = bus_dmamem_alloc(sc->rtag, (void **)&sc->rx_desc, 397 BUS_DMA_WAITOK, &sc->rmap); 398 if (error) { 399 device_printf(dev, "couldn't allocate dma memory\n"); 400 goto fail; 401 } 402 bzero(sc->rx_desc, sizeof(struct nve_rx_desc) * RX_RING_SIZE); 403 error = bus_dmamap_load(sc->rtag, sc->rmap, sc->rx_desc, 404 sizeof(struct nve_rx_desc) * RX_RING_SIZE, nve_dmamap_cb, 405 &sc->rx_addr, 0); 406 if (error) { 407 device_printf(dev, "couldn't map dma memory\n"); 408 goto fail; 409 } 410 /* Initialize rings. */ 411 if (nve_init_rings(sc)) { 412 device_printf(dev, "failed to init rings\n"); 413 error = ENXIO; 414 goto fail; 415 } 416 /* Setup NVIDIA API callback routines */ 417 osapi = &sc->osapi; 418 osapi->pOSCX = sc; 419 osapi->pfnAllocMemory = nve_osalloc; 420 osapi->pfnFreeMemory = nve_osfree; 421 osapi->pfnAllocMemoryEx = nve_osallocex; 422 osapi->pfnFreeMemoryEx = nve_osfreeex; 423 osapi->pfnClearMemory = nve_osclear; 424 osapi->pfnStallExecution = nve_osdelay; 425 osapi->pfnAllocReceiveBuffer = nve_osallocrxbuf; 426 osapi->pfnFreeReceiveBuffer = nve_osfreerxbuf; 427 osapi->pfnPacketWasSent = nve_ospackettx; 428 osapi->pfnPacketWasReceived = nve_ospacketrx; 429 osapi->pfnLinkStateHasChanged = nve_oslinkchg; 430 osapi->pfnAllocTimer = nve_osalloctimer; 431 osapi->pfnFreeTimer = nve_osfreetimer; 432 osapi->pfnInitializeTimer = nve_osinittimer; 433 osapi->pfnSetTimer = nve_ossettimer; 434 osapi->pfnCancelTimer = nve_oscanceltimer; 435 osapi->pfnPreprocessPacket = nve_ospreprocpkt; 436 osapi->pfnPreprocessPacketNopq = nve_ospreprocpktnopq; 437 osapi->pfnIndicatePackets = nve_osindicatepkt; 438 osapi->pfnLockAlloc = nve_oslockalloc; 439 osapi->pfnLockAcquire = nve_oslockacquire; 440 osapi->pfnLockRelease = nve_oslockrelease; 441 osapi->pfnReturnBufferVirtual = nve_osreturnbufvirt; 442 443 sc->linkup = FALSE; 444 sc->max_frame_size = ETHERMTU + ETHER_HDR_LEN + FCS_LEN; 445 446 /* TODO - We don't support hardware offload yet */ 447 sc->hwmode = 1; 448 sc->media = 0; 449 450 /* Set NVIDIA API startup parameters */ 451 OpenParams.MaxDpcLoop = 2; 452 OpenParams.MaxRxPkt = RX_RING_SIZE; 453 OpenParams.MaxTxPkt = TX_RING_SIZE; 454 OpenParams.SentPacketStatusSuccess = 1; 455 OpenParams.SentPacketStatusFailure = 0; 456 OpenParams.MaxRxPktToAccumulate = 6; 457 OpenParams.ulPollInterval = nve_pollinterval; 458 OpenParams.SetForcedModeEveryNthRxPacket = 0; 459 OpenParams.SetForcedModeEveryNthTxPacket = 0; 460 OpenParams.RxForcedInterrupt = 0; 461 OpenParams.TxForcedInterrupt = 0; 462 OpenParams.pOSApi = osapi; 463 OpenParams.pvHardwareBaseAddress = rman_get_virtual(sc->res); 464 OpenParams.bASFEnabled = 0; 465 OpenParams.ulDescriptorVersion = sc->hwmode; 466 OpenParams.ulMaxPacketSize = sc->max_frame_size; 467 OpenParams.DeviceId = pci_get_device(dev); 468 469 /* Open NVIDIA Hardware API */ 470 error = ADAPTER_Open(&OpenParams, (void **)&(sc->hwapi), &sc->phyaddr); 471 if (error) { 472 device_printf(dev, 473 "failed to open NVIDIA Hardware API: 0x%x\n", error); 474 goto fail; 475 } 476 477 /* TODO - Add support for MODE2 hardware offload */ 478 479 bzero(&sc->adapterdata, sizeof(sc->adapterdata)); 480 481 sc->adapterdata.ulMediaIF = sc->media; 482 sc->adapterdata.ulModeRegTxReadCompleteEnable = 1; 483 sc->hwapi->pfnSetCommonData(sc->hwapi->pADCX, &sc->adapterdata); 484 485 /* MAC is loaded backwards into h/w reg */ 486 sc->hwapi->pfnGetNodeAddress(sc->hwapi->pADCX, sc->original_mac_addr); 487 for (i = 0; i < 6; i++) { 488 eaddr[i] = sc->original_mac_addr[5 - i]; 489 } 490 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, eaddr); 491 bcopy(eaddr, (char *)&sc->sc_macaddr, ETHER_ADDR_LEN); 492 493 /* Display ethernet address ,... */ 494 device_printf(dev, "Ethernet address %6D\n", sc->sc_macaddr, ":"); 495 496 DEBUGOUT(NVE_DEBUG_INIT, "nve: do mii_phy_probe\n"); 497 498 /* Probe device for MII interface to PHY */ 499 if (mii_phy_probe(dev, &sc->miibus, nve_ifmedia_upd, nve_ifmedia_sts)) { 500 device_printf(dev, "MII without any phy!\n"); 501 error = ENXIO; 502 goto fail; 503 } 504 /* Setup interface parameters */ 505 ifp = &sc->sc_if; 506 ifp->if_softc = sc; 507 if_initname(ifp, "nve", unit); 508 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 509 ifp->if_ioctl = nve_ioctl; 510 ifp->if_output = ether_output; 511 ifp->if_start = nve_ifstart; 512 ifp->if_watchdog = nve_watchdog; 513 ifp->if_timer = 0; 514 ifp->if_init = nve_init; 515 ifp->if_mtu = ETHERMTU; 516 ifp->if_baudrate = IF_Mbps(100); 517 ifp->if_snd.ifq_maxlen = TX_RING_SIZE - 1; 518 ifp->if_capabilities |= IFCAP_VLAN_MTU; 519 520 /* Attach to OS's managers. */ 521 ether_ifattach(ifp, sc->sc_macaddr); 522 callout_handle_init(&sc->stat_ch); 523 524 /* Activate our interrupt handler. - attach last to avoid lock */ 525 error = bus_setup_intr(sc->dev, sc->irq, INTR_TYPE_NET, nve_intr, 526 sc, &sc->sc_ih); 527 if (error) { 528 device_printf(sc->dev, "couldn't set up interrupt handler\n"); 529 goto fail; 530 } 531 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_attach - exit\n"); 532 533fail: 534 if (error) 535 nve_detach(dev); 536 537 return (error); 538} 539 540/* Detach interface for module unload */ 541static int 542nve_detach(device_t dev) 543{ 544 struct nve_softc *sc = device_get_softc(dev); 545 struct ifnet *ifp; 546 547 KASSERT(mtx_initialized(&sc->mtx), ("mutex not initialized")); 548 NVE_LOCK(sc); 549 550 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - entry\n"); 551 552 ifp = &sc->arpcom.ac_if; 553 554 if (device_is_attached(dev)) { 555 nve_stop(sc); 556 ether_ifdetach(ifp); 557 } 558 559 if (sc->miibus) 560 device_delete_child(dev, sc->miibus); 561 bus_generic_detach(dev); 562 563 /* Reload unreversed address back into MAC in original state */ 564 if (sc->original_mac_addr) 565 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, 566 sc->original_mac_addr); 567 568 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnClose\n"); 569 /* Detach from NVIDIA hardware API */ 570 if (sc->hwapi->pfnClose) 571 sc->hwapi->pfnClose(sc->hwapi->pADCX, FALSE); 572 /* Release resources */ 573 if (sc->sc_ih) 574 bus_teardown_intr(sc->dev, sc->irq, sc->sc_ih); 575 if (sc->irq) 576 bus_release_resource(sc->dev, SYS_RES_IRQ, 0, sc->irq); 577 if (sc->res) 578 bus_release_resource(sc->dev, SYS_RES_MEMORY, NV_RID, sc->res); 579 580 nve_free_rings(sc); 581 582 if (sc->tx_desc) { 583 bus_dmamap_unload(sc->rtag, sc->rmap); 584 bus_dmamem_free(sc->rtag, sc->rx_desc, sc->rmap); 585 bus_dmamap_destroy(sc->rtag, sc->rmap); 586 } 587 if (sc->mtag) 588 bus_dma_tag_destroy(sc->mtag); 589 if (sc->ttag) 590 bus_dma_tag_destroy(sc->ttag); 591 if (sc->rtag) 592 bus_dma_tag_destroy(sc->rtag); 593 594 NVE_UNLOCK(sc); 595 mtx_destroy(&sc->mtx); 596 mtx_destroy(&sc->osmtx); 597 598 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_detach - exit\n"); 599 600 return (0); 601} 602 603/* Initialise interface and start it "RUNNING" */ 604static void 605nve_init(void *xsc) 606{ 607 struct nve_softc *sc = xsc; 608 struct ifnet *ifp; 609 int error; 610 611 NVE_LOCK(sc); 612 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - entry (%d)\n", sc->linkup); 613 614 ifp = &sc->sc_if; 615 616 /* Do nothing if already running */ 617 if (ifp->if_flags & IFF_RUNNING) 618 goto fail; 619 620 nve_stop(sc); 621 DEBUGOUT(NVE_DEBUG_INIT, "nve: do pfnInit\n"); 622 623 /* Setup Hardware interface and allocate memory structures */ 624 error = sc->hwapi->pfnInit(sc->hwapi->pADCX, 625 0, /* force speed */ 626 0, /* force full duplex */ 627 0, /* force mode */ 628 0, /* force async mode */ 629 &sc->linkup); 630 631 if (error) { 632 device_printf(sc->dev, 633 "failed to start NVIDIA Hardware interface\n"); 634 goto fail; 635 } 636 /* Set the MAC address */ 637 sc->hwapi->pfnSetNodeAddress(sc->hwapi->pADCX, sc->sc_macaddr); 638 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 639 sc->hwapi->pfnStart(sc->hwapi->pADCX); 640 641 /* Setup multicast filter */ 642 nve_setmulti(sc); 643 nve_ifmedia_upd(ifp); 644 645 /* Update interface parameters */ 646 ifp->if_flags |= IFF_RUNNING; 647 ifp->if_flags &= ~IFF_OACTIVE; 648 649 sc->stat_ch = timeout(nve_tick, sc, hz); 650 651 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init - exit\n"); 652 653fail: 654 NVE_UNLOCK(sc); 655 656 return; 657} 658 659/* Stop interface activity ie. not "RUNNING" */ 660static void 661nve_stop(struct nve_softc *sc) 662{ 663 struct ifnet *ifp; 664 665 NVE_LOCK(sc); 666 667 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - entry\n"); 668 669 ifp = &sc->sc_if; 670 ifp->if_timer = 0; 671 672 /* Cancel tick timer */ 673 untimeout(nve_tick, sc, sc->stat_ch); 674 675 /* Stop hardware activity */ 676 sc->hwapi->pfnDisableInterrupts(sc->hwapi->pADCX); 677 sc->hwapi->pfnStop(sc->hwapi->pADCX, 0); 678 679 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: do pfnDeinit\n"); 680 /* Shutdown interface and deallocate memory buffers */ 681 if (sc->hwapi->pfnDeinit) 682 sc->hwapi->pfnDeinit(sc->hwapi->pADCX, 0); 683 684 sc->linkup = 0; 685 sc->cur_rx = 0; 686 sc->pending_rxs = 0; 687 688 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 689 690 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_stop - exit\n"); 691 692 NVE_UNLOCK(sc); 693 694 return; 695} 696 697/* Shutdown interface for unload/reboot */ 698static void 699nve_shutdown(device_t dev) 700{ 701 struct nve_softc *sc; 702 703 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_shutdown\n"); 704 705 sc = device_get_softc(dev); 706 707 /* Stop hardware activity */ 708 nve_stop(sc); 709} 710 711/* Allocate TX ring buffers */ 712static int 713nve_init_rings(struct nve_softc *sc) 714{ 715 int error, i; 716 717 NVE_LOCK(sc); 718 719 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - entry\n"); 720 721 sc->cur_rx = sc->cur_tx = sc->pending_rxs = sc->pending_txs = 0; 722 /* Initialise RX ring */ 723 for (i = 0; i < RX_RING_SIZE; i++) { 724 struct nve_rx_desc *desc = sc->rx_desc + i; 725 struct nve_map_buffer *buf = &desc->buf; 726 727 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 728 if (buf->mbuf == NULL) { 729 device_printf(sc->dev, "couldn't allocate mbuf\n"); 730 nve_free_rings(sc); 731 error = ENOBUFS; 732 goto fail; 733 } 734 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES; 735 m_adj(buf->mbuf, ETHER_ALIGN); 736 737 error = bus_dmamap_create(sc->mtag, 0, &buf->map); 738 if (error) { 739 device_printf(sc->dev, "couldn't create dma map\n"); 740 nve_free_rings(sc); 741 goto fail; 742 } 743 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf, 744 nve_dmamap_rx_cb, &desc->paddr, 0); 745 if (error) { 746 device_printf(sc->dev, "couldn't dma map mbuf\n"); 747 nve_free_rings(sc); 748 goto fail; 749 } 750 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD); 751 752 desc->buflength = buf->mbuf->m_len; 753 desc->vaddr = mtod(buf->mbuf, caddr_t); 754 } 755 bus_dmamap_sync(sc->rtag, sc->rmap, 756 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 757 758 /* Initialize TX ring */ 759 for (i = 0; i < TX_RING_SIZE; i++) { 760 struct nve_tx_desc *desc = sc->tx_desc + i; 761 struct nve_map_buffer *buf = &desc->buf; 762 763 buf->mbuf = NULL; 764 765 error = bus_dmamap_create(sc->mtag, 0, &buf->map); 766 if (error) { 767 device_printf(sc->dev, "couldn't create dma map\n"); 768 nve_free_rings(sc); 769 goto fail; 770 } 771 } 772 bus_dmamap_sync(sc->ttag, sc->tmap, 773 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 774 775 DEBUGOUT(NVE_DEBUG_INIT, "nve: nve_init_rings - exit\n"); 776 777fail: 778 NVE_UNLOCK(sc); 779 780 return (error); 781} 782 783/* Free the TX ring buffers */ 784static void 785nve_free_rings(struct nve_softc *sc) 786{ 787 int i; 788 789 NVE_LOCK(sc); 790 791 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - entry\n"); 792 793 for (i = 0; i < RX_RING_SIZE; i++) { 794 struct nve_rx_desc *desc = sc->rx_desc + i; 795 struct nve_map_buffer *buf = &desc->buf; 796 797 if (buf->mbuf) { 798 bus_dmamap_unload(sc->mtag, buf->map); 799 bus_dmamap_destroy(sc->mtag, buf->map); 800 m_freem(buf->mbuf); 801 } 802 buf->mbuf = NULL; 803 } 804 805 for (i = 0; i < TX_RING_SIZE; i++) { 806 struct nve_tx_desc *desc = sc->tx_desc + i; 807 struct nve_map_buffer *buf = &desc->buf; 808 809 if (buf->mbuf) { 810 bus_dmamap_unload(sc->mtag, buf->map); 811 bus_dmamap_destroy(sc->mtag, buf->map); 812 m_freem(buf->mbuf); 813 } 814 buf->mbuf = NULL; 815 } 816 817 DEBUGOUT(NVE_DEBUG_DEINIT, "nve: nve_free_rings - exit\n"); 818 819 NVE_UNLOCK(sc); 820} 821 822/* Main loop for sending packets from OS to interface */ 823static void 824nve_ifstart(struct ifnet *ifp) 825{ 826 struct nve_softc *sc = ifp->if_softc; 827 struct nve_map_buffer *buf; 828 struct mbuf *m0, *m; 829 struct nve_tx_desc *desc; 830 ADAPTER_WRITE_DATA txdata; 831 int error, i; 832 833 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - entry\n"); 834 835 /* If link is down/busy or queue is empty do nothing */ 836 if (ifp->if_flags & IFF_OACTIVE || ifp->if_snd.ifq_head == NULL) 837 return; 838 839 /* Transmit queued packets until sent or TX ring is full */ 840 while (sc->pending_txs < TX_RING_SIZE) { 841 desc = sc->tx_desc + sc->cur_tx; 842 buf = &desc->buf; 843 844 /* Get next packet to send. */ 845 IF_DEQUEUE(&ifp->if_snd, m0); 846 847 /* If nothing to send, return. */ 848 if (m0 == NULL) 849 return; 850 851 /* Map MBUF for DMA access */ 852 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m0, 853 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT); 854 855 if (error && error != EFBIG) { 856 m_freem(m0); 857 sc->tx_errors++; 858 continue; 859 } 860 /* 861 * Packet has too many fragments - defrag into new mbuf 862 * cluster 863 */ 864 if (error) { 865 m = m_defrag(m0, M_DONTWAIT); 866 if (m == NULL) { 867 m_freem(m0); 868 sc->tx_errors++; 869 continue; 870 } 871 m_freem(m0); 872 m0 = m; 873 874 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, m, 875 nve_dmamap_tx_cb, desc, BUS_DMA_NOWAIT); 876 if (error) { 877 m_freem(m); 878 sc->tx_errors++; 879 continue; 880 } 881 } 882 /* Do sync on DMA bounce buffer */ 883 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREWRITE); 884 885 buf->mbuf = m0; 886 txdata.ulNumberOfElements = desc->numfrags; 887 txdata.pvID = (PVOID)desc; 888 889 /* Put fragments into API element list */ 890 txdata.ulTotalLength = buf->mbuf->m_len; 891 for (i = 0; i < desc->numfrags; i++) { 892 txdata.sElement[i].ulLength = 893 (ulong)desc->frags[i].ds_len; 894 txdata.sElement[i].pPhysical = 895 (PVOID)desc->frags[i].ds_addr; 896 } 897 898 /* Send packet to Nvidia API for transmission */ 899 error = sc->hwapi->pfnWrite(sc->hwapi->pADCX, &txdata); 900 901 switch (error) { 902 case ADAPTERERR_NONE: 903 /* Packet was queued in API TX queue successfully */ 904 sc->pending_txs++; 905 sc->cur_tx = (sc->cur_tx + 1) % TX_RING_SIZE; 906 break; 907 908 case ADAPTERERR_TRANSMIT_QUEUE_FULL: 909 /* The API TX queue is full - requeue the packet */ 910 device_printf(sc->dev, 911 "nve_ifstart: transmit queue is full\n"); 912 ifp->if_flags |= IFF_OACTIVE; 913 bus_dmamap_unload(sc->mtag, buf->map); 914 IF_PREPEND(&ifp->if_snd, buf->mbuf); 915 buf->mbuf = NULL; 916 return; 917 918 default: 919 /* The API failed to queue/send the packet so dump it */ 920 device_printf(sc->dev, "nve_ifstart: transmit error\n"); 921 bus_dmamap_unload(sc->mtag, buf->map); 922 m_freem(buf->mbuf); 923 buf->mbuf = NULL; 924 sc->tx_errors++; 925 return; 926 } 927 /* Set watchdog timer. */ 928 ifp->if_timer = 8; 929 930 /* Copy packet to BPF tap */ 931 BPF_MTAP(ifp, m0); 932 } 933 ifp->if_flags |= IFF_OACTIVE; 934 935 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_ifstart - exit\n"); 936} 937 938/* Handle IOCTL events */ 939static int 940nve_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 941{ 942 struct nve_softc *sc = ifp->if_softc; 943 struct ifreq *ifr = (struct ifreq *) data; 944 struct mii_data *mii; 945 int error = 0; 946 947 NVE_LOCK(sc); 948 949 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - entry\n"); 950 951 switch (command) { 952 case SIOCSIFMTU: 953 /* Set MTU size */ 954 if (ifp->if_mtu == ifr->ifr_mtu) 955 break; 956 if (ifr->ifr_mtu + ifp->if_hdrlen <= MAX_PACKET_SIZE_1518) { 957 ifp->if_mtu = ifr->ifr_mtu; 958 nve_stop(sc); 959 nve_init(sc); 960 } else 961 error = EINVAL; 962 break; 963 964 case SIOCSIFFLAGS: 965 /* Setup interface flags */ 966 if (ifp->if_flags & IFF_UP) { 967 if ((ifp->if_flags & IFF_RUNNING) == 0) { 968 nve_init(sc); 969 break; 970 } 971 } else { 972 if (ifp->if_flags & IFF_RUNNING) { 973 nve_stop(sc); 974 break; 975 } 976 } 977 /* Handle IFF_PROMISC and IFF_ALLMULTI flags. */ 978 nve_setmulti(sc); 979 break; 980 981 case SIOCADDMULTI: 982 case SIOCDELMULTI: 983 /* Setup multicast filter */ 984 if (ifp->if_flags & IFF_RUNNING) { 985 nve_setmulti(sc); 986 } 987 break; 988 989 case SIOCGIFMEDIA: 990 case SIOCSIFMEDIA: 991 /* Get/Set interface media parameters */ 992 mii = device_get_softc(sc->miibus); 993 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command); 994 break; 995 996 default: 997 /* Everything else we forward to generic ether ioctl */ 998 error = ether_ioctl(ifp, (int)command, data); 999 break; 1000 } 1001 1002 DEBUGOUT(NVE_DEBUG_IOCTL, "nve: nve_ioctl - exit\n"); 1003 1004 NVE_UNLOCK(sc); 1005 1006 return (error); 1007} 1008 1009/* Interrupt service routine */ 1010static void 1011nve_intr(void *arg) 1012{ 1013 struct nve_softc *sc = arg; 1014 struct ifnet *ifp = &sc->sc_if; 1015 1016 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - entry\n"); 1017 1018 if (!ifp->if_flags & IFF_UP) { 1019 nve_stop(sc); 1020 return; 1021 } 1022 /* Handle interrupt event */ 1023 if (sc->hwapi->pfnQueryInterrupt(sc->hwapi->pADCX)) { 1024 sc->hwapi->pfnHandleInterrupt(sc->hwapi->pADCX); 1025 sc->hwapi->pfnEnableInterrupts(sc->hwapi->pADCX); 1026 } 1027 if (ifp->if_snd.ifq_head != NULL) 1028 nve_ifstart(ifp); 1029 1030 /* If no pending packets we don't need a timeout */ 1031 if (sc->pending_txs == 0) 1032 sc->sc_if.if_timer = 0; 1033 1034 DEBUGOUT(NVE_DEBUG_INTERRUPT, "nve: nve_intr - exit\n"); 1035 1036 return; 1037} 1038 1039/* Setup multicast filters */ 1040static void 1041nve_setmulti(struct nve_softc *sc) 1042{ 1043 struct ifnet *ifp; 1044 struct ifmultiaddr *ifma; 1045 PACKET_FILTER hwfilter; 1046 int i; 1047 u_int8_t andaddr[6], oraddr[6]; 1048 1049 NVE_LOCK(sc); 1050 1051 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - entry\n"); 1052 1053 ifp = &sc->sc_if; 1054 1055 /* Initialize filter */ 1056 hwfilter.ulFilterFlags = 0; 1057 for (i = 0; i < 6; i++) { 1058 hwfilter.acMulticastAddress[i] = 0; 1059 hwfilter.acMulticastMask[i] = 0; 1060 } 1061 1062 if (ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI)) { 1063 /* Accept all packets */ 1064 hwfilter.ulFilterFlags |= ACCEPT_ALL_PACKETS; 1065 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter); 1066 NVE_UNLOCK(sc); 1067 return; 1068 } 1069 /* Setup multicast filter */ 1070 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1071 u_char *addrp; 1072 1073 if (ifma->ifma_addr->sa_family != AF_LINK) 1074 continue; 1075 1076 addrp = LLADDR((struct sockaddr_dl *) ifma->ifma_addr); 1077 for (i = 0; i < 6; i++) { 1078 u_int8_t mcaddr = addrp[i]; 1079 andaddr[i] &= mcaddr; 1080 oraddr[i] |= mcaddr; 1081 } 1082 } 1083 for (i = 0; i < 6; i++) { 1084 hwfilter.acMulticastAddress[i] = andaddr[i] & oraddr[i]; 1085 hwfilter.acMulticastMask[i] = andaddr[i] | (~oraddr[i]); 1086 } 1087 1088 /* Send filter to NVIDIA API */ 1089 sc->hwapi->pfnSetPacketFilter(sc->hwapi->pADCX, &hwfilter); 1090 1091 NVE_UNLOCK(sc); 1092 1093 DEBUGOUT(NVE_DEBUG_RUNNING, "nve: nve_setmulti - exit\n"); 1094 1095 return; 1096} 1097 1098/* Change the current media/mediaopts */ 1099static int 1100nve_ifmedia_upd(struct ifnet *ifp) 1101{ 1102 struct nve_softc *sc = ifp->if_softc; 1103 struct mii_data *mii; 1104 1105 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_upd\n"); 1106 1107 mii = device_get_softc(sc->miibus); 1108 1109 if (mii->mii_instance) { 1110 struct mii_softc *miisc; 1111 for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 1112 miisc = LIST_NEXT(miisc, mii_list)) { 1113 mii_phy_reset(miisc); 1114 } 1115 } 1116 mii_mediachg(mii); 1117 1118 return (0); 1119} 1120 1121/* Update current miibus PHY status of media */ 1122static void 1123nve_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 1124{ 1125 struct nve_softc *sc; 1126 struct mii_data *mii; 1127 1128 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_ifmedia_sts\n"); 1129 1130 sc = ifp->if_softc; 1131 mii = device_get_softc(sc->miibus); 1132 mii_pollstat(mii); 1133 1134 ifmr->ifm_active = mii->mii_media_active; 1135 ifmr->ifm_status = mii->mii_media_status; 1136 1137 return; 1138} 1139 1140/* miibus tick timer - maintain link status */ 1141static void 1142nve_tick(void *xsc) 1143{ 1144 struct nve_softc *sc = xsc; 1145 struct mii_data *mii; 1146 struct ifnet *ifp; 1147 1148 NVE_LOCK(sc); 1149 1150 ifp = &sc->sc_if; 1151 nve_update_stats(sc); 1152 1153 mii = device_get_softc(sc->miibus); 1154 mii_tick(mii); 1155 1156 if (mii->mii_media_status & IFM_ACTIVE && 1157 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 1158 if (ifp->if_snd.ifq_head != NULL) 1159 nve_ifstart(ifp); 1160 } 1161 sc->stat_ch = timeout(nve_tick, sc, hz); 1162 1163 NVE_UNLOCK(sc); 1164 1165 return; 1166} 1167 1168/* Update ifnet data structure with collected interface stats from API */ 1169static void 1170nve_update_stats(struct nve_softc *sc) 1171{ 1172 struct ifnet *ifp = &sc->sc_if; 1173 ADAPTER_STATS stats; 1174 1175 NVE_LOCK(sc); 1176 1177 if (sc->hwapi) { 1178 sc->hwapi->pfnGetStatistics(sc->hwapi->pADCX, &stats); 1179 1180 ifp->if_ipackets = stats.ulSuccessfulReceptions; 1181 ifp->if_ierrors = stats.ulMissedFrames + 1182 stats.ulFailedReceptions + 1183 stats.ulCRCErrors + 1184 stats.ulFramingErrors + 1185 stats.ulOverFlowErrors; 1186 1187 ifp->if_opackets = stats.ulSuccessfulTransmissions; 1188 ifp->if_oerrors = sc->tx_errors + 1189 stats.ulFailedTransmissions + 1190 stats.ulRetryErrors + 1191 stats.ulUnderflowErrors + 1192 stats.ulLossOfCarrierErrors + 1193 stats.ulLateCollisionErrors; 1194 1195 ifp->if_collisions = stats.ulLateCollisionErrors; 1196 } 1197 NVE_UNLOCK(sc); 1198 1199 return; 1200} 1201 1202/* miibus Read PHY register wrapper - calls Nvidia API entry point */ 1203static int 1204nve_miibus_readreg(device_t dev, int phy, int reg) 1205{ 1206 struct nve_softc *sc = device_get_softc(dev); 1207 ULONG data; 1208 1209 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - entry\n"); 1210 1211 ADAPTER_ReadPhy(sc->hwapi->pADCX, phy, reg, &data); 1212 1213 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_readreg - exit\n"); 1214 1215 return (data); 1216} 1217 1218/* miibus Write PHY register wrapper - calls Nvidia API entry point */ 1219static void 1220nve_miibus_writereg(device_t dev, int phy, int reg, int data) 1221{ 1222 struct nve_softc *sc = device_get_softc(dev); 1223 1224 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - entry\n"); 1225 1226 ADAPTER_WritePhy(sc->hwapi->pADCX, phy, reg, (ulong)data); 1227 1228 DEBUGOUT(NVE_DEBUG_MII, "nve: nve_miibus_writereg - exit\n"); 1229 1230 return; 1231} 1232 1233/* Watchdog timer to prevent PHY lockups */ 1234static void 1235nve_watchdog(struct ifnet *ifp) 1236{ 1237 struct nve_softc *sc = ifp->if_softc; 1238 1239 device_printf(sc->dev, "device timeout (%d)\n", sc->pending_txs); 1240 1241 sc->tx_errors++; 1242 1243 nve_stop(sc); 1244 ifp->if_flags &= ~IFF_RUNNING; 1245 nve_init(sc); 1246 1247 if (ifp->if_snd.ifq_head != NULL) 1248 nve_ifstart(ifp); 1249 1250 return; 1251} 1252 1253/* --- Start of NVOSAPI interface --- */ 1254 1255/* Allocate DMA enabled general use memory for API */ 1256static NV_SINT32 1257nve_osalloc(PNV_VOID ctx, PMEMORY_BLOCK mem) 1258{ 1259 struct nve_softc *sc; 1260 bus_addr_t mem_physical; 1261 1262 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc - %d\n", mem->uiLength); 1263 1264 sc = (struct nve_softc *)ctx; 1265 1266 mem->pLogical = (PVOID)contigmalloc(mem->uiLength, M_DEVBUF, 1267 M_NOWAIT | M_ZERO, 0, ~0, PAGE_SIZE, 0); 1268 1269 if (!mem->pLogical) { 1270 device_printf(sc->dev, "memory allocation failed\n"); 1271 return (0); 1272 } 1273 memset(mem->pLogical, 0, (ulong)mem->uiLength); 1274 mem_physical = vtophys(mem->pLogical); 1275 mem->pPhysical = (PVOID)mem_physical; 1276 1277 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osalloc 0x%x/0x%x - %d\n", 1278 (uint)mem->pLogical, (uint)mem->pPhysical, (uint)mem->uiLength); 1279 1280 return (1); 1281} 1282 1283/* Free allocated memory */ 1284static NV_SINT32 1285nve_osfree(PNV_VOID ctx, PMEMORY_BLOCK mem) 1286{ 1287 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfree - 0x%x - %d\n", 1288 (uint)mem->pLogical, (uint) mem->uiLength); 1289 1290 contigfree(mem->pLogical, PAGE_SIZE, M_DEVBUF); 1291 return (1); 1292} 1293 1294/* Copied directly from nvnet.c */ 1295static NV_SINT32 1296nve_osallocex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex) 1297{ 1298 MEMORY_BLOCK mem_block; 1299 1300 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocex\n"); 1301 1302 mem_block_ex->pLogical = NULL; 1303 mem_block_ex->uiLengthOrig = mem_block_ex->uiLength; 1304 1305 if ((mem_block_ex->AllocFlags & ALLOC_MEMORY_ALIGNED) && 1306 (mem_block_ex->AlignmentSize > 1)) { 1307 DEBUGOUT(NVE_DEBUG_API, " aligning on %d\n", 1308 mem_block_ex->AlignmentSize); 1309 mem_block_ex->uiLengthOrig += mem_block_ex->AlignmentSize; 1310 } 1311 mem_block.uiLength = mem_block_ex->uiLengthOrig; 1312 1313 if (nve_osalloc(ctx, &mem_block) == 0) { 1314 return (0); 1315 } 1316 mem_block_ex->pLogicalOrig = mem_block.pLogical; 1317 mem_block_ex->pPhysicalOrigLow = (unsigned long)mem_block.pPhysical; 1318 mem_block_ex->pPhysicalOrigHigh = 0; 1319 1320 mem_block_ex->pPhysical = mem_block.pPhysical; 1321 mem_block_ex->pLogical = mem_block.pLogical; 1322 1323 if (mem_block_ex->uiLength != mem_block_ex->uiLengthOrig) { 1324 unsigned int offset; 1325 offset = mem_block_ex->pPhysicalOrigLow & 1326 (mem_block_ex->AlignmentSize - 1); 1327 1328 if (offset) { 1329 mem_block_ex->pPhysical = 1330 (PVOID)((ulong)mem_block_ex->pPhysical + 1331 mem_block_ex->AlignmentSize - offset); 1332 mem_block_ex->pLogical = 1333 (PVOID)((ulong)mem_block_ex->pLogical + 1334 mem_block_ex->AlignmentSize - offset); 1335 } /* if (offset) */ 1336 } /* if (mem_block_ex->uiLength != *mem_block_ex->uiLengthOrig) */ 1337 return (1); 1338} 1339 1340/* Copied directly from nvnet.c */ 1341static NV_SINT32 1342nve_osfreeex(PNV_VOID ctx, PMEMORY_BLOCKEX mem_block_ex) 1343{ 1344 MEMORY_BLOCK mem_block; 1345 1346 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreeex\n"); 1347 1348 mem_block.pLogical = mem_block_ex->pLogicalOrig; 1349 mem_block.pPhysical = (PVOID)((ulong)mem_block_ex->pPhysicalOrigLow); 1350 mem_block.uiLength = mem_block_ex->uiLengthOrig; 1351 1352 return (nve_osfree(ctx, &mem_block)); 1353} 1354 1355/* Clear memory region */ 1356static NV_SINT32 1357nve_osclear(PNV_VOID ctx, PNV_VOID mem, NV_SINT32 length) 1358{ 1359 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osclear\n"); 1360 memset(mem, 0, length); 1361 return (1); 1362} 1363 1364/* Sleep for a tick */ 1365static NV_SINT32 1366nve_osdelay(PNV_VOID ctx, NV_UINT32 usec) 1367{ 1368 DELAY(usec); 1369 return (1); 1370} 1371 1372/* Allocate memory for rx buffer */ 1373static NV_SINT32 1374nve_osallocrxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID *id) 1375{ 1376 struct nve_softc *sc = ctx; 1377 struct nve_rx_desc *desc; 1378 struct nve_map_buffer *buf; 1379 int error; 1380 1381 NVE_LOCK(sc); 1382 1383 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osallocrxbuf\n"); 1384 1385 if (sc->pending_rxs == RX_RING_SIZE) { 1386 device_printf(sc->dev, "rx ring buffer is full\n"); 1387 goto fail; 1388 } 1389 desc = sc->rx_desc + sc->cur_rx; 1390 buf = &desc->buf; 1391 1392 if (buf->mbuf == NULL) { 1393 buf->mbuf = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 1394 if (buf->mbuf == NULL) { 1395 device_printf(sc->dev, "failed to allocate memory\n"); 1396 goto fail; 1397 } 1398 buf->mbuf->m_len = buf->mbuf->m_pkthdr.len = MCLBYTES; 1399 m_adj(buf->mbuf, ETHER_ALIGN); 1400 1401 error = bus_dmamap_load_mbuf(sc->mtag, buf->map, buf->mbuf, 1402 nve_dmamap_rx_cb, &desc->paddr, 0); 1403 if (error) { 1404 device_printf(sc->dev, "failed to dmamap mbuf\n"); 1405 m_freem(buf->mbuf); 1406 buf->mbuf = NULL; 1407 goto fail; 1408 } 1409 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_PREREAD); 1410 desc->buflength = buf->mbuf->m_len; 1411 desc->vaddr = mtod(buf->mbuf, caddr_t); 1412 } 1413 sc->pending_rxs++; 1414 sc->cur_rx = (sc->cur_rx + 1) % RX_RING_SIZE; 1415 1416 mem->pLogical = (void *)desc->vaddr; 1417 mem->pPhysical = (void *)desc->paddr; 1418 mem->uiLength = desc->buflength; 1419 *id = (void *)desc; 1420 1421 NVE_UNLOCK(sc); 1422 return (1); 1423 1424fail: 1425 NVE_UNLOCK(sc); 1426 return (0); 1427} 1428 1429/* Free the rx buffer */ 1430static NV_SINT32 1431nve_osfreerxbuf(PNV_VOID ctx, PMEMORY_BLOCK mem, PNV_VOID id) 1432{ 1433 struct nve_softc *sc = ctx; 1434 struct nve_rx_desc *desc; 1435 struct nve_map_buffer *buf; 1436 1437 NVE_LOCK(sc); 1438 1439 DEBUGOUT(NVE_DEBUG_API, "nve: nve_osfreerxbuf\n"); 1440 1441 desc = (struct nve_rx_desc *) id; 1442 buf = &desc->buf; 1443 1444 if (buf->mbuf) { 1445 bus_dmamap_unload(sc->mtag, buf->map); 1446 bus_dmamap_destroy(sc->mtag, buf->map); 1447 m_freem(buf->mbuf); 1448 } 1449 sc->pending_rxs--; 1450 buf->mbuf = NULL; 1451 1452 NVE_UNLOCK(sc); 1453 1454 return (1); 1455} 1456 1457/* This gets called by the Nvidia API after our TX packet has been sent */ 1458static NV_SINT32 1459nve_ospackettx(PNV_VOID ctx, PNV_VOID id, NV_UINT32 success) 1460{ 1461 struct nve_softc *sc = ctx; 1462 struct nve_map_buffer *buf; 1463 struct nve_tx_desc *desc = (struct nve_tx_desc *) id; 1464 struct ifnet *ifp; 1465 1466 NVE_LOCK(sc); 1467 1468 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospackettx\n"); 1469 1470 ifp = &sc->sc_if; 1471 buf = &desc->buf; 1472 sc->pending_txs--; 1473 1474 /* Unload and free mbuf cluster */ 1475 if (buf->mbuf == NULL) 1476 goto fail; 1477 1478 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTWRITE); 1479 bus_dmamap_unload(sc->mtag, buf->map); 1480 m_freem(buf->mbuf); 1481 buf->mbuf = NULL; 1482 1483 /* Send more packets if we have them */ 1484 if (sc->pending_txs < TX_RING_SIZE) 1485 sc->sc_if.if_flags &= ~IFF_OACTIVE; 1486 1487 if (ifp->if_snd.ifq_head != NULL && sc->pending_txs < TX_RING_SIZE) 1488 nve_ifstart(ifp); 1489 1490fail: 1491 NVE_UNLOCK(sc); 1492 1493 return (1); 1494} 1495 1496/* This gets called by the Nvidia API when a new packet has been received */ 1497/* XXX What is newbuf used for? XXX */ 1498static NV_SINT32 1499nve_ospacketrx(PNV_VOID ctx, PNV_VOID data, NV_UINT32 success, NV_UINT8 *newbuf, 1500 NV_UINT8 priority) 1501{ 1502 struct nve_softc *sc = ctx; 1503 struct ifnet *ifp; 1504 struct nve_rx_desc *desc; 1505 struct nve_map_buffer *buf; 1506 ADAPTER_READ_DATA *readdata; 1507 1508 NVE_LOCK(sc); 1509 1510 DEBUGOUT(NVE_DEBUG_API, "nve: nve_ospacketrx\n"); 1511 1512 ifp = &sc->sc_if; 1513 1514 readdata = (ADAPTER_READ_DATA *) data; 1515 desc = readdata->pvID; 1516 buf = &desc->buf; 1517 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1518 1519 if (success) { 1520 /* Sync DMA bounce buffer. */ 1521 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1522 1523 /* First mbuf in packet holds the ethernet and packet headers */ 1524 buf->mbuf->m_pkthdr.rcvif = ifp; 1525 buf->mbuf->m_pkthdr.len = buf->mbuf->m_len = 1526 readdata->ulTotalLength; 1527 1528 bus_dmamap_unload(sc->mtag, buf->map); 1529 1530 /* Give mbuf to OS. */ 1531 (*ifp->if_input) (ifp, buf->mbuf); 1532 if (readdata->ulFilterMatch & ADREADFL_MULTICAST_MATCH) 1533 ifp->if_imcasts++; 1534 1535 /* Blat the mbuf pointer, kernel will free the mbuf cluster */ 1536 buf->mbuf = NULL; 1537 } else { 1538 bus_dmamap_sync(sc->mtag, buf->map, BUS_DMASYNC_POSTREAD); 1539 bus_dmamap_unload(sc->mtag, buf->map); 1540 m_freem(buf->mbuf); 1541 buf->mbuf = NULL; 1542 } 1543 1544 sc->cur_rx = desc - sc->rx_desc; 1545 sc->pending_rxs--; 1546 1547 NVE_UNLOCK(sc); 1548 1549 return (1); 1550} 1551 1552/* This gets called by NVIDIA API when the PHY link state changes */ 1553static NV_SINT32 1554nve_oslinkchg(PNV_VOID ctx, NV_SINT32 enabled) 1555{ 1556 struct nve_softc *sc = (struct nve_softc *)ctx; 1557 struct ifnet *ifp; 1558 1559 DEBUGOUT(NVE_DEBUG_API, "nve: nve_oslinkchg\n"); 1560 1561 ifp = &sc->sc_if; 1562 1563 if (enabled) 1564 ifp->if_flags |= IFF_UP; 1565 else 1566 ifp->if_flags &= ~IFF_UP; 1567 1568 return (1); 1569} 1570 1571/* Setup a watchdog timer */ 1572static NV_SINT32 1573nve_osalloctimer(PNV_VOID ctx, PNV_VOID *timer) 1574{ 1575 struct nve_softc *sc = (struct nve_softc *)ctx; 1576 1577 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osalloctimer\n"); 1578 1579 callout_handle_init(&sc->ostimer); 1580 *timer = &sc->ostimer; 1581 1582 return (1); 1583} 1584 1585/* Free the timer */ 1586static NV_SINT32 1587nve_osfreetimer(PNV_VOID ctx, PNV_VOID timer) 1588{ 1589 1590 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osfreetimer\n"); 1591 1592 return (1); 1593} 1594 1595/* Setup timer parameters */ 1596static NV_SINT32 1597nve_osinittimer(PNV_VOID ctx, PNV_VOID timer, PTIMER_FUNC func, PNV_VOID parameters) 1598{ 1599 struct nve_softc *sc = (struct nve_softc *)ctx; 1600 1601 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osinittimer\n"); 1602 1603 sc->ostimer_func = func; 1604 sc->ostimer_params = parameters; 1605 1606 return (1); 1607} 1608 1609/* Set the timer to go off */ 1610static NV_SINT32 1611nve_ossettimer(PNV_VOID ctx, PNV_VOID timer, NV_UINT32 delay) 1612{ 1613 struct nve_softc *sc = ctx; 1614 1615 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ossettimer\n"); 1616 1617 *(struct callout_handle *)timer = timeout(sc->ostimer_func, 1618 sc->ostimer_params, delay); 1619 1620 return (1); 1621} 1622 1623/* Cancel the timer */ 1624static NV_SINT32 1625nve_oscanceltimer(PNV_VOID ctx, PNV_VOID timer) 1626{ 1627 struct nve_softc *sc = ctx; 1628 1629 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_oscanceltimer\n"); 1630 1631 untimeout(sc->ostimer_func, sc->ostimer_params, 1632 *(struct callout_handle *)timer); 1633 1634 return (1); 1635} 1636 1637static NV_SINT32 1638nve_ospreprocpkt(PNV_VOID ctx, PNV_VOID readdata, PNV_VOID *id, 1639 NV_UINT8 *newbuffer, NV_UINT8 priority) 1640{ 1641 1642 /* Not implemented */ 1643 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n"); 1644 1645 return (1); 1646} 1647 1648static PNV_VOID 1649nve_ospreprocpktnopq(PNV_VOID ctx, PNV_VOID readdata) 1650{ 1651 1652 /* Not implemented */ 1653 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_ospreprocpkt\n"); 1654 1655 return (NULL); 1656} 1657 1658static NV_SINT32 1659nve_osindicatepkt(PNV_VOID ctx, PNV_VOID *id, NV_UINT32 pktno) 1660{ 1661 1662 /* Not implemented */ 1663 DEBUGOUT(NVE_DEBUG_BROKEN, "nve: nve_osindicatepkt\n"); 1664 1665 return (1); 1666} 1667 1668/* Allocate mutex context (already done in nve_attach) */ 1669static NV_SINT32 1670nve_oslockalloc(PNV_VOID ctx, NV_SINT32 type, PNV_VOID *pLock) 1671{ 1672 struct nve_softc *sc = (struct nve_softc *)ctx; 1673 1674 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockalloc\n"); 1675 1676 *pLock = (void **)sc; 1677 1678 return (1); 1679} 1680 1681/* Obtain a spin lock */ 1682static NV_SINT32 1683nve_oslockacquire(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock) 1684{ 1685 1686 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockacquire\n"); 1687 1688 NVE_OSLOCK((struct nve_softc *)lock); 1689 1690 return (1); 1691} 1692 1693/* Release lock */ 1694static NV_SINT32 1695nve_oslockrelease(PNV_VOID ctx, NV_SINT32 type, PNV_VOID lock) 1696{ 1697 1698 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_oslockrelease\n"); 1699 1700 NVE_OSUNLOCK((struct nve_softc *)lock); 1701 1702 return (1); 1703} 1704 1705/* I have no idea what this is for */ 1706static PNV_VOID 1707nve_osreturnbufvirt(PNV_VOID ctx, PNV_VOID readdata) 1708{ 1709 1710 /* Not implemented */ 1711 DEBUGOUT(NVE_DEBUG_LOCK, "nve: nve_osreturnbufvirt\n"); 1712 panic("nve: nve_osreturnbufvirtual not implemented\n"); 1713 1714 return (NULL); 1715} 1716 1717/* --- End on NVOSAPI interface --- */ 1718