mpt_reg.h revision 147883 
1/* $FreeBSD: head/sys/dev/mpt/mpt_reg.h 147883 2005-07-10 15:05:39Z scottl $ */
2/*-
3 * Generic defines for LSI '909 FC  adapters.
4 * FreeBSD Version.
5 *
6 * Copyright (c)  2000, 2001 by Greg Ansley
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice immediately at the beginning of the file, without modification,
13 *    this list of conditions, and the following disclaimer.
14 * 2. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * Additional Copyright (c) 2002 by Matthew Jacob under same license.
30 */
31#ifndef _MPT_REG_H_
32#define	_MPT_REG_H_
33
34#define	MPT_OFFSET_DOORBELL	0x00
35#define	MPT_OFFSET_SEQUENCE	0x04
36#define	MPT_OFFSET_DIAGNOSTIC	0x08
37#define	MPT_OFFSET_TEST		0x0C
38#define	MPT_OFFSET_DIAG_DATA	0x10
39#define	MPT_OFFSET_DIAG_ADDR	0x14
40#define	MPT_OFFSET_INTR_STATUS	0x30
41#define	MPT_OFFSET_INTR_MASK	0x34
42#define	MPT_OFFSET_REQUEST_Q	0x40
43#define	MPT_OFFSET_REPLY_Q	0x44
44#define	MPT_OFFSET_HOST_INDEX	0x50
45#define	MPT_OFFSET_FUBAR	0x90
46
47/* Bit Maps for DOORBELL register */
48enum DB_STATE_BITS {
49	MPT_DB_STATE_RESET	= 0x00000000,
50	MPT_DB_STATE_READY	= 0x10000000,
51	MPT_DB_STATE_RUNNING	= 0x20000000,
52	MPT_DB_STATE_FAULT	= 0x40000000,
53	MPT_DB_STATE_MASK	= 0xf0000000
54};
55
56#define	MPT_STATE(v) ((enum DB_STATE_BITS)((v) & MPT_DB_STATE_MASK))
57
58#define	MPT_DB_LENGTH_SHIFT	(16)
59#define	MPT_DB_DATA_MASK	(0xffff)
60
61#define	MPT_DB_DB_USED		0x08000000
62#define	MPT_DB_IS_IN_USE(v) (((v) & MPT_DB_DB_USED) != 0)
63
64/*
65 * "Whom" initializor values
66 */
67#define	MPT_DB_INIT_NOONE	0x00
68#define	MPT_DB_INIT_BIOS	0x01
69#define	MPT_DB_INIT_ROMBIOS	0x02
70#define	MPT_DB_INIT_PCIPEER	0x03
71#define	MPT_DB_INIT_HOST	0x04
72#define	MPT_DB_INIT_MANUFACTURE	0x05
73
74#define	MPT_WHO(v)	\
75	((v & MPI_DOORBELL_WHO_INIT_MASK) >> MPI_DOORBELL_WHO_INIT_SHIFT)
76
77/* Function Maps for DOORBELL register */
78enum DB_FUNCTION_BITS {
79	MPT_FUNC_IOC_RESET	= 0x40000000,
80	MPT_FUNC_UNIT_RESET	= 0x41000000,
81	MPT_FUNC_HANDSHAKE	= 0x42000000,
82	MPT_FUNC_REPLY_REMOVE	= 0x43000000,
83	MPT_FUNC_MASK		= 0xff000000
84};
85
86/* Function Maps for INTERRUPT request register */
87enum _MPT_INTR_REQ_BITS {
88	MPT_INTR_DB_BUSY	= 0x80000000,
89	MPT_INTR_REPLY_READY	= 0x00000008,
90	MPT_INTR_DB_READY	= 0x00000001
91};
92
93#define	MPT_DB_IS_BUSY(v) (((v) & MPT_INTR_DB_BUSY) != 0)
94#define	MPT_DB_INTR(v)    (((v) & MPT_INTR_DB_READY) != 0)
95#define	MPT_REPLY_INTR(v) (((v) & MPT_INTR_REPLY_READY) != 0)
96
97/* Function Maps for INTERRUPT make register */
98enum _MPT_INTR_MASK_BITS {
99	MPT_INTR_REPLY_MASK	= 0x00000008,
100	MPT_INTR_DB_MASK	= 0x00000001
101};
102
103/* Magic addresses in diagnostic memory space */
104#define	MPT_DIAG_IOP_BASE		(0x00000000)
105#define		MPT_DIAG_IOP_SIZE	(0x00002000)
106#define	MPT_DIAG_GPIO			(0x00030010)
107#define	MPT_DIAG_IOPQ_REG_BASE0		(0x00050004)
108#define	MPT_DIAG_IOPQ_REG_BASE1		(0x00051004)
109#define	MPT_DIAG_CTX0_BASE		(0x000E0000)
110#define		MPT_DIAG_CTX0_SIZE	(0x00002000)
111#define	MPT_DIAG_CTX1_BASE		(0x001E0000)
112#define		MPT_DIAG_CTX1_SIZE	(0x00002000)
113#define	MPT_DIAG_FLASH_BASE		(0x00800000)
114#define	MPT_DIAG_RAM_BASE		(0x01000000)
115#define		MPT_DIAG_RAM_SIZE	(0x00400000)
116#define	MPT_DIAG_MEM_CFG_BASE		(0x3F000000)
117#define		MPT_DIAG_MEM_CFG_BADFL	(0x04000000)
118
119/* GPIO bit assignments */
120#define	MPT_DIAG_GPIO_SCL	(0x00010000)
121#define	MPT_DIAG_GPIO_SDA_OUT	(0x00008000)
122#define	MPT_DIAG_GPIO_SDA_IN	(0x00004000)
123
124#define	MPT_REPLY_EMPTY (0xFFFFFFFF)	/* Reply Queue Empty Symbol */
125#endif /* _MPT_REG_H_ */
126