mpi_ioc.h revision 156000
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_ioc.h 156000 2006-02-25 07:45:54Z mjacob $ */ 2/*- 3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * substantially similar to the "NO WARRANTY" disclaimer below 13 * ("Disclaimer") and any redistribution must be conditioned upon including 14 * a substantially similar Disclaimer requirement for further binary 15 * redistribution. 16 * 3. Neither the name of the LSI Logic Corporation nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT 30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 * 33 * Name: mpi_ioc.h 34 * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages 35 * Creation Date: August 11, 2000 36 * 37 * mpi_ioc.h Version: 01.05.10 38 * 39 * Version History 40 * --------------- 41 * 42 * Date Version Description 43 * -------- -------- ------------------------------------------------------ 44 * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000. 45 * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure. 46 * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY. 47 * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure. 48 * Added _MSG_EVENT_ACK_REPLY structure. 49 * Added _MSG_FW_DOWNLOAD_REPLY structure. 50 * Added _MSG_TOOLBOX_REPLY structure. 51 * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure. 52 * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI, 53 * _LINK_STATUS, _LOOP_STATE and _LOGOUT. 54 * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in 55 * _MSG_EVENT_ACK_REPLY structure to match specification. 56 * 11-02-00 01.01.01 Original release for post 1.0 work. 57 * Added a value for Manufacturer to WhoInit. 58 * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and 59 * removed toolbox message. 60 * 01-09-01 01.01.03 Added event enabled and disabled defines. 61 * Added structures for FwHeader and DataHeader. 62 * Added ImageType to FwUpload reply. 63 * 02-20-01 01.01.04 Started using MPI_POINTER. 64 * 02-27-01 01.01.05 Added event for RAID status change and its event data. 65 * Added IocNumber field to MSG_IOC_FACTS_REPLY. 66 * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER. 67 * Added structure offset comments. 68 * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE. 69 * 08-08-01 01.02.01 Original release for v1.2 work. 70 * New format for FWVersion and ProductId in 71 * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER. 72 * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and 73 * related structure and defines. 74 * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED. 75 * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE. 76 * Replaced a reserved field in MSG_IOC_FACTS_REPLY with 77 * IOCExceptions and changed DataImageSize to reserved. 78 * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and 79 * MPI_FW_UPLOAD_ITYPE_NVDATA. 80 * 09-28-01 01.02.03 Modified Event Data for Integrated RAID. 81 * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field. 82 * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY. 83 * 05-31-02 01.02.06 Added define for 84 * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID. 85 * Added AliasIndex to EVENT_DATA_LOGOUT structure. 86 * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_. 87 * 06-26-03 01.02.08 Added new values to the product family defines. 88 * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and 89 * added related defines. 90 * 05-11-04 01.03.01 Original release for MPI v1.3. 91 * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT. 92 * Added three new fields to MSG_IOC_FACTS_REPLY. 93 * Defined four new bits for the IOCCapabilities field of 94 * the IOCFacts reply. 95 * Added two new PortTypes for the PortFacts reply. 96 * Added six new events along with their EventData 97 * structures. 98 * Added a new MsgFlag to the FwDownload request to 99 * indicate last segment. 100 * Defined a new image type of boot loader. 101 * Added FW family codes for SAS product families. 102 * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to 103 * MSG_IOC_FACTS_REPLY. 104 * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event. 105 * 12-09-04 01.05.04 Added Unsupported device to SAS Device event. 106 * 01-15-05 01.05.05 Added event data for SAS SES Event. 107 * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define. 108 * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts 109 * Reply and IOC Init Request. 110 * 03-11-05 01.05.08 Added family code for 1068E family. 111 * Removed IOCFacts Reply EEDP Capability bit. 112 * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits. 113 * Added Max SATA Targets to SAS Discovery Error event. 114 * 08-30-05 01.05.10 Added 4 new events and their event data structures. 115 * Added new ReasonCode value for SAS Device Status Change 116 * event. 117 * Added new family code for FC949E. 118 * -------------------------------------------------------------------------- 119 */ 120 121#ifndef MPI_IOC_H 122#define MPI_IOC_H 123 124 125/***************************************************************************** 126* 127* I O C M e s s a g e s 128* 129*****************************************************************************/ 130 131/****************************************************************************/ 132/* IOCInit message */ 133/****************************************************************************/ 134 135typedef struct _MSG_IOC_INIT 136{ 137 U8 WhoInit; /* 00h */ 138 U8 Reserved; /* 01h */ 139 U8 ChainOffset; /* 02h */ 140 U8 Function; /* 03h */ 141 U8 Flags; /* 04h */ 142 U8 MaxDevices; /* 05h */ 143 U8 MaxBuses; /* 06h */ 144 U8 MsgFlags; /* 07h */ 145 U32 MsgContext; /* 08h */ 146 U16 ReplyFrameSize; /* 0Ch */ 147 U8 Reserved1[2]; /* 0Eh */ 148 U32 HostMfaHighAddr; /* 10h */ 149 U32 SenseBufferHighAddr; /* 14h */ 150 U32 ReplyFifoHostSignalingAddr; /* 18h */ 151 SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */ 152 U16 MsgVersion; /* 28h */ 153 U16 HeaderVersion; /* 2Ah */ 154} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT, 155 IOCInit_t, MPI_POINTER pIOCInit_t; 156 157/* WhoInit values */ 158#define MPI_WHOINIT_NO_ONE (0x00) 159#define MPI_WHOINIT_SYSTEM_BIOS (0x01) 160#define MPI_WHOINIT_ROM_BIOS (0x02) 161#define MPI_WHOINIT_PCI_PEER (0x03) 162#define MPI_WHOINIT_HOST_DRIVER (0x04) 163#define MPI_WHOINIT_MANUFACTURER (0x05) 164 165/* Flags values */ 166#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 167#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 168#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01) 169 170/* MsgVersion */ 171#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) 172#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) 173#define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) 174#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0) 175 176/* HeaderVersion */ 177#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00) 178#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8) 179#define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF) 180#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0) 181 182 183typedef struct _MSG_IOC_INIT_REPLY 184{ 185 U8 WhoInit; /* 00h */ 186 U8 Reserved; /* 01h */ 187 U8 MsgLength; /* 02h */ 188 U8 Function; /* 03h */ 189 U8 Flags; /* 04h */ 190 U8 MaxDevices; /* 05h */ 191 U8 MaxBuses; /* 06h */ 192 U8 MsgFlags; /* 07h */ 193 U32 MsgContext; /* 08h */ 194 U16 Reserved2; /* 0Ch */ 195 U16 IOCStatus; /* 0Eh */ 196 U32 IOCLogInfo; /* 10h */ 197} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY, 198 IOCInitReply_t, MPI_POINTER pIOCInitReply_t; 199 200 201 202/****************************************************************************/ 203/* IOC Facts message */ 204/****************************************************************************/ 205 206typedef struct _MSG_IOC_FACTS 207{ 208 U8 Reserved[2]; /* 00h */ 209 U8 ChainOffset; /* 01h */ 210 U8 Function; /* 02h */ 211 U8 Reserved1[3]; /* 03h */ 212 U8 MsgFlags; /* 04h */ 213 U32 MsgContext; /* 08h */ 214} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS, 215 IOCFacts_t, MPI_POINTER pIOCFacts_t; 216 217typedef struct _MPI_FW_VERSION_STRUCT 218{ 219 U8 Dev; /* 00h */ 220 U8 Unit; /* 01h */ 221 U8 Minor; /* 02h */ 222 U8 Major; /* 03h */ 223} MPI_FW_VERSION_STRUCT; 224 225typedef union _MPI_FW_VERSION 226{ 227 MPI_FW_VERSION_STRUCT Struct; 228 U32 Word; 229} MPI_FW_VERSION; 230 231/* IOC Facts Reply */ 232typedef struct _MSG_IOC_FACTS_REPLY 233{ 234 U16 MsgVersion; /* 00h */ 235 U8 MsgLength; /* 02h */ 236 U8 Function; /* 03h */ 237 U16 HeaderVersion; /* 04h */ 238 U8 IOCNumber; /* 06h */ 239 U8 MsgFlags; /* 07h */ 240 U32 MsgContext; /* 08h */ 241 U16 IOCExceptions; /* 0Ch */ 242 U16 IOCStatus; /* 0Eh */ 243 U32 IOCLogInfo; /* 10h */ 244 U8 MaxChainDepth; /* 14h */ 245 U8 WhoInit; /* 15h */ 246 U8 BlockSize; /* 16h */ 247 U8 Flags; /* 17h */ 248 U16 ReplyQueueDepth; /* 18h */ 249 U16 RequestFrameSize; /* 1Ah */ 250 U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */ 251 U16 ProductID; /* 1Eh */ 252 U32 CurrentHostMfaHighAddr; /* 20h */ 253 U16 GlobalCredits; /* 24h */ 254 U8 NumberOfPorts; /* 26h */ 255 U8 EventState; /* 27h */ 256 U32 CurrentSenseBufferHighAddr; /* 28h */ 257 U16 CurReplyFrameSize; /* 2Ch */ 258 U8 MaxDevices; /* 2Eh */ 259 U8 MaxBuses; /* 2Fh */ 260 U32 FWImageSize; /* 30h */ 261 U32 IOCCapabilities; /* 34h */ 262 MPI_FW_VERSION FWVersion; /* 38h */ 263 U16 HighPriorityQueueDepth; /* 3Ch */ 264 U16 Reserved2; /* 3Eh */ 265 SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */ 266 U32 ReplyFifoHostSignalingAddr; /* 4Ch */ 267} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY, 268 IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t; 269 270#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) 271#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8) 272#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) 273#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0) 274 275#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00) 276#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8) 277#define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF) 278#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0) 279 280#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) 281#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) 282#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) 283#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008) 284 285#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01) 286#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02) 287#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04) 288 289#define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00) 290#define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01) 291 292#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001) 293#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002) 294#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004) 295#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) 296#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) 297#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020) 298#define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040) 299#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080) 300#define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100) 301#define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200) 302#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400) 303 304 305/***************************************************************************** 306* 307* P o r t M e s s a g e s 308* 309*****************************************************************************/ 310 311/****************************************************************************/ 312/* Port Facts message and Reply */ 313/****************************************************************************/ 314 315typedef struct _MSG_PORT_FACTS 316{ 317 U8 Reserved[2]; /* 00h */ 318 U8 ChainOffset; /* 02h */ 319 U8 Function; /* 03h */ 320 U8 Reserved1[2]; /* 04h */ 321 U8 PortNumber; /* 06h */ 322 U8 MsgFlags; /* 07h */ 323 U32 MsgContext; /* 08h */ 324} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS, 325 PortFacts_t, MPI_POINTER pPortFacts_t; 326 327typedef struct _MSG_PORT_FACTS_REPLY 328{ 329 U16 Reserved; /* 00h */ 330 U8 MsgLength; /* 02h */ 331 U8 Function; /* 03h */ 332 U16 Reserved1; /* 04h */ 333 U8 PortNumber; /* 06h */ 334 U8 MsgFlags; /* 07h */ 335 U32 MsgContext; /* 08h */ 336 U16 Reserved2; /* 0Ch */ 337 U16 IOCStatus; /* 0Eh */ 338 U32 IOCLogInfo; /* 10h */ 339 U8 Reserved3; /* 14h */ 340 U8 PortType; /* 15h */ 341 U16 MaxDevices; /* 16h */ 342 U16 PortSCSIID; /* 18h */ 343 U16 ProtocolFlags; /* 1Ah */ 344 U16 MaxPostedCmdBuffers; /* 1Ch */ 345 U16 MaxPersistentIDs; /* 1Eh */ 346 U16 MaxLanBuckets; /* 20h */ 347 U16 Reserved4; /* 22h */ 348 U32 Reserved5; /* 24h */ 349} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY, 350 PortFactsReply_t, MPI_POINTER pPortFactsReply_t; 351 352 353/* PortTypes values */ 354 355#define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00) 356#define MPI_PORTFACTS_PORTTYPE_SCSI (0x01) 357#define MPI_PORTFACTS_PORTTYPE_FC (0x10) 358#define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20) 359#define MPI_PORTFACTS_PORTTYPE_SAS (0x30) 360 361/* ProtocolFlags values */ 362 363#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01) 364#define MPI_PORTFACTS_PROTOCOL_LAN (0x02) 365#define MPI_PORTFACTS_PROTOCOL_TARGET (0x04) 366#define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08) 367 368 369/****************************************************************************/ 370/* Port Enable Message */ 371/****************************************************************************/ 372 373typedef struct _MSG_PORT_ENABLE 374{ 375 U8 Reserved[2]; /* 00h */ 376 U8 ChainOffset; /* 02h */ 377 U8 Function; /* 03h */ 378 U8 Reserved1[2]; /* 04h */ 379 U8 PortNumber; /* 06h */ 380 U8 MsgFlags; /* 07h */ 381 U32 MsgContext; /* 08h */ 382} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE, 383 PortEnable_t, MPI_POINTER pPortEnable_t; 384 385typedef struct _MSG_PORT_ENABLE_REPLY 386{ 387 U8 Reserved[2]; /* 00h */ 388 U8 MsgLength; /* 02h */ 389 U8 Function; /* 03h */ 390 U8 Reserved1[2]; /* 04h */ 391 U8 PortNumber; /* 05h */ 392 U8 MsgFlags; /* 07h */ 393 U32 MsgContext; /* 08h */ 394 U16 Reserved2; /* 0Ch */ 395 U16 IOCStatus; /* 0Eh */ 396 U32 IOCLogInfo; /* 10h */ 397} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY, 398 PortEnableReply_t, MPI_POINTER pPortEnableReply_t; 399 400 401/***************************************************************************** 402* 403* E v e n t M e s s a g e s 404* 405*****************************************************************************/ 406 407/****************************************************************************/ 408/* Event Notification messages */ 409/****************************************************************************/ 410 411typedef struct _MSG_EVENT_NOTIFY 412{ 413 U8 Switch; /* 00h */ 414 U8 Reserved; /* 01h */ 415 U8 ChainOffset; /* 02h */ 416 U8 Function; /* 03h */ 417 U8 Reserved1[3]; /* 04h */ 418 U8 MsgFlags; /* 07h */ 419 U32 MsgContext; /* 08h */ 420} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY, 421 EventNotification_t, MPI_POINTER pEventNotification_t; 422 423/* Event Notification Reply */ 424 425typedef struct _MSG_EVENT_NOTIFY_REPLY 426{ 427 U16 EventDataLength; /* 00h */ 428 U8 MsgLength; /* 02h */ 429 U8 Function; /* 03h */ 430 U8 Reserved1[2]; /* 04h */ 431 U8 AckRequired; /* 06h */ 432 U8 MsgFlags; /* 07h */ 433 U32 MsgContext; /* 08h */ 434 U8 Reserved2[2]; /* 0Ch */ 435 U16 IOCStatus; /* 0Eh */ 436 U32 IOCLogInfo; /* 10h */ 437 U32 Event; /* 14h */ 438 U32 EventContext; /* 18h */ 439 U32 Data[1]; /* 1Ch */ 440} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY, 441 EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t; 442 443/* Event Acknowledge */ 444 445typedef struct _MSG_EVENT_ACK 446{ 447 U8 Reserved[2]; /* 00h */ 448 U8 ChainOffset; /* 02h */ 449 U8 Function; /* 03h */ 450 U8 Reserved1[3]; /* 04h */ 451 U8 MsgFlags; /* 07h */ 452 U32 MsgContext; /* 08h */ 453 U32 Event; /* 0Ch */ 454 U32 EventContext; /* 10h */ 455} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK, 456 EventAck_t, MPI_POINTER pEventAck_t; 457 458typedef struct _MSG_EVENT_ACK_REPLY 459{ 460 U8 Reserved[2]; /* 00h */ 461 U8 MsgLength; /* 02h */ 462 U8 Function; /* 03h */ 463 U8 Reserved1[3]; /* 04h */ 464 U8 MsgFlags; /* 07h */ 465 U32 MsgContext; /* 08h */ 466 U16 Reserved2; /* 0Ch */ 467 U16 IOCStatus; /* 0Eh */ 468 U32 IOCLogInfo; /* 10h */ 469} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY, 470 EventAckReply_t, MPI_POINTER pEventAckReply_t; 471 472/* Switch */ 473 474#define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00) 475#define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01) 476 477/* Event */ 478 479#define MPI_EVENT_NONE (0x00000000) 480#define MPI_EVENT_LOG_DATA (0x00000001) 481#define MPI_EVENT_STATE_CHANGE (0x00000002) 482#define MPI_EVENT_UNIT_ATTENTION (0x00000003) 483#define MPI_EVENT_IOC_BUS_RESET (0x00000004) 484#define MPI_EVENT_EXT_BUS_RESET (0x00000005) 485#define MPI_EVENT_RESCAN (0x00000006) 486#define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007) 487#define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008) 488#define MPI_EVENT_LOGOUT (0x00000009) 489#define MPI_EVENT_EVENT_CHANGE (0x0000000A) 490#define MPI_EVENT_INTEGRATED_RAID (0x0000000B) 491#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C) 492#define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D) 493#define MPI_EVENT_QUEUE_FULL (0x0000000E) 494#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F) 495#define MPI_EVENT_SAS_SES (0x00000010) 496#define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011) 497#define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012) 498#define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013) 499#define MPI_EVENT_IR_RESYNC_UPDATE (0x00000014) 500#define MPI_EVENT_IR2 (0x00000015) 501#define MPI_EVENT_SAS_DISCOVERY (0x00000016) 502#define MPI_EVENT_LOG_ENTRY_ADDED (0x00000021) 503 504/* AckRequired field values */ 505 506#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) 507#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) 508 509/* EventChange Event data */ 510 511typedef struct _EVENT_DATA_EVENT_CHANGE 512{ 513 U8 EventState; /* 00h */ 514 U8 Reserved; /* 01h */ 515 U16 Reserved1; /* 02h */ 516} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE, 517 EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t; 518 519/* LogEntryAdded Event data */ 520 521/* this structure matches MPI_LOG_0_ENTRY in mpi_cnfg.h */ 522#define MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH (0x1C) 523typedef struct _EVENT_DATA_LOG_ENTRY 524{ 525 U32 TimeStamp; /* 00h */ 526 U32 Reserved1; /* 04h */ 527 U16 LogSequence; /* 08h */ 528 U16 LogEntryQualifier; /* 0Ah */ 529 U8 LogData[MPI_EVENT_DATA_LOG_ENTRY_DATA_LENGTH]; /* 0Ch */ 530} EVENT_DATA_LOG_ENTRY, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY, 531 MpiEventDataLogEntry_t, MPI_POINTER pMpiEventDataLogEntry_t; 532 533typedef struct _EVENT_DATA_LOG_ENTRY_ADDED 534{ 535 U16 LogSequence; /* 00h */ 536 U16 Reserved1; /* 02h */ 537 U32 Reserved2; /* 04h */ 538 EVENT_DATA_LOG_ENTRY LogEntry; /* 08h */ 539} EVENT_DATA_LOG_ENTRY_ADDED, MPI_POINTER PTR_EVENT_DATA_LOG_ENTRY_ADDED, 540 MpiEventDataLogEntryAdded_t, MPI_POINTER pMpiEventDataLogEntryAdded_t; 541 542/* SCSI Event data for Port, Bus and Device forms */ 543 544typedef struct _EVENT_DATA_SCSI 545{ 546 U8 TargetID; /* 00h */ 547 U8 BusPort; /* 01h */ 548 U16 Reserved; /* 02h */ 549} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI, 550 EventDataScsi_t, MPI_POINTER pEventDataScsi_t; 551 552/* SCSI Device Status Change Event data */ 553 554typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE 555{ 556 U8 TargetID; /* 00h */ 557 U8 Bus; /* 01h */ 558 U8 ReasonCode; /* 02h */ 559 U8 LUN; /* 03h */ 560 U8 ASC; /* 04h */ 561 U8 ASCQ; /* 05h */ 562 U16 Reserved; /* 06h */ 563} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 564 MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE, 565 MpiEventDataScsiDeviceStatusChange_t, 566 MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t; 567 568/* MPI SCSI Device Status Change Event data ReasonCode values */ 569#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03) 570#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04) 571#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05) 572 573/* SAS Device Status Change Event data */ 574 575typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE 576{ 577 U8 TargetID; /* 00h */ 578 U8 Bus; /* 01h */ 579 U8 ReasonCode; /* 02h */ 580 U8 Reserved; /* 03h */ 581 U8 ASC; /* 04h */ 582 U8 ASCQ; /* 05h */ 583 U16 DevHandle; /* 06h */ 584 U32 DeviceInfo; /* 08h */ 585 U16 ParentDevHandle; /* 0Ch */ 586 U8 PhyNum; /* 0Eh */ 587 U8 Reserved1; /* 0Fh */ 588 U64 SASAddress; /* 10h */ 589} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 590 MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, 591 MpiEventDataSasDeviceStatusChange_t, 592 MPI_POINTER pMpiEventDataSasDeviceStatusChange_t; 593 594/* MPI SAS Device Status Change Event data ReasonCode values */ 595#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03) 596#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04) 597#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) 598#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06) 599#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07) 600#define MPI_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08) 601 602 603/* SCSI Event data for Queue Full event */ 604 605typedef struct _EVENT_DATA_QUEUE_FULL 606{ 607 U8 TargetID; /* 00h */ 608 U8 Bus; /* 01h */ 609 U16 CurrentDepth; /* 02h */ 610} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL, 611 EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t; 612 613/* MPI Integrated RAID Event data */ 614 615typedef struct _EVENT_DATA_RAID 616{ 617 U8 VolumeID; /* 00h */ 618 U8 VolumeBus; /* 01h */ 619 U8 ReasonCode; /* 02h */ 620 U8 PhysDiskNum; /* 03h */ 621 U8 ASC; /* 04h */ 622 U8 ASCQ; /* 05h */ 623 U16 Reserved; /* 06h */ 624 U32 SettingsStatus; /* 08h */ 625} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID, 626 MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t; 627 628/* MPI Integrated RAID Event data ReasonCode values */ 629#define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00) 630#define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01) 631#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02) 632#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03) 633#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04) 634#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05) 635#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06) 636#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07) 637#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08) 638#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09) 639#define MPI_EVENT_RAID_RC_SMART_DATA (0x0A) 640#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B) 641 642 643/* MPI Integrated RAID Resync Update Event data */ 644 645typedef struct _MPI_EVENT_DATA_IR_RESYNC_UPDATE 646{ 647 U8 VolumeID; /* 00h */ 648 U8 VolumeBus; /* 01h */ 649 U8 ResyncComplete; /* 02h */ 650 U8 Reserved1; /* 03h */ 651 U32 Reserved2; /* 04h */ 652} MPI_EVENT_DATA_IR_RESYNC_UPDATE, 653 MPI_POINTER PTR_MPI_EVENT_DATA_IR_RESYNC_UPDATE, 654 MpiEventDataIrResyncUpdate_t, MPI_POINTER pMpiEventDataIrResyncUpdate_t; 655 656/* MPI IR2 Event data */ 657 658/* MPI_LD_STATE or MPI_PD_STATE */ 659typedef struct _IR2_STATE_CHANGED 660{ 661 U16 PreviousState; /* 00h */ 662 U16 NewState; /* 02h */ 663} IR2_STATE_CHANGED, MPI_POINTER PTR_IR2_STATE_CHANGED; 664 665typedef struct _IR2_PD_INFO 666{ 667 U16 DeviceHandle; /* 00h */ 668 U8 TruncEnclosureHandle; /* 02h */ 669 U8 TruncatedSlot; /* 03h */ 670} IR2_PD_INFO, MPI_POINTER PTR_IR2_PD_INFO; 671 672typedef union _MPI_IR2_RC_EVENT_DATA 673{ 674 IR2_STATE_CHANGED StateChanged; 675 U32 Lba; 676 IR2_PD_INFO PdInfo; 677} MPI_IR2_RC_EVENT_DATA, MPI_POINTER PTR_MPI_IR2_RC_EVENT_DATA; 678 679typedef struct _MPI_EVENT_DATA_IR2 680{ 681 U8 TargetID; /* 00h */ 682 U8 Bus; /* 01h */ 683 U8 ReasonCode; /* 02h */ 684 U8 PhysDiskNum; /* 03h */ 685 MPI_IR2_RC_EVENT_DATA IR2EventData; /* 04h */ 686} MPI_EVENT_DATA_IR2, MPI_POINTER PTR_MPI_EVENT_DATA_IR2, 687 MpiEventDataIR2_t, MPI_POINTER pMpiEventDataIR2_t; 688 689/* MPI IR2 Event data ReasonCode values */ 690#define MPI_EVENT_IR2_RC_LD_STATE_CHANGED (0x01) 691#define MPI_EVENT_IR2_RC_PD_STATE_CHANGED (0x02) 692#define MPI_EVENT_IR2_RC_BAD_BLOCK_TABLE_FULL (0x03) 693#define MPI_EVENT_IR2_RC_PD_INSERTED (0x04) 694#define MPI_EVENT_IR2_RC_PD_REMOVED (0x05) 695#define MPI_EVENT_IR2_RC_FOREIGN_CFG_DETECTED (0x06) 696#define MPI_EVENT_IR2_RC_REBUILD_MEDIUM_ERROR (0x07) 697 698/* defines for logical disk states */ 699#define MPI_LD_STATE_OPTIMAL (0x00) 700#define MPI_LD_STATE_DEGRADED (0x01) 701#define MPI_LD_STATE_FAILED (0x02) 702#define MPI_LD_STATE_MISSING (0x03) 703#define MPI_LD_STATE_OFFLINE (0x04) 704 705/* defines for physical disk states */ 706#define MPI_PD_STATE_ONLINE (0x00) 707#define MPI_PD_STATE_MISSING (0x01) 708#define MPI_PD_STATE_NOT_COMPATIBLE (0x02) 709#define MPI_PD_STATE_FAILED (0x03) 710#define MPI_PD_STATE_INITIALIZING (0x04) 711#define MPI_PD_STATE_OFFLINE_AT_HOST_REQUEST (0x05) 712#define MPI_PD_STATE_FAILED_AT_HOST_REQUEST (0x06) 713#define MPI_PD_STATE_OFFLINE_FOR_ANOTHER_REASON (0xFF) 714 715/* MPI Link Status Change Event data */ 716 717typedef struct _EVENT_DATA_LINK_STATUS 718{ 719 U8 State; /* 00h */ 720 U8 Reserved; /* 01h */ 721 U16 Reserved1; /* 02h */ 722 U8 Reserved2; /* 04h */ 723 U8 Port; /* 05h */ 724 U16 Reserved3; /* 06h */ 725} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS, 726 EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t; 727 728#define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000) 729#define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001) 730 731/* MPI Loop State Change Event data */ 732 733typedef struct _EVENT_DATA_LOOP_STATE 734{ 735 U8 Character4; /* 00h */ 736 U8 Character3; /* 01h */ 737 U8 Type; /* 02h */ 738 U8 Reserved; /* 03h */ 739 U8 Reserved1; /* 04h */ 740 U8 Port; /* 05h */ 741 U16 Reserved2; /* 06h */ 742} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE, 743 EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t; 744 745#define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001) 746#define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002) 747#define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003) 748 749/* MPI LOGOUT Event data */ 750 751typedef struct _EVENT_DATA_LOGOUT 752{ 753 U32 NPortID; /* 00h */ 754 U8 AliasIndex; /* 04h */ 755 U8 Port; /* 05h */ 756 U16 Reserved1; /* 06h */ 757} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT, 758 EventDataLogout_t, MPI_POINTER pEventDataLogout_t; 759 760#define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF) 761 762/* SAS SES Event data */ 763 764typedef struct _EVENT_DATA_SAS_SES 765{ 766 U8 PhyNum; /* 00h */ 767 U8 Port; /* 01h */ 768 U8 PortWidth; /* 02h */ 769 U8 Reserved1; /* 04h */ 770} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES, 771 MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t; 772 773/* SAS Phy Link Status Event data */ 774 775typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS 776{ 777 U8 PhyNum; /* 00h */ 778 U8 LinkRates; /* 01h */ 779 U16 DevHandle; /* 02h */ 780 U64 SASAddress; /* 04h */ 781} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS, 782 MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t; 783 784/* defines for the LinkRates field of the SAS PHY Link Status event */ 785#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0) 786#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4) 787#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F) 788#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0) 789#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00) 790#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01) 791#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02) 792#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03) 793#define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08) 794#define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09) 795 796/* SAS Discovery Event data */ 797 798typedef struct _EVENT_DATA_SAS_DISCOVERY 799{ 800 U32 DiscoveryStatus; /* 00h */ 801 U32 Reserved1; /* 04h */ 802} EVENT_DATA_SAS_DISCOVERY, MPI_POINTER PTR_EVENT_DATA_SAS_DISCOVERY, 803 EventDataSasDiscovery_t, MPI_POINTER pEventDataSasDiscovery_t; 804 805#define MPI_EVENT_SAS_DSCVRY_COMPLETE (0x00000000) 806#define MPI_EVENT_SAS_DSCVRY_IN_PROGRESS (0x00000001) 807#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_MASK (0xFFFF0000) 808#define MPI_EVENT_SAS_DSCVRY_PHY_BITS_SHIFT (16) 809 810/* SAS Discovery Errror Event data */ 811 812typedef struct _EVENT_DATA_DISCOVERY_ERROR 813{ 814 U32 DiscoveryStatus; /* 00h */ 815 U8 Port; /* 04h */ 816 U8 Reserved1; /* 05h */ 817 U16 Reserved2; /* 06h */ 818} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR, 819 EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t; 820 821#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001) 822#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002) 823#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004) 824#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008) 825#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010) 826#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020) 827#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040) 828#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080) 829#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100) 830#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200) 831#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400) 832#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800) 833#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000) 834 835 836/***************************************************************************** 837* 838* F i r m w a r e L o a d M e s s a g e s 839* 840*****************************************************************************/ 841 842/****************************************************************************/ 843/* Firmware Download message and associated structures */ 844/****************************************************************************/ 845 846typedef struct _MSG_FW_DOWNLOAD 847{ 848 U8 ImageType; /* 00h */ 849 U8 Reserved; /* 01h */ 850 U8 ChainOffset; /* 02h */ 851 U8 Function; /* 03h */ 852 U8 Reserved1[3]; /* 04h */ 853 U8 MsgFlags; /* 07h */ 854 U32 MsgContext; /* 08h */ 855 SGE_MPI_UNION SGL; /* 0Ch */ 856} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD, 857 FWDownload_t, MPI_POINTER pFWDownload_t; 858 859#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01) 860 861#define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00) 862#define MPI_FW_DOWNLOAD_ITYPE_FW (0x01) 863#define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02) 864#define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03) 865#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04) 866 867 868typedef struct _FWDownloadTCSGE 869{ 870 U8 Reserved; /* 00h */ 871 U8 ContextSize; /* 01h */ 872 U8 DetailsLength; /* 02h */ 873 U8 Flags; /* 03h */ 874 U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */ 875 U32 ImageOffset; /* 08h */ 876 U32 ImageSize; /* 0Ch */ 877} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE, 878 FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t; 879 880/* Firmware Download reply */ 881typedef struct _MSG_FW_DOWNLOAD_REPLY 882{ 883 U8 ImageType; /* 00h */ 884 U8 Reserved; /* 01h */ 885 U8 MsgLength; /* 02h */ 886 U8 Function; /* 03h */ 887 U8 Reserved1[3]; /* 04h */ 888 U8 MsgFlags; /* 07h */ 889 U32 MsgContext; /* 08h */ 890 U16 Reserved2; /* 0Ch */ 891 U16 IOCStatus; /* 0Eh */ 892 U32 IOCLogInfo; /* 10h */ 893} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY, 894 FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t; 895 896 897/****************************************************************************/ 898/* Firmware Upload message and associated structures */ 899/****************************************************************************/ 900 901typedef struct _MSG_FW_UPLOAD 902{ 903 U8 ImageType; /* 00h */ 904 U8 Reserved; /* 01h */ 905 U8 ChainOffset; /* 02h */ 906 U8 Function; /* 03h */ 907 U8 Reserved1[3]; /* 04h */ 908 U8 MsgFlags; /* 07h */ 909 U32 MsgContext; /* 08h */ 910 SGE_MPI_UNION SGL; /* 0Ch */ 911} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD, 912 FWUpload_t, MPI_POINTER pFWUpload_t; 913 914#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00) 915#define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01) 916#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) 917#define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03) 918#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04) 919#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05) 920 921typedef struct _FWUploadTCSGE 922{ 923 U8 Reserved; /* 00h */ 924 U8 ContextSize; /* 01h */ 925 U8 DetailsLength; /* 02h */ 926 U8 Flags; /* 03h */ 927 U32 Reserved1; /* 04h */ 928 U32 ImageOffset; /* 08h */ 929 U32 ImageSize; /* 0Ch */ 930} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE, 931 FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t; 932 933/* Firmware Upload reply */ 934typedef struct _MSG_FW_UPLOAD_REPLY 935{ 936 U8 ImageType; /* 00h */ 937 U8 Reserved; /* 01h */ 938 U8 MsgLength; /* 02h */ 939 U8 Function; /* 03h */ 940 U8 Reserved1[3]; /* 04h */ 941 U8 MsgFlags; /* 07h */ 942 U32 MsgContext; /* 08h */ 943 U16 Reserved2; /* 0Ch */ 944 U16 IOCStatus; /* 0Eh */ 945 U32 IOCLogInfo; /* 10h */ 946 U32 ActualImageSize; /* 14h */ 947} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY, 948 FWUploadReply_t, MPI_POINTER pFWUploadReply_t; 949 950 951typedef struct _MPI_FW_HEADER 952{ 953 U32 ArmBranchInstruction0; /* 00h */ 954 U32 Signature0; /* 04h */ 955 U32 Signature1; /* 08h */ 956 U32 Signature2; /* 0Ch */ 957 U32 ArmBranchInstruction1; /* 10h */ 958 U32 ArmBranchInstruction2; /* 14h */ 959 U32 Reserved; /* 18h */ 960 U32 Checksum; /* 1Ch */ 961 U16 VendorId; /* 20h */ 962 U16 ProductId; /* 22h */ 963 MPI_FW_VERSION FWVersion; /* 24h */ 964 U32 SeqCodeVersion; /* 28h */ 965 U32 ImageSize; /* 2Ch */ 966 U32 NextImageHeaderOffset; /* 30h */ 967 U32 LoadStartAddress; /* 34h */ 968 U32 IopResetVectorValue; /* 38h */ 969 U32 IopResetRegAddr; /* 3Ch */ 970 U32 VersionNameWhat; /* 40h */ 971 U8 VersionName[32]; /* 44h */ 972 U32 VendorNameWhat; /* 64h */ 973 U8 VendorName[32]; /* 68h */ 974} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER, 975 MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t; 976 977#define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840) 978 979/* defines for using the ProductId field */ 980#define MPI_FW_HEADER_PID_TYPE_MASK (0xF000) 981#define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000) 982#define MPI_FW_HEADER_PID_TYPE_FC (0x1000) 983#define MPI_FW_HEADER_PID_TYPE_SAS (0x2000) 984 985#define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A) 986#define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5) 987#define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA) 988 989#define MPI_FW_HEADER_PID_PROD_MASK (0x0F00) 990#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100) 991#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200) 992#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300) 993#define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400) 994#define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500) 995#define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600) 996#define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700) 997 998#define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF) 999/* SCSI */ 1000#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001) 1001#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002) 1002#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003) 1003#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004) 1004#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005) 1005#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006) 1006#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007) 1007#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008) 1008#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009) 1009#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A) 1010#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B) 1011#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C) 1012/* Fibre Channel */ 1013#define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000) 1014#define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */ 1015#define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */ 1016#define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */ 1017#define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */ 1018#define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005) 1019#define MPI_FW_HEADER_PID_FAMILY_949E_FC (0x0006) 1020/* SAS */ 1021#define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001) 1022#define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002) 1023#define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003) 1024#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */ 1025 1026typedef struct _MPI_EXT_IMAGE_HEADER 1027{ 1028 U8 ImageType; /* 00h */ 1029 U8 Reserved; /* 01h */ 1030 U16 Reserved1; /* 02h */ 1031 U32 Checksum; /* 04h */ 1032 U32 ImageSize; /* 08h */ 1033 U32 NextImageHeaderOffset; /* 0Ch */ 1034 U32 LoadStartAddress; /* 10h */ 1035 U32 Reserved2; /* 14h */ 1036} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER, 1037 MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t; 1038 1039/* defines for the ImageType field */ 1040#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 1041#define MPI_EXT_IMAGE_TYPE_FW (0x01) 1042#define MPI_EXT_IMAGE_TYPE_NVDATA (0x03) 1043#define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04) 1044 1045#endif 1046