mpi_ioc.h revision 154603
1/* $FreeBSD: head/sys/dev/mpt/mpilib/mpi_ioc.h 154603 2006-01-21 00:29:52Z mjacob $ */
2/*-
3 * Copyright (c) 2000-2005, LSI Logic Corporation and its contributors.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 *    substantially similar to the "NO WARRANTY" disclaimer below
13 *    ("Disclaimer") and any redistribution must be conditioned upon including
14 *    a substantially similar Disclaimer requirement for further binary
15 *    redistribution.
16 * 3. Neither the name of the LSI Logic Corporation nor the names of its
17 *    contributors may be used to endorse or promote products derived from
18 *    this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
30 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 *
33 *           Name:  mpi_ioc.h
34 *          Title:  MPI IOC, Port, Event, FW Download, and FW Upload messages
35 *  Creation Date:  August 11, 2000
36 *
37 *    mpi_ioc.h Version:  01.05.09
38 *
39 *  Version History
40 *  ---------------
41 *
42 *  Date      Version   Description
43 *  --------  --------  ------------------------------------------------------
44 *  05-08-00  00.10.01  Original release for 0.10 spec dated 4/26/2000.
45 *  05-24-00  00.10.02  Added _MSG_IOC_INIT_REPLY structure.
46 *  06-06-00  01.00.01  Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
47 *  06-12-00  01.00.02  Added _MSG_PORT_ENABLE_REPLY structure.
48 *                      Added _MSG_EVENT_ACK_REPLY structure.
49 *                      Added _MSG_FW_DOWNLOAD_REPLY structure.
50 *                      Added _MSG_TOOLBOX_REPLY structure.
51 *  06-30-00  01.00.03  Added MaxLanBuckets to _PORT_FACT_REPLY structure.
52 *  07-27-00  01.00.04  Added _EVENT_DATA structure definitions for _SCSI,
53 *                      _LINK_STATUS, _LOOP_STATE and _LOGOUT.
54 *  08-11-00  01.00.05  Switched positions of MsgLength and Function fields in
55 *                      _MSG_EVENT_ACK_REPLY structure to match specification.
56 *  11-02-00  01.01.01  Original release for post 1.0 work.
57 *                      Added a value for Manufacturer to WhoInit.
58 *  12-04-00  01.01.02  Modified IOCFacts reply, added FWUpload messages, and
59 *                      removed toolbox message.
60 *  01-09-01  01.01.03  Added event enabled and disabled defines.
61 *                      Added structures for FwHeader and DataHeader.
62 *                      Added ImageType to FwUpload reply.
63 *  02-20-01  01.01.04  Started using MPI_POINTER.
64 *  02-27-01  01.01.05  Added event for RAID status change and its event data.
65 *                      Added IocNumber field to MSG_IOC_FACTS_REPLY.
66 *  03-27-01  01.01.06  Added defines for ProductId field of MPI_FW_HEADER.
67 *                      Added structure offset comments.
68 *  04-09-01  01.01.07  Added structure EVENT_DATA_EVENT_CHANGE.
69 *  08-08-01  01.02.01  Original release for v1.2 work.
70 *                      New format for FWVersion and ProductId in
71 *                      MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
72 *  08-31-01  01.02.02  Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
73 *                      related structure and defines.
74 *                      Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
75 *                      Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
76 *                      Replaced a reserved field in MSG_IOC_FACTS_REPLY with
77 *                      IOCExceptions and changed DataImageSize to reserved.
78 *                      Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
79 *                      MPI_FW_UPLOAD_ITYPE_NVDATA.
80 *  09-28-01  01.02.03  Modified Event Data for Integrated RAID.
81 *  11-01-01  01.02.04  Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
82 *  03-14-02  01.02.05  Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
83 *  05-31-02  01.02.06  Added define for
84 *                      MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
85 *                      Added AliasIndex to EVENT_DATA_LOGOUT structure.
86 *  04-01-03  01.02.07  Added defines for MPI_FW_HEADER_SIGNATURE_.
87 *  06-26-03  01.02.08  Added new values to the product family defines.
88 *  04-29-04  01.02.09  Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
89 *                      added related defines.
90 *  05-11-04  01.03.01  Original release for MPI v1.3.
91 *  08-19-04  01.05.01  Added four new fields to MSG_IOC_INIT.
92 *                      Added three new fields to MSG_IOC_FACTS_REPLY.
93 *                      Defined four new bits for the IOCCapabilities field of
94 *                      the IOCFacts reply.
95 *                      Added two new PortTypes for the PortFacts reply.
96 *                      Added six new events along with their EventData
97 *                      structures.
98 *                      Added a new MsgFlag to the FwDownload request to
99 *                      indicate last segment.
100 *                      Defined a new image type of boot loader.
101 *                      Added FW family codes for SAS product families.
102 *  10-05-04  01.05.02  Added ReplyFifoHostSignalingAddr field to
103 *                      MSG_IOC_FACTS_REPLY.
104 *  12-07-04  01.05.03  Added more defines for SAS Discovery Error event.
105 *  12-09-04  01.05.04  Added Unsupported device to SAS Device event.
106 *  01-15-05  01.05.05  Added event data for SAS SES Event.
107 *  02-09-05  01.05.06  Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
108 *  02-22-05  01.05.07  Added Host Page Buffer Persistent flag to IOC Facts
109 *                      Reply and IOC Init Request.
110 *  03-11-05  01.05.08  Added family code for 1068E family.
111 *                      Removed IOCFacts Reply EEDP Capability bit.
112 *  06-24-05  01.05.09  Added 5 new IOCFacts Reply IOCCapabilities bits.
113 *                      Added Max SATA Targets to SAS Discovery Error event.
114 *  --------------------------------------------------------------------------
115 */
116
117#ifndef MPI_IOC_H
118#define MPI_IOC_H
119
120
121/*****************************************************************************
122*
123*               I O C    M e s s a g e s
124*
125*****************************************************************************/
126
127/****************************************************************************/
128/*  IOCInit message                                                         */
129/****************************************************************************/
130
131typedef struct _MSG_IOC_INIT
132{
133    U8                      WhoInit;                    /* 00h */
134    U8                      Reserved;                   /* 01h */
135    U8                      ChainOffset;                /* 02h */
136    U8                      Function;                   /* 03h */
137    U8                      Flags;                      /* 04h */
138    U8                      MaxDevices;                 /* 05h */
139    U8                      MaxBuses;                   /* 06h */
140    U8                      MsgFlags;                   /* 07h */
141    U32                     MsgContext;                 /* 08h */
142    U16                     ReplyFrameSize;             /* 0Ch */
143    U8                      Reserved1[2];               /* 0Eh */
144    U32                     HostMfaHighAddr;            /* 10h */
145    U32                     SenseBufferHighAddr;        /* 14h */
146    U32                     ReplyFifoHostSignalingAddr; /* 18h */
147    SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 1Ch */
148    U16                     MsgVersion;                 /* 28h */
149    U16                     HeaderVersion;              /* 2Ah */
150} MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
151  IOCInit_t, MPI_POINTER pIOCInit_t;
152
153/* WhoInit values */
154#define MPI_WHOINIT_NO_ONE                      (0x00)
155#define MPI_WHOINIT_SYSTEM_BIOS                 (0x01)
156#define MPI_WHOINIT_ROM_BIOS                    (0x02)
157#define MPI_WHOINIT_PCI_PEER                    (0x03)
158#define MPI_WHOINIT_HOST_DRIVER                 (0x04)
159#define MPI_WHOINIT_MANUFACTURER                (0x05)
160
161/* Flags values */
162#define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT   (0x04)
163#define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL        (0x02)
164#define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE      (0x01)
165
166/* MsgVersion */
167#define MPI_IOCINIT_MSGVERSION_MAJOR_MASK               (0xFF00)
168#define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT              (8)
169#define MPI_IOCINIT_MSGVERSION_MINOR_MASK               (0x00FF)
170#define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT              (0)
171
172/* HeaderVersion */
173#define MPI_IOCINIT_HEADERVERSION_UNIT_MASK             (0xFF00)
174#define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT            (8)
175#define MPI_IOCINIT_HEADERVERSION_DEV_MASK              (0x00FF)
176#define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT             (0)
177
178
179typedef struct _MSG_IOC_INIT_REPLY
180{
181    U8                      WhoInit;                    /* 00h */
182    U8                      Reserved;                   /* 01h */
183    U8                      MsgLength;                  /* 02h */
184    U8                      Function;                   /* 03h */
185    U8                      Flags;                      /* 04h */
186    U8                      MaxDevices;                 /* 05h */
187    U8                      MaxBuses;                   /* 06h */
188    U8                      MsgFlags;                   /* 07h */
189    U32                     MsgContext;                 /* 08h */
190    U16                     Reserved2;                  /* 0Ch */
191    U16                     IOCStatus;                  /* 0Eh */
192    U32                     IOCLogInfo;                 /* 10h */
193} MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
194  IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
195
196
197
198/****************************************************************************/
199/*  IOC Facts message                                                       */
200/****************************************************************************/
201
202typedef struct _MSG_IOC_FACTS
203{
204    U8                      Reserved[2];                /* 00h */
205    U8                      ChainOffset;                /* 01h */
206    U8                      Function;                   /* 02h */
207    U8                      Reserved1[3];               /* 03h */
208    U8                      MsgFlags;                   /* 04h */
209    U32                     MsgContext;                 /* 08h */
210} MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
211  IOCFacts_t, MPI_POINTER pIOCFacts_t;
212
213typedef struct _MPI_FW_VERSION_STRUCT
214{
215    U8                      Dev;                        /* 00h */
216    U8                      Unit;                       /* 01h */
217    U8                      Minor;                      /* 02h */
218    U8                      Major;                      /* 03h */
219} MPI_FW_VERSION_STRUCT;
220
221typedef union _MPI_FW_VERSION
222{
223    MPI_FW_VERSION_STRUCT   Struct;
224    U32                     Word;
225} MPI_FW_VERSION;
226
227/* IOC Facts Reply */
228typedef struct _MSG_IOC_FACTS_REPLY
229{
230    U16                     MsgVersion;                 /* 00h */
231    U8                      MsgLength;                  /* 02h */
232    U8                      Function;                   /* 03h */
233    U16                     HeaderVersion;              /* 04h */
234    U8                      IOCNumber;                  /* 06h */
235    U8                      MsgFlags;                   /* 07h */
236    U32                     MsgContext;                 /* 08h */
237    U16                     IOCExceptions;              /* 0Ch */
238    U16                     IOCStatus;                  /* 0Eh */
239    U32                     IOCLogInfo;                 /* 10h */
240    U8                      MaxChainDepth;              /* 14h */
241    U8                      WhoInit;                    /* 15h */
242    U8                      BlockSize;                  /* 16h */
243    U8                      Flags;                      /* 17h */
244    U16                     ReplyQueueDepth;            /* 18h */
245    U16                     RequestFrameSize;           /* 1Ah */
246    U16                     Reserved_0101_FWVersion;    /* 1Ch */ /* obsolete 16-bit FWVersion */
247    U16                     ProductID;                  /* 1Eh */
248    U32                     CurrentHostMfaHighAddr;     /* 20h */
249    U16                     GlobalCredits;              /* 24h */
250    U8                      NumberOfPorts;              /* 26h */
251    U8                      EventState;                 /* 27h */
252    U32                     CurrentSenseBufferHighAddr; /* 28h */
253    U16                     CurReplyFrameSize;          /* 2Ch */
254    U8                      MaxDevices;                 /* 2Eh */
255    U8                      MaxBuses;                   /* 2Fh */
256    U32                     FWImageSize;                /* 30h */
257    U32                     IOCCapabilities;            /* 34h */
258    MPI_FW_VERSION          FWVersion;                  /* 38h */
259    U16                     HighPriorityQueueDepth;     /* 3Ch */
260    U16                     Reserved2;                  /* 3Eh */
261    SGE_SIMPLE_UNION        HostPageBufferSGE;          /* 40h */
262    U32                     ReplyFifoHostSignalingAddr; /* 4Ch */
263} MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
264  IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
265
266#define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK          (0xFF00)
267#define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT             (8)
268#define MPI_IOCFACTS_MSGVERSION_MINOR_MASK          (0x00FF)
269#define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT             (0)
270
271#define MPI_IOCFACTS_HDRVERSION_UNIT_MASK               (0xFF00)
272#define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT              (8)
273#define MPI_IOCFACTS_HDRVERSION_DEV_MASK                (0x00FF)
274#define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT               (0)
275
276#define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL    (0x0001)
277#define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID     (0x0002)
278#define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL            (0x0004)
279#define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL       (0x0008)
280
281#define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT         (0x01)
282#define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL       (0x02)
283#define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT  (0x04)
284
285#define MPI_IOCFACTS_EVENTSTATE_DISABLED            (0x00)
286#define MPI_IOCFACTS_EVENTSTATE_ENABLED             (0x01)
287
288#define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q              (0x00000001)
289#define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL       (0x00000002)
290#define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING     (0x00000004)
291#define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER       (0x00000008)
292#define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER         (0x00000010)
293#define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER         (0x00000020)
294#define MPI_IOCFACTS_CAPABILITY_EEDP                    (0x00000040)
295#define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL           (0x00000080)
296#define MPI_IOCFACTS_CAPABILITY_MULTICAST               (0x00000100)
297#define MPI_IOCFACTS_CAPABILITY_SCSIIO32                (0x00000200)
298#define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16             (0x00000400)
299
300
301/*****************************************************************************
302*
303*               P o r t    M e s s a g e s
304*
305*****************************************************************************/
306
307/****************************************************************************/
308/*  Port Facts message and Reply                                            */
309/****************************************************************************/
310
311typedef struct _MSG_PORT_FACTS
312{
313     U8                     Reserved[2];                /* 00h */
314     U8                     ChainOffset;                /* 02h */
315     U8                     Function;                   /* 03h */
316     U8                     Reserved1[2];               /* 04h */
317     U8                     PortNumber;                 /* 06h */
318     U8                     MsgFlags;                   /* 07h */
319     U32                    MsgContext;                 /* 08h */
320} MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
321  PortFacts_t, MPI_POINTER pPortFacts_t;
322
323typedef struct _MSG_PORT_FACTS_REPLY
324{
325     U16                    Reserved;                   /* 00h */
326     U8                     MsgLength;                  /* 02h */
327     U8                     Function;                   /* 03h */
328     U16                    Reserved1;                  /* 04h */
329     U8                     PortNumber;                 /* 06h */
330     U8                     MsgFlags;                   /* 07h */
331     U32                    MsgContext;                 /* 08h */
332     U16                    Reserved2;                  /* 0Ch */
333     U16                    IOCStatus;                  /* 0Eh */
334     U32                    IOCLogInfo;                 /* 10h */
335     U8                     Reserved3;                  /* 14h */
336     U8                     PortType;                   /* 15h */
337     U16                    MaxDevices;                 /* 16h */
338     U16                    PortSCSIID;                 /* 18h */
339     U16                    ProtocolFlags;              /* 1Ah */
340     U16                    MaxPostedCmdBuffers;        /* 1Ch */
341     U16                    MaxPersistentIDs;           /* 1Eh */
342     U16                    MaxLanBuckets;              /* 20h */
343     U16                    Reserved4;                  /* 22h */
344     U32                    Reserved5;                  /* 24h */
345} MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
346  PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
347
348
349/* PortTypes values */
350
351#define MPI_PORTFACTS_PORTTYPE_INACTIVE         (0x00)
352#define MPI_PORTFACTS_PORTTYPE_SCSI             (0x01)
353#define MPI_PORTFACTS_PORTTYPE_FC               (0x10)
354#define MPI_PORTFACTS_PORTTYPE_ISCSI            (0x20)
355#define MPI_PORTFACTS_PORTTYPE_SAS              (0x30)
356
357/* ProtocolFlags values */
358
359#define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR       (0x01)
360#define MPI_PORTFACTS_PROTOCOL_LAN              (0x02)
361#define MPI_PORTFACTS_PROTOCOL_TARGET           (0x04)
362#define MPI_PORTFACTS_PROTOCOL_INITIATOR        (0x08)
363
364
365/****************************************************************************/
366/*  Port Enable Message                                                     */
367/****************************************************************************/
368
369typedef struct _MSG_PORT_ENABLE
370{
371    U8                      Reserved[2];                /* 00h */
372    U8                      ChainOffset;                /* 02h */
373    U8                      Function;                   /* 03h */
374    U8                      Reserved1[2];               /* 04h */
375    U8                      PortNumber;                 /* 06h */
376    U8                      MsgFlags;                   /* 07h */
377    U32                     MsgContext;                 /* 08h */
378} MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
379  PortEnable_t, MPI_POINTER pPortEnable_t;
380
381typedef struct _MSG_PORT_ENABLE_REPLY
382{
383    U8                      Reserved[2];                /* 00h */
384    U8                      MsgLength;                  /* 02h */
385    U8                      Function;                   /* 03h */
386    U8                      Reserved1[2];               /* 04h */
387    U8                      PortNumber;                 /* 05h */
388    U8                      MsgFlags;                   /* 07h */
389    U32                     MsgContext;                 /* 08h */
390    U16                     Reserved2;                  /* 0Ch */
391    U16                     IOCStatus;                  /* 0Eh */
392    U32                     IOCLogInfo;                 /* 10h */
393} MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
394  PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
395
396
397/*****************************************************************************
398*
399*               E v e n t    M e s s a g e s
400*
401*****************************************************************************/
402
403/****************************************************************************/
404/*  Event Notification messages                                             */
405/****************************************************************************/
406
407typedef struct _MSG_EVENT_NOTIFY
408{
409    U8                      Switch;                     /* 00h */
410    U8                      Reserved;                   /* 01h */
411    U8                      ChainOffset;                /* 02h */
412    U8                      Function;                   /* 03h */
413    U8                      Reserved1[3];               /* 04h */
414    U8                      MsgFlags;                   /* 07h */
415    U32                     MsgContext;                 /* 08h */
416} MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
417  EventNotification_t, MPI_POINTER pEventNotification_t;
418
419/* Event Notification Reply */
420
421typedef struct _MSG_EVENT_NOTIFY_REPLY
422{
423     U16                    EventDataLength;            /* 00h */
424     U8                     MsgLength;                  /* 02h */
425     U8                     Function;                   /* 03h */
426     U8                     Reserved1[2];               /* 04h */
427     U8                     AckRequired;                /* 06h */
428     U8                     MsgFlags;                   /* 07h */
429     U32                    MsgContext;                 /* 08h */
430     U8                     Reserved2[2];               /* 0Ch */
431     U16                    IOCStatus;                  /* 0Eh */
432     U32                    IOCLogInfo;                 /* 10h */
433     U32                    Event;                      /* 14h */
434     U32                    EventContext;               /* 18h */
435     U32                    Data[1];                    /* 1Ch */
436} MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
437  EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
438
439/* Event Acknowledge */
440
441typedef struct _MSG_EVENT_ACK
442{
443    U8                      Reserved[2];                /* 00h */
444    U8                      ChainOffset;                /* 02h */
445    U8                      Function;                   /* 03h */
446    U8                      Reserved1[3];               /* 04h */
447    U8                      MsgFlags;                   /* 07h */
448    U32                     MsgContext;                 /* 08h */
449    U32                     Event;                      /* 0Ch */
450    U32                     EventContext;               /* 10h */
451} MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
452  EventAck_t, MPI_POINTER pEventAck_t;
453
454typedef struct _MSG_EVENT_ACK_REPLY
455{
456    U8                      Reserved[2];                /* 00h */
457    U8                      MsgLength;                  /* 02h */
458    U8                      Function;                   /* 03h */
459    U8                      Reserved1[3];               /* 04h */
460    U8                      MsgFlags;                   /* 07h */
461    U32                     MsgContext;                 /* 08h */
462    U16                     Reserved2;                  /* 0Ch */
463    U16                     IOCStatus;                  /* 0Eh */
464    U32                     IOCLogInfo;                 /* 10h */
465} MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
466  EventAckReply_t, MPI_POINTER pEventAckReply_t;
467
468/* Switch */
469
470#define MPI_EVENT_NOTIFICATION_SWITCH_OFF   (0x00)
471#define MPI_EVENT_NOTIFICATION_SWITCH_ON    (0x01)
472
473/* Event */
474
475#define MPI_EVENT_NONE                      (0x00000000)
476#define MPI_EVENT_LOG_DATA                  (0x00000001)
477#define MPI_EVENT_STATE_CHANGE              (0x00000002)
478#define MPI_EVENT_UNIT_ATTENTION            (0x00000003)
479#define MPI_EVENT_IOC_BUS_RESET             (0x00000004)
480#define MPI_EVENT_EXT_BUS_RESET             (0x00000005)
481#define MPI_EVENT_RESCAN                    (0x00000006)
482#define MPI_EVENT_LINK_STATUS_CHANGE        (0x00000007)
483#define MPI_EVENT_LOOP_STATE_CHANGE         (0x00000008)
484#define MPI_EVENT_LOGOUT                    (0x00000009)
485#define MPI_EVENT_EVENT_CHANGE              (0x0000000A)
486#define MPI_EVENT_INTEGRATED_RAID           (0x0000000B)
487#define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
488#define MPI_EVENT_ON_BUS_TIMER_EXPIRED      (0x0000000D)
489#define MPI_EVENT_QUEUE_FULL                (0x0000000E)
490#define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE  (0x0000000F)
491#define MPI_EVENT_SAS_SES                   (0x00000010)
492#define MPI_EVENT_PERSISTENT_TABLE_FULL     (0x00000011)
493#define MPI_EVENT_SAS_PHY_LINK_STATUS       (0x00000012)
494#define MPI_EVENT_SAS_DISCOVERY_ERROR       (0x00000013)
495
496/* AckRequired field values */
497
498#define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
499#define MPI_EVENT_NOTIFICATION_ACK_REQUIRED     (0x01)
500
501/* EventChange Event data */
502
503typedef struct _EVENT_DATA_EVENT_CHANGE
504{
505    U8                      EventState;                 /* 00h */
506    U8                      Reserved;                   /* 01h */
507    U16                     Reserved1;                  /* 02h */
508} EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
509  EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
510
511/* SCSI Event data for Port, Bus and Device forms */
512
513typedef struct _EVENT_DATA_SCSI
514{
515    U8                      TargetID;                   /* 00h */
516    U8                      BusPort;                    /* 01h */
517    U16                     Reserved;                   /* 02h */
518} EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
519  EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
520
521/* SCSI Device Status Change Event data */
522
523typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
524{
525    U8                      TargetID;                   /* 00h */
526    U8                      Bus;                        /* 01h */
527    U8                      ReasonCode;                 /* 02h */
528    U8                      LUN;                        /* 03h */
529    U8                      ASC;                        /* 04h */
530    U8                      ASCQ;                       /* 05h */
531    U16                     Reserved;                   /* 06h */
532} EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
533  MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
534  MpiEventDataScsiDeviceStatusChange_t,
535  MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
536
537/* MPI SCSI Device Status Change Event data ReasonCode values */
538#define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED                (0x03)
539#define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING       (0x04)
540#define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA           (0x05)
541
542/* SAS Device Status Change Event data */
543
544typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
545{
546    U8                      TargetID;                   /* 00h */
547    U8                      Bus;                        /* 01h */
548    U8                      ReasonCode;                 /* 02h */
549    U8                      Reserved;                   /* 03h */
550    U8                      ASC;                        /* 04h */
551    U8                      ASCQ;                       /* 05h */
552    U16                     DevHandle;                  /* 06h */
553    U32                     DeviceInfo;                 /* 08h */
554    U16                     ParentDevHandle;            /* 0Ch */
555    U8                      PhyNum;                     /* 0Eh */
556    U8                      Reserved1;                  /* 0Fh */
557    U64                     SASAddress;                 /* 10h */
558} EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
559  MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
560  MpiEventDataSasDeviceStatusChange_t,
561  MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
562
563/* MPI SAS Device Status Change Event data ReasonCode values */
564#define MPI_EVENT_SAS_DEV_STAT_RC_ADDED                 (0x03)
565#define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING        (0x04)
566#define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA            (0x05)
567#define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED      (0x06)
568#define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED           (0x07)
569
570
571/* SCSI Event data for Queue Full event */
572
573typedef struct _EVENT_DATA_QUEUE_FULL
574{
575    U8                      TargetID;                   /* 00h */
576    U8                      Bus;                        /* 01h */
577    U16                     CurrentDepth;               /* 02h */
578} EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
579  EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
580
581/* MPI Integrated RAID Event data */
582
583typedef struct _EVENT_DATA_RAID
584{
585    U8                      VolumeID;                   /* 00h */
586    U8                      VolumeBus;                  /* 01h */
587    U8                      ReasonCode;                 /* 02h */
588    U8                      PhysDiskNum;                /* 03h */
589    U8                      ASC;                        /* 04h */
590    U8                      ASCQ;                       /* 05h */
591    U16                     Reserved;                   /* 06h */
592    U32                     SettingsStatus;             /* 08h */
593} EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
594  MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
595
596/* MPI Integrated RAID Event data ReasonCode values */
597#define MPI_EVENT_RAID_RC_VOLUME_CREATED                (0x00)
598#define MPI_EVENT_RAID_RC_VOLUME_DELETED                (0x01)
599#define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED       (0x02)
600#define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED         (0x03)
601#define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED       (0x04)
602#define MPI_EVENT_RAID_RC_PHYSDISK_CREATED              (0x05)
603#define MPI_EVENT_RAID_RC_PHYSDISK_DELETED              (0x06)
604#define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED     (0x07)
605#define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED       (0x08)
606#define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED             (0x09)
607#define MPI_EVENT_RAID_RC_SMART_DATA                    (0x0A)
608#define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED        (0x0B)
609
610/* MPI Link Status Change Event data */
611
612typedef struct _EVENT_DATA_LINK_STATUS
613{
614    U8                      State;                      /* 00h */
615    U8                      Reserved;                   /* 01h */
616    U16                     Reserved1;                  /* 02h */
617    U8                      Reserved2;                  /* 04h */
618    U8                      Port;                       /* 05h */
619    U16                     Reserved3;                  /* 06h */
620} EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
621  EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
622
623#define MPI_EVENT_LINK_STATUS_FAILURE       (0x00000000)
624#define MPI_EVENT_LINK_STATUS_ACTIVE        (0x00000001)
625
626/* MPI Loop State Change Event data */
627
628typedef struct _EVENT_DATA_LOOP_STATE
629{
630    U8                      Character4;                 /* 00h */
631    U8                      Character3;                 /* 01h */
632    U8                      Type;                       /* 02h */
633    U8                      Reserved;                   /* 03h */
634    U8                      Reserved1;                  /* 04h */
635    U8                      Port;                       /* 05h */
636    U16                     Reserved2;                  /* 06h */
637} EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
638  EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
639
640#define MPI_EVENT_LOOP_STATE_CHANGE_LIP     (0x0001)
641#define MPI_EVENT_LOOP_STATE_CHANGE_LPE     (0x0002)
642#define MPI_EVENT_LOOP_STATE_CHANGE_LPB     (0x0003)
643
644/* MPI LOGOUT Event data */
645
646typedef struct _EVENT_DATA_LOGOUT
647{
648    U32                     NPortID;                    /* 00h */
649    U8                      AliasIndex;                 /* 04h */
650    U8                      Port;                       /* 05h */
651    U16                     Reserved1;                  /* 06h */
652} EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
653  EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
654
655#define MPI_EVENT_LOGOUT_ALL_ALIASES        (0xFF)
656
657/* SAS SES Event data */
658
659typedef struct _EVENT_DATA_SAS_SES
660{
661    U8                      PhyNum;                     /* 00h */
662    U8                      Port;                       /* 01h */
663    U8                      PortWidth;                  /* 02h */
664    U8                      Reserved1;                  /* 04h */
665} EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
666  MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
667
668/* SAS Phy Link Status Event data */
669
670typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
671{
672    U8                      PhyNum;                     /* 00h */
673    U8                      LinkRates;                  /* 01h */
674    U16                     DevHandle;                  /* 02h */
675    U64                     SASAddress;                 /* 04h */
676} EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
677  MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
678
679/* defines for the LinkRates field of the SAS PHY Link Status event */
680#define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK                   (0xF0)
681#define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT                  (4)
682#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK                  (0x0F)
683#define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT                 (0)
684#define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN                   (0x00)
685#define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED              (0x01)
686#define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION  (0x02)
687#define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE         (0x03)
688#define MPI_EVENT_SAS_PLS_LR_RATE_1_5                       (0x08)
689#define MPI_EVENT_SAS_PLS_LR_RATE_3_0                       (0x09)
690
691/* SAS Discovery Errror Event data */
692
693typedef struct _EVENT_DATA_DISCOVERY_ERROR
694{
695    U32                     DiscoveryStatus;            /* 00h */
696    U8                      Port;                       /* 04h */
697    U8                      Reserved1;                  /* 05h */
698    U16                     Reserved2;                  /* 06h */
699} EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
700  EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
701
702#define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED               (0x00000001)
703#define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE        (0x00000002)
704#define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS              (0x00000004)
705#define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR                (0x00000008)
706#define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT                 (0x00000010)
707#define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES           (0x00000020)
708#define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST             (0x00000040)
709#define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED         (0x00000080)
710#define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR               (0x00000100)
711#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE          (0x00000200)
712#define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE              (0x00000400)
713#define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS                (0x00000800)
714#define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS            (0x00001000)
715
716
717/*****************************************************************************
718*
719*               F i r m w a r e    L o a d    M e s s a g e s
720*
721*****************************************************************************/
722
723/****************************************************************************/
724/*  Firmware Download message and associated structures                     */
725/****************************************************************************/
726
727typedef struct _MSG_FW_DOWNLOAD
728{
729    U8                      ImageType;                  /* 00h */
730    U8                      Reserved;                   /* 01h */
731    U8                      ChainOffset;                /* 02h */
732    U8                      Function;                   /* 03h */
733    U8                      Reserved1[3];               /* 04h */
734    U8                      MsgFlags;                   /* 07h */
735    U32                     MsgContext;                 /* 08h */
736    SGE_MPI_UNION           SGL;                        /* 0Ch */
737} MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
738  FWDownload_t, MPI_POINTER pFWDownload_t;
739
740#define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT    (0x01)
741
742#define MPI_FW_DOWNLOAD_ITYPE_RESERVED      (0x00)
743#define MPI_FW_DOWNLOAD_ITYPE_FW            (0x01)
744#define MPI_FW_DOWNLOAD_ITYPE_BIOS          (0x02)
745#define MPI_FW_DOWNLOAD_ITYPE_NVDATA        (0x03)
746#define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER        (0x04)
747
748
749typedef struct _FWDownloadTCSGE
750{
751    U8                      Reserved;                   /* 00h */
752    U8                      ContextSize;                /* 01h */
753    U8                      DetailsLength;              /* 02h */
754    U8                      Flags;                      /* 03h */
755    U32                     Reserved_0100_Checksum;     /* 04h */ /* obsolete Checksum */
756    U32                     ImageOffset;                /* 08h */
757    U32                     ImageSize;                  /* 0Ch */
758} FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
759  FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
760
761/* Firmware Download reply */
762typedef struct _MSG_FW_DOWNLOAD_REPLY
763{
764    U8                      ImageType;                  /* 00h */
765    U8                      Reserved;                   /* 01h */
766    U8                      MsgLength;                  /* 02h */
767    U8                      Function;                   /* 03h */
768    U8                      Reserved1[3];               /* 04h */
769    U8                      MsgFlags;                   /* 07h */
770    U32                     MsgContext;                 /* 08h */
771    U16                     Reserved2;                  /* 0Ch */
772    U16                     IOCStatus;                  /* 0Eh */
773    U32                     IOCLogInfo;                 /* 10h */
774} MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
775  FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
776
777
778/****************************************************************************/
779/*  Firmware Upload message and associated structures                       */
780/****************************************************************************/
781
782typedef struct _MSG_FW_UPLOAD
783{
784    U8                      ImageType;                  /* 00h */
785    U8                      Reserved;                   /* 01h */
786    U8                      ChainOffset;                /* 02h */
787    U8                      Function;                   /* 03h */
788    U8                      Reserved1[3];               /* 04h */
789    U8                      MsgFlags;                   /* 07h */
790    U32                     MsgContext;                 /* 08h */
791    SGE_MPI_UNION           SGL;                        /* 0Ch */
792} MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
793  FWUpload_t, MPI_POINTER pFWUpload_t;
794
795#define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM      (0x00)
796#define MPI_FW_UPLOAD_ITYPE_FW_FLASH        (0x01)
797#define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH      (0x02)
798#define MPI_FW_UPLOAD_ITYPE_NVDATA          (0x03)
799#define MPI_FW_UPLOAD_ITYPE_BOOTLOADER      (0x04)
800#define MPI_FW_UPLOAD_ITYPE_FW_BACKUP       (0x05)
801
802typedef struct _FWUploadTCSGE
803{
804    U8                      Reserved;                   /* 00h */
805    U8                      ContextSize;                /* 01h */
806    U8                      DetailsLength;              /* 02h */
807    U8                      Flags;                      /* 03h */
808    U32                     Reserved1;                  /* 04h */
809    U32                     ImageOffset;                /* 08h */
810    U32                     ImageSize;                  /* 0Ch */
811} FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
812  FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
813
814/* Firmware Upload reply */
815typedef struct _MSG_FW_UPLOAD_REPLY
816{
817    U8                      ImageType;                  /* 00h */
818    U8                      Reserved;                   /* 01h */
819    U8                      MsgLength;                  /* 02h */
820    U8                      Function;                   /* 03h */
821    U8                      Reserved1[3];               /* 04h */
822    U8                      MsgFlags;                   /* 07h */
823    U32                     MsgContext;                 /* 08h */
824    U16                     Reserved2;                  /* 0Ch */
825    U16                     IOCStatus;                  /* 0Eh */
826    U32                     IOCLogInfo;                 /* 10h */
827    U32                     ActualImageSize;            /* 14h */
828} MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
829  FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
830
831
832typedef struct _MPI_FW_HEADER
833{
834    U32                     ArmBranchInstruction0;      /* 00h */
835    U32                     Signature0;                 /* 04h */
836    U32                     Signature1;                 /* 08h */
837    U32                     Signature2;                 /* 0Ch */
838    U32                     ArmBranchInstruction1;      /* 10h */
839    U32                     ArmBranchInstruction2;      /* 14h */
840    U32                     Reserved;                   /* 18h */
841    U32                     Checksum;                   /* 1Ch */
842    U16                     VendorId;                   /* 20h */
843    U16                     ProductId;                  /* 22h */
844    MPI_FW_VERSION          FWVersion;                  /* 24h */
845    U32                     SeqCodeVersion;             /* 28h */
846    U32                     ImageSize;                  /* 2Ch */
847    U32                     NextImageHeaderOffset;      /* 30h */
848    U32                     LoadStartAddress;           /* 34h */
849    U32                     IopResetVectorValue;        /* 38h */
850    U32                     IopResetRegAddr;            /* 3Ch */
851    U32                     VersionNameWhat;            /* 40h */
852    U8                      VersionName[32];            /* 44h */
853    U32                     VendorNameWhat;             /* 64h */
854    U8                      VendorName[32];             /* 68h */
855} MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
856  MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
857
858#define MPI_FW_HEADER_WHAT_SIGNATURE        (0x29232840)
859
860/* defines for using the ProductId field */
861#define MPI_FW_HEADER_PID_TYPE_MASK             (0xF000)
862#define MPI_FW_HEADER_PID_TYPE_SCSI             (0x0000)
863#define MPI_FW_HEADER_PID_TYPE_FC               (0x1000)
864#define MPI_FW_HEADER_PID_TYPE_SAS              (0x2000)
865
866#define MPI_FW_HEADER_SIGNATURE_0               (0x5AEAA55A)
867#define MPI_FW_HEADER_SIGNATURE_1               (0xA55AEAA5)
868#define MPI_FW_HEADER_SIGNATURE_2               (0x5AA55AEA)
869
870#define MPI_FW_HEADER_PID_PROD_MASK                     (0x0F00)
871#define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI           (0x0100)
872#define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI    (0x0200)
873#define MPI_FW_HEADER_PID_PROD_TARGET_SCSI              (0x0300)
874#define MPI_FW_HEADER_PID_PROD_IM_SCSI                  (0x0400)
875#define MPI_FW_HEADER_PID_PROD_IS_SCSI                  (0x0500)
876#define MPI_FW_HEADER_PID_PROD_CTX_SCSI                 (0x0600)
877#define MPI_FW_HEADER_PID_PROD_IR_SCSI                  (0x0700)
878
879#define MPI_FW_HEADER_PID_FAMILY_MASK           (0x00FF)
880/* SCSI */
881#define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI    (0x0001)
882#define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI    (0x0002)
883#define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI    (0x0003)
884#define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI    (0x0004)
885#define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI    (0x0005)
886#define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI    (0x0006)
887#define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI    (0x0007)
888#define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI    (0x0008)
889#define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI    (0x0009)
890#define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI    (0x000A)
891#define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI   (0x000B)
892#define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI   (0x000C)
893/* Fibre Channel */
894#define MPI_FW_HEADER_PID_FAMILY_909_FC         (0x0000)
895#define MPI_FW_HEADER_PID_FAMILY_919_FC         (0x0001) /* 919 and 929     */
896#define MPI_FW_HEADER_PID_FAMILY_919X_FC        (0x0002) /* 919X and 929X   */
897#define MPI_FW_HEADER_PID_FAMILY_919XL_FC       (0x0003) /* 919XL and 929XL */
898#define MPI_FW_HEADER_PID_FAMILY_939X_FC        (0x0004) /* 939X and 949X   */
899#define MPI_FW_HEADER_PID_FAMILY_959_FC         (0x0005)
900/* SAS */
901#define MPI_FW_HEADER_PID_FAMILY_1064_SAS       (0x0001)
902#define MPI_FW_HEADER_PID_FAMILY_1068_SAS       (0x0002)
903#define MPI_FW_HEADER_PID_FAMILY_1078_SAS       (0x0003)
904#define MPI_FW_HEADER_PID_FAMILY_106xE_SAS      (0x0004) /* 1068E, 1066E, and 1064E */
905
906typedef struct _MPI_EXT_IMAGE_HEADER
907{
908    U8                      ImageType;                  /* 00h */
909    U8                      Reserved;                   /* 01h */
910    U16                     Reserved1;                  /* 02h */
911    U32                     Checksum;                   /* 04h */
912    U32                     ImageSize;                  /* 08h */
913    U32                     NextImageHeaderOffset;      /* 0Ch */
914    U32                     LoadStartAddress;           /* 10h */
915    U32                     Reserved2;                  /* 14h */
916} MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
917  MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
918
919/* defines for the ImageType field */
920#define MPI_EXT_IMAGE_TYPE_UNSPECIFIED          (0x00)
921#define MPI_EXT_IMAGE_TYPE_FW                   (0x01)
922#define MPI_EXT_IMAGE_TYPE_NVDATA               (0x03)
923#define MPI_EXT_IMAGE_TYPE_BOOTLOADER           (0x04)
924
925#endif
926