mpi2.h revision 265236
1/*- 2 * Copyright (c) 2013 LSI Corp. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. Neither the name of the author nor the names of any co-contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * LSI MPT-Fusion Host Adapter FreeBSD 30 * 31 * $FreeBSD: head/sys/dev/mpr/mpi/mpi2.h 265236 2014-05-02 20:25:09Z ken $ 32 */ 33 34/* 35 * Copyright (c) 2000-2013 LSI Corporation. 36 * 37 * 38 * Name: mpi2.h 39 * Title: MPI Message independent structures and definitions 40 * including System Interface Register Set and 41 * scatter/gather formats. 42 * Creation Date: June 21, 2006 43 * 44 * mpi2.h Version: 02.00.33 45 * 46 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 47 * prefix are for use only on MPI v2.5 products, and must not be used 48 * with MPI v2.0 products. Unless otherwise noted, names beginning with 49 * MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products. 50 * 51 * Version History 52 * --------------- 53 * 54 * Date Version Description 55 * -------- -------- ------------------------------------------------------ 56 * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. 57 * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT. 58 * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT. 59 * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT. 60 * Moved ReplyPostHostIndex register to offset 0x6C of the 61 * MPI2_SYSTEM_INTERFACE_REGS and modified the define for 62 * MPI2_REPLY_POST_HOST_INDEX_OFFSET. 63 * Added union of request descriptors. 64 * Added union of reply descriptors. 65 * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT. 66 * Added define for MPI2_VERSION_02_00. 67 * Fixed the size of the FunctionDependent5 field in the 68 * MPI2_DEFAULT_REPLY structure. 69 * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT. 70 * Removed the MPI-defined Fault Codes and extended the 71 * product specific codes up to 0xEFFF. 72 * Added a sixth key value for the WriteSequence register 73 * and changed the flush value to 0x0. 74 * Added message function codes for Diagnostic Buffer Post 75 * and Diagnsotic Release. 76 * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED 77 * Moved MPI2_VERSION_UNION from mpi2_ioc.h. 78 * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT. 79 * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT. 80 * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT. 81 * Added #defines for marking a reply descriptor as unused. 82 * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT. 83 * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT. 84 * Moved LUN field defines from mpi2_init.h. 85 * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT. 86 * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT. 87 * In all request and reply descriptors, replaced VF_ID 88 * field with MSIxIndex field. 89 * Removed DevHandle field from 90 * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those 91 * bytes reserved. 92 * Added RAID Accelerator functionality. 93 * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT. 94 * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT. 95 * Added MSI-x index mask and shift for Reply Post Host 96 * Index register. 97 * Added function code for Host Based Discovery Action. 98 * 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT. 99 * Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL. 100 * Added defines for product-specific range of message 101 * function codes, 0xF0 to 0xFF. 102 * 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT. 103 * Added alternative defines for the SGE Direction bit. 104 * 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT. 105 * 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT. 106 * Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define. 107 * 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT. 108 * Added MPI2_FUNCTION_SEND_HOST_MESSAGE. 109 * 03-09-11 02.00.20 Bumped MPI2_HEADER_VERSION_UNIT. 110 * 05-25-11 02.00.21 Bumped MPI2_HEADER_VERSION_UNIT. 111 * 08-24-11 02.00.22 Bumped MPI2_HEADER_VERSION_UNIT. 112 * 11-18-11 02.00.23 Bumped MPI2_HEADER_VERSION_UNIT. 113 * Incorporating additions for MPI v2.5. 114 * 02-06-12 02.00.24 Bumped MPI2_HEADER_VERSION_UNIT. 115 * 03-29-12 02.00.25 Bumped MPI2_HEADER_VERSION_UNIT. 116 * Added Hard Reset delay timings. 117 * 07-10-12 02.00.26 Bumped MPI2_HEADER_VERSION_UNIT. 118 * 07-26-12 02.00.27 Bumped MPI2_HEADER_VERSION_UNIT. 119 * 11-27-12 02.00.28 Bumped MPI2_HEADER_VERSION_UNIT. 120 * 12-20-12 02.00.29 Bumped MPI2_HEADER_VERSION_UNIT. 121 * Added MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET. 122 * 04-09-13 02.00.30 Bumped MPI2_HEADER_VERSION_UNIT. 123 * 04-17-13 02.00.31 Bumped MPI2_HEADER_VERSION_UNIT. 124 * 08-19-13 02.00.32 Bumped MPI2_HEADER_VERSION_UNIT. 125 * 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT. 126 * -------------------------------------------------------------------------- 127 */ 128 129#ifndef MPI2_H 130#define MPI2_H 131 132 133/***************************************************************************** 134* 135* MPI Version Definitions 136* 137*****************************************************************************/ 138 139#define MPI2_VERSION_MAJOR_MASK (0xFF00) 140#define MPI2_VERSION_MAJOR_SHIFT (8) 141#define MPI2_VERSION_MINOR_MASK (0x00FF) 142#define MPI2_VERSION_MINOR_SHIFT (0) 143 144/* major version for all MPI v2.x */ 145#define MPI2_VERSION_MAJOR (0x02) 146 147/* minor version for MPI v2.0 compatible products */ 148#define MPI2_VERSION_MINOR (0x00) 149#define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ 150 MPI2_VERSION_MINOR) 151#define MPI2_VERSION_02_00 (0x0200) 152 153 154/* minor version for MPI v2.5 compatible products */ 155#define MPI25_VERSION_MINOR (0x05) 156#define MPI25_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ 157 MPI25_VERSION_MINOR) 158#define MPI2_VERSION_02_05 (0x0205) 159 160 161/* Unit and Dev versioning for this MPI header set */ 162#define MPI2_HEADER_VERSION_UNIT (0x21) 163#define MPI2_HEADER_VERSION_DEV (0x00) 164#define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) 165#define MPI2_HEADER_VERSION_UNIT_SHIFT (8) 166#define MPI2_HEADER_VERSION_DEV_MASK (0x00FF) 167#define MPI2_HEADER_VERSION_DEV_SHIFT (0) 168#define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV) 169 170 171/***************************************************************************** 172* 173* IOC State Definitions 174* 175*****************************************************************************/ 176 177#define MPI2_IOC_STATE_RESET (0x00000000) 178#define MPI2_IOC_STATE_READY (0x10000000) 179#define MPI2_IOC_STATE_OPERATIONAL (0x20000000) 180#define MPI2_IOC_STATE_FAULT (0x40000000) 181 182#define MPI2_IOC_STATE_MASK (0xF0000000) 183#define MPI2_IOC_STATE_SHIFT (28) 184 185/* Fault state range for prodcut specific codes */ 186#define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000) 187#define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF) 188 189 190/***************************************************************************** 191* 192* System Interface Register Definitions 193* 194*****************************************************************************/ 195 196typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS 197{ 198 U32 Doorbell; /* 0x00 */ 199 U32 WriteSequence; /* 0x04 */ 200 U32 HostDiagnostic; /* 0x08 */ 201 U32 Reserved1; /* 0x0C */ 202 U32 DiagRWData; /* 0x10 */ 203 U32 DiagRWAddressLow; /* 0x14 */ 204 U32 DiagRWAddressHigh; /* 0x18 */ 205 U32 Reserved2[5]; /* 0x1C */ 206 U32 HostInterruptStatus; /* 0x30 */ 207 U32 HostInterruptMask; /* 0x34 */ 208 U32 DCRData; /* 0x38 */ 209 U32 DCRAddress; /* 0x3C */ 210 U32 Reserved3[2]; /* 0x40 */ 211 U32 ReplyFreeHostIndex; /* 0x48 */ 212 U32 Reserved4[8]; /* 0x4C */ 213 U32 ReplyPostHostIndex; /* 0x6C */ 214 U32 Reserved5; /* 0x70 */ 215 U32 HCBSize; /* 0x74 */ 216 U32 HCBAddressLow; /* 0x78 */ 217 U32 HCBAddressHigh; /* 0x7C */ 218 U32 Reserved6[16]; /* 0x80 */ 219 U32 RequestDescriptorPostLow; /* 0xC0 */ 220 U32 RequestDescriptorPostHigh; /* 0xC4 */ 221 U32 Reserved7[14]; /* 0xC8 */ 222} MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS, 223 Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t; 224 225/* 226 * Defines for working with the Doorbell register. 227 */ 228#define MPI2_DOORBELL_OFFSET (0x00000000) 229 230/* IOC --> System values */ 231#define MPI2_DOORBELL_USED (0x08000000) 232#define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000) 233#define MPI2_DOORBELL_WHO_INIT_SHIFT (24) 234#define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF) 235#define MPI2_DOORBELL_DATA_MASK (0x0000FFFF) 236 237/* System --> IOC values */ 238#define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000) 239#define MPI2_DOORBELL_FUNCTION_SHIFT (24) 240#define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000) 241#define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16) 242 243 244/* 245 * Defines for the WriteSequence register 246 */ 247#define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004) 248#define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F) 249#define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0) 250#define MPI2_WRSEQ_1ST_KEY_VALUE (0xF) 251#define MPI2_WRSEQ_2ND_KEY_VALUE (0x4) 252#define MPI2_WRSEQ_3RD_KEY_VALUE (0xB) 253#define MPI2_WRSEQ_4TH_KEY_VALUE (0x2) 254#define MPI2_WRSEQ_5TH_KEY_VALUE (0x7) 255#define MPI2_WRSEQ_6TH_KEY_VALUE (0xD) 256 257/* 258 * Defines for the HostDiagnostic register 259 */ 260#define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008) 261 262#define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800) 263#define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000) 264#define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800) 265 266#define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400) 267#define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200) 268#define MPI2_DIAG_HCB_MODE (0x00000100) 269#define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080) 270#define MPI2_DIAG_FLASH_BAD_SIG (0x00000040) 271#define MPI2_DIAG_RESET_HISTORY (0x00000020) 272#define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010) 273#define MPI2_DIAG_RESET_ADAPTER (0x00000004) 274#define MPI2_DIAG_HOLD_IOC_RESET (0x00000002) 275 276/* 277 * Offsets for DiagRWData and address 278 */ 279#define MPI2_DIAG_RW_DATA_OFFSET (0x00000010) 280#define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014) 281#define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018) 282 283/* 284 * Defines for the HostInterruptStatus register 285 */ 286#define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030) 287#define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000) 288#define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS 289#define MPI2_HIS_RESET_IRQ_STATUS (0x40000000) 290#define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008) 291#define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001) 292#define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS 293 294/* 295 * Defines for the HostInterruptMask register 296 */ 297#define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034) 298#define MPI2_HIM_RESET_IRQ_MASK (0x40000000) 299#define MPI2_HIM_REPLY_INT_MASK (0x00000008) 300#define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK 301#define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001) 302#define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK 303 304/* 305 * Offsets for DCRData and address 306 */ 307#define MPI2_DCR_DATA_OFFSET (0x00000038) 308#define MPI2_DCR_ADDRESS_OFFSET (0x0000003C) 309 310/* 311 * Offset for the Reply Free Queue 312 */ 313#define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048) 314 315/* 316 * Defines for the Reply Descriptor Post Queue 317 */ 318#define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C) 319#define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF) 320#define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000) 321#define MPI2_RPHI_MSIX_INDEX_SHIFT (24) 322#define MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET (0x0000030C) /* MPI v2.5 only */ 323 324 325/* 326 * Defines for the HCBSize and address 327 */ 328#define MPI2_HCB_SIZE_OFFSET (0x00000074) 329#define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000) 330#define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001) 331 332#define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078) 333#define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C) 334 335/* 336 * Offsets for the Request Queue 337 */ 338#define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0) 339#define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4) 340 341 342/* Hard Reset delay timings */ 343#define MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC (50000) 344#define MPI2_HARD_RESET_PCIE_RESET_READ_WINDOW_MICRO_SEC (255000) 345#define MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC (256000) 346 347/***************************************************************************** 348* 349* Message Descriptors 350* 351*****************************************************************************/ 352 353/* Request Descriptors */ 354 355/* Default Request Descriptor */ 356typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR 357{ 358 U8 RequestFlags; /* 0x00 */ 359 U8 MSIxIndex; /* 0x01 */ 360 U16 SMID; /* 0x02 */ 361 U16 LMID; /* 0x04 */ 362 U16 DescriptorTypeDependent; /* 0x06 */ 363} MPI2_DEFAULT_REQUEST_DESCRIPTOR, 364 MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR, 365 Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t; 366 367/* defines for the RequestFlags field */ 368#define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E) 369#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00) 370#define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02) 371#define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06) 372#define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08) 373#define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A) 374#define MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO (0x0C) 375 376#define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01) 377 378 379/* High Priority Request Descriptor */ 380typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR 381{ 382 U8 RequestFlags; /* 0x00 */ 383 U8 MSIxIndex; /* 0x01 */ 384 U16 SMID; /* 0x02 */ 385 U16 LMID; /* 0x04 */ 386 U16 Reserved1; /* 0x06 */ 387} MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, 388 MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, 389 Mpi2HighPriorityRequestDescriptor_t, 390 MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t; 391 392 393/* SCSI IO Request Descriptor */ 394typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR 395{ 396 U8 RequestFlags; /* 0x00 */ 397 U8 MSIxIndex; /* 0x01 */ 398 U16 SMID; /* 0x02 */ 399 U16 LMID; /* 0x04 */ 400 U16 DevHandle; /* 0x06 */ 401} MPI2_SCSI_IO_REQUEST_DESCRIPTOR, 402 MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR, 403 Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t; 404 405 406/* SCSI Target Request Descriptor */ 407typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR 408{ 409 U8 RequestFlags; /* 0x00 */ 410 U8 MSIxIndex; /* 0x01 */ 411 U16 SMID; /* 0x02 */ 412 U16 LMID; /* 0x04 */ 413 U16 IoIndex; /* 0x06 */ 414} MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, 415 MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, 416 Mpi2SCSITargetRequestDescriptor_t, 417 MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t; 418 419 420/* RAID Accelerator Request Descriptor */ 421typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR 422{ 423 U8 RequestFlags; /* 0x00 */ 424 U8 MSIxIndex; /* 0x01 */ 425 U16 SMID; /* 0x02 */ 426 U16 LMID; /* 0x04 */ 427 U16 Reserved; /* 0x06 */ 428} MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, 429 MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR, 430 Mpi2RAIDAcceleratorRequestDescriptor_t, 431 MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t; 432 433 434/* Fast Path SCSI IO Request Descriptor */ 435typedef MPI2_SCSI_IO_REQUEST_DESCRIPTOR 436 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR, 437 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR, 438 Mpi25FastPathSCSIIORequestDescriptor_t, 439 MPI2_POINTER pMpi25FastPathSCSIIORequestDescriptor_t; 440 441 442/* union of Request Descriptors */ 443typedef union _MPI2_REQUEST_DESCRIPTOR_UNION 444{ 445 MPI2_DEFAULT_REQUEST_DESCRIPTOR Default; 446 MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority; 447 MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO; 448 MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget; 449 MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator; 450 MPI25_FP_SCSI_IO_REQUEST_DESCRIPTOR FastPathSCSIIO; 451 U64 Words; 452} MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION, 453 Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t; 454 455 456/* Reply Descriptors */ 457 458/* Default Reply Descriptor */ 459typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR 460{ 461 U8 ReplyFlags; /* 0x00 */ 462 U8 MSIxIndex; /* 0x01 */ 463 U16 DescriptorTypeDependent1; /* 0x02 */ 464 U32 DescriptorTypeDependent2; /* 0x04 */ 465} MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR, 466 Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t; 467 468/* defines for the ReplyFlags field */ 469#define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F) 470#define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00) 471#define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01) 472#define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02) 473#define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03) 474#define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05) 475#define MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS (0x06) 476#define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F) 477 478/* values for marking a reply descriptor as unused */ 479#define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF) 480#define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF) 481 482/* Address Reply Descriptor */ 483typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR 484{ 485 U8 ReplyFlags; /* 0x00 */ 486 U8 MSIxIndex; /* 0x01 */ 487 U16 SMID; /* 0x02 */ 488 U32 ReplyFrameAddress; /* 0x04 */ 489} MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR, 490 Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t; 491 492#define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00) 493 494 495/* SCSI IO Success Reply Descriptor */ 496typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR 497{ 498 U8 ReplyFlags; /* 0x00 */ 499 U8 MSIxIndex; /* 0x01 */ 500 U16 SMID; /* 0x02 */ 501 U16 TaskTag; /* 0x04 */ 502 U16 Reserved1; /* 0x06 */ 503} MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 504 MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 505 Mpi2SCSIIOSuccessReplyDescriptor_t, 506 MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t; 507 508 509/* TargetAssist Success Reply Descriptor */ 510typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR 511{ 512 U8 ReplyFlags; /* 0x00 */ 513 U8 MSIxIndex; /* 0x01 */ 514 U16 SMID; /* 0x02 */ 515 U8 SequenceNumber; /* 0x04 */ 516 U8 Reserved1; /* 0x05 */ 517 U16 IoIndex; /* 0x06 */ 518} MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, 519 MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, 520 Mpi2TargetAssistSuccessReplyDescriptor_t, 521 MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t; 522 523 524/* Target Command Buffer Reply Descriptor */ 525typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR 526{ 527 U8 ReplyFlags; /* 0x00 */ 528 U8 MSIxIndex; /* 0x01 */ 529 U8 VP_ID; /* 0x02 */ 530 U8 Flags; /* 0x03 */ 531 U16 InitiatorDevHandle; /* 0x04 */ 532 U16 IoIndex; /* 0x06 */ 533} MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, 534 MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, 535 Mpi2TargetCommandBufferReplyDescriptor_t, 536 MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t; 537 538/* defines for Flags field */ 539#define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F) 540 541 542/* RAID Accelerator Success Reply Descriptor */ 543typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR 544{ 545 U8 ReplyFlags; /* 0x00 */ 546 U8 MSIxIndex; /* 0x01 */ 547 U16 SMID; /* 0x02 */ 548 U32 Reserved; /* 0x04 */ 549} MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, 550 MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR, 551 Mpi2RAIDAcceleratorSuccessReplyDescriptor_t, 552 MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t; 553 554 555/* Fast Path SCSI IO Success Reply Descriptor */ 556typedef MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR 557 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 558 MPI2_POINTER PTR_MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, 559 Mpi25FastPathSCSIIOSuccessReplyDescriptor_t, 560 MPI2_POINTER pMpi25FastPathSCSIIOSuccessReplyDescriptor_t; 561 562 563/* union of Reply Descriptors */ 564typedef union _MPI2_REPLY_DESCRIPTORS_UNION 565{ 566 MPI2_DEFAULT_REPLY_DESCRIPTOR Default; 567 MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply; 568 MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess; 569 MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess; 570 MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer; 571 MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess; 572 MPI25_FP_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR FastPathSCSIIOSuccess; 573 U64 Words; 574} MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION, 575 Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t; 576 577 578 579/***************************************************************************** 580* 581* Message Functions 582* 583*****************************************************************************/ 584 585#define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */ 586#define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */ 587#define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */ 588#define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */ 589#define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */ 590#define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */ 591#define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */ 592#define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */ 593#define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */ 594#define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */ 595#define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */ 596#define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */ 597#define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */ 598#define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */ 599#define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */ 600#define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */ 601#define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */ 602#define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */ 603#define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */ 604#define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */ 605#define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */ 606#define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */ 607#define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */ 608#define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ 609#define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ 610#define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator */ 611#define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F) /* Host Based Discovery Action */ 612#define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30) /* Power Management Control */ 613#define MPI2_FUNCTION_SEND_HOST_MESSAGE (0x31) /* Send Host Message */ 614#define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0) /* beginning of product-specific range */ 615#define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF) /* end of product-specific range */ 616 617 618 619/* Doorbell functions */ 620#define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) 621#define MPI2_FUNCTION_HANDSHAKE (0x42) 622 623 624/***************************************************************************** 625* 626* IOC Status Values 627* 628*****************************************************************************/ 629 630/* mask for IOCStatus status value */ 631#define MPI2_IOCSTATUS_MASK (0x7FFF) 632 633/**************************************************************************** 634* Common IOCStatus values for all replies 635****************************************************************************/ 636 637#define MPI2_IOCSTATUS_SUCCESS (0x0000) 638#define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001) 639#define MPI2_IOCSTATUS_BUSY (0x0002) 640#define MPI2_IOCSTATUS_INVALID_SGL (0x0003) 641#define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004) 642#define MPI2_IOCSTATUS_INVALID_VPID (0x0005) 643#define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006) 644#define MPI2_IOCSTATUS_INVALID_FIELD (0x0007) 645#define MPI2_IOCSTATUS_INVALID_STATE (0x0008) 646#define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009) 647 648/**************************************************************************** 649* Config IOCStatus values 650****************************************************************************/ 651 652#define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020) 653#define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021) 654#define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022) 655#define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023) 656#define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024) 657#define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025) 658 659/**************************************************************************** 660* SCSI IO Reply 661****************************************************************************/ 662 663#define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040) 664#define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042) 665#define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043) 666#define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044) 667#define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045) 668#define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046) 669#define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047) 670#define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048) 671#define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049) 672#define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A) 673#define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B) 674#define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C) 675 676/**************************************************************************** 677* For use by SCSI Initiator and SCSI Target end-to-end data protection 678****************************************************************************/ 679 680#define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D) 681#define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E) 682#define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F) 683 684/**************************************************************************** 685* SCSI Target values 686****************************************************************************/ 687 688#define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062) 689#define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063) 690#define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064) 691#define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065) 692#define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A) 693#define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D) 694#define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E) 695#define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F) 696#define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070) 697#define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071) 698 699/**************************************************************************** 700* Serial Attached SCSI values 701****************************************************************************/ 702 703#define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090) 704#define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091) 705 706/**************************************************************************** 707* Diagnostic Buffer Post / Diagnostic Release values 708****************************************************************************/ 709 710#define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0) 711 712/**************************************************************************** 713* RAID Accelerator values 714****************************************************************************/ 715 716#define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0) 717 718/**************************************************************************** 719* IOCStatus flag to indicate that log info is available 720****************************************************************************/ 721 722#define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000) 723 724/**************************************************************************** 725* IOCLogInfo Types 726****************************************************************************/ 727 728#define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000) 729#define MPI2_IOCLOGINFO_TYPE_SHIFT (28) 730#define MPI2_IOCLOGINFO_TYPE_NONE (0x0) 731#define MPI2_IOCLOGINFO_TYPE_SCSI (0x1) 732#define MPI2_IOCLOGINFO_TYPE_FC (0x2) 733#define MPI2_IOCLOGINFO_TYPE_SAS (0x3) 734#define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4) 735#define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF) 736 737 738/***************************************************************************** 739* 740* Standard Message Structures 741* 742*****************************************************************************/ 743 744/**************************************************************************** 745* Request Message Header for all request messages 746****************************************************************************/ 747 748typedef struct _MPI2_REQUEST_HEADER 749{ 750 U16 FunctionDependent1; /* 0x00 */ 751 U8 ChainOffset; /* 0x02 */ 752 U8 Function; /* 0x03 */ 753 U16 FunctionDependent2; /* 0x04 */ 754 U8 FunctionDependent3; /* 0x06 */ 755 U8 MsgFlags; /* 0x07 */ 756 U8 VP_ID; /* 0x08 */ 757 U8 VF_ID; /* 0x09 */ 758 U16 Reserved1; /* 0x0A */ 759} MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER, 760 MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t; 761 762 763/**************************************************************************** 764* Default Reply 765****************************************************************************/ 766 767typedef struct _MPI2_DEFAULT_REPLY 768{ 769 U16 FunctionDependent1; /* 0x00 */ 770 U8 MsgLength; /* 0x02 */ 771 U8 Function; /* 0x03 */ 772 U16 FunctionDependent2; /* 0x04 */ 773 U8 FunctionDependent3; /* 0x06 */ 774 U8 MsgFlags; /* 0x07 */ 775 U8 VP_ID; /* 0x08 */ 776 U8 VF_ID; /* 0x09 */ 777 U16 Reserved1; /* 0x0A */ 778 U16 FunctionDependent5; /* 0x0C */ 779 U16 IOCStatus; /* 0x0E */ 780 U32 IOCLogInfo; /* 0x10 */ 781} MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY, 782 MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t; 783 784 785/* common version structure/union used in messages and configuration pages */ 786 787typedef struct _MPI2_VERSION_STRUCT 788{ 789 U8 Dev; /* 0x00 */ 790 U8 Unit; /* 0x01 */ 791 U8 Minor; /* 0x02 */ 792 U8 Major; /* 0x03 */ 793} MPI2_VERSION_STRUCT; 794 795typedef union _MPI2_VERSION_UNION 796{ 797 MPI2_VERSION_STRUCT Struct; 798 U32 Word; 799} MPI2_VERSION_UNION; 800 801 802/* LUN field defines, common to many structures */ 803#define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) 804#define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) 805#define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) 806#define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) 807#define MPI2_LUN_LEVEL_1_WORD (0xFF00) 808#define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00) 809 810 811/***************************************************************************** 812* 813* Fusion-MPT MPI Scatter Gather Elements 814* 815*****************************************************************************/ 816 817/**************************************************************************** 818* MPI Simple Element structures 819****************************************************************************/ 820 821typedef struct _MPI2_SGE_SIMPLE32 822{ 823 U32 FlagsLength; 824 U32 Address; 825} MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32, 826 Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t; 827 828typedef struct _MPI2_SGE_SIMPLE64 829{ 830 U32 FlagsLength; 831 U64 Address; 832} MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64, 833 Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t; 834 835typedef struct _MPI2_SGE_SIMPLE_UNION 836{ 837 U32 FlagsLength; 838 union 839 { 840 U32 Address32; 841 U64 Address64; 842 } u; 843} MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, 844 Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; 845 846 847/**************************************************************************** 848* MPI Chain Element structures - for MPI v2.0 products only 849****************************************************************************/ 850 851typedef struct _MPI2_SGE_CHAIN32 852{ 853 U16 Length; 854 U8 NextChainOffset; 855 U8 Flags; 856 U32 Address; 857} MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32, 858 Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t; 859 860typedef struct _MPI2_SGE_CHAIN64 861{ 862 U16 Length; 863 U8 NextChainOffset; 864 U8 Flags; 865 U64 Address; 866} MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64, 867 Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t; 868 869typedef struct _MPI2_SGE_CHAIN_UNION 870{ 871 U16 Length; 872 U8 NextChainOffset; 873 U8 Flags; 874 union 875 { 876 U32 Address32; 877 U64 Address64; 878 } u; 879} MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, 880 Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; 881 882 883/**************************************************************************** 884* MPI Transaction Context Element structures - for MPI v2.0 products only 885****************************************************************************/ 886 887typedef struct _MPI2_SGE_TRANSACTION32 888{ 889 U8 Reserved; 890 U8 ContextSize; 891 U8 DetailsLength; 892 U8 Flags; 893 U32 TransactionContext[1]; 894 U32 TransactionDetails[1]; 895} MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32, 896 Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t; 897 898typedef struct _MPI2_SGE_TRANSACTION64 899{ 900 U8 Reserved; 901 U8 ContextSize; 902 U8 DetailsLength; 903 U8 Flags; 904 U32 TransactionContext[2]; 905 U32 TransactionDetails[1]; 906} MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64, 907 Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t; 908 909typedef struct _MPI2_SGE_TRANSACTION96 910{ 911 U8 Reserved; 912 U8 ContextSize; 913 U8 DetailsLength; 914 U8 Flags; 915 U32 TransactionContext[3]; 916 U32 TransactionDetails[1]; 917} MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96, 918 Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t; 919 920typedef struct _MPI2_SGE_TRANSACTION128 921{ 922 U8 Reserved; 923 U8 ContextSize; 924 U8 DetailsLength; 925 U8 Flags; 926 U32 TransactionContext[4]; 927 U32 TransactionDetails[1]; 928} MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128, 929 Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128; 930 931typedef struct _MPI2_SGE_TRANSACTION_UNION 932{ 933 U8 Reserved; 934 U8 ContextSize; 935 U8 DetailsLength; 936 U8 Flags; 937 union 938 { 939 U32 TransactionContext32[1]; 940 U32 TransactionContext64[2]; 941 U32 TransactionContext96[3]; 942 U32 TransactionContext128[4]; 943 } u; 944 U32 TransactionDetails[1]; 945} MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, 946 Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; 947 948 949/**************************************************************************** 950* MPI SGE union for IO SGL's - for MPI v2.0 products only 951****************************************************************************/ 952 953typedef struct _MPI2_MPI_SGE_IO_UNION 954{ 955 union 956 { 957 MPI2_SGE_SIMPLE_UNION Simple; 958 MPI2_SGE_CHAIN_UNION Chain; 959 } u; 960} MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, 961 Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; 962 963 964/**************************************************************************** 965* MPI SGE union for SGL's with Simple and Transaction elements - for MPI v2.0 products only 966****************************************************************************/ 967 968typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION 969{ 970 union 971 { 972 MPI2_SGE_SIMPLE_UNION Simple; 973 MPI2_SGE_TRANSACTION_UNION Transaction; 974 } u; 975} MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION, 976 Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t; 977 978 979/**************************************************************************** 980* All MPI SGE types union 981****************************************************************************/ 982 983typedef struct _MPI2_MPI_SGE_UNION 984{ 985 union 986 { 987 MPI2_SGE_SIMPLE_UNION Simple; 988 MPI2_SGE_CHAIN_UNION Chain; 989 MPI2_SGE_TRANSACTION_UNION Transaction; 990 } u; 991} MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION, 992 Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t; 993 994 995/**************************************************************************** 996* MPI SGE field definition and masks 997****************************************************************************/ 998 999/* Flags field bit definitions */ 1000 1001#define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80) 1002#define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40) 1003#define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30) 1004#define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08) 1005#define MPI2_SGE_FLAGS_DIRECTION (0x04) 1006#define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02) 1007#define MPI2_SGE_FLAGS_END_OF_LIST (0x01) 1008 1009#define MPI2_SGE_FLAGS_SHIFT (24) 1010 1011#define MPI2_SGE_LENGTH_MASK (0x00FFFFFF) 1012#define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) 1013 1014/* Element Type */ 1015 1016#define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) /* for MPI v2.0 products only */ 1017#define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10) 1018#define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) /* for MPI v2.0 products only */ 1019#define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30) 1020 1021/* Address location */ 1022 1023#define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00) 1024 1025/* Direction */ 1026 1027#define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00) 1028#define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04) 1029 1030#define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST) 1031#define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC) 1032 1033/* Address Size */ 1034 1035#define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00) 1036#define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02) 1037 1038/* Context Size */ 1039 1040#define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00) 1041#define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02) 1042#define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04) 1043#define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06) 1044 1045#define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000) 1046#define MPI2_SGE_CHAIN_OFFSET_SHIFT (16) 1047 1048/**************************************************************************** 1049* MPI SGE operation Macros 1050****************************************************************************/ 1051 1052/* SIMPLE FlagsLength manipulations... */ 1053#define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT) 1054#define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT) 1055#define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK) 1056#define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK) 1057 1058#define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l)) 1059 1060#define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength) 1061#define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength) 1062#define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l) 1063 1064/* CAUTION - The following are READ-MODIFY-WRITE! */ 1065#define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f) 1066#define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l) 1067 1068#define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT) 1069 1070 1071/***************************************************************************** 1072* 1073* Fusion-MPT IEEE Scatter Gather Elements 1074* 1075*****************************************************************************/ 1076 1077/**************************************************************************** 1078* IEEE Simple Element structures 1079****************************************************************************/ 1080 1081/* MPI2_IEEE_SGE_SIMPLE32 is for MPI v2.0 products only */ 1082typedef struct _MPI2_IEEE_SGE_SIMPLE32 1083{ 1084 U32 Address; 1085 U32 FlagsLength; 1086} MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32, 1087 Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t; 1088 1089typedef struct _MPI2_IEEE_SGE_SIMPLE64 1090{ 1091 U64 Address; 1092 U32 Length; 1093 U16 Reserved1; 1094 U8 Reserved2; 1095 U8 Flags; 1096} MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64, 1097 Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t; 1098 1099typedef union _MPI2_IEEE_SGE_SIMPLE_UNION 1100{ 1101 MPI2_IEEE_SGE_SIMPLE32 Simple32; 1102 MPI2_IEEE_SGE_SIMPLE64 Simple64; 1103} MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION, 1104 Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t; 1105 1106 1107/**************************************************************************** 1108* IEEE Chain Element structures 1109****************************************************************************/ 1110 1111/* MPI2_IEEE_SGE_CHAIN32 is for MPI v2.0 products only */ 1112typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32; 1113 1114/* MPI2_IEEE_SGE_CHAIN64 is for MPI v2.0 products only */ 1115typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64; 1116 1117typedef union _MPI2_IEEE_SGE_CHAIN_UNION 1118{ 1119 MPI2_IEEE_SGE_CHAIN32 Chain32; 1120 MPI2_IEEE_SGE_CHAIN64 Chain64; 1121} MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION, 1122 Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t; 1123 1124/* MPI25_IEEE_SGE_CHAIN64 is for MPI v2.5 products only */ 1125typedef struct _MPI25_IEEE_SGE_CHAIN64 1126{ 1127 U64 Address; 1128 U32 Length; 1129 U16 Reserved1; 1130 U8 NextChainOffset; 1131 U8 Flags; 1132} MPI25_IEEE_SGE_CHAIN64, MPI2_POINTER PTR_MPI25_IEEE_SGE_CHAIN64, 1133 Mpi25IeeeSgeChain64_t, MPI2_POINTER pMpi25IeeeSgeChain64_t; 1134 1135 1136/**************************************************************************** 1137* All IEEE SGE types union 1138****************************************************************************/ 1139 1140/* MPI2_IEEE_SGE_UNION is for MPI v2.0 products only */ 1141typedef struct _MPI2_IEEE_SGE_UNION 1142{ 1143 union 1144 { 1145 MPI2_IEEE_SGE_SIMPLE_UNION Simple; 1146 MPI2_IEEE_SGE_CHAIN_UNION Chain; 1147 } u; 1148} MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION, 1149 Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t; 1150 1151 1152/**************************************************************************** 1153* IEEE SGE union for IO SGL's 1154****************************************************************************/ 1155 1156typedef union _MPI25_SGE_IO_UNION 1157{ 1158 MPI2_IEEE_SGE_SIMPLE64 IeeeSimple; 1159 MPI25_IEEE_SGE_CHAIN64 IeeeChain; 1160} MPI25_SGE_IO_UNION, MPI2_POINTER PTR_MPI25_SGE_IO_UNION, 1161 Mpi25SGEIOUnion_t, MPI2_POINTER pMpi25SGEIOUnion_t; 1162 1163 1164/**************************************************************************** 1165* IEEE SGE field definitions and masks 1166****************************************************************************/ 1167 1168/* Flags field bit definitions */ 1169 1170#define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80) 1171#define MPI25_IEEE_SGE_FLAGS_END_OF_LIST (0x40) 1172 1173#define MPI2_IEEE32_SGE_FLAGS_SHIFT (24) 1174 1175#define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF) 1176 1177/* Element Type */ 1178 1179#define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00) 1180#define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80) 1181 1182/* Data Location Address Space */ 1183 1184#define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03) 1185#define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */ 1186#define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) /* use in IEEE Simple Element only */ 1187#define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02) 1188#define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) /* for MPI v2.0, use in IEEE Simple Element only; for MPI v2.5, use in IEEE Simple or Chain element */ 1189#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR (0x03) /* use in MPI v2.0 IEEE Chain Element only */ 1190#define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR (MPI2_IEEE_SGE_FLAGS_SYSTEMPLBPCI_ADDR) /* typo in name */ 1191 1192/**************************************************************************** 1193* IEEE SGE operation Macros 1194****************************************************************************/ 1195 1196/* SIMPLE FlagsLength manipulations... */ 1197#define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT) 1198#define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT) 1199#define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK) 1200 1201#define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l)) 1202 1203#define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength) 1204#define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength) 1205#define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l) 1206 1207/* CAUTION - The following are READ-MODIFY-WRITE! */ 1208#define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f) 1209#define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l) 1210 1211 1212 1213/***************************************************************************** 1214* 1215* Fusion-MPT MPI/IEEE Scatter Gather Unions 1216* 1217*****************************************************************************/ 1218 1219typedef union _MPI2_SIMPLE_SGE_UNION 1220{ 1221 MPI2_SGE_SIMPLE_UNION MpiSimple; 1222 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; 1223} MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION, 1224 Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t; 1225 1226 1227typedef union _MPI2_SGE_IO_UNION 1228{ 1229 MPI2_SGE_SIMPLE_UNION MpiSimple; 1230 MPI2_SGE_CHAIN_UNION MpiChain; 1231 MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; 1232 MPI2_IEEE_SGE_CHAIN_UNION IeeeChain; 1233} MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION, 1234 Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t; 1235 1236 1237/**************************************************************************** 1238* 1239* Values for SGLFlags field, used in many request messages with an SGL 1240* 1241****************************************************************************/ 1242 1243/* values for MPI SGL Data Location Address Space subfield */ 1244#define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C) 1245#define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00) 1246#define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04) 1247#define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08) 1248#define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C) 1249/* values for SGL Type subfield */ 1250#define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03) 1251#define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00) 1252#define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01) /* MPI v2.0 products only */ 1253#define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02) 1254 1255 1256#endif 1257 1258