1290650Shselasky/*- 2290650Shselasky * Copyright (c) 2013-2015, Mellanox Technologies, Ltd. All rights reserved. 3290650Shselasky * 4290650Shselasky * Redistribution and use in source and binary forms, with or without 5290650Shselasky * modification, are permitted provided that the following conditions 6290650Shselasky * are met: 7290650Shselasky * 1. Redistributions of source code must retain the above copyright 8290650Shselasky * notice, this list of conditions and the following disclaimer. 9290650Shselasky * 2. Redistributions in binary form must reproduce the above copyright 10290650Shselasky * notice, this list of conditions and the following disclaimer in the 11290650Shselasky * documentation and/or other materials provided with the distribution. 12290650Shselasky * 13290650Shselasky * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND 14290650Shselasky * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15290650Shselasky * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16290650Shselasky * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17290650Shselasky * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18290650Shselasky * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19290650Shselasky * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20290650Shselasky * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21290650Shselasky * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22290650Shselasky * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23290650Shselasky * SUCH DAMAGE. 24290650Shselasky * 25290650Shselasky * $FreeBSD: releng/10.3/sys/dev/mlx5/qp.h 290650 2015-11-10 12:20:22Z hselasky $ 26290650Shselasky */ 27290650Shselasky 28290650Shselasky#ifndef MLX5_QP_H 29290650Shselasky#define MLX5_QP_H 30290650Shselasky 31290650Shselasky#include <dev/mlx5/device.h> 32290650Shselasky#include <dev/mlx5/driver.h> 33290650Shselasky#include <dev/mlx5/mlx5_ifc.h> 34290650Shselasky 35290650Shselasky#define MLX5_INVALID_LKEY 0x100 36290650Shselasky#define MLX5_SIG_WQE_SIZE (MLX5_SEND_WQE_BB * 5) 37290650Shselasky#define MLX5_DIF_SIZE 8 38290650Shselasky#define MLX5_STRIDE_BLOCK_OP 0x400 39290650Shselasky#define MLX5_CPY_GRD_MASK 0xc0 40290650Shselasky#define MLX5_CPY_APP_MASK 0x30 41290650Shselasky#define MLX5_CPY_REF_MASK 0x0f 42290650Shselasky#define MLX5_BSF_INC_REFTAG (1 << 6) 43290650Shselasky#define MLX5_BSF_INL_VALID (1 << 15) 44290650Shselasky#define MLX5_BSF_REFRESH_DIF (1 << 14) 45290650Shselasky#define MLX5_BSF_REPEAT_BLOCK (1 << 7) 46290650Shselasky#define MLX5_BSF_APPTAG_ESCAPE 0x1 47290650Shselasky#define MLX5_BSF_APPREF_ESCAPE 0x2 48290650Shselasky 49290650Shselaskyenum mlx5_qp_optpar { 50290650Shselasky MLX5_QP_OPTPAR_ALT_ADDR_PATH = 1 << 0, 51290650Shselasky MLX5_QP_OPTPAR_RRE = 1 << 1, 52290650Shselasky MLX5_QP_OPTPAR_RAE = 1 << 2, 53290650Shselasky MLX5_QP_OPTPAR_RWE = 1 << 3, 54290650Shselasky MLX5_QP_OPTPAR_PKEY_INDEX = 1 << 4, 55290650Shselasky MLX5_QP_OPTPAR_Q_KEY = 1 << 5, 56290650Shselasky MLX5_QP_OPTPAR_RNR_TIMEOUT = 1 << 6, 57290650Shselasky MLX5_QP_OPTPAR_PRIMARY_ADDR_PATH = 1 << 7, 58290650Shselasky MLX5_QP_OPTPAR_SRA_MAX = 1 << 8, 59290650Shselasky MLX5_QP_OPTPAR_RRA_MAX = 1 << 9, 60290650Shselasky MLX5_QP_OPTPAR_PM_STATE = 1 << 10, 61290650Shselasky MLX5_QP_OPTPAR_RETRY_COUNT = 1 << 12, 62290650Shselasky MLX5_QP_OPTPAR_RNR_RETRY = 1 << 13, 63290650Shselasky MLX5_QP_OPTPAR_ACK_TIMEOUT = 1 << 14, 64290650Shselasky MLX5_QP_OPTPAR_PRI_PORT = 1 << 16, 65290650Shselasky MLX5_QP_OPTPAR_SRQN = 1 << 18, 66290650Shselasky MLX5_QP_OPTPAR_CQN_RCV = 1 << 19, 67290650Shselasky MLX5_QP_OPTPAR_DC_HS = 1 << 20, 68290650Shselasky MLX5_QP_OPTPAR_DC_KEY = 1 << 21, 69290650Shselasky}; 70290650Shselasky 71290650Shselaskyenum mlx5_qp_state { 72290650Shselasky MLX5_QP_STATE_RST = 0, 73290650Shselasky MLX5_QP_STATE_INIT = 1, 74290650Shselasky MLX5_QP_STATE_RTR = 2, 75290650Shselasky MLX5_QP_STATE_RTS = 3, 76290650Shselasky MLX5_QP_STATE_SQER = 4, 77290650Shselasky MLX5_QP_STATE_SQD = 5, 78290650Shselasky MLX5_QP_STATE_ERR = 6, 79290650Shselasky MLX5_QP_STATE_SQ_DRAINING = 7, 80290650Shselasky MLX5_QP_STATE_SUSPENDED = 9, 81290650Shselasky MLX5_QP_NUM_STATE 82290650Shselasky}; 83290650Shselasky 84290650Shselaskyenum { 85290650Shselasky MLX5_QP_ST_RC = 0x0, 86290650Shselasky MLX5_QP_ST_UC = 0x1, 87290650Shselasky MLX5_QP_ST_UD = 0x2, 88290650Shselasky MLX5_QP_ST_XRC = 0x3, 89290650Shselasky MLX5_QP_ST_MLX = 0x4, 90290650Shselasky MLX5_QP_ST_DCI = 0x5, 91290650Shselasky MLX5_QP_ST_DCT = 0x6, 92290650Shselasky MLX5_QP_ST_QP0 = 0x7, 93290650Shselasky MLX5_QP_ST_QP1 = 0x8, 94290650Shselasky MLX5_QP_ST_RAW_ETHERTYPE = 0x9, 95290650Shselasky MLX5_QP_ST_RAW_IPV6 = 0xa, 96290650Shselasky MLX5_QP_ST_SNIFFER = 0xb, 97290650Shselasky MLX5_QP_ST_SYNC_UMR = 0xe, 98290650Shselasky MLX5_QP_ST_PTP_1588 = 0xd, 99290650Shselasky MLX5_QP_ST_REG_UMR = 0xc, 100290650Shselasky MLX5_QP_ST_MAX 101290650Shselasky}; 102290650Shselasky 103290650Shselaskyenum { 104290650Shselasky MLX5_NON_ZERO_RQ = 0 << 24, 105290650Shselasky MLX5_SRQ_RQ = 1 << 24, 106290650Shselasky MLX5_CRQ_RQ = 2 << 24, 107290650Shselasky MLX5_ZERO_LEN_RQ = 3 << 24 108290650Shselasky}; 109290650Shselasky 110290650Shselaskyenum { 111290650Shselasky /* params1 */ 112290650Shselasky MLX5_QP_BIT_SRE = 1 << 15, 113290650Shselasky MLX5_QP_BIT_SWE = 1 << 14, 114290650Shselasky MLX5_QP_BIT_SAE = 1 << 13, 115290650Shselasky /* params2 */ 116290650Shselasky MLX5_QP_BIT_RRE = 1 << 15, 117290650Shselasky MLX5_QP_BIT_RWE = 1 << 14, 118290650Shselasky MLX5_QP_BIT_RAE = 1 << 13, 119290650Shselasky MLX5_QP_BIT_RIC = 1 << 4, 120290650Shselasky}; 121290650Shselasky 122290650Shselaskyenum { 123290650Shselasky MLX5_WQE_CTRL_CQ_UPDATE = 2 << 2, 124290650Shselasky MLX5_WQE_CTRL_CQ_UPDATE_AND_EQE = 3 << 2, 125290650Shselasky MLX5_WQE_CTRL_SOLICITED = 1 << 1, 126290650Shselasky}; 127290650Shselasky 128290650Shselaskyenum { 129290650Shselasky MLX5_SEND_WQE_DS = 16, 130290650Shselasky MLX5_SEND_WQE_BB = 64, 131290650Shselasky}; 132290650Shselasky 133290650Shselasky#define MLX5_SEND_WQEBB_NUM_DS (MLX5_SEND_WQE_BB / MLX5_SEND_WQE_DS) 134290650Shselasky 135290650Shselaskyenum { 136290650Shselasky MLX5_SEND_WQE_MAX_WQEBBS = 16, 137290650Shselasky}; 138290650Shselasky 139290650Shselaskyenum { 140290650Shselasky MLX5_WQE_FMR_PERM_LOCAL_READ = 1 << 27, 141290650Shselasky MLX5_WQE_FMR_PERM_LOCAL_WRITE = 1 << 28, 142290650Shselasky MLX5_WQE_FMR_PERM_REMOTE_READ = 1 << 29, 143290650Shselasky MLX5_WQE_FMR_PERM_REMOTE_WRITE = 1 << 30, 144290650Shselasky MLX5_WQE_FMR_PERM_ATOMIC = 1 << 31 145290650Shselasky}; 146290650Shselasky 147290650Shselaskyenum { 148290650Shselasky MLX5_FENCE_MODE_NONE = 0 << 5, 149290650Shselasky MLX5_FENCE_MODE_INITIATOR_SMALL = 1 << 5, 150290650Shselasky MLX5_FENCE_MODE_STRONG_ORDERING = 3 << 5, 151290650Shselasky MLX5_FENCE_MODE_SMALL_AND_FENCE = 4 << 5, 152290650Shselasky}; 153290650Shselasky 154290650Shselaskyenum { 155290650Shselasky MLX5_QP_LAT_SENSITIVE = 1 << 28, 156290650Shselasky MLX5_QP_BLOCK_MCAST = 1 << 30, 157290650Shselasky MLX5_QP_ENABLE_SIG = 1 << 31, 158290650Shselasky}; 159290650Shselasky 160290650Shselaskyenum { 161290650Shselasky MLX5_RCV_DBR = 0, 162290650Shselasky MLX5_SND_DBR = 1, 163290650Shselasky}; 164290650Shselasky 165290650Shselaskyenum { 166290650Shselasky MLX5_FLAGS_INLINE = 1<<7, 167290650Shselasky MLX5_FLAGS_CHECK_FREE = 1<<5, 168290650Shselasky}; 169290650Shselasky 170290650Shselaskystruct mlx5_wqe_fmr_seg { 171290650Shselasky __be32 flags; 172290650Shselasky __be32 mem_key; 173290650Shselasky __be64 buf_list; 174290650Shselasky __be64 start_addr; 175290650Shselasky __be64 reg_len; 176290650Shselasky __be32 offset; 177290650Shselasky __be32 page_size; 178290650Shselasky u32 reserved[2]; 179290650Shselasky}; 180290650Shselasky 181290650Shselaskystruct mlx5_wqe_ctrl_seg { 182290650Shselasky __be32 opmod_idx_opcode; 183290650Shselasky __be32 qpn_ds; 184290650Shselasky u8 signature; 185290650Shselasky u8 rsvd[2]; 186290650Shselasky u8 fm_ce_se; 187290650Shselasky __be32 imm; 188290650Shselasky}; 189290650Shselasky 190290650Shselaskyenum { 191290650Shselasky MLX5_ETH_WQE_L3_INNER_CSUM = 1 << 4, 192290650Shselasky MLX5_ETH_WQE_L4_INNER_CSUM = 1 << 5, 193290650Shselasky MLX5_ETH_WQE_L3_CSUM = 1 << 6, 194290650Shselasky MLX5_ETH_WQE_L4_CSUM = 1 << 7, 195290650Shselasky}; 196290650Shselasky 197290650Shselaskystruct mlx5_wqe_eth_seg { 198290650Shselasky u8 rsvd0[4]; 199290650Shselasky u8 cs_flags; 200290650Shselasky u8 rsvd1; 201290650Shselasky __be16 mss; 202290650Shselasky __be32 rsvd2; 203290650Shselasky __be16 inline_hdr_sz; 204290650Shselasky u8 inline_hdr_start[2]; 205290650Shselasky}; 206290650Shselasky 207290650Shselaskystruct mlx5_wqe_xrc_seg { 208290650Shselasky __be32 xrc_srqn; 209290650Shselasky u8 rsvd[12]; 210290650Shselasky}; 211290650Shselasky 212290650Shselaskystruct mlx5_wqe_masked_atomic_seg { 213290650Shselasky __be64 swap_add; 214290650Shselasky __be64 compare; 215290650Shselasky __be64 swap_add_mask; 216290650Shselasky __be64 compare_mask; 217290650Shselasky}; 218290650Shselasky 219290650Shselaskystruct mlx5_av { 220290650Shselasky union { 221290650Shselasky struct { 222290650Shselasky __be32 qkey; 223290650Shselasky __be32 reserved; 224290650Shselasky } qkey; 225290650Shselasky __be64 dc_key; 226290650Shselasky } key; 227290650Shselasky __be32 dqp_dct; 228290650Shselasky u8 stat_rate_sl; 229290650Shselasky u8 fl_mlid; 230290650Shselasky union { 231290650Shselasky __be16 rlid; 232290650Shselasky __be16 udp_sport; 233290650Shselasky }; 234290650Shselasky u8 reserved0[4]; 235290650Shselasky u8 rmac[6]; 236290650Shselasky u8 tclass; 237290650Shselasky u8 hop_limit; 238290650Shselasky __be32 grh_gid_fl; 239290650Shselasky u8 rgid[16]; 240290650Shselasky}; 241290650Shselasky 242290650Shselaskystruct mlx5_wqe_datagram_seg { 243290650Shselasky struct mlx5_av av; 244290650Shselasky}; 245290650Shselasky 246290650Shselaskystruct mlx5_wqe_raddr_seg { 247290650Shselasky __be64 raddr; 248290650Shselasky __be32 rkey; 249290650Shselasky u32 reserved; 250290650Shselasky}; 251290650Shselasky 252290650Shselaskystruct mlx5_wqe_atomic_seg { 253290650Shselasky __be64 swap_add; 254290650Shselasky __be64 compare; 255290650Shselasky}; 256290650Shselasky 257290650Shselaskystruct mlx5_wqe_data_seg { 258290650Shselasky __be32 byte_count; 259290650Shselasky __be32 lkey; 260290650Shselasky __be64 addr; 261290650Shselasky}; 262290650Shselasky 263290650Shselaskystruct mlx5_wqe_umr_ctrl_seg { 264290650Shselasky u8 flags; 265290650Shselasky u8 rsvd0[3]; 266290650Shselasky __be16 klm_octowords; 267290650Shselasky __be16 bsf_octowords; 268290650Shselasky __be64 mkey_mask; 269290650Shselasky u8 rsvd1[32]; 270290650Shselasky}; 271290650Shselasky 272290650Shselaskystruct mlx5_seg_set_psv { 273290650Shselasky __be32 psv_num; 274290650Shselasky __be16 syndrome; 275290650Shselasky __be16 status; 276290650Shselasky __be32 transient_sig; 277290650Shselasky __be32 ref_tag; 278290650Shselasky}; 279290650Shselasky 280290650Shselaskystruct mlx5_seg_get_psv { 281290650Shselasky u8 rsvd[19]; 282290650Shselasky u8 num_psv; 283290650Shselasky __be32 l_key; 284290650Shselasky __be64 va; 285290650Shselasky __be32 psv_index[4]; 286290650Shselasky}; 287290650Shselasky 288290650Shselaskystruct mlx5_seg_check_psv { 289290650Shselasky u8 rsvd0[2]; 290290650Shselasky __be16 err_coalescing_op; 291290650Shselasky u8 rsvd1[2]; 292290650Shselasky __be16 xport_err_op; 293290650Shselasky u8 rsvd2[2]; 294290650Shselasky __be16 xport_err_mask; 295290650Shselasky u8 rsvd3[7]; 296290650Shselasky u8 num_psv; 297290650Shselasky __be32 l_key; 298290650Shselasky __be64 va; 299290650Shselasky __be32 psv_index[4]; 300290650Shselasky}; 301290650Shselasky 302290650Shselaskystruct mlx5_rwqe_sig { 303290650Shselasky u8 rsvd0[4]; 304290650Shselasky u8 signature; 305290650Shselasky u8 rsvd1[11]; 306290650Shselasky}; 307290650Shselasky 308290650Shselaskystruct mlx5_wqe_signature_seg { 309290650Shselasky u8 rsvd0[4]; 310290650Shselasky u8 signature; 311290650Shselasky u8 rsvd1[11]; 312290650Shselasky}; 313290650Shselasky 314290650Shselaskystruct mlx5_wqe_inline_seg { 315290650Shselasky __be32 byte_count; 316290650Shselasky}; 317290650Shselasky 318290650Shselaskyenum mlx5_sig_type { 319290650Shselasky MLX5_DIF_CRC = 0x1, 320290650Shselasky MLX5_DIF_IPCS = 0x2, 321290650Shselasky}; 322290650Shselasky 323290650Shselaskystruct mlx5_bsf_inl { 324290650Shselasky __be16 vld_refresh; 325290650Shselasky __be16 dif_apptag; 326290650Shselasky __be32 dif_reftag; 327290650Shselasky u8 sig_type; 328290650Shselasky u8 rp_inv_seed; 329290650Shselasky u8 rsvd[3]; 330290650Shselasky u8 dif_inc_ref_guard_check; 331290650Shselasky __be16 dif_app_bitmask_check; 332290650Shselasky}; 333290650Shselasky 334290650Shselaskystruct mlx5_bsf { 335290650Shselasky struct mlx5_bsf_basic { 336290650Shselasky u8 bsf_size_sbs; 337290650Shselasky u8 check_byte_mask; 338290650Shselasky union { 339290650Shselasky u8 copy_byte_mask; 340290650Shselasky u8 bs_selector; 341290650Shselasky u8 rsvd_wflags; 342290650Shselasky } wire; 343290650Shselasky union { 344290650Shselasky u8 bs_selector; 345290650Shselasky u8 rsvd_mflags; 346290650Shselasky } mem; 347290650Shselasky __be32 raw_data_size; 348290650Shselasky __be32 w_bfs_psv; 349290650Shselasky __be32 m_bfs_psv; 350290650Shselasky } basic; 351290650Shselasky struct mlx5_bsf_ext { 352290650Shselasky __be32 t_init_gen_pro_size; 353290650Shselasky __be32 rsvd_epi_size; 354290650Shselasky __be32 w_tfs_psv; 355290650Shselasky __be32 m_tfs_psv; 356290650Shselasky } ext; 357290650Shselasky struct mlx5_bsf_inl w_inl; 358290650Shselasky struct mlx5_bsf_inl m_inl; 359290650Shselasky}; 360290650Shselasky 361290650Shselaskystruct mlx5_klm { 362290650Shselasky __be32 bcount; 363290650Shselasky __be32 key; 364290650Shselasky __be64 va; 365290650Shselasky}; 366290650Shselasky 367290650Shselaskystruct mlx5_stride_block_entry { 368290650Shselasky __be16 stride; 369290650Shselasky __be16 bcount; 370290650Shselasky __be32 key; 371290650Shselasky __be64 va; 372290650Shselasky}; 373290650Shselasky 374290650Shselaskystruct mlx5_stride_block_ctrl_seg { 375290650Shselasky __be32 bcount_per_cycle; 376290650Shselasky __be32 op; 377290650Shselasky __be32 repeat_count; 378290650Shselasky u16 rsvd; 379290650Shselasky __be16 num_entries; 380290650Shselasky}; 381290650Shselasky 382290650Shselaskystruct mlx5_core_qp { 383290650Shselasky struct mlx5_core_rsc_common common; /* must be first */ 384290650Shselasky void (*event) (struct mlx5_core_qp *, int); 385290650Shselasky int qpn; 386290650Shselasky struct mlx5_rsc_debug *dbg; 387290650Shselasky int pid; 388290650Shselasky}; 389290650Shselasky 390290650Shselaskystruct mlx5_qp_path { 391290650Shselasky u8 fl_free_ar; 392290650Shselasky u8 rsvd3; 393290650Shselasky __be16 pkey_index; 394290650Shselasky u8 rsvd0; 395290650Shselasky u8 grh_mlid; 396290650Shselasky __be16 rlid; 397290650Shselasky u8 ackto_lt; 398290650Shselasky u8 mgid_index; 399290650Shselasky u8 static_rate; 400290650Shselasky u8 hop_limit; 401290650Shselasky __be32 tclass_flowlabel; 402290650Shselasky union { 403290650Shselasky u8 rgid[16]; 404290650Shselasky u8 rip[16]; 405290650Shselasky }; 406290650Shselasky u8 f_dscp_ecn_prio; 407290650Shselasky u8 ecn_dscp; 408290650Shselasky __be16 udp_sport; 409290650Shselasky u8 dci_cfi_prio_sl; 410290650Shselasky u8 port; 411290650Shselasky u8 rmac[6]; 412290650Shselasky}; 413290650Shselasky 414290650Shselaskystruct mlx5_qp_context { 415290650Shselasky __be32 flags; 416290650Shselasky __be32 flags_pd; 417290650Shselasky u8 mtu_msgmax; 418290650Shselasky u8 rq_size_stride; 419290650Shselasky __be16 sq_crq_size; 420290650Shselasky __be32 qp_counter_set_usr_page; 421290650Shselasky __be32 wire_qpn; 422290650Shselasky __be32 log_pg_sz_remote_qpn; 423290650Shselasky struct mlx5_qp_path pri_path; 424290650Shselasky struct mlx5_qp_path alt_path; 425290650Shselasky __be32 params1; 426290650Shselasky u8 reserved2[4]; 427290650Shselasky __be32 next_send_psn; 428290650Shselasky __be32 cqn_send; 429290650Shselasky u8 reserved3[8]; 430290650Shselasky __be32 last_acked_psn; 431290650Shselasky __be32 ssn; 432290650Shselasky __be32 params2; 433290650Shselasky __be32 rnr_nextrecvpsn; 434290650Shselasky __be32 xrcd; 435290650Shselasky __be32 cqn_recv; 436290650Shselasky __be64 db_rec_addr; 437290650Shselasky __be32 qkey; 438290650Shselasky __be32 rq_type_srqn; 439290650Shselasky __be32 rmsn; 440290650Shselasky __be16 hw_sq_wqe_counter; 441290650Shselasky __be16 sw_sq_wqe_counter; 442290650Shselasky __be16 hw_rcyclic_byte_counter; 443290650Shselasky __be16 hw_rq_counter; 444290650Shselasky __be16 sw_rcyclic_byte_counter; 445290650Shselasky __be16 sw_rq_counter; 446290650Shselasky u8 rsvd0[5]; 447290650Shselasky u8 cgs; 448290650Shselasky u8 cs_req; 449290650Shselasky u8 cs_res; 450290650Shselasky __be64 dc_access_key; 451290650Shselasky u8 rsvd1[24]; 452290650Shselasky}; 453290650Shselasky 454290650Shselaskystruct mlx5_create_qp_mbox_in { 455290650Shselasky struct mlx5_inbox_hdr hdr; 456290650Shselasky __be32 input_qpn; 457290650Shselasky u8 rsvd0[4]; 458290650Shselasky __be32 opt_param_mask; 459290650Shselasky u8 rsvd1[4]; 460290650Shselasky struct mlx5_qp_context ctx; 461290650Shselasky u8 rsvd3[16]; 462290650Shselasky __be64 pas[0]; 463290650Shselasky}; 464290650Shselasky 465290650Shselaskystruct mlx5_create_qp_mbox_out { 466290650Shselasky struct mlx5_outbox_hdr hdr; 467290650Shselasky __be32 qpn; 468290650Shselasky u8 rsvd0[4]; 469290650Shselasky}; 470290650Shselasky 471290650Shselaskystruct mlx5_destroy_qp_mbox_in { 472290650Shselasky struct mlx5_inbox_hdr hdr; 473290650Shselasky __be32 qpn; 474290650Shselasky u8 rsvd0[4]; 475290650Shselasky}; 476290650Shselasky 477290650Shselaskystruct mlx5_destroy_qp_mbox_out { 478290650Shselasky struct mlx5_outbox_hdr hdr; 479290650Shselasky u8 rsvd0[8]; 480290650Shselasky}; 481290650Shselasky 482290650Shselaskystruct mlx5_modify_qp_mbox_in { 483290650Shselasky struct mlx5_inbox_hdr hdr; 484290650Shselasky __be32 qpn; 485290650Shselasky u8 rsvd1[4]; 486290650Shselasky __be32 optparam; 487290650Shselasky u8 rsvd0[4]; 488290650Shselasky struct mlx5_qp_context ctx; 489290650Shselasky}; 490290650Shselasky 491290650Shselaskystruct mlx5_modify_qp_mbox_out { 492290650Shselasky struct mlx5_outbox_hdr hdr; 493290650Shselasky u8 rsvd0[8]; 494290650Shselasky}; 495290650Shselasky 496290650Shselaskystruct mlx5_query_qp_mbox_in { 497290650Shselasky struct mlx5_inbox_hdr hdr; 498290650Shselasky __be32 qpn; 499290650Shselasky u8 rsvd[4]; 500290650Shselasky}; 501290650Shselasky 502290650Shselaskystruct mlx5_query_qp_mbox_out { 503290650Shselasky struct mlx5_outbox_hdr hdr; 504290650Shselasky u8 rsvd1[8]; 505290650Shselasky __be32 optparam; 506290650Shselasky u8 rsvd0[4]; 507290650Shselasky struct mlx5_qp_context ctx; 508290650Shselasky u8 rsvd2[16]; 509290650Shselasky __be64 pas[0]; 510290650Shselasky}; 511290650Shselasky 512290650Shselaskystruct mlx5_conf_sqp_mbox_in { 513290650Shselasky struct mlx5_inbox_hdr hdr; 514290650Shselasky __be32 qpn; 515290650Shselasky u8 rsvd[3]; 516290650Shselasky u8 type; 517290650Shselasky}; 518290650Shselasky 519290650Shselaskystruct mlx5_conf_sqp_mbox_out { 520290650Shselasky struct mlx5_outbox_hdr hdr; 521290650Shselasky u8 rsvd[8]; 522290650Shselasky}; 523290650Shselasky 524290650Shselaskystatic inline struct mlx5_core_qp *__mlx5_qp_lookup(struct mlx5_core_dev *dev, u32 qpn) 525290650Shselasky{ 526290650Shselasky return radix_tree_lookup(&dev->priv.qp_table.tree, qpn); 527290650Shselasky} 528290650Shselasky 529290650Shselaskystatic inline struct mlx5_core_mr *__mlx5_mr_lookup(struct mlx5_core_dev *dev, u32 key) 530290650Shselasky{ 531290650Shselasky return radix_tree_lookup(&dev->priv.mr_table.tree, key); 532290650Shselasky} 533290650Shselasky 534290650Shselaskyint mlx5_core_create_qp(struct mlx5_core_dev *dev, 535290650Shselasky struct mlx5_core_qp *qp, 536290650Shselasky struct mlx5_create_qp_mbox_in *in, 537290650Shselasky int inlen); 538290650Shselaskyint mlx5_core_qp_modify(struct mlx5_core_dev *dev, enum mlx5_qp_state cur_state, 539290650Shselasky enum mlx5_qp_state new_state, 540290650Shselasky struct mlx5_modify_qp_mbox_in *in, int sqd_event, 541290650Shselasky struct mlx5_core_qp *qp); 542290650Shselaskyint mlx5_core_destroy_qp(struct mlx5_core_dev *dev, 543290650Shselasky struct mlx5_core_qp *qp); 544290650Shselaskyint mlx5_core_qp_query(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp, 545290650Shselasky struct mlx5_query_qp_mbox_out *out, int outlen); 546290650Shselasky 547290650Shselaskyint mlx5_core_xrcd_alloc(struct mlx5_core_dev *dev, u32 *xrcdn); 548290650Shselaskyint mlx5_core_xrcd_dealloc(struct mlx5_core_dev *dev, u32 xrcdn); 549290650Shselaskyvoid mlx5_init_qp_table(struct mlx5_core_dev *dev); 550290650Shselaskyvoid mlx5_cleanup_qp_table(struct mlx5_core_dev *dev); 551290650Shselaskyint mlx5_debug_qp_add(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp); 552290650Shselaskyvoid mlx5_debug_qp_remove(struct mlx5_core_dev *dev, struct mlx5_core_qp *qp); 553290650Shselasky 554290650Shselaskystatic inline const char *mlx5_qp_type_str(int type) 555290650Shselasky{ 556290650Shselasky switch (type) { 557290650Shselasky case MLX5_QP_ST_RC: return "RC"; 558290650Shselasky case MLX5_QP_ST_UC: return "C"; 559290650Shselasky case MLX5_QP_ST_UD: return "UD"; 560290650Shselasky case MLX5_QP_ST_XRC: return "XRC"; 561290650Shselasky case MLX5_QP_ST_MLX: return "MLX"; 562290650Shselasky case MLX5_QP_ST_QP0: return "QP0"; 563290650Shselasky case MLX5_QP_ST_QP1: return "QP1"; 564290650Shselasky case MLX5_QP_ST_RAW_ETHERTYPE: return "RAW_ETHERTYPE"; 565290650Shselasky case MLX5_QP_ST_RAW_IPV6: return "RAW_IPV6"; 566290650Shselasky case MLX5_QP_ST_SNIFFER: return "SNIFFER"; 567290650Shselasky case MLX5_QP_ST_SYNC_UMR: return "SYNC_UMR"; 568290650Shselasky case MLX5_QP_ST_PTP_1588: return "PTP_1588"; 569290650Shselasky case MLX5_QP_ST_REG_UMR: return "REG_UMR"; 570290650Shselasky default: return "Invalid transport type"; 571290650Shselasky } 572290650Shselasky} 573290650Shselasky 574290650Shselaskystatic inline const char *mlx5_qp_state_str(int state) 575290650Shselasky{ 576290650Shselasky switch (state) { 577290650Shselasky case MLX5_QP_STATE_RST: 578290650Shselasky return "RST"; 579290650Shselasky case MLX5_QP_STATE_INIT: 580290650Shselasky return "INIT"; 581290650Shselasky case MLX5_QP_STATE_RTR: 582290650Shselasky return "RTR"; 583290650Shselasky case MLX5_QP_STATE_RTS: 584290650Shselasky return "RTS"; 585290650Shselasky case MLX5_QP_STATE_SQER: 586290650Shselasky return "SQER"; 587290650Shselasky case MLX5_QP_STATE_SQD: 588290650Shselasky return "SQD"; 589290650Shselasky case MLX5_QP_STATE_ERR: 590290650Shselasky return "ERR"; 591290650Shselasky case MLX5_QP_STATE_SQ_DRAINING: 592290650Shselasky return "SQ_DRAINING"; 593290650Shselasky case MLX5_QP_STATE_SUSPENDED: 594290650Shselasky return "SUSPENDED"; 595290650Shselasky default: return "Invalid QP state"; 596290650Shselasky } 597290650Shselasky} 598290650Shselasky 599290650Shselasky#endif /* MLX5_QP_H */ 600