ciphy.c revision 164705 
1/*-
2 * Copyright (c) 2004
3 *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 164705 2006-11-28 00:43:38Z marius $");
35
36/*
37 * Driver for the Cicada CS8201 10/100/1000 copper PHY.
38 */
39
40#include <sys/param.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>
43#include <sys/module.h>
44#include <sys/socket.h>
45#include <sys/bus.h>
46
47
48#include <net/if.h>
49#include <net/if_arp.h>
50#include <net/if_media.h>
51
52#include <dev/mii/mii.h>
53#include <dev/mii/miivar.h>
54#include "miidevs.h"
55
56#include <dev/mii/ciphyreg.h>
57
58#include "miibus_if.h"
59
60#include <machine/bus.h>
61/*
62#include <dev/vge/if_vgereg.h>
63*/
64static int ciphy_probe(device_t);
65static int ciphy_attach(device_t);
66
67static device_method_t ciphy_methods[] = {
68	/* device interface */
69	DEVMETHOD(device_probe,		ciphy_probe),
70	DEVMETHOD(device_attach,	ciphy_attach),
71	DEVMETHOD(device_detach,	mii_phy_detach),
72	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
73	{ 0, 0 }
74};
75
76static devclass_t ciphy_devclass;
77
78static driver_t ciphy_driver = {
79	"ciphy",
80	ciphy_methods,
81	sizeof(struct mii_softc)
82};
83
84DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
85
86static int	ciphy_service(struct mii_softc *, struct mii_data *, int);
87static void	ciphy_status(struct mii_softc *);
88static void	ciphy_reset(struct mii_softc *);
89static void	ciphy_fixup(struct mii_softc *);
90
91static int
92ciphy_probe(device_t dev)
93{
94	struct mii_attach_args *ma;
95
96	ma = device_get_ivars(dev);
97
98	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
99	    MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201) {
100		device_set_desc(dev, MII_STR_CICADA_CS8201);
101		return (BUS_PROBE_DEFAULT);
102	}
103
104	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
105	    MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201A) {
106		device_set_desc(dev, MII_STR_CICADA_CS8201A);
107		return (BUS_PROBE_DEFAULT);
108	}
109
110	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
111	    MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201B) {
112		device_set_desc(dev, MII_STR_CICADA_CS8201B);
113		return (BUS_PROBE_DEFAULT);
114	}
115
116	return (ENXIO);
117}
118
119static int
120ciphy_attach(device_t dev)
121{
122	struct mii_softc *sc;
123	struct mii_attach_args *ma;
124	struct mii_data *mii;
125
126	sc = device_get_softc(dev);
127	ma = device_get_ivars(dev);
128	sc->mii_dev = device_get_parent(dev);
129	mii = device_get_softc(sc->mii_dev);
130	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
131
132	sc->mii_inst = mii->mii_instance;
133	sc->mii_phy = ma->mii_phyno;
134	sc->mii_service = ciphy_service;
135	sc->mii_pdata = mii;
136
137	sc->mii_flags |= MIIF_NOISOLATE;
138	mii->mii_instance++;
139
140	ciphy_reset(sc);
141
142	sc->mii_capabilities =
143	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
144	if (sc->mii_capabilities & BMSR_EXTSTAT)
145		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
146	device_printf(dev, " ");
147	mii_phy_add_media(sc);
148	printf("\n");
149
150	MIIBUS_MEDIAINIT(sc->mii_dev);
151	return (0);
152}
153
154static int
155ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
156{
157	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
158	int reg, speed, gig;
159
160	switch (cmd) {
161	case MII_POLLSTAT:
162		/*
163		 * If we're not polling our PHY instance, just return.
164		 */
165		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
166			return (0);
167		break;
168
169	case MII_MEDIACHG:
170		/*
171		 * If the media indicates a different PHY instance,
172		 * isolate ourselves.
173		 */
174		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
175			reg = PHY_READ(sc, MII_BMCR);
176			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
177			return (0);
178		}
179
180		/*
181		 * If the interface is not up, don't do anything.
182		 */
183		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
184			break;
185
186		ciphy_fixup(sc);	/* XXX hardware bug work-around */
187
188		switch (IFM_SUBTYPE(ife->ifm_media)) {
189		case IFM_AUTO:
190#ifdef foo
191			/*
192			 * If we're already in auto mode, just return.
193			 */
194			if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
195				return (0);
196#endif
197			(void) mii_phy_auto(sc);
198			break;
199		case IFM_1000_T:
200			speed = CIPHY_S1000;
201			goto setit;
202		case IFM_100_TX:
203			speed = CIPHY_S100;
204			goto setit;
205		case IFM_10_T:
206			speed = CIPHY_S10;
207setit:
208			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
209				speed |= CIPHY_BMCR_FDX;
210				gig = CIPHY_1000CTL_AFD;
211			} else {
212				gig = CIPHY_1000CTL_AHD;
213			}
214
215			PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
216			PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
217			PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
218
219			if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
220				break;
221
222			PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
223			PHY_WRITE(sc, CIPHY_MII_BMCR,
224			    speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG);
225
226			/*
227			 * When setting the link manually, one side must
228			 * be the master and the other the slave. However
229			 * ifmedia doesn't give us a good way to specify
230			 * this, so we fake it by using one of the LINK
231			 * flags. If LINK0 is set, we program the PHY to
232			 * be a master, otherwise it's a slave.
233			 */
234			if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
235				PHY_WRITE(sc, CIPHY_MII_1000CTL,
236				    gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC);
237			} else {
238				PHY_WRITE(sc, CIPHY_MII_1000CTL,
239				    gig|CIPHY_1000CTL_MSE);
240			}
241			break;
242		case IFM_NONE:
243			PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
244			break;
245		case IFM_100_T4:
246		default:
247			return (EINVAL);
248		}
249		break;
250
251	case MII_TICK:
252		/*
253		 * If we're not currently selected, just return.
254		 */
255		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
256			return (0);
257
258		/*
259		 * Is the interface even up?
260		 */
261		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
262			return (0);
263
264		/*
265		 * Only used for autonegotiation.
266		 */
267		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
268			break;
269
270		/*
271		 * Check to see if we have link.  If we do, we don't
272		 * need to restart the autonegotiation process.  Read
273		 * the BMSR twice in case it's latched.
274		 */
275		reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
276		if (reg & BMSR_LINK)
277			break;
278
279		/*
280		 * Only retry autonegotiation every 5 seconds.
281		 */
282		if (++sc->mii_ticks <= 5/*10*/)
283			break;
284
285		sc->mii_ticks = 0;
286		mii_phy_auto(sc);
287		return (0);
288	}
289
290	/* Update the media status. */
291	ciphy_status(sc);
292
293	/*
294	 * Callback if something changed. Note that we need to poke
295	 * apply fixups for certain PHY revs.
296	 */
297	if (sc->mii_media_active != mii->mii_media_active ||
298	    sc->mii_media_status != mii->mii_media_status ||
299	    cmd == MII_MEDIACHG) {
300		ciphy_fixup(sc);
301	}
302	mii_phy_update(sc, cmd);
303	return (0);
304}
305
306static void
307ciphy_status(struct mii_softc *sc)
308{
309	struct mii_data *mii = sc->mii_pdata;
310	int bmsr, bmcr;
311
312	mii->mii_media_status = IFM_AVALID;
313	mii->mii_media_active = IFM_ETHER;
314
315	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
316
317	if (bmsr & BMSR_LINK)
318		mii->mii_media_status |= IFM_ACTIVE;
319
320	bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
321
322	if (bmcr & CIPHY_BMCR_LOOP)
323		mii->mii_media_active |= IFM_LOOP;
324
325	if (bmcr & CIPHY_BMCR_AUTOEN) {
326		if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
327			/* Erg, still trying, I guess... */
328			mii->mii_media_active |= IFM_NONE;
329			return;
330		}
331	}
332
333	bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
334	switch (bmsr & CIPHY_AUXCSR_SPEED) {
335	case CIPHY_SPEED10:
336		mii->mii_media_active |= IFM_10_T;
337		break;
338	case CIPHY_SPEED100:
339		mii->mii_media_active |= IFM_100_TX;
340		break;
341	case CIPHY_SPEED1000:
342		mii->mii_media_active |= IFM_1000_T;
343		break;
344	default:
345		device_printf(sc->mii_dev, "unknown PHY speed %x\n",
346		    bmsr & CIPHY_AUXCSR_SPEED);
347		break;
348	}
349
350	if (bmsr & CIPHY_AUXCSR_FDX)
351		mii->mii_media_active |= IFM_FDX;
352
353	return;
354}
355
356static void
357ciphy_reset(struct mii_softc *sc)
358{
359	mii_phy_reset(sc);
360	DELAY(1000);
361
362	return;
363}
364
365#define PHY_SETBIT(x, y, z) \
366	PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
367#define PHY_CLRBIT(x, y, z) \
368	PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
369
370static void
371ciphy_fixup(struct mii_softc *sc)
372{
373	uint16_t		model;
374	uint16_t		status, speed;
375
376	model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
377	status = PHY_READ(sc, CIPHY_MII_AUXCSR);
378	speed = status & CIPHY_AUXCSR_SPEED;
379
380	switch (model) {
381	case MII_MODEL_CICADA_CS8201:
382
383		/* Turn off "aux mode" (whatever that means) */
384		PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
385
386		/*
387		 * Work around speed polling bug in VT3119/VT3216
388		 * when using MII in full duplex mode.
389		 */
390		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
391		    (status & CIPHY_AUXCSR_FDX)) {
392			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
393		} else {
394			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
395		}
396
397		/* Enable link/activity LED blink. */
398		PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
399
400		break;
401
402	case MII_MODEL_CICADA_CS8201A:
403	case MII_MODEL_CICADA_CS8201B:
404
405		/*
406		 * Work around speed polling bug in VT3119/VT3216
407		 * when using MII in full duplex mode.
408		 */
409		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
410		    (status & CIPHY_AUXCSR_FDX)) {
411			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
412		} else {
413			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
414		}
415
416		break;
417	default:
418		device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
419		    model);
420		break;
421	}
422
423	return;
424}
425