ciphy.c revision 160076 
1/*-
2 * Copyright (c) 2004
3 *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/mii/ciphy.c 160076 2006-07-03 02:53:40Z yongari $
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/dev/mii/ciphy.c 160076 2006-07-03 02:53:40Z yongari $");
37
38/*
39 * Driver for the Cicada CS8201 10/100/1000 copper PHY.
40 */
41
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/kernel.h>
45#include <sys/module.h>
46#include <sys/socket.h>
47#include <sys/bus.h>
48
49
50#include <net/if.h>
51#include <net/if_arp.h>
52#include <net/if_media.h>
53
54#include <dev/mii/mii.h>
55#include <dev/mii/miivar.h>
56#include "miidevs.h"
57
58#include <dev/mii/ciphyreg.h>
59
60#include "miibus_if.h"
61
62#include <machine/bus.h>
63/*
64#include <dev/vge/if_vgereg.h>
65*/
66static int ciphy_probe(device_t);
67static int ciphy_attach(device_t);
68
69static device_method_t ciphy_methods[] = {
70	/* device interface */
71	DEVMETHOD(device_probe,		ciphy_probe),
72	DEVMETHOD(device_attach,	ciphy_attach),
73	DEVMETHOD(device_detach,	mii_phy_detach),
74	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
75	{ 0, 0 }
76};
77
78static devclass_t ciphy_devclass;
79
80static driver_t ciphy_driver = {
81	"ciphy",
82	ciphy_methods,
83	sizeof(struct mii_softc)
84};
85
86DRIVER_MODULE(ciphy, miibus, ciphy_driver, ciphy_devclass, 0, 0);
87
88static int	ciphy_service(struct mii_softc *, struct mii_data *, int);
89static void	ciphy_status(struct mii_softc *);
90static void	ciphy_reset(struct mii_softc *);
91static void	ciphy_fixup(struct mii_softc *);
92
93static int
94ciphy_probe(device_t dev)
95{
96	struct mii_attach_args *ma;
97
98	ma = device_get_ivars(dev);
99
100	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
101	    MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201) {
102		device_set_desc(dev, MII_STR_CICADA_CS8201);
103		return(BUS_PROBE_DEFAULT);
104	}
105
106	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
107	    MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201A) {
108		device_set_desc(dev, MII_STR_CICADA_CS8201A);
109		return(BUS_PROBE_DEFAULT);
110	}
111
112	if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_CICADA &&
113	    MII_MODEL(ma->mii_id2) == MII_MODEL_CICADA_CS8201B) {
114		device_set_desc(dev, MII_STR_CICADA_CS8201B);
115		return(BUS_PROBE_DEFAULT);
116	}
117
118	return(ENXIO);
119}
120
121static int
122ciphy_attach(device_t dev)
123{
124	struct mii_softc *sc;
125	struct mii_attach_args *ma;
126	struct mii_data *mii;
127
128	sc = device_get_softc(dev);
129	ma = device_get_ivars(dev);
130	sc->mii_dev = device_get_parent(dev);
131	mii = device_get_softc(sc->mii_dev);
132	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
133
134	sc->mii_inst = mii->mii_instance;
135	sc->mii_phy = ma->mii_phyno;
136	sc->mii_service = ciphy_service;
137	sc->mii_pdata = mii;
138
139	sc->mii_flags |= MIIF_NOISOLATE;
140	mii->mii_instance++;
141
142	ciphy_reset(sc);
143
144	sc->mii_capabilities =
145	    PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
146	if (sc->mii_capabilities & BMSR_EXTSTAT)
147		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
148	device_printf(dev, " ");
149	mii_phy_add_media(sc);
150	printf("\n");
151
152	MIIBUS_MEDIAINIT(sc->mii_dev);
153	return(0);
154}
155
156static int
157ciphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
158{
159	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
160	int reg, speed, gig;
161
162	switch (cmd) {
163	case MII_POLLSTAT:
164		/*
165		 * If we're not polling our PHY instance, just return.
166		 */
167		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
168			return (0);
169		break;
170
171	case MII_MEDIACHG:
172		/*
173		 * If the media indicates a different PHY instance,
174		 * isolate ourselves.
175		 */
176		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
177			reg = PHY_READ(sc, MII_BMCR);
178			PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
179			return (0);
180		}
181
182		/*
183		 * If the interface is not up, don't do anything.
184		 */
185		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
186			break;
187
188		ciphy_fixup(sc);	/* XXX hardware bug work-around */
189
190		switch (IFM_SUBTYPE(ife->ifm_media)) {
191		case IFM_AUTO:
192#ifdef foo
193			/*
194			 * If we're already in auto mode, just return.
195			 */
196			if (PHY_READ(sc, CIPHY_MII_BMCR) & CIPHY_BMCR_AUTOEN)
197				return (0);
198#endif
199			(void) mii_phy_auto(sc);
200			break;
201		case IFM_1000_T:
202			speed = CIPHY_S1000;
203			goto setit;
204		case IFM_100_TX:
205			speed = CIPHY_S100;
206			goto setit;
207		case IFM_10_T:
208			speed = CIPHY_S10;
209setit:
210			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
211				speed |= CIPHY_BMCR_FDX;
212				gig = CIPHY_1000CTL_AFD;
213			} else {
214				gig = CIPHY_1000CTL_AHD;
215			}
216
217			PHY_WRITE(sc, CIPHY_MII_1000CTL, 0);
218			PHY_WRITE(sc, CIPHY_MII_BMCR, speed);
219			PHY_WRITE(sc, CIPHY_MII_ANAR, CIPHY_SEL_TYPE);
220
221			if (IFM_SUBTYPE(ife->ifm_media) != IFM_1000_T)
222				break;
223
224			PHY_WRITE(sc, CIPHY_MII_1000CTL, gig);
225			PHY_WRITE(sc, CIPHY_MII_BMCR,
226			    speed|CIPHY_BMCR_AUTOEN|CIPHY_BMCR_STARTNEG);
227
228			/*
229			 * When setting the link manually, one side must
230			 * be the master and the other the slave. However
231			 * ifmedia doesn't give us a good way to specify
232			 * this, so we fake it by using one of the LINK
233			 * flags. If LINK0 is set, we program the PHY to
234			 * be a master, otherwise it's a slave.
235			 */
236			if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
237				PHY_WRITE(sc, CIPHY_MII_1000CTL,
238				    gig|CIPHY_1000CTL_MSE|CIPHY_1000CTL_MSC);
239			} else {
240				PHY_WRITE(sc, CIPHY_MII_1000CTL,
241				    gig|CIPHY_1000CTL_MSE);
242			}
243			break;
244		case IFM_NONE:
245			PHY_WRITE(sc, MII_BMCR, BMCR_ISO|BMCR_PDOWN);
246			break;
247		case IFM_100_T4:
248		default:
249			return (EINVAL);
250		}
251		break;
252
253	case MII_TICK:
254		/*
255		 * If we're not currently selected, just return.
256		 */
257		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
258			return (0);
259
260		/*
261		 * Is the interface even up?
262		 */
263		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
264			return (0);
265
266		/*
267		 * Only used for autonegotiation.
268		 */
269		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
270			break;
271
272		/*
273		 * Check to see if we have link.  If we do, we don't
274		 * need to restart the autonegotiation process.  Read
275		 * the BMSR twice in case it's latched.
276		 */
277		reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
278		if (reg & BMSR_LINK)
279			break;
280
281		/*
282		 * Only retry autonegotiation every 5 seconds.
283		 */
284		if (++sc->mii_ticks <= 5/*10*/)
285			break;
286
287		sc->mii_ticks = 0;
288		mii_phy_auto(sc);
289		return (0);
290	}
291
292	/* Update the media status. */
293	ciphy_status(sc);
294
295	/*
296	 * Callback if something changed. Note that we need to poke
297	 * apply fixups for certain PHY revs.
298	 */
299	if (sc->mii_media_active != mii->mii_media_active ||
300	    sc->mii_media_status != mii->mii_media_status ||
301	    cmd == MII_MEDIACHG) {
302		ciphy_fixup(sc);
303	}
304	mii_phy_update(sc, cmd);
305	return (0);
306}
307
308static void
309ciphy_status(struct mii_softc *sc)
310{
311	struct mii_data *mii = sc->mii_pdata;
312	int bmsr, bmcr;
313
314	mii->mii_media_status = IFM_AVALID;
315	mii->mii_media_active = IFM_ETHER;
316
317	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
318
319	if (bmsr & BMSR_LINK)
320		mii->mii_media_status |= IFM_ACTIVE;
321
322	bmcr = PHY_READ(sc, CIPHY_MII_BMCR);
323
324	if (bmcr & CIPHY_BMCR_LOOP)
325		mii->mii_media_active |= IFM_LOOP;
326
327	if (bmcr & CIPHY_BMCR_AUTOEN) {
328		if ((bmsr & CIPHY_BMSR_ACOMP) == 0) {
329			/* Erg, still trying, I guess... */
330			mii->mii_media_active |= IFM_NONE;
331			return;
332		}
333	}
334
335	bmsr = PHY_READ(sc, CIPHY_MII_AUXCSR);
336	switch (bmsr & CIPHY_AUXCSR_SPEED) {
337	case CIPHY_SPEED10:
338		mii->mii_media_active |= IFM_10_T;
339		break;
340	case CIPHY_SPEED100:
341		mii->mii_media_active |= IFM_100_TX;
342		break;
343	case CIPHY_SPEED1000:
344		mii->mii_media_active |= IFM_1000_T;
345		break;
346	default:
347		device_printf(sc->mii_dev, "unknown PHY speed %x\n",
348		    bmsr & CIPHY_AUXCSR_SPEED);
349		break;
350	}
351
352	if (bmsr & CIPHY_AUXCSR_FDX)
353		mii->mii_media_active |= IFM_FDX;
354
355	return;
356}
357
358static void
359ciphy_reset(struct mii_softc *sc)
360{
361	mii_phy_reset(sc);
362	DELAY(1000);
363
364	return;
365}
366
367#define PHY_SETBIT(x, y, z) \
368	PHY_WRITE(x, y, (PHY_READ(x, y) | (z)))
369#define PHY_CLRBIT(x, y, z) \
370	PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z)))
371
372static void
373ciphy_fixup(struct mii_softc *sc)
374{
375	uint16_t		model;
376	uint16_t		status, speed;
377
378	model = MII_MODEL(PHY_READ(sc, CIPHY_MII_PHYIDR2));
379	status = PHY_READ(sc, CIPHY_MII_AUXCSR);
380	speed = status & CIPHY_AUXCSR_SPEED;
381
382	switch (model) {
383	case MII_MODEL_CICADA_CS8201:
384
385		/* Turn off "aux mode" (whatever that means) */
386		PHY_SETBIT(sc, CIPHY_MII_AUXCSR, CIPHY_AUXCSR_MDPPS);
387
388		/*
389		 * Work around speed polling bug in VT3119/VT3216
390		 * when using MII in full duplex mode.
391		 */
392		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
393		    (status & CIPHY_AUXCSR_FDX)) {
394			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
395		} else {
396			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
397		}
398
399		/* Enable link/activity LED blink. */
400		PHY_SETBIT(sc, CIPHY_MII_LED, CIPHY_LED_LINKACTBLINK);
401
402		break;
403
404	case MII_MODEL_CICADA_CS8201A:
405	case MII_MODEL_CICADA_CS8201B:
406
407		/*
408		 * Work around speed polling bug in VT3119/VT3216
409		 * when using MII in full duplex mode.
410		 */
411		if ((speed == CIPHY_SPEED10 || speed == CIPHY_SPEED100) &&
412		    (status & CIPHY_AUXCSR_FDX)) {
413			PHY_SETBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
414		} else {
415			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
416		}
417
418		break;
419	default:
420		device_printf(sc->mii_dev, "unknown CICADA PHY model %x\n",
421		    model);
422		break;
423	}
424
425	return;
426}
427