mfivar.h revision 247369
1/*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26/*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53#ifndef _MFIVAR_H 54#define _MFIVAR_H 55 56#include <sys/cdefs.h> 57__FBSDID("$FreeBSD: head/sys/dev/mfi/mfivar.h 247369 2013-02-27 02:21:10Z smh $"); 58 59#include <sys/lock.h> 60#include <sys/sx.h> 61 62#include <sys/types.h> 63#include <sys/taskqueue.h> 64#include "opt_mfi.h" 65 66/* 67 * SCSI structures and definitions are used from here, but no linking 68 * requirements are made to CAM. 69 */ 70#include <cam/scsi/scsi_all.h> 71 72struct mfi_hwcomms { 73 uint32_t hw_pi; 74 uint32_t hw_ci; 75 uint32_t hw_reply_q[1]; 76}; 77#define MEGASAS_MAX_NAME 32 78#define MEGASAS_VERSION "4.23" 79 80struct mfi_softc; 81struct disk; 82struct ccb_hdr; 83 84struct mfi_command { 85 TAILQ_ENTRY(mfi_command) cm_link; 86 time_t cm_timestamp; 87 struct mfi_softc *cm_sc; 88 union mfi_frame *cm_frame; 89 bus_addr_t cm_frame_busaddr; 90 struct mfi_sense *cm_sense; 91 bus_addr_t cm_sense_busaddr; 92 bus_dmamap_t cm_dmamap; 93 union mfi_sgl *cm_sg; 94 void *cm_data; 95 int cm_len; 96 int cm_stp_len; 97 int cm_total_frame_size; 98 int cm_extra_frames; 99 int cm_flags; 100#define MFI_CMD_MAPPED (1<<0) 101#define MFI_CMD_DATAIN (1<<1) 102#define MFI_CMD_DATAOUT (1<<2) 103#define MFI_CMD_COMPLETED (1<<3) 104#define MFI_CMD_POLLED (1<<4) 105#define MFI_CMD_SCSI (1<<5) 106#define MFI_CMD_CCB (1<<6) 107#define MFI_CMD_TBOLT (1<<7) 108#define MFI_ON_MFIQ_FREE (1<<8) 109#define MFI_ON_MFIQ_READY (1<<9) 110#define MFI_ON_MFIQ_BUSY (1<<10) 111#define MFI_ON_MFIQ_MASK (MFI_ON_MFIQ_FREE | MFI_ON_MFIQ_READY| \ 112 MFI_ON_MFIQ_BUSY) 113#define MFI_CMD_FLAGS_FMT "\20" \ 114 "\1MAPPED" \ 115 "\2DATAIN" \ 116 "\3DATAOUT" \ 117 "\4COMPLETED" \ 118 "\5POLLED" \ 119 "\6SCSI" \ 120 "\7TBOLT" \ 121 "\10Q_FREE" \ 122 "\11Q_READY" \ 123 "\12Q_BUSY" 124 uint8_t retry_for_fw_reset; 125 void (* cm_complete)(struct mfi_command *cm); 126 void *cm_private; 127 int cm_index; 128 int cm_error; 129}; 130 131struct mfi_disk { 132 TAILQ_ENTRY(mfi_disk) ld_link; 133 device_t ld_dev; 134 int ld_id; 135 int ld_unit; 136 struct mfi_softc *ld_controller; 137 struct mfi_ld_info *ld_info; 138 struct disk *ld_disk; 139 int ld_flags; 140#define MFI_DISK_FLAGS_OPEN 0x01 141#define MFI_DISK_FLAGS_DISABLED 0x02 142}; 143 144struct mfi_disk_pending { 145 TAILQ_ENTRY(mfi_disk_pending) ld_link; 146 int ld_id; 147}; 148 149struct mfi_system_pd { 150 TAILQ_ENTRY(mfi_system_pd) pd_link; 151 device_t pd_dev; 152 int pd_id; 153 int pd_unit; 154 struct mfi_softc *pd_controller; 155 struct mfi_pd_info *pd_info; 156 struct disk *pd_disk; 157 int pd_flags; 158}; 159 160struct mfi_system_pending { 161 TAILQ_ENTRY(mfi_system_pending) pd_link; 162 int pd_id; 163}; 164 165struct mfi_evt_queue_elm { 166 TAILQ_ENTRY(mfi_evt_queue_elm) link; 167 struct mfi_evt_detail detail; 168}; 169 170struct mfi_aen { 171 TAILQ_ENTRY(mfi_aen) aen_link; 172 struct proc *p; 173}; 174 175struct mfi_skinny_dma_info { 176 bus_dma_tag_t dmat[514]; 177 bus_dmamap_t dmamap[514]; 178 uint32_t mem[514]; 179 int noofmaps; 180}; 181 182struct megasas_sge 183{ 184 bus_addr_t phys_addr; 185 uint32_t length; 186}; 187 188struct mfi_cmd_tbolt; 189 190struct mfi_softc { 191 device_t mfi_dev; 192 int mfi_flags; 193#define MFI_FLAGS_SG64 (1<<0) 194#define MFI_FLAGS_QFRZN (1<<1) 195#define MFI_FLAGS_OPEN (1<<2) 196#define MFI_FLAGS_STOP (1<<3) 197#define MFI_FLAGS_1064R (1<<4) 198#define MFI_FLAGS_1078 (1<<5) 199#define MFI_FLAGS_GEN2 (1<<6) 200#define MFI_FLAGS_SKINNY (1<<7) 201#define MFI_FLAGS_TBOLT (1<<8) 202 // Start: LSIP200113393 203 bus_dma_tag_t verbuf_h_dmat; 204 bus_dmamap_t verbuf_h_dmamap; 205 bus_addr_t verbuf_h_busaddr; 206 uint32_t *verbuf; 207 void *kbuff_arr[MAX_IOCTL_SGE]; 208 bus_dma_tag_t mfi_kbuff_arr_dmat[2]; 209 bus_dmamap_t mfi_kbuff_arr_dmamap[2]; 210 bus_addr_t mfi_kbuff_arr_busaddr[2]; 211 212 struct mfi_hwcomms *mfi_comms; 213 TAILQ_HEAD(,mfi_command) mfi_free; 214 TAILQ_HEAD(,mfi_command) mfi_ready; 215 TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy; 216 struct bio_queue_head mfi_bioq; 217 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 218 219 struct resource *mfi_regs_resource; 220 bus_space_handle_t mfi_bhandle; 221 bus_space_tag_t mfi_btag; 222 int mfi_regs_rid; 223 224 bus_dma_tag_t mfi_parent_dmat; 225 bus_dma_tag_t mfi_buffer_dmat; 226 227 bus_dma_tag_t mfi_comms_dmat; 228 bus_dmamap_t mfi_comms_dmamap; 229 bus_addr_t mfi_comms_busaddr; 230 231 bus_dma_tag_t mfi_frames_dmat; 232 bus_dmamap_t mfi_frames_dmamap; 233 bus_addr_t mfi_frames_busaddr; 234 union mfi_frame *mfi_frames; 235 236 bus_dma_tag_t mfi_tb_init_dmat; 237 bus_dmamap_t mfi_tb_init_dmamap; 238 bus_addr_t mfi_tb_init_busaddr; 239 bus_addr_t mfi_tb_ioc_init_busaddr; 240 union mfi_frame *mfi_tb_init; 241 242 TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue; 243 struct task mfi_evt_task; 244 struct task mfi_map_sync_task; 245 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 246 struct mfi_command *mfi_aen_cm; 247 struct mfi_command *mfi_skinny_cm; 248 struct mfi_command *mfi_map_sync_cm; 249 int cm_aen_abort; 250 int cm_map_abort; 251 uint32_t mfi_aen_triggered; 252 uint32_t mfi_poll_waiting; 253 uint32_t mfi_boot_seq_num; 254 struct selinfo mfi_select; 255 int mfi_delete_busy_volumes; 256 int mfi_keep_deleted_volumes; 257 int mfi_detaching; 258 259 bus_dma_tag_t mfi_sense_dmat; 260 bus_dmamap_t mfi_sense_dmamap; 261 bus_addr_t mfi_sense_busaddr; 262 struct mfi_sense *mfi_sense; 263 264 struct resource *mfi_irq; 265 void *mfi_intr; 266 int mfi_irq_rid; 267 268 struct intr_config_hook mfi_ich; 269 eventhandler_tag eh; 270 /* OCR flags */ 271 uint8_t adpreset; 272 uint8_t issuepend_done; 273 uint8_t disableOnlineCtrlReset; 274 uint32_t mfiStatus; 275 uint32_t last_seq_num; 276 uint32_t volatile hw_crit_error; 277 278 /* 279 * Allocation for the command array. Used as an indexable array to 280 * recover completed commands. 281 */ 282 struct mfi_command *mfi_commands; 283 /* 284 * How many commands the firmware can handle. Also how big the reply 285 * queue is, minus 1. 286 */ 287 int mfi_max_fw_cmds; 288 /* 289 * How many S/G elements we'll ever actually use 290 */ 291 int mfi_max_sge; 292 /* 293 * How many bytes a compound frame is, including all of the extra frames 294 * that are used for S/G elements. 295 */ 296 int mfi_cmd_size; 297 /* 298 * How large an S/G element is. Used to calculate the number of single 299 * frames in a command. 300 */ 301 int mfi_sge_size; 302 /* 303 * Max number of sectors that the firmware allows 304 */ 305 uint32_t mfi_max_io; 306 307 TAILQ_HEAD(,mfi_disk) mfi_ld_tqh; 308 TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh; 309 TAILQ_HEAD(,mfi_disk_pending) mfi_ld_pend_tqh; 310 TAILQ_HEAD(,mfi_system_pending) mfi_syspd_pend_tqh; 311 eventhandler_tag mfi_eh; 312 struct cdev *mfi_cdev; 313 314 TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq; 315 struct mfi_command * (* mfi_cam_start)(void *); 316 void (*mfi_cam_rescan_cb)(struct mfi_softc *, 317 uint32_t); 318 struct callout mfi_watchdog_callout; 319 struct mtx mfi_io_lock; 320 struct sx mfi_config_lock; 321 322 /* Controller type specific interfaces */ 323 void (*mfi_enable_intr)(struct mfi_softc *sc); 324 void (*mfi_disable_intr)(struct mfi_softc *sc); 325 int32_t (*mfi_read_fw_status)(struct mfi_softc *sc); 326 int (*mfi_check_clear_intr)(struct mfi_softc *sc); 327 void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add, 328 uint32_t frame_cnt); 329 int (*mfi_adp_reset)(struct mfi_softc *sc); 330 int (*mfi_adp_check_reset)(struct mfi_softc *sc); 331 void (*mfi_intr_ptr)(void *sc); 332 333 /* ThunderBolt */ 334 uint32_t mfi_tbolt; 335 uint32_t MFA_enabled; 336 /* Single Reply structure size */ 337 uint16_t reply_size; 338 /* Singler message size. */ 339 uint16_t raid_io_msg_size; 340 TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh; 341 /* ThunderBolt base contiguous memory mapping. */ 342 bus_dma_tag_t mfi_tb_dmat; 343 bus_dmamap_t mfi_tb_dmamap; 344 bus_addr_t mfi_tb_busaddr; 345 /* ThunderBolt Contiguous DMA memory Mapping */ 346 uint8_t * request_message_pool; 347 uint8_t * request_message_pool_align; 348 uint8_t * request_desc_pool; 349 bus_addr_t request_msg_busaddr; 350 bus_addr_t reply_frame_busaddr; 351 bus_addr_t sg_frame_busaddr; 352 /* ThunderBolt IOC Init Descriptor */ 353 bus_dma_tag_t mfi_tb_ioc_init_dmat; 354 bus_dmamap_t mfi_tb_ioc_init_dmamap; 355 uint8_t * mfi_tb_ioc_init_desc; 356 struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt; 357 /* Virtual address of reply Frame Pool */ 358 struct mfi_mpi2_reply_header* reply_frame_pool; 359 struct mfi_mpi2_reply_header* reply_frame_pool_align; 360 361 /* Last reply frame address */ 362 uint8_t * reply_pool_limit; 363 uint16_t last_reply_idx; 364 uint8_t max_SGEs_in_chain_message; 365 uint8_t max_SGEs_in_main_message; 366 uint8_t chain_offset_value_for_main_message; 367 uint8_t chain_offset_value_for_mpt_ptmsg; 368}; 369 370union desc_value { 371 uint64_t word; 372 struct { 373 uint32_t low; 374 uint32_t high; 375 }u; 376}; 377 378// TODO find the right definition 379#define XXX_MFI_CMD_OP_INIT2 0x9 380/* 381 * Request descriptor types 382 */ 383#define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7 384#define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1 385#define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1 386#define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14 387#define MFI_LOAD_BALANCE_FLAG 0x1 388#define MFI_DCMD_MBOX_PEND_FLAG 0x1 389 390//#define MR_PROT_INFO_TYPE_CONTROLLER 0x08 391#define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f 392#define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9 393#define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB 394#define MEGASAS_SCSI_ADDL_CDB_LEN 0x18 395#define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20 396#define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60 397#define MEGASAS_EEDPBLOCKSIZE 512 398struct mfi_cmd_tbolt { 399 union mfi_mpi2_request_descriptor *request_desc; 400 struct mfi_mpi2_request_raid_scsi_io *io_request; 401 bus_addr_t io_request_phys_addr; 402 bus_addr_t sg_frame_phys_addr; 403 bus_addr_t sense_phys_addr; 404 MPI2_SGE_IO_UNION *sg_frame; 405 uint8_t *sense; 406 TAILQ_ENTRY(mfi_cmd_tbolt) next; 407 /* 408 * Context for a MFI frame. 409 * Used to get the mfi cmd from list when a MFI cmd is completed 410 */ 411 uint32_t sync_cmd_idx; 412 uint16_t index; 413 uint8_t status; 414}; 415 416extern int mfi_attach(struct mfi_softc *); 417extern void mfi_free(struct mfi_softc *); 418extern int mfi_shutdown(struct mfi_softc *); 419extern void mfi_startio(struct mfi_softc *); 420extern void mfi_disk_complete(struct bio *); 421extern int mfi_disk_disable(struct mfi_disk *); 422extern void mfi_disk_enable(struct mfi_disk *); 423extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 424extern int mfi_syspd_disable(struct mfi_system_pd *); 425extern void mfi_syspd_enable(struct mfi_system_pd *); 426extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *, 427 int); 428extern int mfi_transition_firmware(struct mfi_softc *sc); 429extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start); 430extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm); 431extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm); 432extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm); 433extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *); 434extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *); 435extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *); 436extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *); 437extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t); 438extern void mfi_tbolt_init_globals(struct mfi_softc*); 439extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *); 440extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t); 441extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *); 442extern void mfi_intr_tbolt(void *arg); 443extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc); 444extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm); 445extern int mfi_tbolt_adp_reset(struct mfi_softc *sc); 446extern int mfi_tbolt_reset(struct mfi_softc *sc); 447extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc); 448extern void mfi_handle_map_sync(void *context, int pending); 449extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **, 450 uint32_t, void **, size_t); 451extern int mfi_build_cdb(int, uint8_t, u_int64_t, u_int32_t, uint8_t *); 452 453#define MFIQ_ADD(sc, qname) \ 454 do { \ 455 struct mfi_qstat *qs; \ 456 \ 457 qs = &(sc)->mfi_qstat[qname]; \ 458 qs->q_length++; \ 459 if (qs->q_length > qs->q_max) \ 460 qs->q_max = qs->q_length; \ 461 } while (0) 462 463#define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 464 465#define MFIQ_INIT(sc, qname) \ 466 do { \ 467 sc->mfi_qstat[qname].q_length = 0; \ 468 sc->mfi_qstat[qname].q_max = 0; \ 469 } while (0) 470 471#define MFIQ_COMMAND_QUEUE(name, index) \ 472 static __inline void \ 473 mfi_initq_ ## name (struct mfi_softc *sc) \ 474 { \ 475 TAILQ_INIT(&sc->mfi_ ## name); \ 476 MFIQ_INIT(sc, index); \ 477 } \ 478 static __inline void \ 479 mfi_enqueue_ ## name (struct mfi_command *cm) \ 480 { \ 481 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 482 panic("command %p is on another queue, " \ 483 "flags = %#x\n", cm, cm->cm_flags); \ 484 } \ 485 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 486 cm->cm_flags |= MFI_ON_ ## index; \ 487 MFIQ_ADD(cm->cm_sc, index); \ 488 } \ 489 static __inline void \ 490 mfi_requeue_ ## name (struct mfi_command *cm) \ 491 { \ 492 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 493 panic("command %p is on another queue, " \ 494 "flags = %#x\n", cm, cm->cm_flags); \ 495 } \ 496 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 497 cm->cm_flags |= MFI_ON_ ## index; \ 498 MFIQ_ADD(cm->cm_sc, index); \ 499 } \ 500 static __inline struct mfi_command * \ 501 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 502 { \ 503 struct mfi_command *cm; \ 504 \ 505 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 506 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 507 panic("command %p not in queue, " \ 508 "flags = %#x, bit = %#x\n", cm, \ 509 cm->cm_flags, MFI_ON_ ## index); \ 510 } \ 511 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 512 cm->cm_flags &= ~MFI_ON_ ## index; \ 513 MFIQ_REMOVE(sc, index); \ 514 } \ 515 return (cm); \ 516 } \ 517 static __inline void \ 518 mfi_remove_ ## name (struct mfi_command *cm) \ 519 { \ 520 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 521 panic("command %p not in queue, flags = %#x, " \ 522 "bit = %#x\n", cm, cm->cm_flags, \ 523 MFI_ON_ ## index); \ 524 } \ 525 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 526 cm->cm_flags &= ~MFI_ON_ ## index; \ 527 MFIQ_REMOVE(cm->cm_sc, index); \ 528 } \ 529struct hack 530 531MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 532MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 533MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 534 535static __inline void 536mfi_initq_bio(struct mfi_softc *sc) 537{ 538 bioq_init(&sc->mfi_bioq); 539 MFIQ_INIT(sc, MFIQ_BIO); 540} 541 542static __inline void 543mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 544{ 545 bioq_insert_tail(&sc->mfi_bioq, bp); 546 MFIQ_ADD(sc, MFIQ_BIO); 547} 548 549static __inline struct bio * 550mfi_dequeue_bio(struct mfi_softc *sc) 551{ 552 struct bio *bp; 553 554 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 555 bioq_remove(&sc->mfi_bioq, bp); 556 MFIQ_REMOVE(sc, MFIQ_BIO); 557 } 558 return (bp); 559} 560 561/* 562 * This is from the original scsi_extract_sense() in CAM. It's copied 563 * here because CAM now uses a non-inline version that follows more complex 564 * additions to the SPC spec, and we don't want to force a dependency on 565 * the CAM module for such a trivial action. 566 */ 567static __inline void 568mfi_extract_sense(struct scsi_sense_data_fixed *sense, 569 int *error_code, int *sense_key, int *asc, int *ascq) 570{ 571 572 *error_code = sense->error_code & SSD_ERRCODE; 573 *sense_key = sense->flags & SSD_KEY; 574 *asc = (sense->extra_len >= 5) ? sense->add_sense_code : 0; 575 *ascq = (sense->extra_len >= 6) ? sense->add_sense_code_qual : 0; 576} 577 578static __inline void 579mfi_print_sense(struct mfi_softc *sc, void *sense) 580{ 581 int error, key, asc, ascq; 582 583 mfi_extract_sense((struct scsi_sense_data_fixed *)sense, 584 &error, &key, &asc, &ascq); 585 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 586 "asc %d, ascq %d\n", error, key, asc, ascq); 587} 588 589 590#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 591 sc->mfi_bhandle, (reg), (val)) 592#define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 593 (sc)->mfi_bhandle, (reg)) 594#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 595 sc->mfi_bhandle, (reg), (val)) 596#define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 597 (sc)->mfi_bhandle, (reg)) 598#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 599 sc->mfi_bhandle, (reg), (val)) 600#define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 601 (sc)->mfi_bhandle, (reg)) 602 603MALLOC_DECLARE(M_MFIBUF); 604SYSCTL_DECL(_hw_mfi); 605 606#define MFI_RESET_WAIT_TIME 180 607#define MFI_CMD_TIMEOUT 30 608#define MFI_SYS_PD_IO 0 609#define MFI_LD_IO 1 610#define MFI_SKINNY_MEMORY 0x02000000 611#define MFI_MAXPHYS (128 * 1024) 612 613#ifdef MFI_DEBUG 614extern void mfi_print_cmd(struct mfi_command *cm); 615extern void mfi_dump_cmds(struct mfi_softc *sc); 616extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, 617 const char *, int); 618#define MFI_PRINT_CMD(cm) mfi_print_cmd(cm) 619#define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc) 620#define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__) 621#else 622#define MFI_PRINT_CMD(cm) 623#define MFI_DUMP_CMDS(sc) 624#define MFI_VALIDATE_CMD(sc, cm) 625#endif 626 627extern void mfi_release_command(struct mfi_command *); 628extern void mfi_tbolt_return_cmd(struct mfi_softc *, 629 struct mfi_cmd_tbolt *, struct mfi_command *); 630 631#endif /* _MFIVAR_H */ 632