mfivar.h revision 246713
1/*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26/*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 */ 52 53#ifndef _MFIVAR_H 54#define _MFIVAR_H 55 56#include <sys/cdefs.h> 57__FBSDID("$FreeBSD: head/sys/dev/mfi/mfivar.h 246713 2013-02-12 16:57:20Z kib $"); 58 59#include <sys/lock.h> 60#include <sys/sx.h> 61 62#include <sys/types.h> 63#include <sys/taskqueue.h> 64#include "opt_mfi.h" 65 66/* 67 * SCSI structures and definitions are used from here, but no linking 68 * requirements are made to CAM. 69 */ 70#include <cam/scsi/scsi_all.h> 71 72struct mfi_hwcomms { 73 uint32_t hw_pi; 74 uint32_t hw_ci; 75 uint32_t hw_reply_q[1]; 76}; 77#define MEGASAS_MAX_NAME 32 78#define MEGASAS_VERSION "4.23" 79 80struct mfi_softc; 81struct disk; 82struct ccb_hdr; 83 84struct mfi_command { 85 TAILQ_ENTRY(mfi_command) cm_link; 86 time_t cm_timestamp; 87 struct mfi_softc *cm_sc; 88 union mfi_frame *cm_frame; 89 bus_addr_t cm_frame_busaddr; 90 struct mfi_sense *cm_sense; 91 bus_addr_t cm_sense_busaddr; 92 bus_dmamap_t cm_dmamap; 93 union mfi_sgl *cm_sg; 94 void *cm_data; 95 int cm_len; 96 int cm_stp_len; 97 int cm_total_frame_size; 98 int cm_extra_frames; 99 int cm_flags; 100#define MFI_CMD_MAPPED (1<<0) 101#define MFI_CMD_DATAIN (1<<1) 102#define MFI_CMD_DATAOUT (1<<2) 103#define MFI_CMD_COMPLETED (1<<3) 104#define MFI_CMD_POLLED (1<<4) 105#define MFI_ON_MFIQ_FREE (1<<5) 106#define MFI_ON_MFIQ_READY (1<<6) 107#define MFI_ON_MFIQ_BUSY (1<<7) 108#define MFI_ON_MFIQ_MASK ((1<<5)|(1<<6)|(1<<7)) 109#define MFI_CMD_SCSI (1<<8) 110#define MFI_CMD_CCB (1<<9) 111 uint8_t retry_for_fw_reset; 112 void (* cm_complete)(struct mfi_command *cm); 113 void *cm_private; 114 int cm_index; 115 int cm_error; 116}; 117 118struct mfi_disk { 119 TAILQ_ENTRY(mfi_disk) ld_link; 120 device_t ld_dev; 121 int ld_id; 122 int ld_unit; 123 struct mfi_softc *ld_controller; 124 struct mfi_ld_info *ld_info; 125 struct disk *ld_disk; 126 int ld_flags; 127#define MFI_DISK_FLAGS_OPEN 0x01 128#define MFI_DISK_FLAGS_DISABLED 0x02 129}; 130 131struct mfi_disk_pending { 132 TAILQ_ENTRY(mfi_disk_pending) ld_link; 133 int ld_id; 134}; 135 136struct mfi_system_pd { 137 TAILQ_ENTRY(mfi_system_pd) pd_link; 138 device_t pd_dev; 139 int pd_id; 140 int pd_unit; 141 struct mfi_softc *pd_controller; 142 struct mfi_pd_info *pd_info; 143 struct disk *pd_disk; 144 int pd_flags; 145}; 146 147struct mfi_system_pending { 148 TAILQ_ENTRY(mfi_system_pending) pd_link; 149 int pd_id; 150}; 151 152struct mfi_evt_queue_elm { 153 TAILQ_ENTRY(mfi_evt_queue_elm) link; 154 struct mfi_evt_detail detail; 155}; 156 157struct mfi_aen { 158 TAILQ_ENTRY(mfi_aen) aen_link; 159 struct proc *p; 160}; 161 162struct mfi_skinny_dma_info { 163 bus_dma_tag_t dmat[514]; 164 bus_dmamap_t dmamap[514]; 165 uint32_t mem[514]; 166 int noofmaps; 167}; 168 169struct megasas_sge 170{ 171 bus_addr_t phys_addr; 172 uint32_t length; 173}; 174 175struct mfi_cmd_tbolt; 176 177struct mfi_softc { 178 device_t mfi_dev; 179 int mfi_flags; 180#define MFI_FLAGS_SG64 (1<<0) 181#define MFI_FLAGS_QFRZN (1<<1) 182#define MFI_FLAGS_OPEN (1<<2) 183#define MFI_FLAGS_STOP (1<<3) 184#define MFI_FLAGS_1064R (1<<4) 185#define MFI_FLAGS_1078 (1<<5) 186#define MFI_FLAGS_GEN2 (1<<6) 187#define MFI_FLAGS_SKINNY (1<<7) 188#define MFI_FLAGS_TBOLT (1<<8) 189 // Start: LSIP200113393 190 bus_dma_tag_t verbuf_h_dmat; 191 bus_dmamap_t verbuf_h_dmamap; 192 bus_addr_t verbuf_h_busaddr; 193 uint32_t *verbuf; 194 void *kbuff_arr[MAX_IOCTL_SGE]; 195 bus_dma_tag_t mfi_kbuff_arr_dmat[2]; 196 bus_dmamap_t mfi_kbuff_arr_dmamap[2]; 197 bus_addr_t mfi_kbuff_arr_busaddr[2]; 198 199 struct mfi_hwcomms *mfi_comms; 200 TAILQ_HEAD(,mfi_command) mfi_free; 201 TAILQ_HEAD(,mfi_command) mfi_ready; 202 TAILQ_HEAD(BUSYQ,mfi_command) mfi_busy; 203 struct bio_queue_head mfi_bioq; 204 struct mfi_qstat mfi_qstat[MFIQ_COUNT]; 205 206 struct resource *mfi_regs_resource; 207 bus_space_handle_t mfi_bhandle; 208 bus_space_tag_t mfi_btag; 209 int mfi_regs_rid; 210 211 bus_dma_tag_t mfi_parent_dmat; 212 bus_dma_tag_t mfi_buffer_dmat; 213 214 bus_dma_tag_t mfi_comms_dmat; 215 bus_dmamap_t mfi_comms_dmamap; 216 bus_addr_t mfi_comms_busaddr; 217 218 bus_dma_tag_t mfi_frames_dmat; 219 bus_dmamap_t mfi_frames_dmamap; 220 bus_addr_t mfi_frames_busaddr; 221 union mfi_frame *mfi_frames; 222 223 bus_dma_tag_t mfi_tb_init_dmat; 224 bus_dmamap_t mfi_tb_init_dmamap; 225 bus_addr_t mfi_tb_init_busaddr; 226 bus_addr_t mfi_tb_ioc_init_busaddr; 227 union mfi_frame *mfi_tb_init; 228 229 TAILQ_HEAD(,mfi_evt_queue_elm) mfi_evt_queue; 230 struct task mfi_evt_task; 231 struct task mfi_map_sync_task; 232 TAILQ_HEAD(,mfi_aen) mfi_aen_pids; 233 struct mfi_command *mfi_aen_cm; 234 struct mfi_command *mfi_skinny_cm; 235 struct mfi_command *mfi_map_sync_cm; 236 int cm_aen_abort; 237 int cm_map_abort; 238 uint32_t mfi_aen_triggered; 239 uint32_t mfi_poll_waiting; 240 uint32_t mfi_boot_seq_num; 241 struct selinfo mfi_select; 242 int mfi_delete_busy_volumes; 243 int mfi_keep_deleted_volumes; 244 int mfi_detaching; 245 246 bus_dma_tag_t mfi_sense_dmat; 247 bus_dmamap_t mfi_sense_dmamap; 248 bus_addr_t mfi_sense_busaddr; 249 struct mfi_sense *mfi_sense; 250 251 struct resource *mfi_irq; 252 void *mfi_intr; 253 int mfi_irq_rid; 254 255 struct intr_config_hook mfi_ich; 256 eventhandler_tag eh; 257 /* OCR flags */ 258 uint8_t adpreset; 259 uint8_t issuepend_done; 260 uint8_t disableOnlineCtrlReset; 261 uint32_t mfiStatus; 262 uint32_t last_seq_num; 263 uint32_t volatile hw_crit_error; 264 265 /* 266 * Allocation for the command array. Used as an indexable array to 267 * recover completed commands. 268 */ 269 struct mfi_command *mfi_commands; 270 /* 271 * How many commands were actually allocated 272 */ 273 int mfi_total_cmds; 274 /* 275 * How many commands the firmware can handle. Also how big the reply 276 * queue is, minus 1. 277 */ 278 int mfi_max_fw_cmds; 279 /* 280 * How many S/G elements we'll ever actually use 281 */ 282 int mfi_max_sge; 283 /* 284 * How many bytes a compound frame is, including all of the extra frames 285 * that are used for S/G elements. 286 */ 287 int mfi_cmd_size; 288 /* 289 * How large an S/G element is. Used to calculate the number of single 290 * frames in a command. 291 */ 292 int mfi_sge_size; 293 /* 294 * Max number of sectors that the firmware allows 295 */ 296 uint32_t mfi_max_io; 297 298 TAILQ_HEAD(,mfi_disk) mfi_ld_tqh; 299 TAILQ_HEAD(,mfi_system_pd) mfi_syspd_tqh; 300 TAILQ_HEAD(,mfi_disk_pending) mfi_ld_pend_tqh; 301 TAILQ_HEAD(,mfi_system_pending) mfi_syspd_pend_tqh; 302 eventhandler_tag mfi_eh; 303 struct cdev *mfi_cdev; 304 305 TAILQ_HEAD(, ccb_hdr) mfi_cam_ccbq; 306 struct mfi_command * (* mfi_cam_start)(void *); 307 void (*mfi_cam_rescan_cb)(struct mfi_softc *, 308 uint32_t); 309 struct callout mfi_watchdog_callout; 310 struct mtx mfi_io_lock; 311 struct sx mfi_config_lock; 312 313 /* Controller type specific interfaces */ 314 void (*mfi_enable_intr)(struct mfi_softc *sc); 315 void (*mfi_disable_intr)(struct mfi_softc *sc); 316 int32_t (*mfi_read_fw_status)(struct mfi_softc *sc); 317 int (*mfi_check_clear_intr)(struct mfi_softc *sc); 318 void (*mfi_issue_cmd)(struct mfi_softc *sc, bus_addr_t bus_add, 319 uint32_t frame_cnt); 320 int (*mfi_adp_reset)(struct mfi_softc *sc); 321 int (*mfi_adp_check_reset)(struct mfi_softc *sc); 322 void (*mfi_intr_ptr)(void *sc); 323 324 /* ThunderBolt */ 325 uint32_t mfi_tbolt; 326 uint32_t MFA_enabled; 327 /* Single Reply structure size */ 328 uint16_t reply_size; 329 /* Singler message size. */ 330 uint16_t raid_io_msg_size; 331 TAILQ_HEAD(TB, mfi_cmd_tbolt) mfi_cmd_tbolt_tqh; 332 /* ThunderBolt base contiguous memory mapping. */ 333 bus_dma_tag_t mfi_tb_dmat; 334 bus_dmamap_t mfi_tb_dmamap; 335 bus_addr_t mfi_tb_busaddr; 336 /* ThunderBolt Contiguous DMA memory Mapping */ 337 uint8_t * request_message_pool; 338 uint8_t * request_message_pool_align; 339 uint8_t * request_desc_pool; 340 bus_addr_t request_msg_busaddr; 341 bus_addr_t reply_frame_busaddr; 342 bus_addr_t sg_frame_busaddr; 343 /* ThunderBolt IOC Init Descriptor */ 344 bus_dma_tag_t mfi_tb_ioc_init_dmat; 345 bus_dmamap_t mfi_tb_ioc_init_dmamap; 346 uint8_t * mfi_tb_ioc_init_desc; 347 struct mfi_cmd_tbolt **mfi_cmd_pool_tbolt; 348 /* Virtual address of reply Frame Pool */ 349 struct mfi_mpi2_reply_header* reply_frame_pool; 350 struct mfi_mpi2_reply_header* reply_frame_pool_align; 351 352 /* Last reply frame address */ 353 uint8_t * reply_pool_limit; 354 uint16_t last_reply_idx; 355 uint8_t max_SGEs_in_chain_message; 356 uint8_t max_SGEs_in_main_message; 357 uint8_t chain_offset_value_for_main_message; 358 uint8_t chain_offset_value_for_mpt_ptmsg; 359}; 360 361union desc_value { 362 uint64_t word; 363 struct { 364 uint32_t low; 365 uint32_t high; 366 }u; 367}; 368 369// TODO find the right definition 370#define XXX_MFI_CMD_OP_INIT2 0x9 371/* 372 * Request descriptor types 373 */ 374#define MFI_REQ_DESCRIPT_FLAGS_LD_IO 0x7 375#define MFI_REQ_DESCRIPT_FLAGS_MFA 0x1 376#define MFI_REQ_DESCRIPT_FLAGS_TYPE_SHIFT 0x1 377#define MFI_FUSION_FP_DEFAULT_TIMEOUT 0x14 378#define MFI_LOAD_BALANCE_FLAG 0x1 379#define MFI_DCMD_MBOX_PEND_FLAG 0x1 380 381//#define MR_PROT_INFO_TYPE_CONTROLLER 0x08 382#define MEGASAS_SCSI_VARIABLE_LENGTH_CMD 0x7f 383#define MEGASAS_SCSI_SERVICE_ACTION_READ32 0x9 384#define MEGASAS_SCSI_SERVICE_ACTION_WRITE32 0xB 385#define MEGASAS_SCSI_ADDL_CDB_LEN 0x18 386#define MEGASAS_RD_WR_PROTECT_CHECK_ALL 0x20 387#define MEGASAS_RD_WR_PROTECT_CHECK_NONE 0x60 388#define MEGASAS_EEDPBLOCKSIZE 512 389struct mfi_cmd_tbolt { 390 union mfi_mpi2_request_descriptor *request_desc; 391 struct mfi_mpi2_request_raid_scsi_io *io_request; 392 bus_addr_t io_request_phys_addr; 393 bus_addr_t sg_frame_phys_addr; 394 bus_addr_t sense_phys_addr; 395 MPI2_SGE_IO_UNION *sg_frame; 396 uint8_t *sense; 397 TAILQ_ENTRY(mfi_cmd_tbolt) next; 398 /* 399 * Context for a MFI frame. 400 * Used to get the mfi cmd from list when a MFI cmd is completed 401 */ 402 uint32_t sync_cmd_idx; 403 uint16_t index; 404 uint8_t status; 405}; 406 407extern int mfi_attach(struct mfi_softc *); 408extern void mfi_free(struct mfi_softc *); 409extern int mfi_shutdown(struct mfi_softc *); 410extern void mfi_startio(struct mfi_softc *); 411extern void mfi_disk_complete(struct bio *); 412extern int mfi_disk_disable(struct mfi_disk *); 413extern void mfi_disk_enable(struct mfi_disk *); 414extern int mfi_dump_blocks(struct mfi_softc *, int id, uint64_t, void *, int); 415extern int mfi_syspd_disable(struct mfi_system_pd *); 416extern void mfi_syspd_enable(struct mfi_system_pd *); 417extern int mfi_dump_syspd_blocks(struct mfi_softc *, int id, uint64_t, void *, 418 int); 419extern int mfi_transition_firmware(struct mfi_softc *sc); 420extern int mfi_aen_setup(struct mfi_softc *sc, uint32_t seq_start); 421extern void mfi_complete(struct mfi_softc *sc, struct mfi_command *cm); 422extern int mfi_mapcmd(struct mfi_softc *sc,struct mfi_command *cm); 423extern int mfi_wait_command(struct mfi_softc *sc, struct mfi_command *cm); 424extern void mfi_tbolt_enable_intr_ppc(struct mfi_softc *); 425extern void mfi_tbolt_disable_intr_ppc(struct mfi_softc *); 426extern int32_t mfi_tbolt_read_fw_status_ppc(struct mfi_softc *); 427extern int32_t mfi_tbolt_check_clear_intr_ppc(struct mfi_softc *); 428extern void mfi_tbolt_issue_cmd_ppc(struct mfi_softc *, bus_addr_t, uint32_t); 429extern void mfi_tbolt_init_globals(struct mfi_softc*); 430extern uint32_t mfi_tbolt_get_memory_requirement(struct mfi_softc *); 431extern int mfi_tbolt_init_desc_pool(struct mfi_softc *, uint8_t *, uint32_t); 432extern int mfi_tbolt_init_MFI_queue(struct mfi_softc *); 433extern void mfi_intr_tbolt(void *arg); 434extern int mfi_tbolt_alloc_cmd(struct mfi_softc *sc); 435extern int mfi_tbolt_send_frame(struct mfi_softc *sc, struct mfi_command *cm); 436extern int mfi_tbolt_adp_reset(struct mfi_softc *sc); 437extern int mfi_tbolt_reset(struct mfi_softc *sc); 438extern void mfi_tbolt_sync_map_info(struct mfi_softc *sc); 439extern void mfi_handle_map_sync(void *context, int pending); 440extern int mfi_dcmd_command(struct mfi_softc *, struct mfi_command **, 441 uint32_t, void **, size_t); 442extern int mfi_build_cdb(int, uint8_t, u_int64_t, u_int32_t, uint8_t *); 443 444#define MFIQ_ADD(sc, qname) \ 445 do { \ 446 struct mfi_qstat *qs; \ 447 \ 448 qs = &(sc)->mfi_qstat[qname]; \ 449 qs->q_length++; \ 450 if (qs->q_length > qs->q_max) \ 451 qs->q_max = qs->q_length; \ 452 } while (0) 453 454#define MFIQ_REMOVE(sc, qname) (sc)->mfi_qstat[qname].q_length-- 455 456#define MFIQ_INIT(sc, qname) \ 457 do { \ 458 sc->mfi_qstat[qname].q_length = 0; \ 459 sc->mfi_qstat[qname].q_max = 0; \ 460 } while (0) 461 462#define MFIQ_COMMAND_QUEUE(name, index) \ 463 static __inline void \ 464 mfi_initq_ ## name (struct mfi_softc *sc) \ 465 { \ 466 TAILQ_INIT(&sc->mfi_ ## name); \ 467 MFIQ_INIT(sc, index); \ 468 } \ 469 static __inline void \ 470 mfi_enqueue_ ## name (struct mfi_command *cm) \ 471 { \ 472 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 473 printf("command %p is on another queue, " \ 474 "flags = %#x\n", cm, cm->cm_flags); \ 475 panic("command is on another queue"); \ 476 } \ 477 TAILQ_INSERT_TAIL(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 478 cm->cm_flags |= MFI_ON_ ## index; \ 479 MFIQ_ADD(cm->cm_sc, index); \ 480 } \ 481 static __inline void \ 482 mfi_requeue_ ## name (struct mfi_command *cm) \ 483 { \ 484 if ((cm->cm_flags & MFI_ON_MFIQ_MASK) != 0) { \ 485 printf("command %p is on another queue, " \ 486 "flags = %#x\n", cm, cm->cm_flags); \ 487 panic("command is on another queue"); \ 488 } \ 489 TAILQ_INSERT_HEAD(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 490 cm->cm_flags |= MFI_ON_ ## index; \ 491 MFIQ_ADD(cm->cm_sc, index); \ 492 } \ 493 static __inline struct mfi_command * \ 494 mfi_dequeue_ ## name (struct mfi_softc *sc) \ 495 { \ 496 struct mfi_command *cm; \ 497 \ 498 if ((cm = TAILQ_FIRST(&sc->mfi_ ## name)) != NULL) { \ 499 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 500 printf("command %p not in queue, " \ 501 "flags = %#x, bit = %#x\n", cm, \ 502 cm->cm_flags, MFI_ON_ ## index); \ 503 panic("command not in queue"); \ 504 } \ 505 TAILQ_REMOVE(&sc->mfi_ ## name, cm, cm_link); \ 506 cm->cm_flags &= ~MFI_ON_ ## index; \ 507 MFIQ_REMOVE(sc, index); \ 508 } \ 509 return (cm); \ 510 } \ 511 static __inline void \ 512 mfi_remove_ ## name (struct mfi_command *cm) \ 513 { \ 514 if ((cm->cm_flags & MFI_ON_ ## index) == 0) { \ 515 printf("command %p not in queue, flags = %#x, " \ 516 "bit = %#x\n", cm, cm->cm_flags, \ 517 MFI_ON_ ## index); \ 518 panic("command not in queue"); \ 519 } \ 520 TAILQ_REMOVE(&cm->cm_sc->mfi_ ## name, cm, cm_link); \ 521 cm->cm_flags &= ~MFI_ON_ ## index; \ 522 MFIQ_REMOVE(cm->cm_sc, index); \ 523 } \ 524struct hack 525 526MFIQ_COMMAND_QUEUE(free, MFIQ_FREE); 527MFIQ_COMMAND_QUEUE(ready, MFIQ_READY); 528MFIQ_COMMAND_QUEUE(busy, MFIQ_BUSY); 529 530static __inline void 531mfi_initq_bio(struct mfi_softc *sc) 532{ 533 bioq_init(&sc->mfi_bioq); 534 MFIQ_INIT(sc, MFIQ_BIO); 535} 536 537static __inline void 538mfi_enqueue_bio(struct mfi_softc *sc, struct bio *bp) 539{ 540 bioq_insert_tail(&sc->mfi_bioq, bp); 541 MFIQ_ADD(sc, MFIQ_BIO); 542} 543 544static __inline struct bio * 545mfi_dequeue_bio(struct mfi_softc *sc) 546{ 547 struct bio *bp; 548 549 if ((bp = bioq_first(&sc->mfi_bioq)) != NULL) { 550 bioq_remove(&sc->mfi_bioq, bp); 551 MFIQ_REMOVE(sc, MFIQ_BIO); 552 } 553 return (bp); 554} 555 556/* 557 * This is from the original scsi_extract_sense() in CAM. It's copied 558 * here because CAM now uses a non-inline version that follows more complex 559 * additions to the SPC spec, and we don't want to force a dependency on 560 * the CAM module for such a trivial action. 561 */ 562static __inline void 563mfi_extract_sense(struct scsi_sense_data_fixed *sense, 564 int *error_code, int *sense_key, int *asc, int *ascq) 565{ 566 567 *error_code = sense->error_code & SSD_ERRCODE; 568 *sense_key = sense->flags & SSD_KEY; 569 *asc = (sense->extra_len >= 5) ? sense->add_sense_code : 0; 570 *ascq = (sense->extra_len >= 6) ? sense->add_sense_code_qual : 0; 571} 572 573static __inline void 574mfi_print_sense(struct mfi_softc *sc, void *sense) 575{ 576 int error, key, asc, ascq; 577 578 mfi_extract_sense((struct scsi_sense_data_fixed *)sense, 579 &error, &key, &asc, &ascq); 580 device_printf(sc->mfi_dev, "sense error %d, sense_key %d, " 581 "asc %d, ascq %d\n", error, key, asc, ascq); 582} 583 584 585#define MFI_WRITE4(sc, reg, val) bus_space_write_4((sc)->mfi_btag, \ 586 sc->mfi_bhandle, (reg), (val)) 587#define MFI_READ4(sc, reg) bus_space_read_4((sc)->mfi_btag, \ 588 (sc)->mfi_bhandle, (reg)) 589#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \ 590 sc->mfi_bhandle, (reg), (val)) 591#define MFI_READ2(sc, reg) bus_space_read_2((sc)->mfi_btag, \ 592 (sc)->mfi_bhandle, (reg)) 593#define MFI_WRITE1(sc, reg, val) bus_space_write_1((sc)->mfi_btag, \ 594 sc->mfi_bhandle, (reg), (val)) 595#define MFI_READ1(sc, reg) bus_space_read_1((sc)->mfi_btag, \ 596 (sc)->mfi_bhandle, (reg)) 597 598MALLOC_DECLARE(M_MFIBUF); 599SYSCTL_DECL(_hw_mfi); 600 601#define MFI_RESET_WAIT_TIME 180 602#define MFI_CMD_TIMEOUT 30 603#define MFI_SYS_PD_IO 0 604#define MFI_LD_IO 1 605#define MFI_SKINNY_MEMORY 0x02000000 606#define MFI_MAXPHYS (128 * 1024) 607 608#ifdef MFI_DEBUG 609extern void mfi_print_cmd(struct mfi_command *cm); 610extern void mfi_dump_cmds(struct mfi_softc *sc); 611extern void mfi_validate_sg(struct mfi_softc *, struct mfi_command *, const char *, int ); 612#define MFI_PRINT_CMD(cm) mfi_print_cmd(cm) 613#define MFI_DUMP_CMDS(sc) mfi_dump_cmds(sc) 614#define MFI_VALIDATE_CMD(sc, cm) mfi_validate_sg(sc, cm, __FUNCTION__, __LINE__) 615#else 616#define MFI_PRINT_CMD(cm) 617#define MFI_DUMP_CMDS(sc) 618#define MFI_VALIDATE_CMD(sc, cm) 619#endif 620 621extern void mfi_release_command(struct mfi_command *cm); 622 623#endif /* _MFIVAR_H */ 624