1177595Sweongyo/*- 2177595Sweongyo * Copyright (c) 2008 Weongyo Jeong <weongyo@freebsd.org> 3177595Sweongyo * Copyright (c) 2007 Marvell Semiconductor, Inc. 4177595Sweongyo * Copyright (c) 2007 Sam Leffler, Errno Consulting 5177595Sweongyo * All rights reserved. 6177595Sweongyo * 7177595Sweongyo * Redistribution and use in source and binary forms, with or without 8177595Sweongyo * modification, are permitted provided that the following conditions 9177595Sweongyo * are met: 10177595Sweongyo * 1. Redistributions of source code must retain the above copyright 11177595Sweongyo * notice, this list of conditions and the following disclaimer, 12177595Sweongyo * without modification. 13177595Sweongyo * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14177595Sweongyo * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15177595Sweongyo * redistribution must be conditioned upon including a substantially 16177595Sweongyo * similar Disclaimer requirement for further binary redistribution. 17177595Sweongyo * 18177595Sweongyo * NO WARRANTY 19177595Sweongyo * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20177595Sweongyo * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21177595Sweongyo * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 22177595Sweongyo * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 23177595Sweongyo * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 24177595Sweongyo * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25177595Sweongyo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26177595Sweongyo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 27177595Sweongyo * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28177595Sweongyo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 29177595Sweongyo * THE POSSIBILITY OF SUCH DAMAGES. 30177595Sweongyo */ 31177595Sweongyo 32177595Sweongyo#include <sys/cdefs.h> 33177595Sweongyo#ifdef __FreeBSD__ 34177595Sweongyo__FBSDID("$FreeBSD: releng/10.3/sys/dev/malo/if_malo.c 278808 2015-02-15 20:02:29Z marius $"); 35177595Sweongyo#endif 36177595Sweongyo 37178354Ssam#include "opt_malo.h" 38178354Ssam 39177595Sweongyo#include <sys/param.h> 40177595Sweongyo#include <sys/endian.h> 41177595Sweongyo#include <sys/kernel.h> 42177595Sweongyo#include <sys/socket.h> 43177595Sweongyo#include <sys/sockio.h> 44177595Sweongyo#include <sys/sysctl.h> 45177595Sweongyo#include <sys/taskqueue.h> 46177595Sweongyo 47177595Sweongyo#include <machine/bus.h> 48177595Sweongyo#include <sys/bus.h> 49177595Sweongyo 50177595Sweongyo#include <net/if.h> 51177595Sweongyo#include <net/if_dl.h> 52177595Sweongyo#include <net/if_media.h> 53177595Sweongyo#include <net/if_types.h> 54177595Sweongyo#include <net/ethernet.h> 55177595Sweongyo 56177595Sweongyo#include <net80211/ieee80211_var.h> 57177595Sweongyo#include <net80211/ieee80211_regdomain.h> 58177595Sweongyo 59177595Sweongyo#include <net/bpf.h> 60177595Sweongyo 61177595Sweongyo#include <dev/malo/if_malo.h> 62177595Sweongyo 63177595SweongyoSYSCTL_NODE(_hw, OID_AUTO, malo, CTLFLAG_RD, 0, 64177595Sweongyo "Marvell 88w8335 driver parameters"); 65177595Sweongyo 66177595Sweongyostatic int malo_txcoalesce = 8; /* # tx pkts to q before poking f/w*/ 67177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txcoalesce, CTLFLAG_RW, &malo_txcoalesce, 68177595Sweongyo 0, "tx buffers to send at once"); 69177595SweongyoTUNABLE_INT("hw.malo.txcoalesce", &malo_txcoalesce); 70177595Sweongyostatic int malo_rxbuf = MALO_RXBUF; /* # rx buffers to allocate */ 71177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxbuf, CTLFLAG_RW, &malo_rxbuf, 72177595Sweongyo 0, "rx buffers allocated"); 73177595SweongyoTUNABLE_INT("hw.malo.rxbuf", &malo_rxbuf); 74177595Sweongyostatic int malo_rxquota = MALO_RXBUF; /* # max buffers to process */ 75177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, rxquota, CTLFLAG_RW, &malo_rxquota, 76177595Sweongyo 0, "max rx buffers to process per interrupt"); 77177595SweongyoTUNABLE_INT("hw.malo.rxquota", &malo_rxquota); 78177595Sweongyostatic int malo_txbuf = MALO_TXBUF; /* # tx buffers to allocate */ 79177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, txbuf, CTLFLAG_RW, &malo_txbuf, 80177595Sweongyo 0, "tx buffers allocated"); 81177595SweongyoTUNABLE_INT("hw.malo.txbuf", &malo_txbuf); 82177595Sweongyo 83177595Sweongyo#ifdef MALO_DEBUG 84177595Sweongyostatic int malo_debug = 0; 85177595SweongyoSYSCTL_INT(_hw_malo, OID_AUTO, debug, CTLFLAG_RW, &malo_debug, 86177595Sweongyo 0, "control debugging printfs"); 87177595SweongyoTUNABLE_INT("hw.malo.debug", &malo_debug); 88177595Sweongyoenum { 89177595Sweongyo MALO_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 90177595Sweongyo MALO_DEBUG_XMIT_DESC = 0x00000002, /* xmit descriptors */ 91177595Sweongyo MALO_DEBUG_RECV = 0x00000004, /* basic recv operation */ 92177595Sweongyo MALO_DEBUG_RECV_DESC = 0x00000008, /* recv descriptors */ 93177595Sweongyo MALO_DEBUG_RESET = 0x00000010, /* reset processing */ 94177595Sweongyo MALO_DEBUG_INTR = 0x00000040, /* ISR */ 95177595Sweongyo MALO_DEBUG_TX_PROC = 0x00000080, /* tx ISR proc */ 96177595Sweongyo MALO_DEBUG_RX_PROC = 0x00000100, /* rx ISR proc */ 97177595Sweongyo MALO_DEBUG_STATE = 0x00000400, /* 802.11 state transitions */ 98177595Sweongyo MALO_DEBUG_NODE = 0x00000800, /* node management */ 99177595Sweongyo MALO_DEBUG_RECV_ALL = 0x00001000, /* trace all frames (beacons) */ 100177595Sweongyo MALO_DEBUG_FW = 0x00008000, /* firmware */ 101177595Sweongyo MALO_DEBUG_ANY = 0xffffffff 102177595Sweongyo}; 103177595Sweongyo#define IS_BEACON(wh) \ 104177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK | \ 105177595Sweongyo IEEE80211_FC0_SUBTYPE_MASK)) == \ 106177595Sweongyo (IEEE80211_FC0_TYPE_MGT|IEEE80211_FC0_SUBTYPE_BEACON)) 107177595Sweongyo#define IFF_DUMPPKTS_RECV(sc, wh) \ 108177595Sweongyo (((sc->malo_debug & MALO_DEBUG_RECV) && \ 109177595Sweongyo ((sc->malo_debug & MALO_DEBUG_RECV_ALL) || !IS_BEACON(wh))) || \ 110177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) == \ 111177595Sweongyo (IFF_DEBUG|IFF_LINK2)) 112177595Sweongyo#define IFF_DUMPPKTS_XMIT(sc) \ 113177595Sweongyo ((sc->malo_debug & MALO_DEBUG_XMIT) || \ 114177595Sweongyo (sc->malo_ifp->if_flags & (IFF_DEBUG | IFF_LINK2)) == \ 115177595Sweongyo (IFF_DEBUG | IFF_LINK2)) 116177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 117177595Sweongyo if (sc->malo_debug & (m)) \ 118177595Sweongyo printf(fmt, __VA_ARGS__); \ 119177595Sweongyo} while (0) 120177595Sweongyo#else 121177595Sweongyo#define DPRINTF(sc, m, fmt, ...) do { \ 122177595Sweongyo (void) sc; \ 123177595Sweongyo} while (0) 124177595Sweongyo#endif 125177595Sweongyo 126227293Sedstatic MALLOC_DEFINE(M_MALODEV, "malodev", "malo driver dma buffers"); 127177595Sweongyo 128228621Sbschmidtstatic struct ieee80211vap *malo_vap_create(struct ieee80211com *, 129228621Sbschmidt const char [IFNAMSIZ], int, enum ieee80211_opmode, int, 130228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN], 131228621Sbschmidt const uint8_t [IEEE80211_ADDR_LEN]); 132178354Ssamstatic void malo_vap_delete(struct ieee80211vap *); 133177595Sweongyostatic int malo_dma_setup(struct malo_softc *); 134177595Sweongyostatic int malo_setup_hwdma(struct malo_softc *); 135177595Sweongyostatic void malo_txq_init(struct malo_softc *, struct malo_txq *, int); 136177595Sweongyostatic void malo_tx_cleanupq(struct malo_softc *, struct malo_txq *); 137177595Sweongyostatic void malo_start(struct ifnet *); 138199559Sjhbstatic void malo_watchdog(void *); 139177595Sweongyostatic int malo_ioctl(struct ifnet *, u_long, caddr_t); 140177595Sweongyostatic void malo_updateslot(struct ifnet *); 141178354Ssamstatic int malo_newstate(struct ieee80211vap *, enum ieee80211_state, int); 142177595Sweongyostatic void malo_scan_start(struct ieee80211com *); 143177595Sweongyostatic void malo_scan_end(struct ieee80211com *); 144177595Sweongyostatic void malo_set_channel(struct ieee80211com *); 145177595Sweongyostatic int malo_raw_xmit(struct ieee80211_node *, struct mbuf *, 146177595Sweongyo const struct ieee80211_bpf_params *); 147177595Sweongyostatic void malo_sysctlattach(struct malo_softc *); 148177595Sweongyostatic void malo_announce(struct malo_softc *); 149177595Sweongyostatic void malo_dma_cleanup(struct malo_softc *); 150177595Sweongyostatic void malo_stop_locked(struct ifnet *, int); 151177595Sweongyostatic int malo_chan_set(struct malo_softc *, struct ieee80211_channel *); 152177595Sweongyostatic int malo_mode_init(struct malo_softc *); 153177595Sweongyostatic void malo_tx_proc(void *, int); 154177595Sweongyostatic void malo_rx_proc(void *, int); 155177595Sweongyostatic void malo_init(void *); 156177595Sweongyo 157177595Sweongyo/* 158177595Sweongyo * Read/Write shorthands for accesses to BAR 0. Note that all BAR 1 159177595Sweongyo * operations are done in the "hal" except getting H/W MAC address at 160177595Sweongyo * malo_attach and there should be no reference to them here. 161177595Sweongyo */ 162177595Sweongyostatic uint32_t 163177595Sweongyomalo_bar0_read4(struct malo_softc *sc, bus_size_t off) 164177595Sweongyo{ 165177595Sweongyo return bus_space_read_4(sc->malo_io0t, sc->malo_io0h, off); 166177595Sweongyo} 167177595Sweongyo 168177595Sweongyostatic void 169177595Sweongyomalo_bar0_write4(struct malo_softc *sc, bus_size_t off, uint32_t val) 170177595Sweongyo{ 171205843Simp DPRINTF(sc, MALO_DEBUG_FW, "%s: off 0x%jx val 0x%x\n", 172278808Smarius __func__, (uintmax_t)off, val); 173177595Sweongyo 174177595Sweongyo bus_space_write_4(sc->malo_io0t, sc->malo_io0h, off, val); 175177595Sweongyo} 176177595Sweongyo 177177595Sweongyoint 178177595Sweongyomalo_attach(uint16_t devid, struct malo_softc *sc) 179177595Sweongyo{ 180190526Ssam int error; 181178354Ssam struct ieee80211com *ic; 182177595Sweongyo struct ifnet *ifp; 183177595Sweongyo struct malo_hal *mh; 184177595Sweongyo uint8_t bands; 185177595Sweongyo 186178354Ssam ifp = sc->malo_ifp = if_alloc(IFT_IEEE80211); 187177595Sweongyo if (ifp == NULL) { 188177595Sweongyo device_printf(sc->malo_dev, "can not if_alloc()\n"); 189177595Sweongyo return ENOSPC; 190177595Sweongyo } 191178354Ssam ic = ifp->if_l2com; 192177595Sweongyo 193177595Sweongyo MALO_LOCK_INIT(sc); 194199559Sjhb callout_init_mtx(&sc->malo_watchdog_timer, &sc->malo_mtx, 0); 195177595Sweongyo 196177595Sweongyo /* set these up early for if_printf use */ 197177595Sweongyo if_initname(ifp, device_get_name(sc->malo_dev), 198177595Sweongyo device_get_unit(sc->malo_dev)); 199177595Sweongyo 200177595Sweongyo mh = malo_hal_attach(sc->malo_dev, devid, 201177595Sweongyo sc->malo_io1h, sc->malo_io1t, sc->malo_dmat); 202177595Sweongyo if (mh == NULL) { 203177595Sweongyo if_printf(ifp, "unable to attach HAL\n"); 204177595Sweongyo error = EIO; 205177595Sweongyo goto bad; 206177595Sweongyo } 207177595Sweongyo sc->malo_mh = mh; 208177595Sweongyo 209178354Ssam /* 210178354Ssam * Load firmware so we can get setup. We arbitrarily pick station 211178354Ssam * firmware; we'll re-load firmware as needed so setting up 212178354Ssam * the wrong mode isn't a big deal. 213178354Ssam */ 214178354Ssam error = malo_hal_fwload(mh, "malo8335-h", "malo8335-m"); 215178354Ssam if (error != 0) { 216178354Ssam if_printf(ifp, "unable to setup firmware\n"); 217178354Ssam goto bad1; 218178354Ssam } 219178354Ssam /* XXX gethwspecs() extracts correct informations? not maybe! */ 220178354Ssam error = malo_hal_gethwspecs(mh, &sc->malo_hwspecs); 221178354Ssam if (error != 0) { 222178354Ssam if_printf(ifp, "unable to fetch h/w specs\n"); 223178354Ssam goto bad1; 224178354Ssam } 225178354Ssam 226178354Ssam DPRINTF(sc, MALO_DEBUG_FW, 227178354Ssam "malo_hal_gethwspecs: hwversion 0x%x hostif 0x%x" 228178354Ssam "maxnum_wcb 0x%x maxnum_mcaddr 0x%x maxnum_tx_wcb 0x%x" 229178354Ssam "regioncode 0x%x num_antenna 0x%x fw_releasenum 0x%x" 230178354Ssam "wcbbase0 0x%x rxdesc_read 0x%x rxdesc_write 0x%x" 231178354Ssam "ul_fw_awakecookie 0x%x w[4] = %x %x %x %x", 232178354Ssam sc->malo_hwspecs.hwversion, 233178354Ssam sc->malo_hwspecs.hostinterface, sc->malo_hwspecs.maxnum_wcb, 234178354Ssam sc->malo_hwspecs.maxnum_mcaddr, sc->malo_hwspecs.maxnum_tx_wcb, 235178354Ssam sc->malo_hwspecs.regioncode, sc->malo_hwspecs.num_antenna, 236178354Ssam sc->malo_hwspecs.fw_releasenum, sc->malo_hwspecs.wcbbase0, 237178354Ssam sc->malo_hwspecs.rxdesc_read, sc->malo_hwspecs.rxdesc_write, 238178354Ssam sc->malo_hwspecs.ul_fw_awakecookie, 239178354Ssam sc->malo_hwspecs.wcbbase[0], sc->malo_hwspecs.wcbbase[1], 240178354Ssam sc->malo_hwspecs.wcbbase[2], sc->malo_hwspecs.wcbbase[3]); 241178354Ssam 242178354Ssam /* NB: firmware looks that it does not export regdomain info API. */ 243178354Ssam bands = 0; 244178354Ssam setbit(&bands, IEEE80211_MODE_11B); 245178354Ssam setbit(&bands, IEEE80211_MODE_11G); 246178354Ssam ieee80211_init_channels(ic, NULL, &bands); 247178354Ssam 248177595Sweongyo sc->malo_txantenna = 0x2; /* h/w default */ 249177595Sweongyo sc->malo_rxantenna = 0xffff; /* h/w default */ 250177595Sweongyo 251177595Sweongyo /* 252177595Sweongyo * Allocate tx + rx descriptors and populate the lists. 253177595Sweongyo * We immediately push the information to the firmware 254177595Sweongyo * as otherwise it gets upset. 255177595Sweongyo */ 256177595Sweongyo error = malo_dma_setup(sc); 257177595Sweongyo if (error != 0) { 258177595Sweongyo if_printf(ifp, "failed to setup descriptors: %d\n", error); 259177595Sweongyo goto bad1; 260177595Sweongyo } 261178354Ssam error = malo_setup_hwdma(sc); /* push to firmware */ 262178354Ssam if (error != 0) /* NB: malo_setupdma prints msg */ 263190552Sweongyo goto bad2; 264177595Sweongyo 265177595Sweongyo sc->malo_tq = taskqueue_create_fast("malo_taskq", M_NOWAIT, 266177595Sweongyo taskqueue_thread_enqueue, &sc->malo_tq); 267177595Sweongyo taskqueue_start_threads(&sc->malo_tq, 1, PI_NET, 268177595Sweongyo "%s taskq", ifp->if_xname); 269177595Sweongyo 270177595Sweongyo TASK_INIT(&sc->malo_rxtask, 0, malo_rx_proc, sc); 271177595Sweongyo TASK_INIT(&sc->malo_txtask, 0, malo_tx_proc, sc); 272177595Sweongyo 273177595Sweongyo ifp->if_softc = sc; 274177595Sweongyo ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST; 275177595Sweongyo ifp->if_start = malo_start; 276177595Sweongyo ifp->if_ioctl = malo_ioctl; 277177595Sweongyo ifp->if_init = malo_init; 278207554Ssobomax IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen); 279207554Ssobomax ifp->if_snd.ifq_drv_maxlen = ifqmaxlen; 280177595Sweongyo IFQ_SET_READY(&ifp->if_snd); 281177595Sweongyo 282177595Sweongyo ic->ic_ifp = ifp; 283177595Sweongyo /* XXX not right but it's not used anywhere important */ 284177595Sweongyo ic->ic_phytype = IEEE80211_T_OFDM; 285177595Sweongyo ic->ic_opmode = IEEE80211_M_STA; 286177595Sweongyo ic->ic_caps = 287178957Ssam IEEE80211_C_STA /* station mode supported */ 288178957Ssam | IEEE80211_C_BGSCAN /* capable of bg scanning */ 289177595Sweongyo | IEEE80211_C_MONITOR /* monitor mode */ 290177595Sweongyo | IEEE80211_C_SHPREAMBLE /* short preamble supported */ 291177595Sweongyo | IEEE80211_C_SHSLOT /* short slot time supported */ 292177595Sweongyo | IEEE80211_C_TXPMGT /* capable of txpow mgt */ 293177595Sweongyo | IEEE80211_C_WPA /* capable of WPA1+WPA2 */ 294177595Sweongyo ; 295177595Sweongyo 296177595Sweongyo /* 297177595Sweongyo * Transmit requires space in the packet for a special format transmit 298177595Sweongyo * record and optional padding between this record and the payload. 299177595Sweongyo * Ask the net80211 layer to arrange this when encapsulating 300177595Sweongyo * packets so we can add it efficiently. 301177595Sweongyo */ 302177595Sweongyo ic->ic_headroom = sizeof(struct malo_txrec) - 303178354Ssam sizeof(struct ieee80211_frame); 304177595Sweongyo 305177595Sweongyo /* call MI attach routine. */ 306190526Ssam ieee80211_ifattach(ic, sc->malo_hwspecs.macaddr); 307177595Sweongyo /* override default methods */ 308178354Ssam ic->ic_vap_create = malo_vap_create; 309178354Ssam ic->ic_vap_delete = malo_vap_delete; 310178354Ssam ic->ic_raw_xmit = malo_raw_xmit; 311177595Sweongyo ic->ic_updateslot = malo_updateslot; 312177595Sweongyo 313177595Sweongyo ic->ic_scan_start = malo_scan_start; 314177595Sweongyo ic->ic_scan_end = malo_scan_end; 315177595Sweongyo ic->ic_set_channel = malo_set_channel; 316177595Sweongyo 317177595Sweongyo sc->malo_invalid = 0; /* ready to go, enable int handling */ 318177595Sweongyo 319192468Ssam ieee80211_radiotap_attach(ic, 320192468Ssam &sc->malo_tx_th.wt_ihdr, sizeof(sc->malo_tx_th), 321192468Ssam MALO_TX_RADIOTAP_PRESENT, 322192468Ssam &sc->malo_rx_th.wr_ihdr, sizeof(sc->malo_rx_th), 323192468Ssam MALO_RX_RADIOTAP_PRESENT); 324177595Sweongyo 325177595Sweongyo /* 326177595Sweongyo * Setup dynamic sysctl's. 327177595Sweongyo */ 328177595Sweongyo malo_sysctlattach(sc); 329177595Sweongyo 330177595Sweongyo if (bootverbose) 331177595Sweongyo ieee80211_announce(ic); 332178354Ssam malo_announce(sc); 333177595Sweongyo 334177595Sweongyo return 0; 335190552Sweongyobad2: 336190552Sweongyo malo_dma_cleanup(sc); 337177595Sweongyobad1: 338177595Sweongyo malo_hal_detach(mh); 339177595Sweongyobad: 340177595Sweongyo if_free(ifp); 341177595Sweongyo sc->malo_invalid = 1; 342177595Sweongyo 343177595Sweongyo return error; 344177595Sweongyo} 345177595Sweongyo 346178354Ssamstatic struct ieee80211vap * 347228621Sbschmidtmalo_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 348228621Sbschmidt enum ieee80211_opmode opmode, int flags, 349228621Sbschmidt const uint8_t bssid[IEEE80211_ADDR_LEN], 350228621Sbschmidt const uint8_t mac[IEEE80211_ADDR_LEN]) 351178354Ssam{ 352178354Ssam struct ifnet *ifp = ic->ic_ifp; 353178354Ssam struct malo_vap *mvp; 354178354Ssam struct ieee80211vap *vap; 355178354Ssam 356178354Ssam if (!TAILQ_EMPTY(&ic->ic_vaps)) { 357178354Ssam if_printf(ifp, "multiple vaps not supported\n"); 358178354Ssam return NULL; 359178354Ssam } 360178354Ssam switch (opmode) { 361178354Ssam case IEEE80211_M_STA: 362178354Ssam if (opmode == IEEE80211_M_STA) 363178354Ssam flags |= IEEE80211_CLONE_NOBEACONS; 364178354Ssam /* fall thru... */ 365178354Ssam case IEEE80211_M_MONITOR: 366178354Ssam break; 367178354Ssam default: 368178354Ssam if_printf(ifp, "%s mode not supported\n", 369178354Ssam ieee80211_opmode_name[opmode]); 370178354Ssam return NULL; /* unsupported */ 371178354Ssam } 372178354Ssam mvp = (struct malo_vap *) malloc(sizeof(struct malo_vap), 373178354Ssam M_80211_VAP, M_NOWAIT | M_ZERO); 374178354Ssam if (mvp == NULL) { 375178354Ssam if_printf(ifp, "cannot allocate vap state block\n"); 376178354Ssam return NULL; 377178354Ssam } 378178354Ssam vap = &mvp->malo_vap; 379178354Ssam ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac); 380178354Ssam 381178354Ssam /* override state transition machine */ 382178354Ssam mvp->malo_newstate = vap->iv_newstate; 383178354Ssam vap->iv_newstate = malo_newstate; 384178354Ssam 385178354Ssam /* complete setup */ 386178354Ssam ieee80211_vap_attach(vap, 387178354Ssam ieee80211_media_change, ieee80211_media_status); 388178354Ssam ic->ic_opmode = opmode; 389178354Ssam return vap; 390178354Ssam} 391178354Ssam 392178354Ssamstatic void 393178354Ssammalo_vap_delete(struct ieee80211vap *vap) 394178354Ssam{ 395178354Ssam struct malo_vap *mvp = MALO_VAP(vap); 396178354Ssam 397178354Ssam ieee80211_vap_detach(vap); 398178354Ssam free(mvp, M_80211_VAP); 399178354Ssam} 400178354Ssam 401177595Sweongyoint 402177595Sweongyomalo_intr(void *arg) 403177595Sweongyo{ 404177595Sweongyo struct malo_softc *sc = arg; 405177595Sweongyo struct malo_hal *mh = sc->malo_mh; 406177595Sweongyo uint32_t status; 407177595Sweongyo 408177595Sweongyo if (sc->malo_invalid) { 409177595Sweongyo /* 410177595Sweongyo * The hardware is not ready/present, don't touch anything. 411177595Sweongyo * Note this can happen early on if the IRQ is shared. 412177595Sweongyo */ 413177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid; ignored\n", __func__); 414177595Sweongyo return (FILTER_STRAY); 415177595Sweongyo } 416177595Sweongyo 417177595Sweongyo /* 418177595Sweongyo * Figure out the reason(s) for the interrupt. 419177595Sweongyo */ 420177595Sweongyo malo_hal_getisr(mh, &status); /* NB: clears ISR too */ 421177595Sweongyo if (status == 0) /* must be a shared irq */ 422177595Sweongyo return (FILTER_STRAY); 423177595Sweongyo 424177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, "%s: status 0x%x imask 0x%x\n", 425177595Sweongyo __func__, status, sc->malo_imask); 426177595Sweongyo 427177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_RDY) 428177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_rxtask); 429177595Sweongyo if (status & MALO_A2HRIC_BIT_TX_DONE) 430177595Sweongyo taskqueue_enqueue_fast(sc->malo_tq, &sc->malo_txtask); 431177595Sweongyo if (status & MALO_A2HRIC_BIT_OPC_DONE) 432177595Sweongyo malo_hal_cmddone(mh); 433177595Sweongyo if (status & MALO_A2HRIC_BIT_MAC_EVENT) 434177595Sweongyo ; 435177595Sweongyo if (status & MALO_A2HRIC_BIT_RX_PROBLEM) 436177595Sweongyo ; 437177595Sweongyo if (status & MALO_A2HRIC_BIT_ICV_ERROR) { 438177595Sweongyo /* TKIP ICV error */ 439177595Sweongyo sc->malo_stats.mst_rx_badtkipicv++; 440177595Sweongyo } 441177595Sweongyo#ifdef MALO_DEBUG 442177595Sweongyo if (((status | sc->malo_imask) ^ sc->malo_imask) != 0) 443177595Sweongyo DPRINTF(sc, MALO_DEBUG_INTR, 444177595Sweongyo "%s: can't handle interrupt status 0x%x\n", 445177595Sweongyo __func__, status); 446177595Sweongyo#endif 447177595Sweongyo return (FILTER_HANDLED); 448177595Sweongyo} 449177595Sweongyo 450177595Sweongyostatic void 451177595Sweongyomalo_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 452177595Sweongyo{ 453177595Sweongyo bus_addr_t *paddr = (bus_addr_t*) arg; 454177595Sweongyo 455177595Sweongyo KASSERT(error == 0, ("error %u on bus_dma callback", error)); 456177595Sweongyo 457177595Sweongyo *paddr = segs->ds_addr; 458177595Sweongyo} 459177595Sweongyo 460177595Sweongyostatic int 461177595Sweongyomalo_desc_setup(struct malo_softc *sc, const char *name, 462177595Sweongyo struct malo_descdma *dd, 463177595Sweongyo int nbuf, size_t bufsize, int ndesc, size_t descsize) 464177595Sweongyo{ 465177595Sweongyo int error; 466177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 467177595Sweongyo uint8_t *ds; 468177595Sweongyo 469177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 470177595Sweongyo "%s: %s DMA: %u bufs (%ju) %u desc/buf (%ju)\n", 471177595Sweongyo __func__, name, nbuf, (uintmax_t) bufsize, 472177595Sweongyo ndesc, (uintmax_t) descsize); 473177595Sweongyo 474177595Sweongyo dd->dd_name = name; 475177595Sweongyo dd->dd_desc_len = nbuf * ndesc * descsize; 476177595Sweongyo 477177595Sweongyo /* 478177595Sweongyo * Setup DMA descriptor area. 479177595Sweongyo */ 480177595Sweongyo error = bus_dma_tag_create(bus_get_dma_tag(sc->malo_dev),/* parent */ 481177595Sweongyo PAGE_SIZE, 0, /* alignment, bounds */ 482177595Sweongyo BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 483177595Sweongyo BUS_SPACE_MAXADDR, /* highaddr */ 484177595Sweongyo NULL, NULL, /* filter, filterarg */ 485177595Sweongyo dd->dd_desc_len, /* maxsize */ 486177595Sweongyo 1, /* nsegments */ 487177595Sweongyo dd->dd_desc_len, /* maxsegsize */ 488177595Sweongyo BUS_DMA_ALLOCNOW, /* flags */ 489177595Sweongyo NULL, /* lockfunc */ 490177595Sweongyo NULL, /* lockarg */ 491177595Sweongyo &dd->dd_dmat); 492177595Sweongyo if (error != 0) { 493177595Sweongyo if_printf(ifp, "cannot allocate %s DMA tag\n", dd->dd_name); 494177595Sweongyo return error; 495177595Sweongyo } 496177595Sweongyo 497177595Sweongyo /* allocate descriptors */ 498177595Sweongyo error = bus_dmamap_create(dd->dd_dmat, BUS_DMA_NOWAIT, &dd->dd_dmamap); 499177595Sweongyo if (error != 0) { 500177595Sweongyo if_printf(ifp, "unable to create dmamap for %s descriptors, " 501177595Sweongyo "error %u\n", dd->dd_name, error); 502177595Sweongyo goto fail0; 503177595Sweongyo } 504177595Sweongyo 505177595Sweongyo error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc, 506177595Sweongyo BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dd->dd_dmamap); 507177595Sweongyo if (error != 0) { 508177595Sweongyo if_printf(ifp, "unable to alloc memory for %u %s descriptors, " 509177595Sweongyo "error %u\n", nbuf * ndesc, dd->dd_name, error); 510177595Sweongyo goto fail1; 511177595Sweongyo } 512177595Sweongyo 513177595Sweongyo error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap, 514177595Sweongyo dd->dd_desc, dd->dd_desc_len, 515177595Sweongyo malo_load_cb, &dd->dd_desc_paddr, BUS_DMA_NOWAIT); 516177595Sweongyo if (error != 0) { 517177595Sweongyo if_printf(ifp, "unable to map %s descriptors, error %u\n", 518177595Sweongyo dd->dd_name, error); 519177595Sweongyo goto fail2; 520177595Sweongyo } 521177595Sweongyo 522177595Sweongyo ds = dd->dd_desc; 523177595Sweongyo memset(ds, 0, dd->dd_desc_len); 524278808Smarius DPRINTF(sc, MALO_DEBUG_RESET, 525278808Smarius "%s: %s DMA map: %p (%lu) -> 0x%jx (%lu)\n", 526177595Sweongyo __func__, dd->dd_name, ds, (u_long) dd->dd_desc_len, 527278808Smarius (uintmax_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len); 528177595Sweongyo 529177595Sweongyo return 0; 530177595Sweongyofail2: 531177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 532177595Sweongyofail1: 533177595Sweongyo bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 534177595Sweongyofail0: 535177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 536177595Sweongyo memset(dd, 0, sizeof(*dd)); 537177595Sweongyo return error; 538177595Sweongyo} 539177595Sweongyo 540177595Sweongyo#define DS2PHYS(_dd, _ds) \ 541177595Sweongyo ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc)) 542177595Sweongyo 543177595Sweongyostatic int 544177595Sweongyomalo_rxdma_setup(struct malo_softc *sc) 545177595Sweongyo{ 546177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 547177595Sweongyo int error, bsize, i; 548177595Sweongyo struct malo_rxbuf *bf; 549177595Sweongyo struct malo_rxdesc *ds; 550177595Sweongyo 551177595Sweongyo error = malo_desc_setup(sc, "rx", &sc->malo_rxdma, 552177595Sweongyo malo_rxbuf, sizeof(struct malo_rxbuf), 553177595Sweongyo 1, sizeof(struct malo_rxdesc)); 554177595Sweongyo if (error != 0) 555177595Sweongyo return error; 556177595Sweongyo 557177595Sweongyo /* 558177595Sweongyo * Allocate rx buffers and set them up. 559177595Sweongyo */ 560177595Sweongyo bsize = malo_rxbuf * sizeof(struct malo_rxbuf); 561177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 562177595Sweongyo if (bf == NULL) { 563177595Sweongyo if_printf(ifp, "malloc of %u rx buffers failed\n", bsize); 564177595Sweongyo return error; 565177595Sweongyo } 566177595Sweongyo sc->malo_rxdma.dd_bufptr = bf; 567177595Sweongyo 568177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 569177595Sweongyo ds = sc->malo_rxdma.dd_desc; 570177595Sweongyo for (i = 0; i < malo_rxbuf; i++, bf++, ds++) { 571177595Sweongyo bf->bf_desc = ds; 572177595Sweongyo bf->bf_daddr = DS2PHYS(&sc->malo_rxdma, ds); 573177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 574177595Sweongyo &bf->bf_dmamap); 575177595Sweongyo if (error != 0) { 576177595Sweongyo if_printf(ifp, "%s: unable to dmamap for rx buffer, " 577177595Sweongyo "error %d\n", __func__, error); 578177595Sweongyo return error; 579177595Sweongyo } 580177595Sweongyo /* NB: tail is intentional to preserve descriptor order */ 581177595Sweongyo STAILQ_INSERT_TAIL(&sc->malo_rxbuf, bf, bf_list); 582177595Sweongyo } 583177595Sweongyo return 0; 584177595Sweongyo} 585177595Sweongyo 586177595Sweongyostatic int 587177595Sweongyomalo_txdma_setup(struct malo_softc *sc, struct malo_txq *txq) 588177595Sweongyo{ 589177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 590177595Sweongyo int error, bsize, i; 591177595Sweongyo struct malo_txbuf *bf; 592177595Sweongyo struct malo_txdesc *ds; 593177595Sweongyo 594177595Sweongyo error = malo_desc_setup(sc, "tx", &txq->dma, 595177595Sweongyo malo_txbuf, sizeof(struct malo_txbuf), 596177595Sweongyo MALO_TXDESC, sizeof(struct malo_txdesc)); 597177595Sweongyo if (error != 0) 598177595Sweongyo return error; 599177595Sweongyo 600177595Sweongyo /* allocate and setup tx buffers */ 601177595Sweongyo bsize = malo_txbuf * sizeof(struct malo_txbuf); 602177595Sweongyo bf = malloc(bsize, M_MALODEV, M_NOWAIT | M_ZERO); 603177595Sweongyo if (bf == NULL) { 604177595Sweongyo if_printf(ifp, "malloc of %u tx buffers failed\n", 605177595Sweongyo malo_txbuf); 606177595Sweongyo return ENOMEM; 607177595Sweongyo } 608177595Sweongyo txq->dma.dd_bufptr = bf; 609177595Sweongyo 610177595Sweongyo STAILQ_INIT(&txq->free); 611177595Sweongyo txq->nfree = 0; 612177595Sweongyo ds = txq->dma.dd_desc; 613177595Sweongyo for (i = 0; i < malo_txbuf; i++, bf++, ds += MALO_TXDESC) { 614177595Sweongyo bf->bf_desc = ds; 615177595Sweongyo bf->bf_daddr = DS2PHYS(&txq->dma, ds); 616177595Sweongyo error = bus_dmamap_create(sc->malo_dmat, BUS_DMA_NOWAIT, 617177595Sweongyo &bf->bf_dmamap); 618177595Sweongyo if (error != 0) { 619177595Sweongyo if_printf(ifp, "unable to create dmamap for tx " 620177595Sweongyo "buffer %u, error %u\n", i, error); 621177595Sweongyo return error; 622177595Sweongyo } 623177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 624177595Sweongyo txq->nfree++; 625177595Sweongyo } 626177595Sweongyo 627177595Sweongyo return 0; 628177595Sweongyo} 629177595Sweongyo 630177595Sweongyostatic void 631177595Sweongyomalo_desc_cleanup(struct malo_softc *sc, struct malo_descdma *dd) 632177595Sweongyo{ 633177595Sweongyo bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap); 634177595Sweongyo bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap); 635177595Sweongyo bus_dmamap_destroy(dd->dd_dmat, dd->dd_dmamap); 636177595Sweongyo bus_dma_tag_destroy(dd->dd_dmat); 637177595Sweongyo 638177595Sweongyo memset(dd, 0, sizeof(*dd)); 639177595Sweongyo} 640177595Sweongyo 641177595Sweongyostatic void 642177595Sweongyomalo_rxdma_cleanup(struct malo_softc *sc) 643177595Sweongyo{ 644177595Sweongyo struct malo_rxbuf *bf; 645177595Sweongyo 646177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 647177595Sweongyo if (bf->bf_m != NULL) { 648177595Sweongyo m_freem(bf->bf_m); 649177595Sweongyo bf->bf_m = NULL; 650177595Sweongyo } 651177595Sweongyo if (bf->bf_dmamap != NULL) { 652177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 653177595Sweongyo bf->bf_dmamap = NULL; 654177595Sweongyo } 655177595Sweongyo } 656177595Sweongyo STAILQ_INIT(&sc->malo_rxbuf); 657177595Sweongyo if (sc->malo_rxdma.dd_bufptr != NULL) { 658177595Sweongyo free(sc->malo_rxdma.dd_bufptr, M_MALODEV); 659177595Sweongyo sc->malo_rxdma.dd_bufptr = NULL; 660177595Sweongyo } 661177595Sweongyo if (sc->malo_rxdma.dd_desc_len != 0) 662177595Sweongyo malo_desc_cleanup(sc, &sc->malo_rxdma); 663177595Sweongyo} 664177595Sweongyo 665177595Sweongyostatic void 666177595Sweongyomalo_txdma_cleanup(struct malo_softc *sc, struct malo_txq *txq) 667177595Sweongyo{ 668177595Sweongyo struct malo_txbuf *bf; 669177595Sweongyo struct ieee80211_node *ni; 670177595Sweongyo 671177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 672177595Sweongyo if (bf->bf_m != NULL) { 673177595Sweongyo m_freem(bf->bf_m); 674177595Sweongyo bf->bf_m = NULL; 675177595Sweongyo } 676177595Sweongyo ni = bf->bf_node; 677177595Sweongyo bf->bf_node = NULL; 678177595Sweongyo if (ni != NULL) { 679177595Sweongyo /* 680177595Sweongyo * Reclaim node reference. 681177595Sweongyo */ 682177595Sweongyo ieee80211_free_node(ni); 683177595Sweongyo } 684177595Sweongyo if (bf->bf_dmamap != NULL) { 685177595Sweongyo bus_dmamap_destroy(sc->malo_dmat, bf->bf_dmamap); 686177595Sweongyo bf->bf_dmamap = NULL; 687177595Sweongyo } 688177595Sweongyo } 689177595Sweongyo STAILQ_INIT(&txq->free); 690177595Sweongyo txq->nfree = 0; 691177595Sweongyo if (txq->dma.dd_bufptr != NULL) { 692177595Sweongyo free(txq->dma.dd_bufptr, M_MALODEV); 693177595Sweongyo txq->dma.dd_bufptr = NULL; 694177595Sweongyo } 695177595Sweongyo if (txq->dma.dd_desc_len != 0) 696177595Sweongyo malo_desc_cleanup(sc, &txq->dma); 697177595Sweongyo} 698177595Sweongyo 699177595Sweongyostatic void 700177595Sweongyomalo_dma_cleanup(struct malo_softc *sc) 701177595Sweongyo{ 702177595Sweongyo int i; 703177595Sweongyo 704177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 705177595Sweongyo malo_txdma_cleanup(sc, &sc->malo_txq[i]); 706177595Sweongyo 707177595Sweongyo malo_rxdma_cleanup(sc); 708177595Sweongyo} 709177595Sweongyo 710177595Sweongyostatic int 711177595Sweongyomalo_dma_setup(struct malo_softc *sc) 712177595Sweongyo{ 713177595Sweongyo int error, i; 714177595Sweongyo 715177595Sweongyo /* rxdma initializing. */ 716177595Sweongyo error = malo_rxdma_setup(sc); 717177595Sweongyo if (error != 0) 718177595Sweongyo return error; 719177595Sweongyo 720177595Sweongyo /* NB: we just have 1 tx queue now. */ 721177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 722177595Sweongyo error = malo_txdma_setup(sc, &sc->malo_txq[i]); 723177595Sweongyo if (error != 0) { 724177595Sweongyo malo_dma_cleanup(sc); 725177595Sweongyo 726177595Sweongyo return error; 727177595Sweongyo } 728177595Sweongyo 729177595Sweongyo malo_txq_init(sc, &sc->malo_txq[i], i); 730177595Sweongyo } 731177595Sweongyo 732177595Sweongyo return 0; 733177595Sweongyo} 734177595Sweongyo 735177595Sweongyostatic void 736177595Sweongyomalo_hal_set_rxtxdma(struct malo_softc *sc) 737177595Sweongyo{ 738177595Sweongyo int i; 739177595Sweongyo 740177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, 741177595Sweongyo sc->malo_hwdma.rxdesc_read); 742177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_write, 743177595Sweongyo sc->malo_hwdma.rxdesc_read); 744177595Sweongyo 745177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 746177595Sweongyo malo_bar0_write4(sc, 747177595Sweongyo sc->malo_hwspecs.wcbbase[i], sc->malo_hwdma.wcbbase[i]); 748177595Sweongyo } 749177595Sweongyo} 750177595Sweongyo 751177595Sweongyo/* 752177595Sweongyo * Inform firmware of our tx/rx dma setup. The BAR 0 writes below are 753177595Sweongyo * for compatibility with older firmware. For current firmware we send 754177595Sweongyo * this information with a cmd block via malo_hal_sethwdma. 755177595Sweongyo */ 756177595Sweongyostatic int 757177595Sweongyomalo_setup_hwdma(struct malo_softc *sc) 758177595Sweongyo{ 759177595Sweongyo int i; 760177595Sweongyo struct malo_txq *txq; 761177595Sweongyo 762177595Sweongyo sc->malo_hwdma.rxdesc_read = sc->malo_rxdma.dd_desc_paddr; 763177595Sweongyo 764177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 765177595Sweongyo txq = &sc->malo_txq[i]; 766177595Sweongyo sc->malo_hwdma.wcbbase[i] = txq->dma.dd_desc_paddr; 767177595Sweongyo } 768177595Sweongyo sc->malo_hwdma.maxnum_txwcb = malo_txbuf; 769177595Sweongyo sc->malo_hwdma.maxnum_wcb = MALO_NUM_TX_QUEUES; 770177595Sweongyo 771177595Sweongyo malo_hal_set_rxtxdma(sc); 772177595Sweongyo 773177595Sweongyo return 0; 774177595Sweongyo} 775177595Sweongyo 776177595Sweongyostatic void 777177595Sweongyomalo_txq_init(struct malo_softc *sc, struct malo_txq *txq, int qnum) 778177595Sweongyo{ 779177595Sweongyo struct malo_txbuf *bf, *bn; 780177595Sweongyo struct malo_txdesc *ds; 781177595Sweongyo 782177595Sweongyo MALO_TXQ_LOCK_INIT(sc, txq); 783177595Sweongyo txq->qnum = qnum; 784177595Sweongyo txq->txpri = 0; /* XXX */ 785177595Sweongyo 786177595Sweongyo STAILQ_FOREACH(bf, &txq->free, bf_list) { 787177595Sweongyo bf->bf_txq = txq; 788177595Sweongyo 789177595Sweongyo ds = bf->bf_desc; 790177595Sweongyo bn = STAILQ_NEXT(bf, bf_list); 791177595Sweongyo if (bn == NULL) 792177595Sweongyo bn = STAILQ_FIRST(&txq->free); 793177595Sweongyo ds->physnext = htole32(bn->bf_daddr); 794177595Sweongyo } 795177595Sweongyo STAILQ_INIT(&txq->active); 796177595Sweongyo} 797177595Sweongyo 798177595Sweongyo/* 799177595Sweongyo * Reclaim resources for a setup queue. 800177595Sweongyo */ 801177595Sweongyostatic void 802177595Sweongyomalo_tx_cleanupq(struct malo_softc *sc, struct malo_txq *txq) 803177595Sweongyo{ 804177595Sweongyo /* XXX hal work? */ 805177595Sweongyo MALO_TXQ_LOCK_DESTROY(txq); 806177595Sweongyo} 807177595Sweongyo 808177595Sweongyo/* 809177595Sweongyo * Allocate a tx buffer for sending a frame. 810177595Sweongyo */ 811177595Sweongyostatic struct malo_txbuf * 812177595Sweongyomalo_getbuf(struct malo_softc *sc, struct malo_txq *txq) 813177595Sweongyo{ 814177595Sweongyo struct malo_txbuf *bf; 815177595Sweongyo 816177595Sweongyo MALO_TXQ_LOCK(txq); 817177595Sweongyo bf = STAILQ_FIRST(&txq->free); 818177595Sweongyo if (bf != NULL) { 819177595Sweongyo STAILQ_REMOVE_HEAD(&txq->free, bf_list); 820177595Sweongyo txq->nfree--; 821177595Sweongyo } 822177595Sweongyo MALO_TXQ_UNLOCK(txq); 823177595Sweongyo if (bf == NULL) { 824177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, 825177595Sweongyo "%s: out of xmit buffers on q %d\n", __func__, txq->qnum); 826177595Sweongyo sc->malo_stats.mst_tx_qstop++; 827177595Sweongyo } 828177595Sweongyo return bf; 829177595Sweongyo} 830177595Sweongyo 831177595Sweongyostatic int 832177595Sweongyomalo_tx_dmasetup(struct malo_softc *sc, struct malo_txbuf *bf, struct mbuf *m0) 833177595Sweongyo{ 834177595Sweongyo struct mbuf *m; 835177595Sweongyo int error; 836177595Sweongyo 837177595Sweongyo /* 838177595Sweongyo * Load the DMA map so any coalescing is done. This also calculates 839177595Sweongyo * the number of descriptors we need. 840177595Sweongyo */ 841177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 842177595Sweongyo bf->bf_segs, &bf->bf_nseg, 843177595Sweongyo BUS_DMA_NOWAIT); 844177595Sweongyo if (error == EFBIG) { 845177595Sweongyo /* XXX packet requires too many descriptors */ 846177595Sweongyo bf->bf_nseg = MALO_TXDESC + 1; 847177595Sweongyo } else if (error != 0) { 848177595Sweongyo sc->malo_stats.mst_tx_busdma++; 849177595Sweongyo m_freem(m0); 850177595Sweongyo return error; 851177595Sweongyo } 852177595Sweongyo /* 853177595Sweongyo * Discard null packets and check for packets that require too many 854177595Sweongyo * TX descriptors. We try to convert the latter to a cluster. 855177595Sweongyo */ 856177595Sweongyo if (error == EFBIG) { /* too many desc's, linearize */ 857177595Sweongyo sc->malo_stats.mst_tx_linear++; 858243857Sglebius m = m_defrag(m0, M_NOWAIT); 859177595Sweongyo if (m == NULL) { 860177595Sweongyo m_freem(m0); 861177595Sweongyo sc->malo_stats.mst_tx_nombuf++; 862177595Sweongyo return ENOMEM; 863177595Sweongyo } 864177595Sweongyo m0 = m; 865177595Sweongyo error = bus_dmamap_load_mbuf_sg(sc->malo_dmat, bf->bf_dmamap, m0, 866177595Sweongyo bf->bf_segs, &bf->bf_nseg, 867177595Sweongyo BUS_DMA_NOWAIT); 868177595Sweongyo if (error != 0) { 869177595Sweongyo sc->malo_stats.mst_tx_busdma++; 870177595Sweongyo m_freem(m0); 871177595Sweongyo return error; 872177595Sweongyo } 873177595Sweongyo KASSERT(bf->bf_nseg <= MALO_TXDESC, 874177595Sweongyo ("too many segments after defrag; nseg %u", bf->bf_nseg)); 875177595Sweongyo } else if (bf->bf_nseg == 0) { /* null packet, discard */ 876177595Sweongyo sc->malo_stats.mst_tx_nodata++; 877177595Sweongyo m_freem(m0); 878177595Sweongyo return EIO; 879177595Sweongyo } 880177595Sweongyo DPRINTF(sc, MALO_DEBUG_XMIT, "%s: m %p len %u\n", 881177595Sweongyo __func__, m0, m0->m_pkthdr.len); 882177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 883177595Sweongyo bf->bf_m = m0; 884177595Sweongyo 885177595Sweongyo return 0; 886177595Sweongyo} 887177595Sweongyo 888177595Sweongyo#ifdef MALO_DEBUG 889177595Sweongyostatic void 890177595Sweongyomalo_printrxbuf(const struct malo_rxbuf *bf, u_int ix) 891177595Sweongyo{ 892177595Sweongyo const struct malo_rxdesc *ds = bf->bf_desc; 893177595Sweongyo uint32_t status = le32toh(ds->status); 894177595Sweongyo 895278808Smarius printf("R[%2u] (DS.V:%p DS.P:0x%jx) NEXT:%08x DATA:%08x RC:%02x%s\n" 896177595Sweongyo " STAT:%02x LEN:%04x SNR:%02x NF:%02x CHAN:%02x" 897278808Smarius " RATE:%02x QOS:%04x\n", ix, ds, (uintmax_t)bf->bf_daddr, 898177595Sweongyo le32toh(ds->physnext), le32toh(ds->physbuffdata), 899177595Sweongyo ds->rxcontrol, 900177595Sweongyo ds->rxcontrol != MALO_RXD_CTRL_DRIVER_OWN ? 901177595Sweongyo "" : (status & MALO_RXD_STATUS_OK) ? " *" : " !", 902177595Sweongyo ds->status, le16toh(ds->pktlen), ds->snr, ds->nf, ds->channel, 903177595Sweongyo ds->rate, le16toh(ds->qosctrl)); 904177595Sweongyo} 905177595Sweongyo 906177595Sweongyostatic void 907177595Sweongyomalo_printtxbuf(const struct malo_txbuf *bf, u_int qnum, u_int ix) 908177595Sweongyo{ 909177595Sweongyo const struct malo_txdesc *ds = bf->bf_desc; 910177595Sweongyo uint32_t status = le32toh(ds->status); 911177595Sweongyo 912177595Sweongyo printf("Q%u[%3u]", qnum, ix); 913278808Smarius printf(" (DS.V:%p DS.P:0x%jx)\n", ds, (uintmax_t)bf->bf_daddr); 914177595Sweongyo printf(" NEXT:%08x DATA:%08x LEN:%04x STAT:%08x%s\n", 915177595Sweongyo le32toh(ds->physnext), 916177595Sweongyo le32toh(ds->pktptr), le16toh(ds->pktlen), status, 917177595Sweongyo status & MALO_TXD_STATUS_USED ? 918177595Sweongyo "" : (status & 3) != 0 ? " *" : " !"); 919177595Sweongyo printf(" RATE:%02x PRI:%x QOS:%04x SAP:%08x FORMAT:%04x\n", 920177595Sweongyo ds->datarate, ds->txpriority, le16toh(ds->qosctrl), 921177595Sweongyo le32toh(ds->sap_pktinfo), le16toh(ds->format)); 922177595Sweongyo#if 0 923177595Sweongyo { 924177595Sweongyo const uint8_t *cp = (const uint8_t *) ds; 925177595Sweongyo int i; 926177595Sweongyo for (i = 0; i < sizeof(struct malo_txdesc); i++) { 927177595Sweongyo printf("%02x ", cp[i]); 928177595Sweongyo if (((i+1) % 16) == 0) 929177595Sweongyo printf("\n"); 930177595Sweongyo } 931177595Sweongyo printf("\n"); 932177595Sweongyo } 933177595Sweongyo#endif 934177595Sweongyo} 935177595Sweongyo#endif /* MALO_DEBUG */ 936177595Sweongyo 937177595Sweongyostatic __inline void 938177595Sweongyomalo_updatetxrate(struct ieee80211_node *ni, int rix) 939177595Sweongyo{ 940177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 941177595Sweongyo static const int ieeerates[] = 942177595Sweongyo { 2, 4, 11, 22, 44, 12, 18, 24, 36, 48, 96, 108 }; 943177595Sweongyo if (rix < N(ieeerates)) 944177595Sweongyo ni->ni_txrate = ieeerates[rix]; 945177595Sweongyo#undef N 946177595Sweongyo} 947177595Sweongyo 948177595Sweongyostatic int 949177595Sweongyomalo_fix2rate(int fix_rate) 950177595Sweongyo{ 951177595Sweongyo#define N(x) (sizeof(x)/sizeof(x[0])) 952177595Sweongyo static const int rates[] = 953177595Sweongyo { 2, 4, 11, 22, 12, 18, 24, 36, 48, 96, 108 }; 954177595Sweongyo return (fix_rate < N(rates) ? rates[fix_rate] : 0); 955177595Sweongyo#undef N 956177595Sweongyo} 957177595Sweongyo 958177595Sweongyo/* idiomatic shorthands: MS = mask+shift, SM = shift+mask */ 959177595Sweongyo#define MS(v,x) (((v) & x) >> x##_S) 960177595Sweongyo#define SM(v,x) (((v) << x##_S) & x) 961177595Sweongyo 962177595Sweongyo/* 963177595Sweongyo * Process completed xmit descriptors from the specified queue. 964177595Sweongyo */ 965177595Sweongyostatic int 966177595Sweongyomalo_tx_processq(struct malo_softc *sc, struct malo_txq *txq) 967177595Sweongyo{ 968177595Sweongyo struct malo_txbuf *bf; 969177595Sweongyo struct malo_txdesc *ds; 970177595Sweongyo struct ieee80211_node *ni; 971177595Sweongyo int nreaped; 972177595Sweongyo uint32_t status; 973177595Sweongyo 974177595Sweongyo DPRINTF(sc, MALO_DEBUG_TX_PROC, "%s: tx queue %u\n", 975177595Sweongyo __func__, txq->qnum); 976177595Sweongyo for (nreaped = 0;; nreaped++) { 977177595Sweongyo MALO_TXQ_LOCK(txq); 978177595Sweongyo bf = STAILQ_FIRST(&txq->active); 979177595Sweongyo if (bf == NULL) { 980177595Sweongyo MALO_TXQ_UNLOCK(txq); 981177595Sweongyo break; 982177595Sweongyo } 983177595Sweongyo ds = bf->bf_desc; 984177595Sweongyo MALO_TXDESC_SYNC(txq, ds, 985177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 986177595Sweongyo if (ds->status & htole32(MALO_TXD_STATUS_FW_OWNED)) { 987177595Sweongyo MALO_TXQ_UNLOCK(txq); 988177595Sweongyo break; 989177595Sweongyo } 990177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 991177595Sweongyo MALO_TXQ_UNLOCK(txq); 992177595Sweongyo 993177595Sweongyo#ifdef MALO_DEBUG 994177595Sweongyo if (sc->malo_debug & MALO_DEBUG_XMIT_DESC) 995177595Sweongyo malo_printtxbuf(bf, txq->qnum, nreaped); 996177595Sweongyo#endif 997177595Sweongyo ni = bf->bf_node; 998177595Sweongyo if (ni != NULL) { 999177595Sweongyo status = le32toh(ds->status); 1000177595Sweongyo if (status & MALO_TXD_STATUS_OK) { 1001177595Sweongyo uint16_t format = le16toh(ds->format); 1002177595Sweongyo uint8_t txant = MS(format, MALO_TXD_ANTENNA); 1003177595Sweongyo 1004177595Sweongyo sc->malo_stats.mst_ant_tx[txant]++; 1005177595Sweongyo if (status & MALO_TXD_STATUS_OK_RETRY) 1006177595Sweongyo sc->malo_stats.mst_tx_retries++; 1007177595Sweongyo if (status & MALO_TXD_STATUS_OK_MORE_RETRY) 1008177595Sweongyo sc->malo_stats.mst_tx_mretries++; 1009177595Sweongyo malo_updatetxrate(ni, ds->datarate); 1010177595Sweongyo sc->malo_stats.mst_tx_rate = ds->datarate; 1011177595Sweongyo } else { 1012177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_LINK_ERROR) 1013177595Sweongyo sc->malo_stats.mst_tx_linkerror++; 1014177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_XRETRY) 1015177595Sweongyo sc->malo_stats.mst_tx_xretries++; 1016177595Sweongyo if (status & MALO_TXD_STATUS_FAILED_AGING) 1017177595Sweongyo sc->malo_stats.mst_tx_aging++; 1018177595Sweongyo } 1019177595Sweongyo /* 1020177595Sweongyo * Do any tx complete callback. Note this must 1021177595Sweongyo * be done before releasing the node reference. 1022177595Sweongyo * XXX no way to figure out if frame was ACK'd 1023177595Sweongyo */ 1024177595Sweongyo if (bf->bf_m->m_flags & M_TXCB) { 1025177595Sweongyo /* XXX strip fw len in case header inspected */ 1026177595Sweongyo m_adj(bf->bf_m, sizeof(uint16_t)); 1027177595Sweongyo ieee80211_process_callback(ni, bf->bf_m, 1028177595Sweongyo (status & MALO_TXD_STATUS_OK) == 0); 1029177595Sweongyo } 1030177595Sweongyo /* 1031177595Sweongyo * Reclaim reference to node. 1032177595Sweongyo * 1033177595Sweongyo * NB: the node may be reclaimed here if, for example 1034177595Sweongyo * this is a DEAUTH message that was sent and the 1035177595Sweongyo * node was timed out due to inactivity. 1036177595Sweongyo */ 1037177595Sweongyo ieee80211_free_node(ni); 1038177595Sweongyo } 1039177595Sweongyo ds->status = htole32(MALO_TXD_STATUS_IDLE); 1040177595Sweongyo ds->pktlen = htole32(0); 1041177595Sweongyo 1042177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 1043177595Sweongyo BUS_DMASYNC_POSTWRITE); 1044177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1045177595Sweongyo m_freem(bf->bf_m); 1046177595Sweongyo bf->bf_m = NULL; 1047177595Sweongyo bf->bf_node = NULL; 1048177595Sweongyo 1049177595Sweongyo MALO_TXQ_LOCK(txq); 1050177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1051177595Sweongyo txq->nfree++; 1052177595Sweongyo MALO_TXQ_UNLOCK(txq); 1053177595Sweongyo } 1054177595Sweongyo return nreaped; 1055177595Sweongyo} 1056177595Sweongyo 1057177595Sweongyo/* 1058177595Sweongyo * Deferred processing of transmit interrupt. 1059177595Sweongyo */ 1060177595Sweongyostatic void 1061177595Sweongyomalo_tx_proc(void *arg, int npending) 1062177595Sweongyo{ 1063177595Sweongyo struct malo_softc *sc = arg; 1064177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1065177595Sweongyo int i, nreaped; 1066177595Sweongyo 1067177595Sweongyo /* 1068177595Sweongyo * Process each active queue. 1069177595Sweongyo */ 1070177595Sweongyo nreaped = 0; 1071177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) { 1072177595Sweongyo if (!STAILQ_EMPTY(&sc->malo_txq[i].active)) 1073177595Sweongyo nreaped += malo_tx_processq(sc, &sc->malo_txq[i]); 1074177595Sweongyo } 1075177595Sweongyo 1076177595Sweongyo if (nreaped != 0) { 1077177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1078199559Sjhb sc->malo_timer = 0; 1079177595Sweongyo malo_start(ifp); 1080177595Sweongyo } 1081177595Sweongyo} 1082177595Sweongyo 1083177595Sweongyostatic int 1084177595Sweongyomalo_tx_start(struct malo_softc *sc, struct ieee80211_node *ni, 1085177595Sweongyo struct malo_txbuf *bf, struct mbuf *m0) 1086177595Sweongyo{ 1087177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 1088177595Sweongyo ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 1089177595Sweongyo#define IS_DATA_FRAME(wh) \ 1090177595Sweongyo ((wh->i_fc[0] & (IEEE80211_FC0_TYPE_MASK)) == IEEE80211_FC0_TYPE_DATA) 1091177595Sweongyo int error, ismcast, iswep; 1092177595Sweongyo int copyhdrlen, hdrlen, pktlen; 1093177595Sweongyo struct ieee80211_frame *wh; 1094177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1095178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1096192468Ssam struct ieee80211vap *vap = ni->ni_vap; 1097177595Sweongyo struct malo_txdesc *ds; 1098177595Sweongyo struct malo_txrec *tr; 1099177595Sweongyo struct malo_txq *txq; 1100177595Sweongyo uint16_t qos; 1101177595Sweongyo 1102177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1103262007Skevlo iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1104177595Sweongyo ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1105177595Sweongyo copyhdrlen = hdrlen = ieee80211_anyhdrsize(wh); 1106177595Sweongyo pktlen = m0->m_pkthdr.len; 1107177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 1108177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 1109177595Sweongyo qos = *(uint16_t *) 1110177595Sweongyo (((struct ieee80211_qosframe_addr4 *) wh)->i_qos); 1111177595Sweongyo copyhdrlen -= sizeof(qos); 1112177595Sweongyo } else 1113177595Sweongyo qos = *(uint16_t *) 1114177595Sweongyo (((struct ieee80211_qosframe *) wh)->i_qos); 1115177595Sweongyo } else 1116177595Sweongyo qos = 0; 1117177595Sweongyo 1118177595Sweongyo if (iswep) { 1119177595Sweongyo struct ieee80211_key *k; 1120177595Sweongyo 1121177595Sweongyo /* 1122177595Sweongyo * Construct the 802.11 header+trailer for an encrypted 1123177595Sweongyo * frame. The only reason this can fail is because of an 1124177595Sweongyo * unknown or unsupported cipher/key type. 1125177595Sweongyo * 1126177595Sweongyo * NB: we do this even though the firmware will ignore 1127177595Sweongyo * what we've done for WEP and TKIP as we need the 1128177595Sweongyo * ExtIV filled in for CCMP and this also adjusts 1129177595Sweongyo * the headers which simplifies our work below. 1130177595Sweongyo */ 1131178354Ssam k = ieee80211_crypto_encap(ni, m0); 1132177595Sweongyo if (k == NULL) { 1133177595Sweongyo /* 1134177595Sweongyo * This can happen when the key is yanked after the 1135177595Sweongyo * frame was queued. Just discard the frame; the 1136177595Sweongyo * 802.11 layer counts failures and provides 1137177595Sweongyo * debugging/diagnostics. 1138177595Sweongyo */ 1139177595Sweongyo m_freem(m0); 1140177595Sweongyo return EIO; 1141177595Sweongyo } 1142177595Sweongyo 1143177595Sweongyo /* 1144177595Sweongyo * Adjust the packet length for the crypto additions 1145177595Sweongyo * done during encap and any other bits that the f/w 1146177595Sweongyo * will add later on. 1147177595Sweongyo */ 1148177595Sweongyo pktlen = m0->m_pkthdr.len; 1149177595Sweongyo 1150177595Sweongyo /* packet header may have moved, reset our local pointer */ 1151177595Sweongyo wh = mtod(m0, struct ieee80211_frame *); 1152177595Sweongyo } 1153177595Sweongyo 1154192468Ssam if (ieee80211_radiotap_active_vap(vap)) { 1155177595Sweongyo sc->malo_tx_th.wt_flags = 0; /* XXX */ 1156177595Sweongyo if (iswep) 1157177595Sweongyo sc->malo_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1158177595Sweongyo sc->malo_tx_th.wt_txpower = ni->ni_txpower; 1159177595Sweongyo sc->malo_tx_th.wt_antenna = sc->malo_txantenna; 1160177595Sweongyo 1161192468Ssam ieee80211_radiotap_tx(vap, m0); 1162177595Sweongyo } 1163177595Sweongyo 1164177595Sweongyo /* 1165177595Sweongyo * Copy up/down the 802.11 header; the firmware requires 1166177595Sweongyo * we present a 2-byte payload length followed by a 1167177595Sweongyo * 4-address header (w/o QoS), followed (optionally) by 1168177595Sweongyo * any WEP/ExtIV header (but only filled in for CCMP). 1169177595Sweongyo * We are assured the mbuf has sufficient headroom to 1170177595Sweongyo * prepend in-place by the setup of ic_headroom in 1171177595Sweongyo * malo_attach. 1172177595Sweongyo */ 1173177595Sweongyo if (hdrlen < sizeof(struct malo_txrec)) { 1174177595Sweongyo const int space = sizeof(struct malo_txrec) - hdrlen; 1175177595Sweongyo if (M_LEADINGSPACE(m0) < space) { 1176177595Sweongyo /* NB: should never happen */ 1177177595Sweongyo device_printf(sc->malo_dev, 1178177595Sweongyo "not enough headroom, need %d found %zd, " 1179177595Sweongyo "m_flags 0x%x m_len %d\n", 1180177595Sweongyo space, M_LEADINGSPACE(m0), m0->m_flags, m0->m_len); 1181177595Sweongyo ieee80211_dump_pkt(ic, 1182177595Sweongyo mtod(m0, const uint8_t *), m0->m_len, 0, -1); 1183177595Sweongyo m_freem(m0); 1184177595Sweongyo /* XXX stat */ 1185177595Sweongyo return EIO; 1186177595Sweongyo } 1187177595Sweongyo M_PREPEND(m0, space, M_NOWAIT); 1188177595Sweongyo } 1189177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1190177595Sweongyo if (wh != (struct ieee80211_frame *) &tr->wh) 1191177595Sweongyo ovbcopy(wh, &tr->wh, hdrlen); 1192177595Sweongyo /* 1193177595Sweongyo * Note: the "firmware length" is actually the length of the fully 1194177595Sweongyo * formed "802.11 payload". That is, it's everything except for 1195177595Sweongyo * the 802.11 header. In particular this includes all crypto 1196177595Sweongyo * material including the MIC! 1197177595Sweongyo */ 1198177595Sweongyo tr->fwlen = htole16(pktlen - hdrlen); 1199177595Sweongyo 1200177595Sweongyo /* 1201177595Sweongyo * Load the DMA map so any coalescing is done. This 1202177595Sweongyo * also calculates the number of descriptors we need. 1203177595Sweongyo */ 1204177595Sweongyo error = malo_tx_dmasetup(sc, bf, m0); 1205177595Sweongyo if (error != 0) 1206177595Sweongyo return error; 1207177595Sweongyo bf->bf_node = ni; /* NB: held reference */ 1208177595Sweongyo m0 = bf->bf_m; /* NB: may have changed */ 1209177595Sweongyo tr = mtod(m0, struct malo_txrec *); 1210177595Sweongyo wh = (struct ieee80211_frame *)&tr->wh; 1211177595Sweongyo 1212177595Sweongyo /* 1213177595Sweongyo * Formulate tx descriptor. 1214177595Sweongyo */ 1215177595Sweongyo ds = bf->bf_desc; 1216177595Sweongyo txq = bf->bf_txq; 1217177595Sweongyo 1218177595Sweongyo ds->qosctrl = qos; /* NB: already little-endian */ 1219177595Sweongyo ds->pktptr = htole32(bf->bf_segs[0].ds_addr); 1220177595Sweongyo ds->pktlen = htole16(bf->bf_segs[0].ds_len); 1221177595Sweongyo /* NB: pPhysNext setup once, don't touch */ 1222177595Sweongyo ds->datarate = IS_DATA_FRAME(wh) ? 1 : 0; 1223177595Sweongyo ds->sap_pktinfo = 0; 1224177595Sweongyo ds->format = 0; 1225177595Sweongyo 1226177595Sweongyo /* 1227177595Sweongyo * Select transmit rate. 1228177595Sweongyo */ 1229177595Sweongyo switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1230177595Sweongyo case IEEE80211_FC0_TYPE_MGT: 1231177595Sweongyo sc->malo_stats.mst_tx_mgmt++; 1232177595Sweongyo /* fall thru... */ 1233177595Sweongyo case IEEE80211_FC0_TYPE_CTL: 1234177595Sweongyo ds->txpriority = 1; 1235177595Sweongyo break; 1236177595Sweongyo case IEEE80211_FC0_TYPE_DATA: 1237177595Sweongyo ds->txpriority = txq->qnum; 1238177595Sweongyo break; 1239177595Sweongyo default: 1240177595Sweongyo if_printf(ifp, "bogus frame type 0x%x (%s)\n", 1241177595Sweongyo wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1242177595Sweongyo /* XXX statistic */ 1243177595Sweongyo m_freem(m0); 1244177595Sweongyo return EIO; 1245177595Sweongyo } 1246177595Sweongyo 1247177595Sweongyo#ifdef MALO_DEBUG 1248177595Sweongyo if (IFF_DUMPPKTS_XMIT(sc)) 1249177595Sweongyo ieee80211_dump_pkt(ic, 1250177595Sweongyo mtod(m0, const uint8_t *)+sizeof(uint16_t), 1251177595Sweongyo m0->m_len - sizeof(uint16_t), ds->datarate, -1); 1252177595Sweongyo#endif 1253177595Sweongyo 1254177595Sweongyo MALO_TXQ_LOCK(txq); 1255177595Sweongyo if (!IS_DATA_FRAME(wh)) 1256177595Sweongyo ds->status |= htole32(1); 1257177595Sweongyo ds->status |= htole32(MALO_TXD_STATUS_FW_OWNED); 1258177595Sweongyo STAILQ_INSERT_TAIL(&txq->active, bf, bf_list); 1259177595Sweongyo MALO_TXDESC_SYNC(txq, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1260177595Sweongyo 1261177595Sweongyo ifp->if_opackets++; 1262199559Sjhb sc->malo_timer = 5; 1263177595Sweongyo MALO_TXQ_UNLOCK(txq); 1264177595Sweongyo return 0; 1265177595Sweongyo#undef IEEE80211_DIR_DSTODS 1266177595Sweongyo} 1267177595Sweongyo 1268177595Sweongyostatic void 1269177595Sweongyomalo_start(struct ifnet *ifp) 1270177595Sweongyo{ 1271177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1272177595Sweongyo struct ieee80211_node *ni; 1273178354Ssam struct malo_txq *txq = &sc->malo_txq[0]; 1274177595Sweongyo struct malo_txbuf *bf = NULL; 1275177595Sweongyo struct mbuf *m; 1276178354Ssam int nqueued = 0; 1277177595Sweongyo 1278177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) 1279177595Sweongyo return; 1280177595Sweongyo 1281177595Sweongyo for (;;) { 1282178354Ssam IFQ_DRV_DEQUEUE(&ifp->if_snd, m); 1283178354Ssam if (m == NULL) 1284178354Ssam break; 1285178354Ssam ni = (struct ieee80211_node *) m->m_pkthdr.rcvif; 1286178354Ssam bf = malo_getbuf(sc, txq); 1287178354Ssam if (bf == NULL) { 1288178354Ssam IFQ_DRV_PREPEND(&ifp->if_snd, m); 1289178354Ssam 1290178354Ssam /* XXX blocks other traffic */ 1291178354Ssam ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1292178354Ssam sc->malo_stats.mst_tx_qstop++; 1293178354Ssam break; 1294178354Ssam } 1295177595Sweongyo /* 1296177595Sweongyo * Pass the frame to the h/w for transmission. 1297177595Sweongyo */ 1298177595Sweongyo if (malo_tx_start(sc, ni, bf, m)) { 1299177595Sweongyo ifp->if_oerrors++; 1300177595Sweongyo if (bf != NULL) { 1301177595Sweongyo bf->bf_m = NULL; 1302177595Sweongyo bf->bf_node = NULL; 1303177595Sweongyo MALO_TXQ_LOCK(txq); 1304177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1305177595Sweongyo MALO_TXQ_UNLOCK(txq); 1306177595Sweongyo } 1307177595Sweongyo ieee80211_free_node(ni); 1308177595Sweongyo continue; 1309177595Sweongyo } 1310177595Sweongyo nqueued++; 1311177595Sweongyo 1312177595Sweongyo if (nqueued >= malo_txcoalesce) { 1313177595Sweongyo /* 1314177595Sweongyo * Poke the firmware to process queued frames; 1315177595Sweongyo * see below about (lack of) locking. 1316177595Sweongyo */ 1317177595Sweongyo nqueued = 0; 1318177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1319177595Sweongyo } 1320177595Sweongyo } 1321177595Sweongyo 1322177595Sweongyo if (nqueued) { 1323177595Sweongyo /* 1324177595Sweongyo * NB: We don't need to lock against tx done because 1325177595Sweongyo * this just prods the firmware to check the transmit 1326177595Sweongyo * descriptors. The firmware will also start fetching 1327177595Sweongyo * descriptors by itself if it notices new ones are 1328177595Sweongyo * present when it goes to deliver a tx done interrupt 1329177595Sweongyo * to the host. So if we race with tx done processing 1330177595Sweongyo * it's ok. Delivering the kick here rather than in 1331177595Sweongyo * malo_tx_start is an optimization to avoid poking the 1332177595Sweongyo * firmware for each packet. 1333177595Sweongyo * 1334177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1335177595Sweongyo */ 1336177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1337177595Sweongyo } 1338177595Sweongyo} 1339177595Sweongyo 1340177595Sweongyostatic void 1341199559Sjhbmalo_watchdog(void *arg) 1342177595Sweongyo{ 1343199559Sjhb struct malo_softc *sc; 1344199559Sjhb struct ifnet *ifp; 1345177595Sweongyo 1346199559Sjhb sc = arg; 1347199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1348199559Sjhb if (sc->malo_timer == 0 || --sc->malo_timer > 0) 1349199559Sjhb return; 1350199559Sjhb 1351199559Sjhb ifp = sc->malo_ifp; 1352177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) && !sc->malo_invalid) { 1353177595Sweongyo if_printf(ifp, "watchdog timeout\n"); 1354177595Sweongyo 1355177595Sweongyo /* XXX no way to reset h/w. now */ 1356177595Sweongyo 1357177595Sweongyo ifp->if_oerrors++; 1358177595Sweongyo sc->malo_stats.mst_watchdog++; 1359177595Sweongyo } 1360177595Sweongyo} 1361177595Sweongyo 1362177595Sweongyostatic int 1363177595Sweongyomalo_hal_reset(struct malo_softc *sc) 1364177595Sweongyo{ 1365177595Sweongyo static int first = 0; 1366178354Ssam struct ifnet *ifp = sc->malo_ifp; 1367178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1368177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1369177595Sweongyo 1370177595Sweongyo if (first == 0) { 1371177595Sweongyo /* 1372177595Sweongyo * NB: when the device firstly is initialized, sometimes 1373177595Sweongyo * firmware could override rx/tx dma registers so we re-set 1374177595Sweongyo * these values once. 1375177595Sweongyo */ 1376177595Sweongyo malo_hal_set_rxtxdma(sc); 1377177595Sweongyo first = 1; 1378177595Sweongyo } 1379177595Sweongyo 1380177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_RX, sc->malo_rxantenna); 1381177595Sweongyo malo_hal_setantenna(mh, MHA_ANTENNATYPE_TX, sc->malo_txantenna); 1382177595Sweongyo malo_hal_setradio(mh, 1, MHP_AUTO_PREAMBLE); 1383177595Sweongyo malo_chan_set(sc, ic->ic_curchan); 1384177595Sweongyo 1385177595Sweongyo /* XXX needs other stuffs? */ 1386177595Sweongyo 1387177595Sweongyo return 1; 1388177595Sweongyo} 1389177595Sweongyo 1390177595Sweongyostatic __inline struct mbuf * 1391177595Sweongyomalo_getrxmbuf(struct malo_softc *sc, struct malo_rxbuf *bf) 1392177595Sweongyo{ 1393177595Sweongyo struct mbuf *m; 1394177595Sweongyo bus_addr_t paddr; 1395177595Sweongyo int error; 1396177595Sweongyo 1397177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 1398243857Sglebius m = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, MJUMPAGESIZE); 1399177595Sweongyo if (m == NULL) { 1400177595Sweongyo sc->malo_stats.mst_rx_nombuf++; /* XXX */ 1401177595Sweongyo return NULL; 1402177595Sweongyo } 1403177595Sweongyo error = bus_dmamap_load(sc->malo_dmat, bf->bf_dmamap, 1404177595Sweongyo mtod(m, caddr_t), MJUMPAGESIZE, 1405177595Sweongyo malo_load_cb, &paddr, BUS_DMA_NOWAIT); 1406177595Sweongyo if (error != 0) { 1407177595Sweongyo if_printf(sc->malo_ifp, 1408177595Sweongyo "%s: bus_dmamap_load failed, error %d\n", __func__, error); 1409177595Sweongyo m_freem(m); 1410177595Sweongyo return NULL; 1411177595Sweongyo } 1412177595Sweongyo bf->bf_data = paddr; 1413177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 1414177595Sweongyo 1415177595Sweongyo return m; 1416177595Sweongyo} 1417177595Sweongyo 1418177595Sweongyostatic int 1419177595Sweongyomalo_rxbuf_init(struct malo_softc *sc, struct malo_rxbuf *bf) 1420177595Sweongyo{ 1421177595Sweongyo struct malo_rxdesc *ds; 1422177595Sweongyo 1423177595Sweongyo ds = bf->bf_desc; 1424177595Sweongyo if (bf->bf_m == NULL) { 1425177595Sweongyo bf->bf_m = malo_getrxmbuf(sc, bf); 1426177595Sweongyo if (bf->bf_m == NULL) { 1427177595Sweongyo /* mark descriptor to be skipped */ 1428177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_OS_OWN; 1429177595Sweongyo /* NB: don't need PREREAD */ 1430177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREWRITE); 1431177595Sweongyo return ENOMEM; 1432177595Sweongyo } 1433177595Sweongyo } 1434177595Sweongyo 1435177595Sweongyo /* 1436177595Sweongyo * Setup descriptor. 1437177595Sweongyo */ 1438177595Sweongyo ds->qosctrl = 0; 1439177595Sweongyo ds->snr = 0; 1440177595Sweongyo ds->status = MALO_RXD_STATUS_IDLE; 1441177595Sweongyo ds->channel = 0; 1442177595Sweongyo ds->pktlen = htole16(MALO_RXSIZE); 1443177595Sweongyo ds->nf = 0; 1444177595Sweongyo ds->physbuffdata = htole32(bf->bf_data); 1445177595Sweongyo /* NB: don't touch pPhysNext, set once */ 1446177595Sweongyo ds->rxcontrol = MALO_RXD_CTRL_DRIVER_OWN; 1447177595Sweongyo MALO_RXDESC_SYNC(sc, ds, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1448177595Sweongyo 1449177595Sweongyo return 0; 1450177595Sweongyo} 1451177595Sweongyo 1452177595Sweongyo/* 1453177595Sweongyo * Setup the rx data structures. This should only be done once or we may get 1454177595Sweongyo * out of sync with the firmware. 1455177595Sweongyo */ 1456177595Sweongyostatic int 1457177595Sweongyomalo_startrecv(struct malo_softc *sc) 1458177595Sweongyo{ 1459177595Sweongyo struct malo_rxbuf *bf, *prev; 1460177595Sweongyo struct malo_rxdesc *ds; 1461177595Sweongyo 1462177595Sweongyo if (sc->malo_recvsetup == 1) { 1463177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1464177595Sweongyo return 0; 1465177595Sweongyo } 1466177595Sweongyo 1467177595Sweongyo prev = NULL; 1468177595Sweongyo STAILQ_FOREACH(bf, &sc->malo_rxbuf, bf_list) { 1469177595Sweongyo int error = malo_rxbuf_init(sc, bf); 1470177595Sweongyo if (error != 0) { 1471177595Sweongyo DPRINTF(sc, MALO_DEBUG_RECV, 1472177595Sweongyo "%s: malo_rxbuf_init failed %d\n", 1473177595Sweongyo __func__, error); 1474177595Sweongyo return error; 1475177595Sweongyo } 1476177595Sweongyo if (prev != NULL) { 1477177595Sweongyo ds = prev->bf_desc; 1478177595Sweongyo ds->physnext = htole32(bf->bf_daddr); 1479177595Sweongyo } 1480177595Sweongyo prev = bf; 1481177595Sweongyo } 1482177595Sweongyo if (prev != NULL) { 1483177595Sweongyo ds = prev->bf_desc; 1484177595Sweongyo ds->physnext = 1485177595Sweongyo htole32(STAILQ_FIRST(&sc->malo_rxbuf)->bf_daddr); 1486177595Sweongyo } 1487177595Sweongyo 1488177595Sweongyo sc->malo_recvsetup = 1; 1489177595Sweongyo 1490177595Sweongyo malo_mode_init(sc); /* set filters, etc. */ 1491177595Sweongyo 1492177595Sweongyo return 0; 1493177595Sweongyo} 1494177595Sweongyo 1495177595Sweongyostatic void 1496178354Ssammalo_init_locked(struct malo_softc *sc) 1497177595Sweongyo{ 1498177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1499177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1500177595Sweongyo int error; 1501177595Sweongyo 1502177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1503177595Sweongyo __func__, ifp->if_flags); 1504177595Sweongyo 1505178354Ssam MALO_LOCK_ASSERT(sc); 1506177595Sweongyo 1507177595Sweongyo /* 1508177595Sweongyo * Stop anything previously setup. This is safe whether this is 1509177595Sweongyo * the first time through or not. 1510177595Sweongyo */ 1511177595Sweongyo malo_stop_locked(ifp, 0); 1512177595Sweongyo 1513177595Sweongyo /* 1514177595Sweongyo * Push state to the firmware. 1515177595Sweongyo */ 1516177595Sweongyo if (!malo_hal_reset(sc)) { 1517177595Sweongyo if_printf(ifp, "%s: unable to reset hardware\n", __func__); 1518178354Ssam return; 1519177595Sweongyo } 1520177595Sweongyo 1521177595Sweongyo /* 1522177595Sweongyo * Setup recv (once); transmit is already good to go. 1523177595Sweongyo */ 1524177595Sweongyo error = malo_startrecv(sc); 1525177595Sweongyo if (error != 0) { 1526177595Sweongyo if_printf(ifp, "%s: unable to start recv logic, error %d\n", 1527177595Sweongyo __func__, error); 1528178354Ssam return; 1529177595Sweongyo } 1530177595Sweongyo 1531177595Sweongyo /* 1532177595Sweongyo * Enable interrupts. 1533177595Sweongyo */ 1534177595Sweongyo sc->malo_imask = MALO_A2HRIC_BIT_RX_RDY 1535177595Sweongyo | MALO_A2HRIC_BIT_TX_DONE 1536177595Sweongyo | MALO_A2HRIC_BIT_OPC_DONE 1537177595Sweongyo | MALO_A2HRIC_BIT_MAC_EVENT 1538177595Sweongyo | MALO_A2HRIC_BIT_RX_PROBLEM 1539177595Sweongyo | MALO_A2HRIC_BIT_ICV_ERROR 1540177595Sweongyo | MALO_A2HRIC_BIT_RADAR_DETECT 1541177595Sweongyo | MALO_A2HRIC_BIT_CHAN_SWITCH; 1542177595Sweongyo 1543177595Sweongyo ifp->if_drv_flags |= IFF_DRV_RUNNING; 1544177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1545199559Sjhb callout_reset(&sc->malo_watchdog_timer, hz, malo_watchdog, sc); 1546178354Ssam} 1547177595Sweongyo 1548178354Ssamstatic void 1549178354Ssammalo_init(void *arg) 1550178354Ssam{ 1551178354Ssam struct malo_softc *sc = (struct malo_softc *) arg; 1552178354Ssam struct ifnet *ifp = sc->malo_ifp; 1553178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1554178354Ssam 1555178354Ssam DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags 0x%x\n", 1556178354Ssam __func__, ifp->if_flags); 1557177595Sweongyo 1558178354Ssam MALO_LOCK(sc); 1559178354Ssam malo_init_locked(sc); 1560177595Sweongyo 1561177595Sweongyo MALO_UNLOCK(sc); 1562177595Sweongyo 1563178354Ssam if (ifp->if_drv_flags & IFF_DRV_RUNNING) 1564178354Ssam ieee80211_start_all(ic); /* start all vap's */ 1565177595Sweongyo} 1566177595Sweongyo 1567177595Sweongyo/* 1568177595Sweongyo * Set the multicast filter contents into the hardware. 1569177595Sweongyo */ 1570177595Sweongyostatic void 1571177595Sweongyomalo_setmcastfilter(struct malo_softc *sc) 1572177595Sweongyo{ 1573178354Ssam struct ifnet *ifp = sc->malo_ifp; 1574178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1575177595Sweongyo struct ifmultiaddr *ifma; 1576177595Sweongyo uint8_t macs[IEEE80211_ADDR_LEN * MALO_HAL_MCAST_MAX]; 1577177595Sweongyo uint8_t *mp; 1578177595Sweongyo int nmc; 1579177595Sweongyo 1580177595Sweongyo mp = macs; 1581177595Sweongyo nmc = 0; 1582177595Sweongyo 1583177595Sweongyo if (ic->ic_opmode == IEEE80211_M_MONITOR || 1584177595Sweongyo (ifp->if_flags & (IFF_ALLMULTI | IFF_PROMISC))) 1585177595Sweongyo goto all; 1586177595Sweongyo 1587195049Srwatson if_maddr_rlock(ifp); 1588177595Sweongyo TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 1589177595Sweongyo if (ifma->ifma_addr->sa_family != AF_LINK) 1590177595Sweongyo continue; 1591177595Sweongyo 1592177595Sweongyo if (nmc == MALO_HAL_MCAST_MAX) { 1593177595Sweongyo ifp->if_flags |= IFF_ALLMULTI; 1594195049Srwatson if_maddr_runlock(ifp); 1595177595Sweongyo goto all; 1596177595Sweongyo } 1597177595Sweongyo IEEE80211_ADDR_COPY(mp, 1598177595Sweongyo LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); 1599177595Sweongyo 1600177595Sweongyo mp += IEEE80211_ADDR_LEN, nmc++; 1601177595Sweongyo } 1602195049Srwatson if_maddr_runlock(ifp); 1603177595Sweongyo 1604177595Sweongyo malo_hal_setmcast(sc->malo_mh, nmc, macs); 1605177595Sweongyo 1606177595Sweongyoall: 1607177595Sweongyo /* 1608177595Sweongyo * XXX we don't know how to set the f/w for supporting 1609177595Sweongyo * IFF_ALLMULTI | IFF_PROMISC cases 1610177595Sweongyo */ 1611177595Sweongyo return; 1612177595Sweongyo} 1613177595Sweongyo 1614177595Sweongyostatic int 1615177595Sweongyomalo_mode_init(struct malo_softc *sc) 1616177595Sweongyo{ 1617178354Ssam struct ifnet *ifp = sc->malo_ifp; 1618178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1619177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1620177595Sweongyo 1621177595Sweongyo /* 1622177595Sweongyo * NB: Ignore promisc in hostap mode; it's set by the 1623177595Sweongyo * bridge. This is wrong but we have no way to 1624177595Sweongyo * identify internal requests (from the bridge) 1625177595Sweongyo * versus external requests such as for tcpdump. 1626177595Sweongyo */ 1627177595Sweongyo malo_hal_setpromisc(mh, (ifp->if_flags & IFF_PROMISC) && 1628177595Sweongyo ic->ic_opmode != IEEE80211_M_HOSTAP); 1629177595Sweongyo malo_setmcastfilter(sc); 1630177595Sweongyo 1631177595Sweongyo return ENXIO; 1632177595Sweongyo} 1633177595Sweongyo 1634177595Sweongyostatic void 1635177595Sweongyomalo_tx_draintxq(struct malo_softc *sc, struct malo_txq *txq) 1636177595Sweongyo{ 1637177595Sweongyo struct ieee80211_node *ni; 1638177595Sweongyo struct malo_txbuf *bf; 1639177595Sweongyo u_int ix; 1640177595Sweongyo 1641177595Sweongyo /* 1642177595Sweongyo * NB: this assumes output has been stopped and 1643177595Sweongyo * we do not need to block malo_tx_tasklet 1644177595Sweongyo */ 1645177595Sweongyo for (ix = 0;; ix++) { 1646177595Sweongyo MALO_TXQ_LOCK(txq); 1647177595Sweongyo bf = STAILQ_FIRST(&txq->active); 1648177595Sweongyo if (bf == NULL) { 1649177595Sweongyo MALO_TXQ_UNLOCK(txq); 1650177595Sweongyo break; 1651177595Sweongyo } 1652177595Sweongyo STAILQ_REMOVE_HEAD(&txq->active, bf_list); 1653177595Sweongyo MALO_TXQ_UNLOCK(txq); 1654177595Sweongyo#ifdef MALO_DEBUG 1655177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RESET) { 1656178354Ssam struct ifnet *ifp = sc->malo_ifp; 1657178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1658177595Sweongyo const struct malo_txrec *tr = 1659177595Sweongyo mtod(bf->bf_m, const struct malo_txrec *); 1660177595Sweongyo malo_printtxbuf(bf, txq->qnum, ix); 1661178354Ssam ieee80211_dump_pkt(ic, (const uint8_t *)&tr->wh, 1662177595Sweongyo bf->bf_m->m_len - sizeof(tr->fwlen), 0, -1); 1663177595Sweongyo } 1664177595Sweongyo#endif /* MALO_DEBUG */ 1665177595Sweongyo bus_dmamap_unload(sc->malo_dmat, bf->bf_dmamap); 1666177595Sweongyo ni = bf->bf_node; 1667177595Sweongyo bf->bf_node = NULL; 1668177595Sweongyo if (ni != NULL) { 1669177595Sweongyo /* 1670177595Sweongyo * Reclaim node reference. 1671177595Sweongyo */ 1672177595Sweongyo ieee80211_free_node(ni); 1673177595Sweongyo } 1674177595Sweongyo m_freem(bf->bf_m); 1675177595Sweongyo bf->bf_m = NULL; 1676177595Sweongyo 1677177595Sweongyo MALO_TXQ_LOCK(txq); 1678177595Sweongyo STAILQ_INSERT_TAIL(&txq->free, bf, bf_list); 1679177595Sweongyo txq->nfree++; 1680177595Sweongyo MALO_TXQ_UNLOCK(txq); 1681177595Sweongyo } 1682177595Sweongyo} 1683177595Sweongyo 1684177595Sweongyostatic void 1685177595Sweongyomalo_stop_locked(struct ifnet *ifp, int disable) 1686177595Sweongyo{ 1687177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1688177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1689178354Ssam int i; 1690177595Sweongyo 1691177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: invalid %u if_flags 0x%x\n", 1692177595Sweongyo __func__, sc->malo_invalid, ifp->if_flags); 1693177595Sweongyo 1694177595Sweongyo MALO_LOCK_ASSERT(sc); 1695177595Sweongyo 1696177595Sweongyo if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) 1697177595Sweongyo return; 1698177595Sweongyo 1699177595Sweongyo /* 1700177595Sweongyo * Shutdown the hardware and driver: 1701177595Sweongyo * disable interrupts 1702177595Sweongyo * turn off the radio 1703177595Sweongyo * drain and release tx queues 1704177595Sweongyo * 1705177595Sweongyo * Note that some of this work is not possible if the hardware 1706177595Sweongyo * is gone (invalid). 1707177595Sweongyo */ 1708177595Sweongyo ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 1709199559Sjhb callout_stop(&sc->malo_watchdog_timer); 1710199559Sjhb sc->malo_timer = 0; 1711178354Ssam /* diable interrupt. */ 1712178354Ssam malo_hal_intrset(mh, 0); 1713178354Ssam /* turn off the radio. */ 1714178354Ssam malo_hal_setradio(mh, 0, MHP_AUTO_PREAMBLE); 1715177595Sweongyo 1716177595Sweongyo /* drain and release tx queues. */ 1717177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 1718177595Sweongyo malo_tx_draintxq(sc, &sc->malo_txq[i]); 1719177595Sweongyo} 1720177595Sweongyo 1721177595Sweongyostatic int 1722177595Sweongyomalo_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1723177595Sweongyo{ 1724177595Sweongyo#define MALO_IS_RUNNING(ifp) \ 1725177595Sweongyo ((ifp->if_flags & IFF_UP) && (ifp->if_drv_flags & IFF_DRV_RUNNING)) 1726177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1727178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1728178354Ssam struct ifreq *ifr = (struct ifreq *) data; 1729178354Ssam int error = 0, startall = 0; 1730177595Sweongyo 1731177595Sweongyo MALO_LOCK(sc); 1732177595Sweongyo switch (cmd) { 1733177595Sweongyo case SIOCSIFFLAGS: 1734177595Sweongyo if (MALO_IS_RUNNING(ifp)) { 1735177595Sweongyo /* 1736177595Sweongyo * To avoid rescanning another access point, 1737177595Sweongyo * do not call malo_init() here. Instead, 1738177595Sweongyo * only reflect promisc mode settings. 1739177595Sweongyo */ 1740177595Sweongyo malo_mode_init(sc); 1741177595Sweongyo } else if (ifp->if_flags & IFF_UP) { 1742177595Sweongyo /* 1743177595Sweongyo * Beware of being called during attach/detach 1744177595Sweongyo * to reset promiscuous mode. In that case we 1745177595Sweongyo * will still be marked UP but not RUNNING. 1746177595Sweongyo * However trying to re-init the interface 1747177595Sweongyo * is the wrong thing to do as we've already 1748177595Sweongyo * torn down much of our state. There's 1749177595Sweongyo * probably a better way to deal with this. 1750177595Sweongyo */ 1751178354Ssam if (!sc->malo_invalid) { 1752178354Ssam malo_init_locked(sc); 1753178354Ssam startall = 1; 1754178354Ssam } 1755177595Sweongyo } else 1756177595Sweongyo malo_stop_locked(ifp, 1); 1757177595Sweongyo break; 1758178354Ssam case SIOCGIFMEDIA: 1759178354Ssam case SIOCSIFMEDIA: 1760178354Ssam error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd); 1761177595Sweongyo break; 1762177595Sweongyo default: 1763178354Ssam error = ether_ioctl(ifp, cmd, data); 1764177595Sweongyo break; 1765177595Sweongyo } 1766177595Sweongyo MALO_UNLOCK(sc); 1767177595Sweongyo 1768178354Ssam if (startall) 1769178354Ssam ieee80211_start_all(ic); 1770177595Sweongyo return error; 1771177595Sweongyo#undef MALO_IS_RUNNING 1772177595Sweongyo} 1773177595Sweongyo 1774177595Sweongyo/* 1775177595Sweongyo * Callback from the 802.11 layer to update the slot time 1776177595Sweongyo * based on the current setting. We use it to notify the 1777177595Sweongyo * firmware of ERP changes and the f/w takes care of things 1778177595Sweongyo * like slot time and preamble. 1779177595Sweongyo */ 1780177595Sweongyostatic void 1781177595Sweongyomalo_updateslot(struct ifnet *ifp) 1782177595Sweongyo{ 1783177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1784178354Ssam struct ieee80211com *ic = ifp->if_l2com; 1785177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1786177595Sweongyo int error; 1787177595Sweongyo 1788177595Sweongyo /* NB: can be called early; suppress needless cmds */ 1789177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 1790177595Sweongyo return; 1791177595Sweongyo 1792177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, 1793177595Sweongyo "%s: chan %u MHz/flags 0x%x %s slot, (ic_flags 0x%x)\n", 1794177595Sweongyo __func__, ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags, 1795177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long", ic->ic_flags); 1796177595Sweongyo 1797177595Sweongyo if (ic->ic_flags & IEEE80211_F_SHSLOT) 1798177595Sweongyo error = malo_hal_set_slot(mh, 1); 1799177595Sweongyo else 1800177595Sweongyo error = malo_hal_set_slot(mh, 0); 1801177595Sweongyo 1802177595Sweongyo if (error != 0) 1803177595Sweongyo device_printf(sc->malo_dev, "setting %s slot failed\n", 1804177595Sweongyo ic->ic_flags & IEEE80211_F_SHSLOT ? "short" : "long"); 1805177595Sweongyo} 1806177595Sweongyo 1807177595Sweongyostatic int 1808178354Ssammalo_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1809177595Sweongyo{ 1810178354Ssam struct ieee80211com *ic = vap->iv_ic; 1811178354Ssam struct malo_softc *sc = ic->ic_ifp->if_softc; 1812177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1813177595Sweongyo int error; 1814177595Sweongyo 1815177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1816178354Ssam ieee80211_state_name[vap->iv_state], 1817177595Sweongyo ieee80211_state_name[nstate]); 1818177595Sweongyo 1819177595Sweongyo /* 1820178354Ssam * Invoke the net80211 layer first so iv_bss is setup. 1821177595Sweongyo */ 1822178354Ssam error = MALO_VAP(vap)->malo_newstate(vap, nstate, arg); 1823178354Ssam if (error != 0) 1824178354Ssam return error; 1825178354Ssam 1826178354Ssam if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) { 1827178354Ssam struct ieee80211_node *ni = vap->iv_bss; 1828178354Ssam enum ieee80211_phymode mode = ieee80211_chan2mode(ni->ni_chan); 1829178354Ssam const struct ieee80211_txparam *tp = &vap->iv_txparms[mode]; 1830178354Ssam 1831177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, 1832178354Ssam "%s: %s(RUN): iv_flags 0x%08x bintvl %d bssid %s " 1833178354Ssam "capinfo 0x%04x chan %d associd 0x%x mode %d rate %d\n", 1834178354Ssam vap->iv_ifp->if_xname, __func__, vap->iv_flags, 1835177595Sweongyo ni->ni_intval, ether_sprintf(ni->ni_bssid), ni->ni_capinfo, 1836178354Ssam ieee80211_chan2ieee(ic, ic->ic_curchan), 1837178354Ssam ni->ni_associd, mode, tp->ucastrate); 1838177595Sweongyo 1839178354Ssam malo_hal_setradio(mh, 1, 1840178354Ssam (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? 1841178354Ssam MHP_SHORT_PREAMBLE : MHP_LONG_PREAMBLE); 1842178354Ssam malo_hal_setassocid(sc->malo_mh, ni->ni_bssid, ni->ni_associd); 1843178354Ssam malo_hal_set_rate(mh, mode, 1844178354Ssam tp->ucastrate == IEEE80211_FIXED_RATE_NONE ? 1845178354Ssam 0 : malo_fix2rate(tp->ucastrate)); 1846177595Sweongyo } 1847178354Ssam return 0; 1848177595Sweongyo} 1849177595Sweongyo 1850177595Sweongyostatic int 1851177595Sweongyomalo_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1852177595Sweongyo const struct ieee80211_bpf_params *params) 1853177595Sweongyo{ 1854177595Sweongyo struct ieee80211com *ic = ni->ni_ic; 1855177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 1856177595Sweongyo struct malo_softc *sc = ifp->if_softc; 1857177595Sweongyo struct malo_txbuf *bf; 1858177595Sweongyo struct malo_txq *txq; 1859177595Sweongyo 1860177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0 || sc->malo_invalid) { 1861177595Sweongyo ieee80211_free_node(ni); 1862177595Sweongyo m_freem(m); 1863177595Sweongyo return ENETDOWN; 1864177595Sweongyo } 1865177595Sweongyo 1866177595Sweongyo /* 1867177595Sweongyo * Grab a TX buffer and associated resources. Note that we depend 1868177595Sweongyo * on the classification by the 802.11 layer to get to the right h/w 1869177595Sweongyo * queue. Management frames must ALWAYS go on queue 1 but we 1870177595Sweongyo * cannot just force that here because we may receive non-mgt frames. 1871177595Sweongyo */ 1872177595Sweongyo txq = &sc->malo_txq[0]; 1873177595Sweongyo bf = malo_getbuf(sc, txq); 1874177595Sweongyo if (bf == NULL) { 1875177595Sweongyo /* XXX blocks other traffic */ 1876177595Sweongyo ifp->if_drv_flags |= IFF_DRV_OACTIVE; 1877177595Sweongyo ieee80211_free_node(ni); 1878177595Sweongyo m_freem(m); 1879177595Sweongyo return ENOBUFS; 1880177595Sweongyo } 1881177595Sweongyo 1882177595Sweongyo /* 1883177595Sweongyo * Pass the frame to the h/w for transmission. 1884177595Sweongyo */ 1885177595Sweongyo if (malo_tx_start(sc, ni, bf, m) != 0) { 1886177595Sweongyo ifp->if_oerrors++; 1887177595Sweongyo bf->bf_m = NULL; 1888177595Sweongyo bf->bf_node = NULL; 1889177595Sweongyo MALO_TXQ_LOCK(txq); 1890177595Sweongyo STAILQ_INSERT_HEAD(&txq->free, bf, bf_list); 1891177595Sweongyo txq->nfree++; 1892177595Sweongyo MALO_TXQ_UNLOCK(txq); 1893177595Sweongyo 1894177595Sweongyo ieee80211_free_node(ni); 1895177595Sweongyo return EIO; /* XXX */ 1896177595Sweongyo } 1897177595Sweongyo 1898177595Sweongyo /* 1899177595Sweongyo * NB: We don't need to lock against tx done because this just 1900177595Sweongyo * prods the firmware to check the transmit descriptors. The firmware 1901177595Sweongyo * will also start fetching descriptors by itself if it notices 1902177595Sweongyo * new ones are present when it goes to deliver a tx done interrupt 1903177595Sweongyo * to the host. So if we race with tx done processing it's ok. 1904177595Sweongyo * Delivering the kick here rather than in malo_tx_start is 1905177595Sweongyo * an optimization to avoid poking the firmware for each packet. 1906177595Sweongyo * 1907177595Sweongyo * NB: the queue id isn't used so 0 is ok. 1908177595Sweongyo */ 1909177595Sweongyo malo_hal_txstart(sc->malo_mh, 0/*XXX*/); 1910177595Sweongyo 1911177595Sweongyo return 0; 1912177595Sweongyo} 1913177595Sweongyo 1914177595Sweongyostatic void 1915177595Sweongyomalo_sysctlattach(struct malo_softc *sc) 1916177595Sweongyo{ 1917177595Sweongyo#ifdef MALO_DEBUG 1918177595Sweongyo struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->malo_dev); 1919177595Sweongyo struct sysctl_oid *tree = device_get_sysctl_tree(sc->malo_dev); 1920177595Sweongyo 1921177595Sweongyo sc->malo_debug = malo_debug; 1922177595Sweongyo SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, 1923177595Sweongyo "debug", CTLFLAG_RW, &sc->malo_debug, 0, 1924177595Sweongyo "control debugging printfs"); 1925177595Sweongyo#endif 1926177595Sweongyo} 1927177595Sweongyo 1928177595Sweongyostatic void 1929177595Sweongyomalo_announce(struct malo_softc *sc) 1930177595Sweongyo{ 1931177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 1932177595Sweongyo 1933177595Sweongyo if_printf(ifp, "versions [hw %d fw %d.%d.%d.%d] (regioncode %d)\n", 1934177595Sweongyo sc->malo_hwspecs.hwversion, 1935177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 24) & 0xff, 1936177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 16) & 0xff, 1937177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 8) & 0xff, 1938177595Sweongyo (sc->malo_hwspecs.fw_releasenum >> 0) & 0xff, 1939177595Sweongyo sc->malo_hwspecs.regioncode); 1940177595Sweongyo 1941177595Sweongyo if (bootverbose || malo_rxbuf != MALO_RXBUF) 1942177595Sweongyo if_printf(ifp, "using %u rx buffers\n", malo_rxbuf); 1943177595Sweongyo if (bootverbose || malo_txbuf != MALO_TXBUF) 1944177595Sweongyo if_printf(ifp, "using %u tx buffers\n", malo_txbuf); 1945177595Sweongyo} 1946177595Sweongyo 1947177595Sweongyo/* 1948177595Sweongyo * Convert net80211 channel to a HAL channel. 1949177595Sweongyo */ 1950177595Sweongyostatic void 1951177595Sweongyomalo_mapchan(struct malo_hal_channel *hc, const struct ieee80211_channel *chan) 1952177595Sweongyo{ 1953177595Sweongyo hc->channel = chan->ic_ieee; 1954177595Sweongyo 1955177595Sweongyo *(uint32_t *)&hc->flags = 0; 1956177595Sweongyo if (IEEE80211_IS_CHAN_2GHZ(chan)) 1957177595Sweongyo hc->flags.freqband = MALO_FREQ_BAND_2DOT4GHZ; 1958177595Sweongyo} 1959177595Sweongyo 1960177595Sweongyo/* 1961177595Sweongyo * Set/change channels. If the channel is really being changed, 1962177595Sweongyo * it's done by reseting the chip. To accomplish this we must 1963177595Sweongyo * first cleanup any pending DMA, then restart stuff after a la 1964177595Sweongyo * malo_init. 1965177595Sweongyo */ 1966177595Sweongyostatic int 1967177595Sweongyomalo_chan_set(struct malo_softc *sc, struct ieee80211_channel *chan) 1968177595Sweongyo{ 1969177595Sweongyo struct malo_hal *mh = sc->malo_mh; 1970177595Sweongyo struct malo_hal_channel hchan; 1971177595Sweongyo 1972177595Sweongyo DPRINTF(sc, MALO_DEBUG_RESET, "%s: chan %u MHz/flags 0x%x\n", 1973177595Sweongyo __func__, chan->ic_freq, chan->ic_flags); 1974177595Sweongyo 1975177595Sweongyo /* 1976177595Sweongyo * Convert to a HAL channel description with the flags constrained 1977177595Sweongyo * to reflect the current operating mode. 1978177595Sweongyo */ 1979177595Sweongyo malo_mapchan(&hchan, chan); 1980177595Sweongyo malo_hal_intrset(mh, 0); /* disable interrupts */ 1981177595Sweongyo malo_hal_setchannel(mh, &hchan); 1982177595Sweongyo malo_hal_settxpower(mh, &hchan); 1983177595Sweongyo 1984177595Sweongyo /* 1985177595Sweongyo * Update internal state. 1986177595Sweongyo */ 1987177595Sweongyo sc->malo_tx_th.wt_chan_freq = htole16(chan->ic_freq); 1988177595Sweongyo sc->malo_rx_th.wr_chan_freq = htole16(chan->ic_freq); 1989177595Sweongyo if (IEEE80211_IS_CHAN_ANYG(chan)) { 1990177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_G); 1991177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_G); 1992177595Sweongyo } else { 1993177595Sweongyo sc->malo_tx_th.wt_chan_flags = htole16(IEEE80211_CHAN_B); 1994177595Sweongyo sc->malo_rx_th.wr_chan_flags = htole16(IEEE80211_CHAN_B); 1995177595Sweongyo } 1996177595Sweongyo sc->malo_curchan = hchan; 1997177595Sweongyo malo_hal_intrset(mh, sc->malo_imask); 1998177595Sweongyo 1999177595Sweongyo return 0; 2000177595Sweongyo} 2001177595Sweongyo 2002177595Sweongyostatic void 2003177595Sweongyomalo_scan_start(struct ieee80211com *ic) 2004177595Sweongyo{ 2005177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2006177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2007177595Sweongyo 2008177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2009177595Sweongyo} 2010177595Sweongyo 2011177595Sweongyostatic void 2012177595Sweongyomalo_scan_end(struct ieee80211com *ic) 2013177595Sweongyo{ 2014177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2015177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2016177595Sweongyo 2017177595Sweongyo DPRINTF(sc, MALO_DEBUG_STATE, "%s\n", __func__); 2018177595Sweongyo} 2019177595Sweongyo 2020177595Sweongyostatic void 2021177595Sweongyomalo_set_channel(struct ieee80211com *ic) 2022177595Sweongyo{ 2023177595Sweongyo struct ifnet *ifp = ic->ic_ifp; 2024177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2025177595Sweongyo 2026177595Sweongyo (void) malo_chan_set(sc, ic->ic_curchan); 2027177595Sweongyo} 2028177595Sweongyo 2029177595Sweongyostatic void 2030177595Sweongyomalo_rx_proc(void *arg, int npending) 2031177595Sweongyo{ 2032177595Sweongyo#define IEEE80211_DIR_DSTODS(wh) \ 2033177595Sweongyo ((((const struct ieee80211_frame *)wh)->i_fc[1] & \ 2034177595Sweongyo IEEE80211_FC1_DIR_MASK) == IEEE80211_FC1_DIR_DSTODS) 2035177595Sweongyo struct malo_softc *sc = arg; 2036178354Ssam struct ifnet *ifp = sc->malo_ifp; 2037178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2038177595Sweongyo struct malo_rxbuf *bf; 2039177595Sweongyo struct malo_rxdesc *ds; 2040177595Sweongyo struct mbuf *m, *mnew; 2041177595Sweongyo struct ieee80211_qosframe *wh; 2042177595Sweongyo struct ieee80211_qosframe_addr4 *wh4; 2043177595Sweongyo struct ieee80211_node *ni; 2044177595Sweongyo int off, len, hdrlen, pktlen, rssi, ntodo; 2045177595Sweongyo uint8_t *data, status; 2046177595Sweongyo uint32_t readptr, writeptr; 2047177595Sweongyo 2048177595Sweongyo DPRINTF(sc, MALO_DEBUG_RX_PROC, 2049177595Sweongyo "%s: pending %u rdptr(0x%x) 0x%x wrptr(0x%x) 0x%x\n", 2050177595Sweongyo __func__, npending, 2051177595Sweongyo sc->malo_hwspecs.rxdesc_read, 2052177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read), 2053177595Sweongyo sc->malo_hwspecs.rxdesc_write, 2054177595Sweongyo malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write)); 2055177595Sweongyo 2056177595Sweongyo readptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_read); 2057177595Sweongyo writeptr = malo_bar0_read4(sc, sc->malo_hwspecs.rxdesc_write); 2058177595Sweongyo if (readptr == writeptr) 2059177595Sweongyo return; 2060177595Sweongyo 2061177595Sweongyo bf = sc->malo_rxnext; 2062178354Ssam for (ntodo = malo_rxquota; ntodo > 0 && readptr != writeptr; ntodo--) { 2063177595Sweongyo if (bf == NULL) { 2064177595Sweongyo bf = STAILQ_FIRST(&sc->malo_rxbuf); 2065177595Sweongyo break; 2066177595Sweongyo } 2067177595Sweongyo ds = bf->bf_desc; 2068177595Sweongyo if (bf->bf_m == NULL) { 2069177595Sweongyo /* 2070177595Sweongyo * If data allocation failed previously there 2071177595Sweongyo * will be no buffer; try again to re-populate it. 2072177595Sweongyo * Note the firmware will not advance to the next 2073177595Sweongyo * descriptor with a dma buffer so we must mimic 2074177595Sweongyo * this or we'll get out of sync. 2075177595Sweongyo */ 2076177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, 2077177595Sweongyo "%s: rx buf w/o dma memory\n", __func__); 2078177595Sweongyo (void)malo_rxbuf_init(sc, bf); 2079177595Sweongyo break; 2080177595Sweongyo } 2081177595Sweongyo MALO_RXDESC_SYNC(sc, ds, 2082177595Sweongyo BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 2083177595Sweongyo if (ds->rxcontrol != MALO_RXD_CTRL_DMA_OWN) 2084177595Sweongyo break; 2085177595Sweongyo 2086177595Sweongyo readptr = le32toh(ds->physnext); 2087177595Sweongyo 2088177595Sweongyo#ifdef MALO_DEBUG 2089177595Sweongyo if (sc->malo_debug & MALO_DEBUG_RECV_DESC) 2090177595Sweongyo malo_printrxbuf(bf, 0); 2091177595Sweongyo#endif 2092177595Sweongyo status = ds->status; 2093177595Sweongyo if (status & MALO_RXD_STATUS_DECRYPT_ERR_MASK) { 2094177595Sweongyo ifp->if_ierrors++; 2095177595Sweongyo goto rx_next; 2096177595Sweongyo } 2097177595Sweongyo /* 2098177595Sweongyo * Sync the data buffer. 2099177595Sweongyo */ 2100177595Sweongyo len = le16toh(ds->pktlen); 2101177595Sweongyo bus_dmamap_sync(sc->malo_dmat, bf->bf_dmamap, 2102177595Sweongyo BUS_DMASYNC_POSTREAD); 2103177595Sweongyo /* 2104177595Sweongyo * The 802.11 header is provided all or in part at the front; 2105177595Sweongyo * use it to calculate the true size of the header that we'll 2106177595Sweongyo * construct below. We use this to figure out where to copy 2107177595Sweongyo * payload prior to constructing the header. 2108177595Sweongyo */ 2109177595Sweongyo m = bf->bf_m; 2110201758Smbr data = mtod(m, uint8_t *); 2111177595Sweongyo hdrlen = ieee80211_anyhdrsize(data + sizeof(uint16_t)); 2112177595Sweongyo off = sizeof(uint16_t) + sizeof(struct ieee80211_frame_addr4); 2113177595Sweongyo 2114177595Sweongyo /* 2115178354Ssam * Calculate RSSI. XXX wrong 2116177595Sweongyo */ 2117177595Sweongyo rssi = 2 * ((int) ds->snr - ds->nf); /* NB: .5 dBm */ 2118177595Sweongyo if (rssi > 100) 2119177595Sweongyo rssi = 100; 2120177595Sweongyo 2121177595Sweongyo pktlen = hdrlen + (len - off); 2122177595Sweongyo /* 2123177595Sweongyo * NB: we know our frame is at least as large as 2124177595Sweongyo * IEEE80211_MIN_LEN because there is a 4-address frame at 2125177595Sweongyo * the front. Hence there's no need to vet the packet length. 2126177595Sweongyo * If the frame in fact is too small it should be discarded 2127177595Sweongyo * at the net80211 layer. 2128177595Sweongyo */ 2129177595Sweongyo 2130177595Sweongyo /* XXX don't need mbuf, just dma buffer */ 2131177595Sweongyo mnew = malo_getrxmbuf(sc, bf); 2132177595Sweongyo if (mnew == NULL) { 2133177595Sweongyo ifp->if_ierrors++; 2134177595Sweongyo goto rx_next; 2135177595Sweongyo } 2136177595Sweongyo /* 2137177595Sweongyo * Attach the dma buffer to the mbuf; malo_rxbuf_init will 2138177595Sweongyo * re-setup the rx descriptor using the replacement dma 2139177595Sweongyo * buffer we just installed above. 2140177595Sweongyo */ 2141177595Sweongyo bf->bf_m = mnew; 2142177595Sweongyo m->m_data += off - hdrlen; 2143177595Sweongyo m->m_pkthdr.len = m->m_len = pktlen; 2144177595Sweongyo m->m_pkthdr.rcvif = ifp; 2145177595Sweongyo 2146177595Sweongyo /* 2147177595Sweongyo * Piece 802.11 header together. 2148177595Sweongyo */ 2149177595Sweongyo wh = mtod(m, struct ieee80211_qosframe *); 2150177595Sweongyo /* NB: don't need to do this sometimes but ... */ 2151177595Sweongyo /* XXX special case so we can memcpy after m_devget? */ 2152177595Sweongyo ovbcopy(data + sizeof(uint16_t), wh, hdrlen); 2153177595Sweongyo if (IEEE80211_QOS_HAS_SEQ(wh)) { 2154177595Sweongyo if (IEEE80211_DIR_DSTODS(wh)) { 2155177595Sweongyo wh4 = mtod(m, 2156177595Sweongyo struct ieee80211_qosframe_addr4*); 2157177595Sweongyo *(uint16_t *)wh4->i_qos = ds->qosctrl; 2158177595Sweongyo } else { 2159177595Sweongyo *(uint16_t *)wh->i_qos = ds->qosctrl; 2160177595Sweongyo } 2161177595Sweongyo } 2162192468Ssam if (ieee80211_radiotap_active(ic)) { 2163177595Sweongyo sc->malo_rx_th.wr_flags = 0; 2164177595Sweongyo sc->malo_rx_th.wr_rate = ds->rate; 2165177595Sweongyo sc->malo_rx_th.wr_antsignal = rssi; 2166177595Sweongyo sc->malo_rx_th.wr_antnoise = ds->nf; 2167177595Sweongyo } 2168177595Sweongyo#ifdef MALO_DEBUG 2169177595Sweongyo if (IFF_DUMPPKTS_RECV(sc, wh)) { 2170177595Sweongyo ieee80211_dump_pkt(ic, mtod(m, caddr_t), 2171177595Sweongyo len, ds->rate, rssi); 2172177595Sweongyo } 2173177595Sweongyo#endif 2174177595Sweongyo ifp->if_ipackets++; 2175177595Sweongyo 2176177595Sweongyo /* dispatch */ 2177177595Sweongyo ni = ieee80211_find_rxnode(ic, 2178178354Ssam (struct ieee80211_frame_min *)wh); 2179178354Ssam if (ni != NULL) { 2180192468Ssam (void) ieee80211_input(ni, m, rssi, ds->nf); 2181178354Ssam ieee80211_free_node(ni); 2182178354Ssam } else 2183192468Ssam (void) ieee80211_input_all(ic, m, rssi, ds->nf); 2184177595Sweongyorx_next: 2185177595Sweongyo /* NB: ignore ENOMEM so we process more descriptors */ 2186177595Sweongyo (void) malo_rxbuf_init(sc, bf); 2187177595Sweongyo bf = STAILQ_NEXT(bf, bf_list); 2188177595Sweongyo } 2189177595Sweongyo 2190177595Sweongyo malo_bar0_write4(sc, sc->malo_hwspecs.rxdesc_read, readptr); 2191177595Sweongyo sc->malo_rxnext = bf; 2192177595Sweongyo 2193177595Sweongyo if ((ifp->if_drv_flags & IFF_DRV_OACTIVE) == 0 && 2194177595Sweongyo !IFQ_IS_EMPTY(&ifp->if_snd)) 2195177595Sweongyo malo_start(ifp); 2196177595Sweongyo#undef IEEE80211_DIR_DSTODS 2197177595Sweongyo} 2198177595Sweongyo 2199177595Sweongyostatic void 2200177595Sweongyomalo_stop(struct ifnet *ifp, int disable) 2201177595Sweongyo{ 2202177595Sweongyo struct malo_softc *sc = ifp->if_softc; 2203177595Sweongyo 2204177595Sweongyo MALO_LOCK(sc); 2205177595Sweongyo malo_stop_locked(ifp, disable); 2206177595Sweongyo MALO_UNLOCK(sc); 2207177595Sweongyo} 2208177595Sweongyo 2209177595Sweongyo/* 2210177595Sweongyo * Reclaim all tx queue resources. 2211177595Sweongyo */ 2212177595Sweongyostatic void 2213177595Sweongyomalo_tx_cleanup(struct malo_softc *sc) 2214177595Sweongyo{ 2215177595Sweongyo int i; 2216177595Sweongyo 2217177595Sweongyo for (i = 0; i < MALO_NUM_TX_QUEUES; i++) 2218177595Sweongyo malo_tx_cleanupq(sc, &sc->malo_txq[i]); 2219177595Sweongyo} 2220177595Sweongyo 2221177595Sweongyoint 2222177595Sweongyomalo_detach(struct malo_softc *sc) 2223177595Sweongyo{ 2224177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2225178354Ssam struct ieee80211com *ic = ifp->if_l2com; 2226177595Sweongyo 2227177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2228177595Sweongyo __func__, ifp->if_flags); 2229177595Sweongyo 2230177595Sweongyo malo_stop(ifp, 1); 2231177595Sweongyo 2232177595Sweongyo if (sc->malo_tq != NULL) { 2233177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_rxtask); 2234177595Sweongyo taskqueue_drain(sc->malo_tq, &sc->malo_txtask); 2235177595Sweongyo taskqueue_free(sc->malo_tq); 2236177595Sweongyo sc->malo_tq = NULL; 2237177595Sweongyo } 2238177595Sweongyo 2239177595Sweongyo /* 2240177595Sweongyo * NB: the order of these is important: 2241177595Sweongyo * o call the 802.11 layer before detaching the hal to 2242177595Sweongyo * insure callbacks into the driver to delete global 2243177595Sweongyo * key cache entries can be handled 2244177595Sweongyo * o reclaim the tx queue data structures after calling 2245177595Sweongyo * the 802.11 layer as we'll get called back to reclaim 2246177595Sweongyo * node state and potentially want to use them 2247177595Sweongyo * o to cleanup the tx queues the hal is called, so detach 2248177595Sweongyo * it last 2249177595Sweongyo * Other than that, it's straightforward... 2250177595Sweongyo */ 2251178354Ssam ieee80211_ifdetach(ic); 2252199559Sjhb callout_drain(&sc->malo_watchdog_timer); 2253177595Sweongyo malo_dma_cleanup(sc); 2254177595Sweongyo malo_tx_cleanup(sc); 2255177595Sweongyo malo_hal_detach(sc->malo_mh); 2256177595Sweongyo if_free(ifp); 2257177595Sweongyo 2258177595Sweongyo MALO_LOCK_DESTROY(sc); 2259177595Sweongyo 2260177595Sweongyo return 0; 2261177595Sweongyo} 2262177595Sweongyo 2263177595Sweongyovoid 2264177595Sweongyomalo_shutdown(struct malo_softc *sc) 2265177595Sweongyo{ 2266177595Sweongyo malo_stop(sc->malo_ifp, 1); 2267177595Sweongyo} 2268177595Sweongyo 2269177595Sweongyovoid 2270177595Sweongyomalo_suspend(struct malo_softc *sc) 2271177595Sweongyo{ 2272177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2273177595Sweongyo 2274177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2275177595Sweongyo __func__, ifp->if_flags); 2276177595Sweongyo 2277177595Sweongyo malo_stop(ifp, 1); 2278177595Sweongyo} 2279177595Sweongyo 2280177595Sweongyovoid 2281177595Sweongyomalo_resume(struct malo_softc *sc) 2282177595Sweongyo{ 2283177595Sweongyo struct ifnet *ifp = sc->malo_ifp; 2284177595Sweongyo 2285177595Sweongyo DPRINTF(sc, MALO_DEBUG_ANY, "%s: if_flags %x\n", 2286177595Sweongyo __func__, ifp->if_flags); 2287177595Sweongyo 2288178354Ssam if (ifp->if_flags & IFF_UP) 2289177595Sweongyo malo_init(sc); 2290177595Sweongyo} 2291