159191Skris/*-
2109998Smarkm * ichsmb.c
359191Skris *
459191Skris * Author: Archie Cobbs <archie@freebsd.org>
559191Skris * Copyright (c) 2000 Whistle Communications, Inc.
659191Skris * All rights reserved.
759191Skris *
859191Skris * Subject to the following obligations and disclaimer of warranty, use and
959191Skris * redistribution of this software, in source or object code forms, with or
1059191Skris * without modifications are expressly permitted by Whistle Communications;
11280304Sjkim * provided, however, that:
1259191Skris * 1. Any and all reproductions of the source or object code must include the
1359191Skris *    copyright notice above and the following disclaimer of warranties; and
1459191Skris * 2. No rights are granted, in any manner or form, to use Whistle
1559191Skris *    Communications, Inc. trademarks, including the mark "WHISTLE
1659191Skris *    COMMUNICATIONS" on advertising, endorsements, or otherwise except as
1759191Skris *    such appears in the above copyright notice or in the software.
1859191Skris *
1959191Skris * THIS SOFTWARE IS BEING PROVIDED BY WHISTLE COMMUNICATIONS "AS IS", AND
2059191Skris * TO THE MAXIMUM EXTENT PERMITTED BY LAW, WHISTLE COMMUNICATIONS MAKES NO
2159191Skris * REPRESENTATIONS OR WARRANTIES, EXPRESS OR IMPLIED, REGARDING THIS SOFTWARE,
2259191Skris * INCLUDING WITHOUT LIMITATION, ANY AND ALL IMPLIED WARRANTIES OF
2359191Skris * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
2459191Skris * WHISTLE COMMUNICATIONS DOES NOT WARRANT, GUARANTEE, OR MAKE ANY
2559191Skris * REPRESENTATIONS REGARDING THE USE OF, OR THE RESULTS OF THE USE OF THIS
2659191Skris * SOFTWARE IN TERMS OF ITS CORRECTNESS, ACCURACY, RELIABILITY OR OTHERWISE.
2759191Skris * IN NO EVENT SHALL WHISTLE COMMUNICATIONS BE LIABLE FOR ANY DAMAGES
2859191Skris * RESULTING FROM OR ARISING OUT OF ANY USE OF THIS SOFTWARE, INCLUDING
2959191Skris * WITHOUT LIMITATION, ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
3059191Skris * PUNITIVE, OR CONSEQUENTIAL DAMAGES, PROCUREMENT OF SUBSTITUTE GOODS OR
3159191Skris * SERVICES, LOSS OF USE, DATA OR PROFITS, HOWEVER CAUSED AND UNDER ANY
3259191Skris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3359191Skris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
3459191Skris * THIS SOFTWARE, EVEN IF WHISTLE COMMUNICATIONS IS ADVISED OF THE POSSIBILITY
3559191Skris * OF SUCH DAMAGE.
3659191Skris */
3759191Skris
3859191Skris#include <sys/cdefs.h>
3959191Skris__FBSDID("$FreeBSD: releng/10.3/sys/dev/ichsmb/ichsmb.c 188077 2009-02-03 16:14:37Z jhb $");
4059191Skris
4159191Skris/*
4259191Skris * Support for the SMBus controller logical device which is part of the
4359191Skris * Intel 81801AA (ICH) and 81801AB (ICH0) I/O controller hub chips.
4459191Skris *
4559191Skris * This driver assumes that the generic SMBus code will ensure that
4659191Skris * at most one process at a time calls into the SMBus methods below.
4759191Skris */
4859191Skris
4959191Skris#include <sys/param.h>
5059191Skris#include <sys/systm.h>
5159191Skris#include <sys/kernel.h>
5259191Skris#include <sys/errno.h>
5359191Skris#include <sys/lock.h>
5459191Skris#include <sys/module.h>
5559191Skris#include <sys/mutex.h>
5659191Skris#include <sys/syslog.h>
57109998Smarkm#include <sys/bus.h>
5859191Skris
59127128Snectar#include <machine/bus.h>
6059191Skris#include <sys/rman.h>
61280304Sjkim#include <machine/resource.h>
62109998Smarkm
63109998Smarkm#include <dev/smbus/smbconf.h>
64109998Smarkm
65109998Smarkm#include <dev/ichsmb/ichsmb_var.h>
66109998Smarkm#include <dev/ichsmb/ichsmb_reg.h>
67109998Smarkm
68109998Smarkm/*
69109998Smarkm * Enable debugging by defining ICHSMB_DEBUG to a non-zero value.
70109998Smarkm */
71109998Smarkm#define ICHSMB_DEBUG	0
72109998Smarkm#if ICHSMB_DEBUG != 0 && defined(__CC_SUPPORTS___FUNC__)
73109998Smarkm#define DBG(fmt, args...)	\
74109998Smarkm	do { printf("%s: " fmt, __func__ , ## args); } while (0)
75109998Smarkm#else
76109998Smarkm#define DBG(fmt, args...)	do { } while (0)
77109998Smarkm#endif
78109998Smarkm
79109998Smarkm/*
80109998Smarkm * Our child device driver name
81109998Smarkm */
82109998Smarkm#define DRIVER_SMBUS	"smbus"
83109998Smarkm
84109998Smarkm/*
85109998Smarkm * Internal functions
86109998Smarkm */
87109998Smarkmstatic int ichsmb_wait(sc_p sc);
88109998Smarkm
89109998Smarkm/********************************************************************
90109998Smarkm		BUS-INDEPENDENT BUS METHODS
91109998Smarkm********************************************************************/
92109998Smarkm
93109998Smarkm/*
94109998Smarkm * Handle probe-time duties that are independent of the bus
95109998Smarkm * our device lives on.
9659191Skris */
9759191Skrisint
98238405Sjkimichsmb_probe(device_t dev)
99109998Smarkm{
100280304Sjkim	return (BUS_PROBE_DEFAULT);
101280304Sjkim}
102280304Sjkim
103280304Sjkim/*
10459191Skris * Handle attach-time duties that are independent of the bus
105280304Sjkim * our device lives on.
106280304Sjkim */
107280304Sjkimint
10868651Skrisichsmb_attach(device_t dev)
109280304Sjkim{
110280304Sjkim	const sc_p sc = device_get_softc(dev);
111280304Sjkim	int error;
112280304Sjkim
11359191Skris	/* Create mutex */
114280304Sjkim	mtx_init(&sc->mutex, device_get_nameunit(dev), "ichsmb", MTX_DEF);
115280304Sjkim
116280304Sjkim	/* Add child: an instance of the "smbus" device */
117280304Sjkim	if ((sc->smb = device_add_child(dev, DRIVER_SMBUS, -1)) == NULL) {
118280304Sjkim		device_printf(dev, "no \"%s\" child found\n", DRIVER_SMBUS);
119280304Sjkim		error = ENXIO;
120280304Sjkim		goto fail;
121100928Snectar	}
122280304Sjkim
123280304Sjkim	/* Clear interrupt conditions */
124280304Sjkim	bus_write_1(sc->io_res, ICH_HST_STA, 0xff);
125100928Snectar
126280304Sjkim	/* Set up interrupt handler */
127280304Sjkim	error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
128280304Sjkim	    NULL, ichsmb_device_intr, sc, &sc->irq_handle);
12976866Skris	if (error != 0) {
130280304Sjkim		device_printf(dev, "can't setup irq\n");
131280304Sjkim		goto fail;
132280304Sjkim	}
13359191Skris
134280304Sjkim	/* Attach "smbus" child */
13559191Skris	if ((error = bus_generic_attach(dev)) != 0) {
136280304Sjkim		device_printf(dev, "failed to attach child: %d\n", error);
13759191Skris		goto fail;
138109998Smarkm	}
139280304Sjkim
140280304Sjkim	return (0);
141280304Sjkim
142280304Sjkimfail:
143280304Sjkim	mtx_destroy(&sc->mutex);
144280304Sjkim	return (error);
145280304Sjkim}
14668651Skris
147280304Sjkim/********************************************************************
148280304Sjkim			SMBUS METHODS
149280304Sjkim********************************************************************/
150280304Sjkim
151280304Sjkimint
152280304Sjkimichsmb_callback(device_t dev, int index, void *data)
153280304Sjkim{
154280304Sjkim	int smb_error = 0;
155280304Sjkim
156280304Sjkim	DBG("index=%d how=%d\n", index, data ? *(int *)data : -1);
157280304Sjkim	switch (index) {
158280304Sjkim	case SMB_REQUEST_BUS:
159280304Sjkim		break;
160280304Sjkim	case SMB_RELEASE_BUS:
161280304Sjkim		break;
162280304Sjkim	default:
163280304Sjkim		smb_error = SMB_EABORT;	/* XXX */
164280304Sjkim		break;
165280304Sjkim	}
166280304Sjkim	DBG("smb_error=%d\n", smb_error);
167280304Sjkim	return (smb_error);
168280304Sjkim}
169280304Sjkim
170280304Sjkimint
171280304Sjkimichsmb_quick(device_t dev, u_char slave, int how)
172280304Sjkim{
173280304Sjkim	const sc_p sc = device_get_softc(dev);
174280304Sjkim	int smb_error;
175280304Sjkim
176280304Sjkim	DBG("slave=0x%02x how=%d\n", slave, how);
177280304Sjkim	KASSERT(sc->ich_cmd == -1,
178280304Sjkim	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
179280304Sjkim	switch (how) {
180280304Sjkim	case SMB_QREAD:
181280304Sjkim	case SMB_QWRITE:
182280304Sjkim		mtx_lock(&sc->mutex);
183280304Sjkim		sc->ich_cmd = ICH_HST_CNT_SMB_CMD_QUICK;
184280304Sjkim		bus_write_1(sc->io_res, ICH_XMIT_SLVA,
185280304Sjkim		    slave | (how == SMB_QREAD ?
18668651Skris	    		ICH_XMIT_SLVA_READ : ICH_XMIT_SLVA_WRITE));
187280304Sjkim		bus_write_1(sc->io_res, ICH_HST_CNT,
188280304Sjkim		    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
189280304Sjkim		smb_error = ichsmb_wait(sc);
190280304Sjkim		mtx_unlock(&sc->mutex);
191280304Sjkim		break;
192280304Sjkim	default:
193280304Sjkim		smb_error = SMB_ENOTSUPP;
194280304Sjkim	}
195280304Sjkim	DBG("smb_error=%d\n", smb_error);
196280304Sjkim	return (smb_error);
197280304Sjkim}
198280304Sjkim
199280304Sjkimint
200280304Sjkimichsmb_sendb(device_t dev, u_char slave, char byte)
201280304Sjkim{
202280304Sjkim	const sc_p sc = device_get_softc(dev);
203280304Sjkim	int smb_error;
204280304Sjkim
205280304Sjkim	DBG("slave=0x%02x byte=0x%02x\n", slave, (u_char)byte);
206280304Sjkim	KASSERT(sc->ich_cmd == -1,
207280304Sjkim	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
208280304Sjkim	mtx_lock(&sc->mutex);
209280304Sjkim	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
210280304Sjkim	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
211280304Sjkim	    slave | ICH_XMIT_SLVA_WRITE);
212280304Sjkim	bus_write_1(sc->io_res, ICH_HST_CMD, byte);
213280304Sjkim	bus_write_1(sc->io_res, ICH_HST_CNT,
214280304Sjkim	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
215280304Sjkim	smb_error = ichsmb_wait(sc);
216280304Sjkim	mtx_unlock(&sc->mutex);
217280304Sjkim	DBG("smb_error=%d\n", smb_error);
218280304Sjkim	return (smb_error);
219280304Sjkim}
220280304Sjkim
221280304Sjkimint
222280304Sjkimichsmb_recvb(device_t dev, u_char slave, char *byte)
223280304Sjkim{
224280304Sjkim	const sc_p sc = device_get_softc(dev);
225280304Sjkim	int smb_error;
226280304Sjkim
227280304Sjkim	DBG("slave=0x%02x\n", slave);
228280304Sjkim	KASSERT(sc->ich_cmd == -1,
229280304Sjkim	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
230280304Sjkim	mtx_lock(&sc->mutex);
231280304Sjkim	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE;
232280304Sjkim	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
233280304Sjkim	    slave | ICH_XMIT_SLVA_READ);
234280304Sjkim	bus_write_1(sc->io_res, ICH_HST_CNT,
235280304Sjkim	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
236280304Sjkim	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
237280304Sjkim		*byte = bus_read_1(sc->io_res, ICH_D0);
238280304Sjkim	mtx_unlock(&sc->mutex);
239280304Sjkim	DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
240280304Sjkim	return (smb_error);
241280304Sjkim}
242280304Sjkim
243280304Sjkimint
244280304Sjkimichsmb_writeb(device_t dev, u_char slave, char cmd, char byte)
245280304Sjkim{
246280304Sjkim	const sc_p sc = device_get_softc(dev);
247280304Sjkim	int smb_error;
248280304Sjkim
249280304Sjkim	DBG("slave=0x%02x cmd=0x%02x byte=0x%02x\n",
250280304Sjkim	    slave, (u_char)cmd, (u_char)byte);
251280304Sjkim	KASSERT(sc->ich_cmd == -1,
252280304Sjkim	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
253280304Sjkim	mtx_lock(&sc->mutex);
254280304Sjkim	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
255280304Sjkim	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
256280304Sjkim	    slave | ICH_XMIT_SLVA_WRITE);
257280304Sjkim	bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
258280304Sjkim	bus_write_1(sc->io_res, ICH_D0, byte);
259280304Sjkim	bus_write_1(sc->io_res, ICH_HST_CNT,
260280304Sjkim	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
261280304Sjkim	smb_error = ichsmb_wait(sc);
262280304Sjkim	mtx_unlock(&sc->mutex);
263280304Sjkim	DBG("smb_error=%d\n", smb_error);
264280304Sjkim	return (smb_error);
265280304Sjkim}
266280304Sjkim
267280304Sjkimint
26868651Skrisichsmb_writew(device_t dev, u_char slave, char cmd, short word)
269280304Sjkim{
270280304Sjkim	const sc_p sc = device_get_softc(dev);
271280304Sjkim	int smb_error;
272280304Sjkim
27368651Skris	DBG("slave=0x%02x cmd=0x%02x word=0x%04x\n",
274109998Smarkm	    slave, (u_char)cmd, (u_int16_t)word);
275280304Sjkim	KASSERT(sc->ich_cmd == -1,
276280304Sjkim	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
277109998Smarkm	mtx_lock(&sc->mutex);
278280304Sjkim	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
279280304Sjkim	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
280280304Sjkim	    slave | ICH_XMIT_SLVA_WRITE);
281280304Sjkim	bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
282280304Sjkim	bus_write_1(sc->io_res, ICH_D0, word & 0xff);
283109998Smarkm	bus_write_1(sc->io_res, ICH_D1, word >> 8);
284280304Sjkim	bus_write_1(sc->io_res, ICH_HST_CNT,
285280304Sjkim	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
286109998Smarkm	smb_error = ichsmb_wait(sc);
287109998Smarkm	mtx_unlock(&sc->mutex);
288280304Sjkim	DBG("smb_error=%d\n", smb_error);
289280304Sjkim	return (smb_error);
290280304Sjkim}
291109998Smarkm
29259191Skrisint
293ichsmb_readb(device_t dev, u_char slave, char cmd, char *byte)
294{
295	const sc_p sc = device_get_softc(dev);
296	int smb_error;
297
298	DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
299	KASSERT(sc->ich_cmd == -1,
300	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
301	mtx_lock(&sc->mutex);
302	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BYTE_DATA;
303	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
304	    slave | ICH_XMIT_SLVA_READ);
305	bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
306	bus_write_1(sc->io_res, ICH_HST_CNT,
307	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
308	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR)
309		*byte = bus_read_1(sc->io_res, ICH_D0);
310	mtx_unlock(&sc->mutex);
311	DBG("smb_error=%d byte=0x%02x\n", smb_error, (u_char)*byte);
312	return (smb_error);
313}
314
315int
316ichsmb_readw(device_t dev, u_char slave, char cmd, short *word)
317{
318	const sc_p sc = device_get_softc(dev);
319	int smb_error;
320
321	DBG("slave=0x%02x cmd=0x%02x\n", slave, (u_char)cmd);
322	KASSERT(sc->ich_cmd == -1,
323	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
324	mtx_lock(&sc->mutex);
325	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_WORD_DATA;
326	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
327	    slave | ICH_XMIT_SLVA_READ);
328	bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
329	bus_write_1(sc->io_res, ICH_HST_CNT,
330	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
331	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
332		*word = (bus_read_1(sc->io_res,
333			ICH_D0) & 0xff)
334		  | (bus_read_1(sc->io_res,
335			ICH_D1) << 8);
336	}
337	mtx_unlock(&sc->mutex);
338	DBG("smb_error=%d word=0x%04x\n", smb_error, (u_int16_t)*word);
339	return (smb_error);
340}
341
342int
343ichsmb_pcall(device_t dev, u_char slave, char cmd, short sdata, short *rdata)
344{
345	const sc_p sc = device_get_softc(dev);
346	int smb_error;
347
348	DBG("slave=0x%02x cmd=0x%02x sdata=0x%04x\n",
349	    slave, (u_char)cmd, (u_int16_t)sdata);
350	KASSERT(sc->ich_cmd == -1,
351	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
352	mtx_lock(&sc->mutex);
353	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_PROC_CALL;
354	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
355	    slave | ICH_XMIT_SLVA_WRITE);
356	bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
357	bus_write_1(sc->io_res, ICH_D0, sdata & 0xff);
358	bus_write_1(sc->io_res, ICH_D1, sdata >> 8);
359	bus_write_1(sc->io_res, ICH_HST_CNT,
360	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
361	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
362		*rdata = (bus_read_1(sc->io_res,
363			ICH_D0) & 0xff)
364		  | (bus_read_1(sc->io_res,
365			ICH_D1) << 8);
366	}
367	mtx_unlock(&sc->mutex);
368	DBG("smb_error=%d rdata=0x%04x\n", smb_error, (u_int16_t)*rdata);
369	return (smb_error);
370}
371
372int
373ichsmb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
374{
375	const sc_p sc = device_get_softc(dev);
376	int smb_error;
377
378	DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
379#if ICHSMB_DEBUG
380#define DISP(ch)	(((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
381	{
382	    u_char *p;
383
384	    for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
385		DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
386		    "  %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
387		    p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
388		    DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
389		    DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
390	    }
391	}
392#undef DISP
393#endif
394	KASSERT(sc->ich_cmd == -1,
395	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
396	if (count < 1 || count > 32)
397		return (SMB_EINVAL);
398	bcopy(buf, sc->block_data, count);
399	sc->block_count = count;
400	sc->block_index = 1;
401	sc->block_write = 1;
402
403	mtx_lock(&sc->mutex);
404	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
405	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
406	    slave | ICH_XMIT_SLVA_WRITE);
407	bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
408	bus_write_1(sc->io_res, ICH_D0, count);
409	bus_write_1(sc->io_res, ICH_BLOCK_DB, buf[0]);
410	bus_write_1(sc->io_res, ICH_HST_CNT,
411	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
412	smb_error = ichsmb_wait(sc);
413	mtx_unlock(&sc->mutex);
414	DBG("smb_error=%d\n", smb_error);
415	return (smb_error);
416}
417
418int
419ichsmb_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
420{
421	const sc_p sc = device_get_softc(dev);
422	int smb_error;
423
424	DBG("slave=0x%02x cmd=0x%02x count=%d\n", slave, (u_char)cmd, count);
425	KASSERT(sc->ich_cmd == -1,
426	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
427	if (*count < 1 || *count > 32)
428		return (SMB_EINVAL);
429	bzero(sc->block_data, sizeof(sc->block_data));
430	sc->block_count = 0;
431	sc->block_index = 0;
432	sc->block_write = 0;
433
434	mtx_lock(&sc->mutex);
435	sc->ich_cmd = ICH_HST_CNT_SMB_CMD_BLOCK;
436	bus_write_1(sc->io_res, ICH_XMIT_SLVA,
437	    slave | ICH_XMIT_SLVA_READ);
438	bus_write_1(sc->io_res, ICH_HST_CMD, cmd);
439	bus_write_1(sc->io_res, ICH_D0, *count); /* XXX? */
440	bus_write_1(sc->io_res, ICH_HST_CNT,
441	    ICH_HST_CNT_START | ICH_HST_CNT_INTREN | sc->ich_cmd);
442	if ((smb_error = ichsmb_wait(sc)) == SMB_ENOERR) {
443		bcopy(sc->block_data, buf, min(sc->block_count, *count));
444		*count = sc->block_count;
445	}
446	mtx_unlock(&sc->mutex);
447	DBG("smb_error=%d\n", smb_error);
448#if ICHSMB_DEBUG
449#define DISP(ch)	(((ch) < 0x20 || (ch) >= 0x7e) ? '.' : (ch))
450	{
451	    u_char *p;
452
453	    for (p = (u_char *)buf; p - (u_char *)buf < 32; p += 8) {
454		DBG("%02x: %02x %02x %02x %02x %02x %02x %02x %02x"
455		    "  %c%c%c%c%c%c%c%c", (p - (u_char *)buf),
456		    p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],
457		    DISP(p[0]), DISP(p[1]), DISP(p[2]), DISP(p[3]),
458		    DISP(p[4]), DISP(p[5]), DISP(p[6]), DISP(p[7]));
459	    }
460	}
461#undef DISP
462#endif
463	return (smb_error);
464}
465
466/********************************************************************
467			OTHER FUNCTIONS
468********************************************************************/
469
470/*
471 * This table describes what interrupts we should ever expect to
472 * see after each ICH command, not including the SMBALERT interrupt.
473 */
474static const u_int8_t ichsmb_state_irqs[] = {
475	/* quick */
476	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
477	/* byte */
478	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
479	/* byte data */
480	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
481	/* word data */
482	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
483	/* process call */
484	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR),
485	/* block */
486	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
487	    | ICH_HST_STA_BYTE_DONE_STS),
488	/* i2c read (not used) */
489	(ICH_HST_STA_BUS_ERR | ICH_HST_STA_DEV_ERR | ICH_HST_STA_INTR
490	    | ICH_HST_STA_BYTE_DONE_STS)
491};
492
493/*
494 * Interrupt handler. This handler is bus-independent. Note that our
495 * interrupt may be shared, so we must handle "false" interrupts.
496 */
497void
498ichsmb_device_intr(void *cookie)
499{
500	const sc_p sc = cookie;
501	const device_t dev = sc->dev;
502	const int maxloops = 16;
503	u_int8_t status;
504	u_int8_t ok_bits;
505	int cmd_index;
506        int count;
507
508	mtx_lock(&sc->mutex);
509	for (count = 0; count < maxloops; count++) {
510
511		/* Get and reset status bits */
512		status = bus_read_1(sc->io_res, ICH_HST_STA);
513#if ICHSMB_DEBUG
514		if ((status & ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY))
515		    || count > 0) {
516			DBG("%d stat=0x%02x\n", count, status);
517		}
518#endif
519		status &= ~(ICH_HST_STA_INUSE_STS | ICH_HST_STA_HOST_BUSY);
520		if (status == 0)
521			break;
522
523		/* Check for unexpected interrupt */
524		ok_bits = ICH_HST_STA_SMBALERT_STS;
525		cmd_index = sc->ich_cmd >> 2;
526		if (sc->ich_cmd != -1) {
527			KASSERT(cmd_index < sizeof(ichsmb_state_irqs),
528			    ("%s: ich_cmd=%d", device_get_nameunit(dev),
529			    sc->ich_cmd));
530			ok_bits |= ichsmb_state_irqs[cmd_index];
531		}
532		if ((status & ~ok_bits) != 0) {
533			device_printf(dev, "irq 0x%02x during %d\n", status,
534			    cmd_index);
535			bus_write_1(sc->io_res,
536			    ICH_HST_STA, (status & ~ok_bits));
537			continue;
538		}
539
540		/* Handle SMBALERT interrupt */
541		if (status & ICH_HST_STA_SMBALERT_STS) {
542			static int smbalert_count = 16;
543			if (smbalert_count > 0) {
544				device_printf(dev, "SMBALERT# rec'd\n");
545				if (--smbalert_count == 0) {
546					device_printf(dev,
547					    "not logging anymore\n");
548				}
549			}
550		}
551
552		/* Check for bus error */
553		if (status & ICH_HST_STA_BUS_ERR) {
554			sc->smb_error = SMB_ECOLLI;	/* XXX SMB_EBUSERR? */
555			goto finished;
556		}
557
558		/* Check for device error */
559		if (status & ICH_HST_STA_DEV_ERR) {
560			sc->smb_error = SMB_ENOACK;	/* or SMB_ETIMEOUT? */
561			goto finished;
562		}
563
564		/* Check for byte completion in block transfer */
565		if (status & ICH_HST_STA_BYTE_DONE_STS) {
566			if (sc->block_write) {
567				if (sc->block_index < sc->block_count) {
568
569					/* Write next byte */
570					bus_write_1(sc->io_res,
571					    ICH_BLOCK_DB,
572					    sc->block_data[sc->block_index++]);
573				}
574			} else {
575
576				/* First interrupt, get the count also */
577				if (sc->block_index == 0) {
578					sc->block_count = bus_read_1(
579					    sc->io_res, ICH_D0);
580				}
581
582				/* Get next byte, if any */
583				if (sc->block_index < sc->block_count) {
584
585					/* Read next byte */
586					sc->block_data[sc->block_index++] =
587					    bus_read_1(sc->io_res,
588					      ICH_BLOCK_DB);
589
590					/* Set "LAST_BYTE" bit before reading
591					   the last byte of block data */
592					if (sc->block_index
593					    >= sc->block_count - 1) {
594						bus_write_1(sc->io_res,
595						    ICH_HST_CNT,
596						    ICH_HST_CNT_LAST_BYTE
597							| ICH_HST_CNT_INTREN
598							| sc->ich_cmd);
599					}
600				}
601			}
602		}
603
604		/* Check command completion */
605		if (status & ICH_HST_STA_INTR) {
606			sc->smb_error = SMB_ENOERR;
607finished:
608			sc->ich_cmd = -1;
609			bus_write_1(sc->io_res,
610			    ICH_HST_STA, status);
611			wakeup(sc);
612			break;
613		}
614
615		/* Clear status bits and try again */
616		bus_write_1(sc->io_res, ICH_HST_STA, status);
617	}
618	mtx_unlock(&sc->mutex);
619
620	/* Too many loops? */
621	if (count == maxloops) {
622		device_printf(dev, "interrupt loop, status=0x%02x\n",
623		    bus_read_1(sc->io_res, ICH_HST_STA));
624	}
625}
626
627/*
628 * Wait for command completion. Assumes mutex is held.
629 * Returns an SMB_* error code.
630 */
631static int
632ichsmb_wait(sc_p sc)
633{
634	const device_t dev = sc->dev;
635	int error, smb_error;
636
637	KASSERT(sc->ich_cmd != -1,
638	    ("%s: ich_cmd=%d\n", __func__ , sc->ich_cmd));
639	mtx_assert(&sc->mutex, MA_OWNED);
640	error = msleep(sc, &sc->mutex, PZERO, "ichsmb", hz / 4);
641	DBG("msleep -> %d\n", error);
642	switch (error) {
643	case 0:
644		smb_error = sc->smb_error;
645		break;
646	case EWOULDBLOCK:
647		device_printf(dev, "device timeout, status=0x%02x\n",
648		    bus_read_1(sc->io_res, ICH_HST_STA));
649		sc->ich_cmd = -1;
650		smb_error = SMB_ETIMEOUT;
651		break;
652	default:
653		smb_error = SMB_EABORT;
654		break;
655	}
656	return (smb_error);
657}
658
659/*
660 * Release resources associated with device.
661 */
662void
663ichsmb_release_resources(sc_p sc)
664{
665	const device_t dev = sc->dev;
666
667	if (sc->irq_handle != NULL) {
668		bus_teardown_intr(dev, sc->irq_res, sc->irq_handle);
669		sc->irq_handle = NULL;
670	}
671	if (sc->irq_res != NULL) {
672		bus_release_resource(dev,
673		    SYS_RES_IRQ, sc->irq_rid, sc->irq_res);
674		sc->irq_res = NULL;
675	}
676	if (sc->io_res != NULL) {
677		bus_release_resource(dev,
678		    SYS_RES_IOPORT, sc->io_rid, sc->io_res);
679		sc->io_res = NULL;
680	}
681}
682
683int
684ichsmb_detach(device_t dev)
685{
686	const sc_p sc = device_get_softc(dev);
687	int error;
688
689	error = bus_generic_detach(dev);
690	if (error)
691		return (error);
692	device_delete_child(dev, sc->smb);
693	ichsmb_release_resources(sc);
694	mtx_destroy(&sc->mutex);
695
696	return 0;
697}
698
699DRIVER_MODULE(smbus, ichsmb, smbus_driver, smbus_devclass, 0, 0);
700