if_hmevar.h revision 178470
191396Stmm/*- 291396Stmm * Copyright (c) 1999 The NetBSD Foundation, Inc. 391396Stmm * All rights reserved. 491396Stmm * 591396Stmm * This code is derived from software contributed to The NetBSD Foundation 691396Stmm * by Paul Kranenburg. 791396Stmm * 891396Stmm * Redistribution and use in source and binary forms, with or without 991396Stmm * modification, are permitted provided that the following conditions 1091396Stmm * are met: 1191396Stmm * 1. Redistributions of source code must retain the above copyright 1291396Stmm * notice, this list of conditions and the following disclaimer. 1391396Stmm * 2. Redistributions in binary form must reproduce the above copyright 1491396Stmm * notice, this list of conditions and the following disclaimer in the 1591396Stmm * documentation and/or other materials provided with the distribution. 1691396Stmm * 3. All advertising materials mentioning features or use of this software 1791396Stmm * must display the following acknowledgement: 1891396Stmm * This product includes software developed by the NetBSD 1991396Stmm * Foundation, Inc. and its contributors. 2091396Stmm * 4. Neither the name of The NetBSD Foundation nor the names of its 2191396Stmm * contributors may be used to endorse or promote products derived 2291396Stmm * from this software without specific prior written permission. 2391396Stmm * 2491396Stmm * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2591396Stmm * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2691396Stmm * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2791396Stmm * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2891396Stmm * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2991396Stmm * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3091396Stmm * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3191396Stmm * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3291396Stmm * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3391396Stmm * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3491396Stmm * POSSIBILITY OF SUCH DAMAGE. 3591396Stmm * 3691396Stmm * from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp 3791396Stmm * 3891396Stmm * $FreeBSD: head/sys/dev/hme/if_hmevar.h 178470 2008-04-24 23:12:03Z marius $ 3991396Stmm */ 4091396Stmm 4191396Stmm#include <sys/callout.h> 4291396Stmm 4391396Stmm/* 4491396Stmm * Number of receive and transmit descriptors. For each receive descriptor, 4591396Stmm * an mbuf cluster is allocated and set up to receive a packet, and a dma map 4691396Stmm * is created. Therefore, this number should not be too high to not waste 4791396Stmm * memory. 48108834Stmm * TX descriptors have no static cost, except for the memory directly allocated 49108834Stmm * for them. TX queue elements (the number of which is fixed by HME_NTXQ) hold 50108834Stmm * the software state for a transmit job; each has a dmamap allocated for it. 51108834Stmm * There may be multiple descriptors allocated to a single queue element. 52178470Smarius * HME_NTXQ and HME_NTXSEGS are completely arbitrary. 5391396Stmm */ 54178470Smarius#define HME_NRXDESC 128 55178470Smarius#define HME_NTXDESC 256 56178470Smarius#define HME_NTXQ 64 57178470Smarius#define HME_NTXSEGS 16 5891396Stmm 5991396Stmm/* Maximum size of a mapped RX buffer. */ 6091396Stmm#define HME_BUFSZ 1600 6191396Stmm 6291396Stmm/* 6391396Stmm * RX DMA descriptor. The descriptors are preallocated; the dma map is 6491396Stmm * reused. 6591396Stmm */ 6691396Stmmstruct hme_rxdesc { 6791396Stmm struct mbuf *hrx_m; 6891396Stmm bus_dmamap_t hrx_dmamap; 6991396Stmm}; 7091396Stmm 71108834Stmm/* Lazily leave at least one burst size grace space. */ 72108834Stmm#define HME_DESC_RXLEN(sc, d) \ 73108834Stmm ulmin(HME_BUFSZ, (d)->hrx_m->m_len - (sc)->sc_burst) 74108834Stmm 7591396Stmmstruct hme_txdesc { 7691396Stmm struct mbuf *htx_m; 7791396Stmm bus_dmamap_t htx_dmamap; 78108834Stmm int htx_lastdesc; 79108834Stmm STAILQ_ENTRY(hme_txdesc) htx_q; 8091396Stmm}; 8191396Stmm 82108834StmmSTAILQ_HEAD(hme_txdq, hme_txdesc); 83108834Stmm 8491396Stmmstruct hme_ring { 8591396Stmm /* Ring Descriptors */ 8691396Stmm caddr_t rb_membase; /* Packet buffer: CPU address */ 8791396Stmm bus_addr_t rb_dmabase; /* Packet buffer: DMA address */ 8891396Stmm caddr_t rb_txd; /* Transmit descriptors */ 8991396Stmm bus_addr_t rb_txddma; /* DMA address of same */ 9091396Stmm caddr_t rb_rxd; /* Receive descriptors */ 9191396Stmm bus_addr_t rb_rxddma; /* DMA address of same */ 9291396Stmm 9391396Stmm /* Ring Descriptor state */ 94108834Stmm int rb_tdhead, rb_tdtail; 95108834Stmm int rb_rdtail; 96108834Stmm int rb_td_nbusy; 9791396Stmm 9891396Stmm /* Descriptors */ 99108834Stmm struct hme_rxdesc rb_rxdesc[HME_NRXDESC]; 100108834Stmm struct hme_txdesc rb_txdesc[HME_NTXQ]; 10191396Stmm 102108834Stmm struct hme_txdq rb_txfreeq; 103108834Stmm struct hme_txdq rb_txbusyq; 104108834Stmm 10591396Stmm bus_dmamap_t rb_spare_dmamap; 10691396Stmm}; 10791396Stmm 10891396Stmmstruct hme_softc { 109147256Sbrooks struct ifnet *sc_ifp; 11091396Stmm struct ifmedia sc_ifmedia; 11191396Stmm device_t sc_dev; 11291396Stmm device_t sc_miibus; 11391396Stmm struct mii_data *sc_mii; /* MII media control */ 114178470Smarius u_char sc_enaddr[ETHER_ADDR_LEN]; 11591396Stmm struct callout sc_tick_ch; /* tick callout */ 116164932Smarius int sc_wdog_timer; /* watchdog timer */ 11791396Stmm 11891396Stmm /* The following bus handles are to be provided by the bus front-end */ 11991396Stmm bus_dma_tag_t sc_pdmatag; /* bus dma parent tag */ 12091396Stmm bus_dma_tag_t sc_cdmatag; /* control bus dma tag */ 12191396Stmm bus_dmamap_t sc_cdmamap; /* control bus dma handle */ 12291396Stmm bus_dma_tag_t sc_rdmatag; /* RX bus dma tag */ 12391396Stmm bus_dma_tag_t sc_tdmatag; /* RX bus dma tag */ 12491396Stmm bus_space_handle_t sc_sebh; /* HME Global registers */ 12591396Stmm bus_space_handle_t sc_erxh; /* HME ERX registers */ 12691396Stmm bus_space_handle_t sc_etxh; /* HME ETX registers */ 12791396Stmm bus_space_handle_t sc_mach; /* HME MAC registers */ 12891396Stmm bus_space_handle_t sc_mifh; /* HME MIF registers */ 12991396Stmm bus_space_tag_t sc_sebt; /* HME Global registers */ 13091396Stmm bus_space_tag_t sc_erxt; /* HME ERX registers */ 13191396Stmm bus_space_tag_t sc_etxt; /* HME ETX registers */ 13291396Stmm bus_space_tag_t sc_mact; /* HME MAC registers */ 13391396Stmm bus_space_tag_t sc_mift; /* HME MIF registers */ 13491396Stmm int sc_burst; /* DVMA burst size in effect */ 13591396Stmm int sc_phys[2]; /* MII instance -> PHY map */ 13691396Stmm 137178470Smarius u_int sc_flags; 138178470Smarius#define HME_LINK (1 << 0) /* link is up */ 139178470Smarius#define HME_PCI (1 << 1) /* PCI busses are little-endian */ 140178470Smarius 141178470Smarius int sc_ifflags; 142133149Syongari int sc_csum_features; 14391396Stmm 14491396Stmm /* Ring descriptor */ 145137982Syongari struct hme_ring sc_rb; 14691396Stmm 147137982Syongari struct mtx sc_lock; 14891396Stmm}; 14991396Stmm 150137982Syongari#define HME_LOCK(_sc) mtx_lock(&(_sc)->sc_lock) 151137982Syongari#define HME_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_lock) 152137982Syongari#define HME_LOCK_ASSERT(_sc, _what) mtx_assert(&(_sc)->sc_lock, (_what)) 153137982Syongari 15491396Stmmextern devclass_t hme_devclass; 15591396Stmm 15691396Stmmint hme_config(struct hme_softc *); 157108976Stmmvoid hme_detach(struct hme_softc *); 158108976Stmmvoid hme_suspend(struct hme_softc *); 159108976Stmmvoid hme_resume(struct hme_softc *); 16091396Stmmvoid hme_intr(void *); 16191396Stmm 16291396Stmm/* MII methods & callbacks */ 16391396Stmmint hme_mii_readreg(device_t, int, int); 16491396Stmmint hme_mii_writereg(device_t, int, int, int); 16591396Stmmvoid hme_mii_statchg(device_t); 166