if_hmevar.h revision 164932
154359Sroberto/*- 254359Sroberto * Copyright (c) 1999 The NetBSD Foundation, Inc. 354359Sroberto * All rights reserved. 454359Sroberto * 554359Sroberto * This code is derived from software contributed to The NetBSD Foundation 654359Sroberto * by Paul Kranenburg. 754359Sroberto * 854359Sroberto * Redistribution and use in source and binary forms, with or without 954359Sroberto * modification, are permitted provided that the following conditions 1054359Sroberto * are met: 1154359Sroberto * 1. Redistributions of source code must retain the above copyright 1254359Sroberto * notice, this list of conditions and the following disclaimer. 1354359Sroberto * 2. Redistributions in binary form must reproduce the above copyright 1454359Sroberto * notice, this list of conditions and the following disclaimer in the 1554359Sroberto * documentation and/or other materials provided with the distribution. 1654359Sroberto * 3. All advertising materials mentioning features or use of this software 1754359Sroberto * must display the following acknowledgement: 1854359Sroberto * This product includes software developed by the NetBSD 1954359Sroberto * Foundation, Inc. and its contributors. 2054359Sroberto * 4. Neither the name of The NetBSD Foundation nor the names of its 2154359Sroberto * contributors may be used to endorse or promote products derived 2254359Sroberto * from this software without specific prior written permission. 2354359Sroberto * 2454359Sroberto * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2554359Sroberto * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2654359Sroberto * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2754359Sroberto * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2854359Sroberto * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2954359Sroberto * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3054359Sroberto * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3154359Sroberto * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3254359Sroberto * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3354359Sroberto * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3454359Sroberto * POSSIBILITY OF SUCH DAMAGE. 3554359Sroberto * 3654359Sroberto * from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp 3754359Sroberto * 3854359Sroberto * $FreeBSD: head/sys/dev/hme/if_hmevar.h 164932 2006-12-06 02:07:20Z marius $ 3982498Sroberto */ 4082498Sroberto 4182498Sroberto#include <sys/callout.h> 4282498Sroberto 4382498Sroberto/* 4454359Sroberto * Number of receive and transmit descriptors. For each receive descriptor, 4554359Sroberto * an mbuf cluster is allocated and set up to receive a packet, and a dma map 4654359Sroberto * is created. Therefore, this number should not be too high to not waste 4754359Sroberto * memory. 4854359Sroberto * TX descriptors have no static cost, except for the memory directly allocated 4954359Sroberto * for them. TX queue elements (the number of which is fixed by HME_NTXQ) hold 5054359Sroberto * the software state for a transmit job; each has a dmamap allocated for it. 5154359Sroberto * There may be multiple descriptors allocated to a single queue element. 5254359Sroberto * HME_NTXQ is completely arbitrary. 5354359Sroberto */ 54#define HME_NRXDESC 128 55#define HME_NTXDESC 128 56#define HME_NTXQ (HME_NTXDESC / 2) 57 58/* Maximum size of a mapped RX buffer. */ 59#define HME_BUFSZ 1600 60 61/* 62 * RX DMA descriptor. The descriptors are preallocated; the dma map is 63 * reused. 64 */ 65struct hme_rxdesc { 66 struct mbuf *hrx_m; 67 bus_dmamap_t hrx_dmamap; 68}; 69 70/* Lazily leave at least one burst size grace space. */ 71#define HME_DESC_RXLEN(sc, d) \ 72 ulmin(HME_BUFSZ, (d)->hrx_m->m_len - (sc)->sc_burst) 73 74struct hme_txdesc { 75 struct mbuf *htx_m; 76 bus_dmamap_t htx_dmamap; 77 int htx_lastdesc; 78 STAILQ_ENTRY(hme_txdesc) htx_q; 79}; 80 81STAILQ_HEAD(hme_txdq, hme_txdesc); 82 83/* Value for htx_flags */ 84#define HTXF_MAPPED 1 85 86struct hme_ring { 87 /* Ring Descriptors */ 88 caddr_t rb_membase; /* Packet buffer: CPU address */ 89 bus_addr_t rb_dmabase; /* Packet buffer: DMA address */ 90 caddr_t rb_txd; /* Transmit descriptors */ 91 bus_addr_t rb_txddma; /* DMA address of same */ 92 caddr_t rb_rxd; /* Receive descriptors */ 93 bus_addr_t rb_rxddma; /* DMA address of same */ 94 95 /* Ring Descriptor state */ 96 int rb_tdhead, rb_tdtail; 97 int rb_rdtail; 98 int rb_td_nbusy; 99 100 /* Descriptors */ 101 struct hme_rxdesc rb_rxdesc[HME_NRXDESC]; 102 struct hme_txdesc rb_txdesc[HME_NTXQ]; 103 bus_dma_segment_t rb_txsegs[HME_NTXQ]; 104 105 struct hme_txdq rb_txfreeq; 106 struct hme_txdq rb_txbusyq; 107 108 bus_dmamap_t rb_spare_dmamap; 109}; 110 111struct hme_softc { 112 struct ifnet *sc_ifp; 113 struct ifmedia sc_ifmedia; 114 device_t sc_dev; 115 device_t sc_miibus; 116 struct mii_data *sc_mii; /* MII media control */ 117 u_char sc_enaddr[6]; 118 struct callout sc_tick_ch; /* tick callout */ 119 int sc_wdog_timer; /* watchdog timer */ 120 121 /* The following bus handles are to be provided by the bus front-end */ 122 bus_dma_tag_t sc_pdmatag; /* bus dma parent tag */ 123 bus_dma_tag_t sc_cdmatag; /* control bus dma tag */ 124 bus_dmamap_t sc_cdmamap; /* control bus dma handle */ 125 bus_dma_tag_t sc_rdmatag; /* RX bus dma tag */ 126 bus_dma_tag_t sc_tdmatag; /* RX bus dma tag */ 127 bus_space_handle_t sc_sebh; /* HME Global registers */ 128 bus_space_handle_t sc_erxh; /* HME ERX registers */ 129 bus_space_handle_t sc_etxh; /* HME ETX registers */ 130 bus_space_handle_t sc_mach; /* HME MAC registers */ 131 bus_space_handle_t sc_mifh; /* HME MIF registers */ 132 bus_space_tag_t sc_sebt; /* HME Global registers */ 133 bus_space_tag_t sc_erxt; /* HME ERX registers */ 134 bus_space_tag_t sc_etxt; /* HME ETX registers */ 135 bus_space_tag_t sc_mact; /* HME MAC registers */ 136 bus_space_tag_t sc_mift; /* HME MIF registers */ 137 int sc_burst; /* DVMA burst size in effect */ 138 int sc_phys[2]; /* MII instance -> PHY map */ 139 140 int sc_pci; /* XXXXX -- PCI buses are LE. */ 141 int sc_csum_features; 142 143 /* Ring descriptor */ 144 struct hme_ring sc_rb; 145 146 int sc_debug; 147 struct mtx sc_lock; 148}; 149 150#define HME_LOCK(_sc) mtx_lock(&(_sc)->sc_lock) 151#define HME_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_lock) 152#define HME_LOCK_ASSERT(_sc, _what) mtx_assert(&(_sc)->sc_lock, (_what)) 153 154extern devclass_t hme_devclass; 155 156int hme_config(struct hme_softc *); 157void hme_detach(struct hme_softc *); 158void hme_suspend(struct hme_softc *); 159void hme_resume(struct hme_softc *); 160void hme_intr(void *); 161 162/* MII methods & callbacks */ 163int hme_mii_readreg(device_t, int, int); 164int hme_mii_writereg(device_t, int, int, int); 165void hme_mii_statchg(device_t); 166