dpt.h revision 52042
1/* 2 * Copyright (c) 1997 by Simon Shapiro 3 * All Rights Reserved 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 */ 30 31/* 32 * 33 * dpt.h: Definitions and constants used by the SCSI side of the DPT 34 * 35 * credits: Mike Neuffer; DPT low level code and in other areas as well. 36 * Mark Salyzyn; Many vital bits of info and diagnostics. 37 * Justin Gibbs; FreeBSD API, debugging and style 38 * Ron McDaniels; SCSI Software Interrupts 39 * FreeBSD.ORG; Great O/S to work on and for. 40 */ 41 42 43#ident "$FreeBSD: head/sys/dev/dpt/dpt.h 52042 1999-10-09 03:39:47Z mdodd $" 44 45#ifndef _DPT_H 46#define _DPT_H 47 48#include <sys/ioccom.h> 49 50#define DPT_CDEV_MAJOR 88 51 52#undef DPT_USE_DLM_SWI 53 54extern u_long dpt_unit; 55 56#define DPT_RELEASE 1 57#define DPT_VERSION 4 58#define DPT_PATCH 5 59#define DPT_MONTH 8 60#define DPT_DAY 3 61#define DPT_YEAR 18 /* 1998 - 1980 */ 62 63#define DPT_CTL_RELEASE 1 64#define DPT_CTL_VERSION 0 65#define DPT_CTL_PATCH 6 66 67#ifndef PAGESIZ 68#define PAGESIZ 4096 69#endif 70 71#ifndef physaddr 72typedef void *physaddr; 73#endif 74 75#undef DPT_INQUIRE_DEVICES /* We have no buyers for this function */ 76#define DPT_SUPPORT_POLLING /* Use polled mode at boot (must be ON!) */ 77#define DPT_OPENNINGS 8 /* Commands-in-progress per device */ 78 79#define DPT_RETRIES 5 /* Times to retry failed commands */ 80#undef DPT_DISABLE_SG 81#define DPT_HAS_OPEN 82 83/* Arguments to dpt_run_queue() can be: */ 84 85#define DPT_MAX_TARGET_MODE_BUFFER_SIZE 8192 86#define DPT_FREE_LIST_INCREMENT 64 87#define DPT_CMD_LEN 12 88 89/* 90 * How many segments do we want in a Scatter/Gather list? 91 * Some HBA's can do 16, Some 8192. Since we pre-allocate 92 * them in fixed increments, we need to put a practical limit on 93 * these. A passed parameter (from kernel boot or lkm) would help 94 */ 95#define DPT_MAX_SEGS 32 96 97/* Debug levels */ 98 99#undef DPT_DEBUG_PCI 100#undef DPT_DEBUG_INIT 101#undef DPT_DEBUG_SETUP 102#undef DPT_DEBUG_STATES 103#undef DPT_DEBUG_CONFIG 104#undef DPT_DEBUG_QUEUES 105#undef DPT_DEBUG_SCSI_CMD 106#undef DPT_DEBUG_SOFTINTR 107#undef DPT_DEBUG_HARDINTR 108#undef DPT_DEBUG_HEX_DUMPS 109#undef DPT_DEBUG_POLLING 110#undef DPT_DEBUG_INQUIRE 111#undef DPT_DEBUG_COMPLETION 112#undef DPT_DEBUG_COMPLETION_ERRORS 113#define DPT_DEBUG_MINPHYS 114#undef DPT_DEBUG_SG 115#undef DPT_DEBUG_SG_SHOW_DATA 116#undef DPT_DEBUG_SCSI_CMD_NAME 117#undef DPT_DEBUG_CONTROL 118#undef DPT_DEBUG_TIMEOUTS 119#undef DPT_DEBUG_SHUTDOWN 120#define DPT_DEBUG_USER_CMD 121 122/* 123 * Misc. definitions 124 */ 125#undef TRUE 126#undef FALSE 127#define TRUE 1 128#define FALSE 0 129 130#define MAX_CHANNELS 3 131#define MAX_TARGETS 16 132#define MAX_LUNS 8 133 134/* Map minor numbers to device identity */ 135#define TARGET_MASK 0x000f 136#define BUS_MASK 0x0030 137#define HBA_MASK 0x01c0 138#define LUN_MASK 0x0e00 139 140#define minor2target(minor) ( minor & TARGET_MASK ) 141#define minor2bus(minor) ( (minor & BUS_MASK) >> 4 ) 142#define minor2hba(minor) ( (minor & HBA_MASK) >> 6 ) 143#define minor2lun(minor) ( (minor & LUN_MASK) >> 9 ) 144 145/* 146 * Valid values for cache_type 147 */ 148#define DPT_NO_CACHE 0 149#define DPT_CACHE_WRITETHROUGH 1 150#define DPT_CACHE_WRITEBACK -2 151 152#define min(a,b) ((a<b)?(a):(b)) 153 154#define MAXISA 4 155#define MAXEISA 16 156#define MAXPCI 16 157#define MAXIRQ 16 158#define MAXTARGET 16 159 160#define IS_ISA 'I' 161#define IS_EISA 'E' 162#define IS_PCI 'P' 163 164#define BROKEN_INQUIRY 1 165 166#define BUSMASTER 0xff 167#define PIO 0xfe 168 169#define EATA_SIGNATURE 0x41544145 /* little ENDIAN "EATA" */ 170#define DPT_BLINK_INDICATOR 0x42445054 171 172#define DPT_ID1 0x12 173#define DPT_ID2 0x1 174#define ATT_ID1 0x06 175#define ATT_ID2 0x94 176#define ATT_ID3 0x0 177 178#define NEC_ID1 0x38 179#define NEC_ID2 0xa3 180#define NEC_ID3 0x82 181 182#define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */ 183#define MAX_METHOD_2 16 /* Max Devices For Method 2 */ 184#define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */ 185 186#define DPT_MAX_RETRIES 2 187 188#define READ 0 189#define WRITE 1 190#define OTHER 2 191 192#define HD(cmd) ((hostdata *)&(cmd->host->hostdata)) 193#define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble)) 194#define SD(host) ((hostdata *)&(host->hostdata)) 195 196/* 197 * EATA Command & Register definitions 198 */ 199 200#define PCI_REG_DPTconfig 0x40 201#define PCI_REG_PumpModeAddress 0x44 202#define PCI_REG_PumpModeData 0x48 203#define PCI_REG_ConfigParam1 0x50 204#define PCI_REG_ConfigParam2 0x54 205 206#define EATA_CMD_PIO_SETUPTEST 0xc6 207#define EATA_CMD_PIO_READ_CONFIG 0xf0 208#define EATA_CMD_PIO_SET_CONFIG 0xf1 209#define EATA_CMD_PIO_SEND_CP 0xf2 210#define EATA_CMD_PIO_RECEIVE_SP 0xf3 211#define EATA_CMD_PIO_TRUNC 0xf4 212 213#define EATA_CMD_RESET 0xf9 214#define EATA_COLD_BOOT 0x06 /* Last resort only! */ 215 216#define EATA_CMD_IMMEDIATE 0xfa 217 218#define EATA_CMD_DMA_READ_CONFIG 0xfd 219#define EATA_CMD_DMA_SET_CONFIG 0xfe 220#define EATA_CMD_DMA_SEND_CP 0xff 221 222#define ECS_EMULATE_SENSE 0xd4 223 224/* 225 * Immediate Commands 226 * Beware of this enumeration. Not all commands are in sequence! 227 */ 228 229enum { 230 EATA_GENERIC_ABORT, 231 EATA_SPECIFIC_RESET, 232 EATA_BUS_RESET, 233 EATA_SPECIFIC_ABORT, 234 EATA_QUIET_INTR, 235 EATA_SMART_ROM_DL_EN, 236 EATA_COLD_BOOT_HBA, /* Only as a last resort */ 237 EATA_FORCE_IO, 238 EATA_SCSI_BUS_OFFLINE, 239 EATA_RESET_MASKED_BUS, 240 EATA_POWER_OFF_WARN 241} dpt_immediate_cmd; 242 243#define HA_CTRLREG 0x206 /* control register for HBA */ 244#define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */ 245#define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processo */ 246#define HA_CTRL_8HEADS 0x08 /* 247 * CTRLREG: set for drives with 248 * >=8 heads 249 * (WD1003 rudimentary :-) 250 */ 251 252#define HA_WCOMMAND 0x07 /* command register offset */ 253#define HA_WIFC 0x06 /* immediate command offset */ 254#define HA_WCODE 0x05 255#define HA_WCODE2 0x04 256#define HA_WDMAADDR 0x02 /* DMA address LSB offset */ 257#define HA_RERROR 0x01 /* Error Register, offset 1 from base */ 258#define HA_RAUXSTAT 0x08 /* aux status register offset */ 259#define HA_RSTATUS 0x07 /* status register offset */ 260#define HA_RDATA 0x00 /* data register (16bit) */ 261#define HA_WDATA 0x00 /* data register (16bit) */ 262 263#define HA_ABUSY 0x01 /* aux busy bit */ 264#define HA_AIRQ 0x02 /* aux IRQ pending bit */ 265#define HA_SERROR 0x01 /* pr. command ended in error */ 266#define HA_SMORE 0x02 /* more data soon to come */ 267#define HA_SCORR 0x04 /* datio_addra corrected */ 268#define HA_SDRQ 0x08 /* data request active */ 269#define HA_SSC 0x10 /* seek complete */ 270#define HA_SFAULT 0x20 /* write fault */ 271#define HA_SREADY 0x40 /* drive ready */ 272#define HA_SBUSY 0x80 /* drive busy */ 273#define HA_SDRDY (HA_SSC|HA_SREADY|HA_SDRQ) 274 275/* 276 * Message definitions 277 */ 278 279enum { 280 HA_NO_ERROR, /* No Error */ 281 HA_ERR_SEL_TO, /* Selection Timeout */ 282 HA_ERR_CMD_TO, /* Command Timeout */ 283 HA_SCSIBUS_RESET, 284 HA_HBA_POWER_UP, /* Initial Controller Power-up */ 285 HA_UNX_BUSPHASE, /* Unexpected Bus Phase */ 286 HA_UNX_BUS_FREE, /* Unexpected Bus Free */ 287 HA_BUS_PARITY, /* Bus Parity Error */ 288 HA_SCSI_HUNG, /* SCSI Hung */ 289 HA_UNX_MSGRJCT, /* Unexpected Message Rejected */ 290 HA_RESET_STUCK, /* SCSI Bus Reset Stuck */ 291 HA_RSENSE_FAIL, /* Auto Request-Sense Failed */ 292 HA_PARITY_ERR, /* Controller Ram Parity Error */ 293 HA_CP_ABORT_NA, /* Abort Message sent to non-active cmd */ 294 HA_CP_ABORTED, /* Abort Message sent to active cmd */ 295 HA_CP_RESET_NA, /* Reset Message sent to non-active cmd */ 296 HA_CP_RESET, /* Reset Message sent to active cmd */ 297 HA_ECC_ERR, /* Controller Ram ECC Error */ 298 HA_PCI_PARITY, /* PCI Parity Error */ 299 HA_PCI_MABORT, /* PCI Master Abort */ 300 HA_PCI_TABORT, /* PCI Target Abort */ 301 HA_PCI_STABORT /* PCI Signaled Target Abort */ 302} dpt_message; 303 304#define HA_STATUS_MASK 0x7F 305#define HA_IDENTIFY_MSG 0x80 306#define HA_DISCO_RECO 0x40 /* Disconnect/Reconnect */ 307 308#define DPT_RW_BUFF_HEART 0X00 309#define DPT_RW_BUFF_DLM 0x02 310#define DPT_RW_BUFF_ACCESS 0x03 311 312#define HA_INTR_OFF 1 313#define HA_INTR_ON 0 314 315/* This is really a one-time shot through some black magic */ 316#define DPT_EATA_REVA 0x1c 317#define DPT_EATA_REVB 0x1e 318#define DPT_EATA_REVC 0x22 319#define DPT_EATA_REVZ 0x24 320 321 322/* IOCTL List */ 323 324#define DPT_RW_CMD_LEN 32 325#define DPT_RW_CMD_DUMP_SOFTC "dump softc" 326#define DPT_RW_CMD_DUMP_SYSINFO "dump sysinfo" 327#define DPT_RW_CMD_DUMP_METRICS "dump metrics" 328#define DPT_RW_CMD_CLEAR_METRICS "clear metrics" 329#define DPT_RW_CMD_SHOW_LED "show LED" 330 331#define DPT_IOCTL_INTERNAL_METRICS _IOR('D', 1, dpt_perf_t) 332#define DPT_IOCTL_SOFTC _IOR('D', 2, dpt_user_softc_t) 333#define DPT_IOCTL_SEND _IOWR('D', 3, eata_pt_t) 334#define SDI_SEND 0x40044444 /* Observed from dptmgr */ 335 336/* 337 * Other definitions 338 */ 339 340#define DPT_HCP_LENGTH(page) (ntohs(*(int16_t *)(void *)(&page[2]))+4) 341#define DPT_HCP_FIRST(page) (&page[4]) 342#define DPT_HCP_NEXT(param) (¶m[3 + param[3] + 1]) 343#define DPT_HCP_CODE(param) (ntohs(*(int16_t *)(void *)param)) 344 345 346/* Possible return values from dpt_register_buffer() */ 347 348#define SCSI_TM_READ_BUFFER 0x3c 349#define SCSI_TM_WRITE_BUFFER 0x3b 350 351#define SCSI_TM_MODE_MASK 0x07 /* Strip off reserved and LUN */ 352#define SCSI_TM_LUN_MASK 0xe0 /* Strip off reserved and LUN */ 353 354typedef enum { 355 SUCCESSFULLY_REGISTERED, 356 DRIVER_DOWN, 357 ALREADY_REGISTERED, 358 REGISTERED_TO_ANOTHER, 359 NOT_REGISTERED, 360 INVALID_UNIT, 361 INVALID_SENDER, 362 INVALID_CALLBACK, 363 NO_RESOURCES 364} dpt_rb_t; 365 366typedef enum { 367 REGISTER_BUFFER, 368 RELEASE_BUFFER 369} dpt_rb_op_t; 370 371/* 372 * New way for completion routines to reliably copmplete processing. 373 * Should take properly typed dpt_softc_t and dpt_ccb_t, 374 * but interdependencies preclude that. 375 */ 376typedef void (*ccb_callback)(void *dpt, int bus, void *ccb); 377 378typedef void (*buff_wr_done)(int unit, u_int8_t channel, u_int8_t target, 379 u_int8_t lun, u_int16_t offset, u_int16_t length, 380 int result); 381 382typedef void (*dpt_rec_buff)(int unit, u_int8_t channel, u_int8_t target, 383 u_int8_t lun, void *buffer, u_int16_t offset, 384 u_int16_t length); 385 386/* HBA's Status port (register) bitmap */ 387typedef struct reg_bit { /* reading this one will clear the interrupt */ 388 u_int8_t error :1, /* previous command ended in an error */ 389 more :1, /* More DATA coming soon Poll BSY & DRQ (PIO) */ 390 corr :1, /* data read was successfully corrected with ECC */ 391 drq :1, /* data request active */ 392 sc :1, /* seek complete */ 393 fault :1, /* write fault */ 394 ready :1, /* drive ready */ 395 busy :1; /* controller busy */ 396} dpt_status_reg_t; 397 398/* HBA's Auxiliary status port (register) bitmap */ 399typedef struct reg_abit { /* reading this won't clear the interrupt */ 400 u_int8_t abusy :1, /* auxiliary busy */ 401 irq :1, /* set when drive interrupt is asserted */ 402 :6; 403} dpt_aux_status_t; 404 405/* The EATA Register Set as a structure */ 406typedef struct eata_register { 407 u_int8_t data_reg[2]; /* R, couldn't figure this one out */ 408 u_int8_t cp_addr[4]; /* W, CP address register */ 409 union { 410 u_int8_t command; /* 411 * W, command code: 412 * [read|set] conf, send CP 413 */ 414 struct reg_bit status; /* R, see register_bit1 */ 415 u_int8_t statusbyte; 416 } ovr; 417 struct reg_abit aux_stat; /* R, see register_bit2 */ 418} eata_reg_t; 419 420/* 421 * Holds the results of a READ_CONFIGURATION command 422 * Beware of data items which are larger than 1 byte. 423 * these come from the DPT in network order. 424 * On an Intel ``CPU'' they will be upside down and backwards! 425 * The dpt_get_conf function is normally responsible for flipping 426 * Everything back. 427 */ 428typedef struct get_conf { /* Read Configuration Array */ 429 union { 430 struct { 431 u_int8_t foo_DevType; 432 u_int8_t foo_PageCode; 433 u_int8_t foo_Reserved0; 434 u_int8_t foo_len; 435 } foo; 436 u_int32_t foo_length; /* Should return 0x22, 0x24, etc */ 437 } bar; 438#define gcs_length bar.foo_length 439#define gcs_PageCode bar.foo.foo_DevType 440#define gcs_reserved0 bar.foo.foo_Reserved0 441#define gcs_len bar.foo.foo_len 442 443 u_int32_t signature; /* Signature MUST be "EATA". ntohl()`ed */ 444 445 u_int8_t version2 :4, 446 version :4; /* EATA Version level */ 447 448 u_int8_t OCS_enabled :1, /* Overlap Command Support enabled */ 449 TAR_support :1, /* SCSI Target Mode supported */ 450 TRNXFR :1, /* Truncate Transfer Cmd Used in PIO Mode */ 451 MORE_support:1, /* MORE supported (PIO Mode Only) */ 452 DMA_support :1, /* DMA supported */ 453 DMA_valid :1, /* DRQ value in Byte 30 is valid */ 454 ATA :1, /* ATA device connected (not supported) */ 455 HAA_valid :1; /* Hostadapter Address is valid */ 456 457 u_int16_t cppadlen; /* 458 * Number of pad bytes send after CD data set 459 * to zero for DMA commands. Ntohl()`ed 460 */ 461 u_int8_t scsi_idS; /* SCSI ID of controller 2-0 Byte 0 res. */ 462 u_int8_t scsi_id2; /* If not, zero is returned */ 463 u_int8_t scsi_id1; 464 u_int8_t scsi_id0; 465 u_int32_t cplen; /* CP length: number of valid cp bytes */ 466 467 u_int32_t splen; /* Returned bytes for a received SP command */ 468 u_int16_t queuesiz; /* max number of queueable CPs */ 469 470 u_int16_t dummy; 471 u_int16_t SGsiz; /* max number of SG table entrie */ 472 473 u_int8_t IRQ :4,/* IRQ used this HBA */ 474 IRQ_TR :1,/* IRQ Trigger: 0=edge, 1=level */ 475 SECOND :1,/* This is a secondary controller */ 476 DMA_channel:2;/* DRQ index, DRQ is 2comp of DRQX */ 477 478 u_int8_t sync; /* 0-7 sync active bitmask (deprecated) */ 479 u_int8_t DSBLE :1, /* ISA i/o addressing is disabled */ 480 FORCADR :1, /* i/o address has been forced */ 481 SG_64K :1, 482 SG_UAE :1, 483 :4; 484 485 u_int8_t MAX_ID :5, /* Max number of SCSI target IDs */ 486 MAX_CHAN :3; /* Number of SCSI busses on HBA */ 487 488 u_int8_t MAX_LUN; /* Max number of LUNs */ 489 u_int8_t :3, 490 AUTOTRM :1, 491 M1_inst :1, 492 ID_qest :1, /* Raidnum ID is questionable */ 493 is_PCI :1, /* HBA is PCI */ 494 is_EISA :1; /* HBA is EISA */ 495 496 u_int8_t RAIDNUM; /* unique HBA identifier */ 497 u_int8_t unused[4]; /* When doing PIO, you GET 512 bytes */ 498 499 /* >>------>> End of The DPT structure <<------<< */ 500 501 u_int32_t length; /* True length, after ntohl conversion */ 502} dpt_conf_t; 503 504/* Scatter-Gather list entry */ 505typedef struct dpt_sg_segment { 506 u_int32_t seg_addr; /* All fields in network byte order */ 507 u_int32_t seg_len; 508} dpt_sg_t; 509 510 511/* Status Packet */ 512typedef struct eata_sp { 513 u_int8_t hba_stat :7, /* HBA status */ 514 EOC :1; /* True if command finished */ 515 516 u_int8_t scsi_stat; /* Target SCSI status */ 517 518 u_int8_t reserved[2]; 519 520 u_int32_t residue_len; /* Number of bytes not transferred */ 521 522 u_int32_t ccb_busaddr; 523 524 u_int8_t sp_ID_Message; 525 u_int8_t sp_Que_Message; 526 u_int8_t sp_Tag_Message; 527 u_int8_t msg[9]; 528} dpt_sp_t; 529 530/* 531 * A strange collection of O/S-Hardware releated bits and pieces. 532 * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command. 533 */ 534typedef struct dpt_drive_parameters { 535 u_int16_t cylinders; /* Up to 1024 */ 536 u_int8_t heads; /* Up to 255 */ 537 u_int8_t sectors; /* Up to 63 */ 538} dpt_drive_t; 539 540typedef struct driveParam_S driveParam_T; 541 542#define SI_CMOS_Valid 0x0001 543#define SI_NumDrivesValid 0x0002 544#define SI_ProcessorValid 0x0004 545#define SI_MemorySizeValid 0x0008 546#define SI_DriveParamsValid 0x0010 547#define SI_SmartROMverValid 0x0020 548#define SI_OSversionValid 0x0040 549#define SI_OSspecificValid 0x0080 550#define SI_BusTypeValid 0x0100 551 552#define SI_ALL_VALID 0x0FFF 553#define SI_NO_SmartROM 0x8000 554 555#define SI_ISA_BUS 0x00 556#define SI_MCA_BUS 0x01 557#define SI_EISA_BUS 0x02 558#define SI_PCI_BUS 0x04 559 560#define HBA_BUS_ISA 0x00 561#define HBA_BUS_EISA 0x01 562#define HBA_BUS_PCI 0x02 563 564typedef struct dpt_sysinfo { 565 u_int8_t drive0CMOS; /* CMOS Drive 0 Type */ 566 u_int8_t drive1CMOS; /* CMOS Drive 1 Type */ 567 u_int8_t numDrives; /* 0040:0075 contents */ 568 u_int8_t processorFamily; /* Same as DPTSIG definition */ 569 u_int8_t processorType; /* Same as DPTSIG definition */ 570 u_int8_t smartROMMajorVersion; 571 u_int8_t smartROMMinorVersion; /* SmartROM version */ 572 u_int8_t smartROMRevision; 573 u_int16_t flags; /* See bit definitions above */ 574 u_int16_t conventionalMemSize; /* in KB */ 575 u_int32_t extendedMemSize; /* in KB */ 576 u_int32_t osType; /* Same as DPTSIG definition */ 577 u_int8_t osMajorVersion; 578 u_int8_t osMinorVersion; /* The OS version */ 579 u_int8_t osRevision; 580 u_int8_t osSubRevision; 581 u_int8_t busType; /* See defininitions above */ 582 u_int8_t pad[3]; /* For alignment */ 583 dpt_drive_t drives[16]; /* SmartROM Logical Drives */ 584} dpt_sysinfo_t; 585 586/* SEND_COMMAND packet structure */ 587typedef struct eata_ccb { 588 u_int8_t SCSI_Reset :1, /* Cause a SCSI Bus reset on the cmd */ 589 HBA_Init :1, /* Cause Controller to reinitialize */ 590 Auto_Req_Sen :1, /* Do Auto Request Sense on errors */ 591 scatter :1, /* Data Ptr points to a SG Packet */ 592 Quick :1, /* Set this one for NO Status PAcket */ 593 Interpret :1, /* Interpret the SCSI cdb for own use */ 594 DataOut :1, /* Data Out phase with command */ 595 DataIn :1; /* Data In phase with command */ 596 597 u_int8_t reqlen; /* Request Sense Length, if Auto_Req_Sen=1 */ 598 u_int8_t unused[3]; 599 u_int8_t FWNEST :1, /* send cmd to phys RAID component */ 600 unused2 :7; 601 602 u_int8_t Phsunit :1, /* physical unit on mirrored pair */ 603 I_AT :1, /* inhibit address translation */ 604 Disable_Cache :1, /* HBA inhibit caching */ 605 :5; 606 607 u_int8_t cp_id :5, /* SCSI Device ID of target */ 608 cp_channel :3; /* SCSI Channel # of HBA */ 609 610 u_int8_t cp_LUN :5, 611 cp_luntar :1, /* CP is for target ROUTINE */ 612 cp_dispri :1, /* Grant disconnect privilege */ 613 cp_identify :1; /* Always TRUE */ 614 615 u_int8_t cp_msg[3]; /* Message bytes 0-3 */ 616 617 union { 618 struct { 619 u_int8_t x_scsi_cmd; /* Partial SCSI CDB def */ 620 621 u_int8_t x_extent :1, 622 x_bytchk :1, 623 x_reladr :1, 624 x_cmplst :1, 625 x_fmtdata :1, 626 x_lun :3; 627 628 u_int8_t x_page; 629 u_int8_t reserved4; 630 u_int8_t x_len; 631 u_int8_t x_link :1; 632 u_int8_t x_flag :1; 633 u_int8_t reserved5 :4; 634 u_int8_t x_vendor :2; 635 } x; 636 u_int8_t z[12]; /* Command Descriptor Block (= 12) */ 637 } cp_w; 638 639#define cp_cdb cp_w.z 640#define cp_scsi_cmd cp_w.x.x_scsi_cmd 641#define cp_extent cp_w.x.x_extent 642#define cp_lun cp_w.x.x_lun 643#define cp_page cp_w.x.x_page 644#define cp_len cp_w.x.x_len 645 646#define MULTIFUNCTION_CMD 0x0e /* SCSI Multi Function Cmd */ 647#define BUS_QUIET 0x04 /* Quite Scsi Bus Code */ 648#define BUS_UNQUIET 0x05 /* Un Quiet Scsi Bus Code */ 649 650 u_int32_t cp_datalen; /* 651 * Data Transfer Length. If scatter=1 len (IN 652 * BYTES!) of the S/G array 653 */ 654 655 u_int32_t cp_busaddr; /* Unique identifier. Busaddr works well */ 656 u_int32_t cp_dataDMA; /* 657 * Data Address, if scatter=1 then it is the 658 * address of scatter packet 659 */ 660 u_int32_t cp_statDMA; /* address for Status Packet */ 661 u_int32_t cp_reqDMA; /* 662 * Request Sense Address, used if CP command 663 * ends with error 664 */ 665 u_int8_t CP_OpCode; 666 667} eata_ccb_t; 668 669/* 670 * DPT Signature Structure. 671 * Used by /dev/dpt to directly pass commands to the HBA 672 * We have more information here than we care for... 673 */ 674 675/* Current Signature Version - sigBYTE dsSigVersion; */ 676#define SIG_VERSION 1 677 678/* 679 * Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUE 680 * 681 * What type of processor the file is meant to run on. 682 * This will let us know whether to read sigWORDs as high/low or low/high. 683 */ 684#define PROC_INTEL 0x00 /* Intel 80x86 */ 685#define PROC_MOTOROLA 0x01 /* Motorola 68K */ 686#define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */ 687#define PROC_ALPHA 0x03 /* DEC Alpha */ 688 689/* 690 * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS 691 * 692 * Different bit definitions dependent on processor_family 693 */ 694 695/* PROC_INTEL: */ 696#define PROC_8086 0x01 /* Intel 8086 */ 697#define PROC_286 0x02 /* Intel 80286 */ 698#define PROC_386 0x04 /* Intel 80386 */ 699#define PROC_486 0x08 /* Intel 80486 */ 700#define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */ 701#define PROC_P6 0x20 /* Intel 686 aka P6 */ 702 703/* PROC_MOTOROLA: */ 704#define PROC_68000 0x01 /* Motorola 68000 */ 705#define PROC_68020 0x02 /* Motorola 68020 */ 706#define PROC_68030 0x04 /* Motorola 68030 */ 707#define PROC_68040 0x08 /* Motorola 68040 */ 708 709/* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */ 710#define FT_EXECUTABLE 0 /* Executable Program */ 711#define FT_SCRIPT 1 /* Script/Batch File??? */ 712#define FT_HBADRVR 2 /* HBA Driver */ 713#define FT_OTHERDRVR 3 /* Other Driver */ 714#define FT_IFS 4 /* Installable Filesystem Driver */ 715#define FT_ENGINE 5 /* DPT Engine */ 716#define FT_COMPDRVR 6 /* Compressed Driver Disk */ 717#define FT_LANGUAGE 7 /* Foreign Language file */ 718#define FT_FIRMWARE 8 /* Downloadable or actual Firmware */ 719#define FT_COMMMODL 9 /* Communications Module */ 720#define FT_INT13 10 /* INT 13 style HBA Driver */ 721#define FT_HELPFILE 11 /* Help file */ 722#define FT_LOGGER 12 /* Event Logger */ 723#define FT_INSTALL 13 /* An Install Program */ 724#define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */ 725#define FT_RESOURCE 15 /* Storage Manager Resource File */ 726#define FT_MODEM_DB 16 /* Storage Manager Modem Database */ 727 728/* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */ 729#define FTF_DLL 0x01 /* Dynamic Link Library */ 730#define FTF_NLM 0x02 /* Netware Loadable Module */ 731#define FTF_OVERLAYS 0x04 /* Uses overlays */ 732#define FTF_DEBUG 0x08 /* Debug version */ 733#define FTF_TSR 0x10 /* TSR */ 734#define FTF_SYS 0x20 /* DOS Lodable driver */ 735#define FTF_PROTECTED 0x40 /* Runs in protected mode */ 736#define FTF_APP_SPEC 0x80 /* Application Specific */ 737 738/* OEM - sigBYTE dsOEM; DISTINCT VALUES */ 739#define OEM_DPT 0 /* DPT */ 740#define OEM_ATT 1 /* ATT */ 741#define OEM_NEC 2 /* NEC */ 742#define OEM_ALPHA 3 /* Alphatronix */ 743#define OEM_AST 4 /* AST */ 744#define OEM_OLIVETTI 5 /* Olivetti */ 745#define OEM_SNI 6 /* Siemens/Nixdorf */ 746 747/* Operating System - sigLONG dsOS; FLAG BITS */ 748#define OS_DOS 0x00000001 /* PC/MS-DOS */ 749#define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */ 750#define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */ 751#define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */ 752#define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */ 753#define OS_OS22x 0x00000020 /* IBM OS/2 2.x */ 754#define OS_NW286 0x00000040 /* Novell NetWare 286 */ 755#define OS_NW386 0x00000080 /* Novell NetWare 386 */ 756#define OS_GEN_UNIX 0x00000100 /* Generic Unix */ 757#define OS_SCO_UNIX 0x00000200 /* SCO Unix */ 758#define OS_ATT_UNIX 0x00000400 /* ATT Unix */ 759#define OS_UNIXWARE 0x00000800 /* UnixWare Unix */ 760#define OS_INT_UNIX 0x00001000 /* Interactive Unix */ 761#define OS_SOLARIS 0x00002000 /* SunSoft Solaris */ 762#define OS_QN 0x00004000 /* QNX for Tom Moch */ 763#define OS_NEXTSTEP 0x00008000 /* NeXTSTEP */ 764#define OS_BANYAN 0x00010000 /* Banyan Vines */ 765#define OS_OLIVETTI_UNIX 0x00020000 /* Olivetti Unix */ 766#define OS_FREEBSD 0x00040000 /* FreeBSD 2.2 and later */ 767#define OS_OTHER 0x80000000 /* Other */ 768 769/* Capabilities - sigWORD dsCapabilities; FLAG BITS */ 770#define CAP_RAID0 0x0001 /* RAID-0 */ 771#define CAP_RAID1 0x0002 /* RAID-1 */ 772#define CAP_RAID3 0x0004 /* RAID-3 */ 773#define CAP_RAID5 0x0008 /* RAID-5 */ 774#define CAP_SPAN 0x0010 /* Spanning */ 775#define CAP_PASS 0x0020 /* Provides passthrough */ 776#define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */ 777#define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */ 778#define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */ 779#define CAP_EXTEND 0x8000 /* Extended info appears after description */ 780 781/* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */ 782#define DEV_DASD 0x0001 /* DASD (hard drives) */ 783#define DEV_TAPE 0x0002 /* Tape drives */ 784#define DEV_PRINTER 0x0004 /* Printers */ 785#define DEV_PROC 0x0008 /* Processors */ 786#define DEV_WORM 0x0010 /* WORM drives */ 787#define DEV_CDROM 0x0020 /* CD-ROM drives */ 788#define DEV_SCANNER 0x0040 /* Scanners */ 789#define DEV_OPTICAL 0x0080 /* Optical Drives */ 790#define DEV_JUKEBOX 0x0100 /* Jukebox */ 791#define DEV_COMM 0x0200 /* Communications Devices */ 792#define DEV_OTHER 0x0400 /* Other Devices */ 793#define DEV_ALL 0xFFFF /* All SCSI Devices */ 794 795/* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */ 796#define ADF_2001 0x0001 /* PM2001 */ 797#define ADF_2012A 0x0002 /* PM2012A */ 798#define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */ 799#define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */ 800#define ADF_SC3_ISA 0x0010 /* PM2021 */ 801#define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */ 802#define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */ 803#define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */ 804#define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */ 805#define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */ 806#define ADF_ALL_MASTER 0xFFFE /* All bus mastering */ 807#define ADF_ALL_CACHE 0xFFFC /* All caching */ 808#define ADF_ALL 0xFFFF /* ALL DPT adapters */ 809 810/* Application - sigWORD dsApplication; FLAG BITS */ 811#define APP_DPTMGR 0x0001 /* DPT Storage Manager */ 812#define APP_ENGINE 0x0002 /* DPT Engine */ 813#define APP_SYTOS 0x0004 /* Sytron Sytos Plus */ 814#define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */ 815#define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */ 816#define APP_NOVABACK 0x0020 /* NovaStor Novaback */ 817#define APP_AIM 0x0040 /* Archive Information Manager */ 818 819/* Requirements - sigBYTE dsRequirements; FLAG BITS */ 820#define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */ 821#define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */ 822#define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */ 823#define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */ 824#define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */ 825#define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */ 826 827typedef struct dpt_sig { 828 char dsSignature[6]; /* ALWAYS "dPtSiG" */ 829 u_int8_t SigVersion; /* signature version (currently 1) */ 830 u_int8_t ProcessorFamily; /* what type of processor */ 831 u_int8_t Processor; /* precise processor */ 832 u_int8_t Filetype; /* type of file */ 833 u_int8_t FiletypeFlags; /* flags to specify load type, etc. */ 834 u_int8_t OEM; /* OEM file was created for */ 835 u_int32_t OS; /* which Operating systems */ 836 u_int16_t Capabilities; /* RAID levels, etc. */ 837 u_int16_t DeviceSupp; /* Types of SCSI devices supported */ 838 u_int16_t AdapterSupp; /* DPT adapter families supported */ 839 u_int16_t Application; /* applications file is for */ 840 u_int8_t Requirements; /* Other driver dependencies */ 841 u_int8_t Version; /* 1 */ 842 u_int8_t Revision; /* 'J' */ 843 u_int8_t SubRevision; /* '9', ' ' if N/A */ 844 u_int8_t Month; /* creation month */ 845 u_int8_t Day; /* creation day */ 846 u_int8_t Year; /* creation year since 1980 */ 847 char *Description; /* description (NULL terminated) */ 848} dpt_sig_t; 849 850/* 32 bytes minimum - with no description. Put NULL at description[0] */ 851/* 81 bytes maximum - with 49 character description plus NULL. */ 852 853/* This line added at Roycroft's request */ 854/* Microsoft's NT compiler gets confused if you do a pack and don't */ 855/* restore it. */ 856typedef struct eata_pass_through { 857 u_int8_t eataID[4]; 858 u_int32_t command; 859 860#define EATAUSRCMD (('D'<<8)|65) /* EATA PassThrough Command */ 861#define DPT_SIGNATURE (('D'<<8)|67) /* Get Signature Structure */ 862#define DPT_NUMCTRLS (('D'<<8)|68) /* Get Number Of DPT Adapters */ 863#define DPT_CTRLINFO (('D'<<8)|69) /* Get Adapter Info Structure */ 864#define DPT_SYSINFO (('D'<<8)|72) /* Get System Info Structure */ 865#define DPT_BLINKLED (('D'<<8)|75) /* Get The BlinkLED Status */ 866 867 u_int8_t *command_buffer; 868 eata_ccb_t command_packet; 869 u_int32_t timeout; 870 u_int8_t host_status; 871 u_int8_t target_status; 872 u_int8_t retries; 873} eata_pt_t; 874 875typedef enum { 876 DCCB_FREE = 0x00, 877 DCCB_ACTIVE = 0x01, 878 DCCB_RELEASE_SIMQ = 0x02 879} dccb_state; 880 881typedef struct dpt_ccb { 882 eata_ccb_t eata_ccb; 883 bus_dmamap_t dmamap; 884 dpt_sg_t *sg_list; 885 u_int32_t sg_busaddr; 886 dccb_state state; 887 union ccb *ccb; 888 struct scsi_sense_data sense_data; 889 u_int8_t tag; 890 u_int8_t retries; 891 u_int8_t status; /* status of this queueslot */ 892 u_int8_t *cmd; /* address of cmd */ 893 894 u_int32_t transaction_id; 895 u_int32_t result; 896 caddr_t data; 897 SLIST_ENTRY(dpt_ccb) links; 898 899#ifdef DPT_MEASURE_PERFORMANCE 900 u_int32_t submitted_time; 901 struct timeval command_started; 902 struct timeval command_ended; 903#endif 904} dpt_ccb_t; 905 906/* 907 * This is provided for compatability with UnixWare only. 908 * Some of the fields may be bogus. 909 * Others may have a totally different meaning. 910 */ 911typedef struct dpt_scsi_ha { 912 u_int32_t ha_state; /* Operational state */ 913 u_int8_t ha_id[MAX_CHANNELS]; /* Host adapter SCSI ids */ 914 int32_t ha_base; /* Base I/O address */ 915 int ha_max_jobs; /* Max number of Active Jobs */ 916 int ha_cache:2; /* Cache parameters */ 917 int ha_cachesize:30; /* In meg, only if cache present*/ 918 int ha_nbus; /* Number Of Busses on HBA */ 919 int ha_ntargets; /* Number Of Targets Supported */ 920 int ha_nluns; /* Number Of LUNs Supported */ 921 int ha_tshift; /* Shift value for target */ 922 int ha_bshift; /* Shift value for bus */ 923 int ha_npend; /* # of jobs sent to HBA */ 924 int ha_active_jobs; /* Number Of Active Jobs */ 925 char ha_fw_version[4]; /* Firmware Revision Level */ 926 void *ha_ccb; /* Controller command blocks */ 927 void *ha_cblist; /* Command block free list */ 928 void *ha_dev; /* Logical unit queues */ 929 void *ha_StPkt_lock; /* Status Packet Lock */ 930 void *ha_ccb_lock; /* CCB Lock */ 931 void *ha_LuQWaiting; /* Lu Queue Waiting List */ 932 void *ha_QWait_lock; /* Device Que Waiting Lock */ 933 int ha_QWait_opri; /* Saved Priority Level */ 934#ifdef DPT_TARGET_MODE 935 dpt_ccb_t *target_ccb[MAX_CHANNELS]; /* Command block waiting writebuf */ 936#endif 937} dpt_compat_ha_t; 938 939/* 940 * Describe the Inquiry Data returned on Page 0 from the Adapter. The 941 * Page C1 Inquiry Data is described in the DptConfig_t structure above. 942 */ 943typedef struct { 944 u_int8_t deviceType; 945 u_int8_t rm_dtq; 946 u_int8_t otherData[6]; 947 u_int8_t vendor[8]; 948 u_int8_t modelNum[16]; 949 u_int8_t firmware[4]; 950 u_int8_t protocol[4]; 951} dpt_inq_t; 952 953/* 954 * sp_EOC is not `safe', so I will check sp_Messages[0] instead! 955 */ 956#define DptStat_BUSY(x) ((x)->sp_ID_Message) 957#define DptStat_Reset_BUSY(x) \ 958 ((x)->msg[0] = 0xA5, (x)->EOC = 0, \ 959 (x)->ccb_busaddr = ~0) 960 961#ifdef DPT_MEASURE_PERFORMANCE 962#define BIG_ENOUGH 0x8fffffff 963typedef struct dpt_metrics { 964 u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */ 965 u_int32_t max_command_time[256]; 966 u_int32_t min_command_time[256]; 967 968 u_int32_t min_intr_time; 969 u_int32_t max_intr_time; 970 u_int32_t aborted_interrupts; 971 u_int32_t spurious_interrupts; 972 973 u_int32_t max_waiting_count; 974 u_int32_t max_submit_count; 975 u_int32_t max_complete_count; 976 977 u_int32_t min_waiting_time; 978 u_int32_t min_submit_time; 979 u_int32_t min_complete_time; 980 981 u_int32_t max_waiting_time; 982 u_int32_t max_submit_time; 983 u_int32_t max_complete_time; 984 985 u_int32_t command_collisions; 986 u_int32_t command_too_busy; 987 u_int32_t max_eata_tries; 988 u_int32_t min_eata_tries; 989 990 u_int32_t read_by_size_count[10]; 991 u_int32_t write_by_size_count[10]; 992 u_int32_t read_by_size_min_time[10]; 993 u_int32_t read_by_size_max_time[10]; 994 u_int32_t write_by_size_min_time[10]; 995 u_int32_t write_by_size_max_time[10]; 996 997#define SIZE_512 0 998#define SIZE_1K 1 999#define SIZE_2K 2 1000#define SIZE_4K 3 1001#define SIZE_8K 4 1002#define SIZE_16K 5 1003#define SIZE_32K 6 1004#define SIZE_64K 7 1005#define SIZE_BIGGER 8 1006#define SIZE_OTHER 9 1007 1008 struct timeval intr_started; 1009 1010 u_int32_t warm_starts; 1011 u_int32_t cold_boots; 1012} dpt_perf_t; 1013#endif 1014 1015struct sg_map_node { 1016 bus_dmamap_t sg_dmamap; 1017 bus_addr_t sg_physaddr; 1018 dpt_sg_t* sg_vaddr; 1019 SLIST_ENTRY(sg_map_node) links; 1020}; 1021 1022/* Main state machine and interface structure */ 1023typedef struct dpt_softc { 1024 bus_space_tag_t tag; 1025 bus_space_handle_t bsh; 1026 bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */ 1027 dpt_ccb_t *dpt_dccbs; /* Array of dpt ccbs */ 1028 bus_addr_t dpt_ccb_busbase; /* phys base address of array */ 1029 bus_addr_t dpt_ccb_busend; /* phys end address of array */ 1030 1031 u_int32_t handle_interrupts :1, /* Are we ready for real work? */ 1032 target_mode_enabled :1, 1033 resource_shortage :1, 1034 cache_type :2, 1035 spare :28; 1036 1037 int total_dccbs; 1038 int free_dccbs; 1039 int pending_ccbs; 1040 int completed_ccbs; 1041 1042 SLIST_HEAD(, dpt_ccb) free_dccb_list; 1043 LIST_HEAD(, ccb_hdr) pending_ccb_list; 1044 1045 bus_dma_tag_t parent_dmat; 1046 bus_dma_tag_t dccb_dmat; /* dmat for our ccb array */ 1047 bus_dmamap_t dccb_dmamap; 1048 bus_dma_tag_t sg_dmat; /* dmat for our sg maps */ 1049 SLIST_HEAD(, sg_map_node) sg_maps; 1050 1051 struct cam_sim *sims[MAX_CHANNELS]; 1052 struct cam_path *paths[MAX_CHANNELS]; 1053 u_int32_t commands_processed; 1054 u_int32_t lost_interrupts; 1055 1056 /* 1057 * These three parameters can be used to allow for wide scsi, and 1058 * for host adapters that support multiple busses. The first two 1059 * should be set to 1 more than the actual max id or lun (i.e. 8 for 1060 * normal systems). 1061 * 1062 * There is a FAT assumption here; We assume that these will never 1063 * exceed MAX_CHANNELS, MAX_TARGETS, MAX_LUNS 1064 */ 1065 u_int channels; /* # of avail scsi chan. */ 1066 u_int32_t max_id; 1067 u_int32_t max_lun; 1068 1069 u_int8_t irq; 1070 u_int8_t dma_channel; 1071 1072 TAILQ_ENTRY(dpt_softc) links; 1073 int unit; 1074 int init_level; 1075 1076 /* 1077 * Every object on a unit can have a receiver, if it treats 1078 * us as a target. We do that so that separate and independant 1079 * clients can consume received buffers. 1080 */ 1081 1082#define DPT_RW_BUFFER_SIZE (8 * 1024) 1083 dpt_ccb_t *target_ccb[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1084 u_int8_t *rw_buffer[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1085 dpt_rec_buff buffer_receiver[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1086 1087 dpt_inq_t board_data; 1088 u_int8_t EATA_revision; 1089 u_int8_t bustype; /* bustype of HBA */ 1090 u_int32_t state; /* state of HBA */ 1091 1092#define DPT_HA_FREE 0x00000000 1093#define DPT_HA_OK 0x00000000 1094#define DPT_HA_NO_TIMEOUT 0x00000000 1095#define DPT_HA_BUSY 0x00000001 1096#define DPT_HA_TIMEOUT 0x00000002 1097#define DPT_HA_RESET 0x00000004 1098#define DPT_HA_LOCKED 0x00000008 1099#define DPT_HA_ABORTED 0x00000010 1100#define DPT_HA_CONTROL_ACTIVE 0x00000020 1101#define DPT_HA_SHUTDOWN_ACTIVE 0x00000040 1102#define DPT_HA_COMMAND_ACTIVE 0x00000080 1103#define DPT_HA_QUIET 0x00000100 1104 1105#ifdef DPT_LOST_IRQ 1106#define DPT_LOST_IRQ_SET 0x10000000 1107#define DPT_LOST_IRQ_ACTIVE 0x20000000 1108#endif 1109 1110#ifdef DPT_HANDLE_TIMEOUTS 1111#define DPT_HA_TIMEOUTS_SET 0x40000000 1112#define DPT_HA_TIMEOUTS_ACTIVE 0x80000000 1113#endif 1114 1115 u_int8_t primary; /* true if primary */ 1116 1117 u_int8_t more_support :1, /* HBA supports MORE flag */ 1118 immediate_support :1, /* HBA supports IMMEDIATE */ 1119 broken_INQUIRY :1, /* EISA HBA w/broken INQUIRY */ 1120 spare2 :5; 1121 1122 u_int8_t resetlevel[MAX_CHANNELS]; 1123 u_int32_t last_ccb; /* Last used ccb */ 1124 u_int32_t cplen; /* size of CP in words */ 1125 u_int16_t cppadlen; /* pad length of cp */ 1126 u_int16_t max_dccbs; 1127 u_int16_t sgsize; /* Entries in the SG list */ 1128 u_int8_t hostid[MAX_CHANNELS]; /* SCSI ID of HBA */ 1129 u_int32_t cache_size; 1130 1131 volatile dpt_sp_t *sp; /* status packet */ 1132 /* Copied from the status packet during interrupt handler */ 1133 u_int8_t hba_stat; 1134 u_int8_t scsi_stat; /* Target SCSI status */ 1135 u_int32_t residue_len; /* Number of bytes not transferred */ 1136 bus_addr_t sp_physaddr; /* phys address of status packet */ 1137 1138 /* 1139 * We put ALL conditional elements at the tail for the structure. 1140 * If we do not, then userland code will crash or trash based on which 1141 * kernel it is running with. 1142 * This isi most visible with usr/sbin/dpt_softc(8) 1143 */ 1144 1145#ifdef DPT_MEASURE_PERFORMANCE 1146 dpt_perf_t performance; 1147#endif 1148 1149#ifdef DPT_RESET_HBA 1150 struct timeval last_contact; 1151#endif 1152} dpt_softc_t; 1153 1154/* 1155 * This structure is used to pass dpt_softc contents to userland via the 1156 * ioctl DPT_IOCTL_SOFTC. The reason for this maddness, is that FreeBSD 1157 * (all BSDs ?) chose to actually assign a nasty meaning to the IOCTL word, 1158 * encoding 13 bits of it as size. As dpt_softc_t is somewhere between 1159 * 8,594 and 8,600 (depends on options), we have to copy the data to 1160 * something less than 4KB long. This siliness also solves the problem of 1161 * varying definition of dpt_softc_t, As the variants are exluded from 1162 * dpt_user_softc. 1163 * 1164 * See dpt_softc_t above for enumerations, comments and such. 1165 */ 1166typedef struct dpt_user_softc { 1167 int unit; 1168 u_int32_t handle_interrupts :1, /* Are we ready for real work? */ 1169 target_mode_enabled :1, 1170 spare :30; 1171 1172 int total_ccbs_count; 1173 int free_ccbs_count; 1174 int waiting_ccbs_count; 1175 int submitted_ccbs_count; 1176 int completed_ccbs_count; 1177 1178 u_int32_t queue_status; 1179 u_int32_t free_lock; 1180 u_int32_t waiting_lock; 1181 u_int32_t submitted_lock; 1182 u_int32_t completed_lock; 1183 1184 u_int32_t commands_processed; 1185 u_int32_t lost_interrupts; 1186 1187 u_int8_t channels; 1188 u_int32_t max_id; 1189 u_int32_t max_lun; 1190 1191 u_int16_t io_base; 1192 u_int8_t *v_membase; 1193 u_int8_t *p_membase; 1194 1195 u_int8_t irq; 1196 u_int8_t dma_channel; 1197 1198 dpt_inq_t board_data; 1199 u_int8_t EATA_revision; 1200 u_int8_t bustype; 1201 u_int32_t state; 1202 1203 u_int8_t primary; 1204 u_int8_t more_support :1, 1205 immediate_support :1, 1206 broken_INQUIRY :1, 1207 spare2 :5; 1208 1209 u_int8_t resetlevel[MAX_CHANNELS]; 1210 u_int32_t last_ccb; 1211 u_int32_t cplen; 1212 u_int16_t cppadlen; 1213 u_int16_t queuesize; 1214 u_int16_t sgsize; 1215 u_int8_t hostid[MAX_CHANNELS]; 1216 u_int32_t cache_type :2, 1217 cache_size :30; 1218} dpt_user_softc_t; 1219 1220/* 1221 * Externals: 1222 * These all come from dpt_scsi.c 1223 * 1224 */ 1225#ifdef KERNEL 1226/* This function gets the current hi-res time and returns it to the caller */ 1227static __inline struct timeval 1228dpt_time_now(void) 1229{ 1230 struct timeval now; 1231 1232 microtime(&now); 1233 return(now); 1234} 1235 1236/* 1237 * Given a minor device number, get its SCSI Unit. 1238 */ 1239static __inline int 1240dpt_minor2unit(int minor) 1241{ 1242 return(minor2hba(minor)); 1243} 1244 1245dpt_softc_t *dpt_minor2softc(int minor_no); 1246 1247#endif /* KERNEL */ 1248 1249/* 1250 * This function substracts one timval structure from another, 1251 * Returning the result in usec. 1252 * It assumes that less than 4 billion usecs passed form start to end. 1253 * If times are sensless, ~0 is returned. 1254 */ 1255static __inline u_int32_t 1256dpt_time_delta(struct timeval start, 1257 struct timeval end) 1258{ 1259 if (start.tv_sec > end.tv_sec) 1260 return(~0); 1261 1262 if ( (start.tv_sec == end.tv_sec) && (start.tv_usec > end.tv_usec) ) 1263 return(~0); 1264 1265 return ( (end.tv_sec - start.tv_sec) * 1000000 + 1266 (end.tv_usec - start.tv_usec) ); 1267} 1268 1269extern TAILQ_HEAD(dpt_softc_list, dpt_softc) dpt_softcs; 1270 1271extern int dpt_controllers_present; 1272 1273struct dpt_softc* dpt_alloc(u_int unit, bus_space_tag_t tag, 1274 bus_space_handle_t bsh); 1275void dpt_free(struct dpt_softc *dpt); 1276int dpt_init(struct dpt_softc *dpt); 1277int dpt_attach(dpt_softc_t * dpt); 1278void dpt_intr(void *arg); 1279 1280dpt_conf_t * dpt_pio_get_conf(u_int32_t); 1281 1282#if 0 1283extern void hex_dump(u_char * data, int length, 1284 char *name, int no); 1285extern char *i2bin(unsigned int no, int length); 1286extern char *scsi_cmd_name(u_int8_t cmd); 1287 1288extern dpt_conf_t *dpt_get_conf(dpt_softc_t *dpt, u_int8_t page, 1289 u_int8_t target, u_int8_t size, 1290 int extent); 1291 1292extern int dpt_setup(dpt_softc_t * dpt, dpt_conf_t * conf); 1293extern int dpt_attach(dpt_softc_t * dpt); 1294extern void dpt_shutdown(int howto, dpt_softc_t *dpt); 1295extern void dpt_detect_cache(dpt_softc_t *dpt); 1296 1297extern int dpt_user_cmd(dpt_softc_t *dpt, eata_pt_t *user_cmd, 1298 caddr_t cmdarg, int minor_no); 1299 1300extern u_int8_t dpt_blinking_led(dpt_softc_t *dpt); 1301 1302extern dpt_rb_t dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target, 1303 u_int8_t lun, u_int8_t mode, 1304 u_int16_t length, u_int16_t offset, 1305 dpt_rec_buff callback, dpt_rb_op_t op); 1306 1307extern int dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target, 1308 u_int8_t lun, u_int8_t mode, u_int16_t length, 1309 u_int16_t offset, void *data, 1310 buff_wr_done callback); 1311 1312 1313 1314void dpt_reset_performance(dpt_softc_t *dpt); 1315#endif 1316 1317#endif /* _DPT_H */ 1318