ar5413.c revision 185380
1/* 2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3 * Copyright (c) 2002-2008 Atheros Communications, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 * 17 * $Id: ar5413.c,v 1.8 2008/11/15 22:15:46 sam Exp $ 18 */ 19#include "opt_ah.h" 20 21#ifdef AH_SUPPORT_5413 22 23#include "ah.h" 24#include "ah_internal.h" 25 26#include "ah_eeprom_v3.h" 27 28#include "ar5212/ar5212.h" 29#include "ar5212/ar5212reg.h" 30#include "ar5212/ar5212phy.h" 31 32#define AH_5212_5413 33#include "ar5212/ar5212.ini" 34 35#define N(a) (sizeof(a)/sizeof(a[0])) 36 37struct ar5413State { 38 RF_HAL_FUNCS base; /* public state, must be first */ 39 uint16_t pcdacTable[PWR_TABLE_SIZE_2413]; 40 41 uint32_t Bank1Data[N(ar5212Bank1_5413)]; 42 uint32_t Bank2Data[N(ar5212Bank2_5413)]; 43 uint32_t Bank3Data[N(ar5212Bank3_5413)]; 44 uint32_t Bank6Data[N(ar5212Bank6_5413)]; 45 uint32_t Bank7Data[N(ar5212Bank7_5413)]; 46 47 /* 48 * Private state for reduced stack usage. 49 */ 50 /* filled out Vpd table for all pdGains (chanL) */ 51 uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL] 52 [MAX_PWR_RANGE_IN_HALF_DB]; 53 /* filled out Vpd table for all pdGains (chanR) */ 54 uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL] 55 [MAX_PWR_RANGE_IN_HALF_DB]; 56 /* filled out Vpd table for all pdGains (interpolated) */ 57 uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL] 58 [MAX_PWR_RANGE_IN_HALF_DB]; 59}; 60#define AR5413(ah) ((struct ar5413State *) AH5212(ah)->ah_rfHal) 61 62extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 63 uint32_t numBits, uint32_t firstBit, uint32_t column); 64 65static void 66ar5413WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 67 int writes) 68{ 69 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5413, modesIndex, writes); 70 HAL_INI_WRITE_ARRAY(ah, ar5212Common_5413, 1, writes); 71 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5413, freqIndex, writes); 72} 73 74/* 75 * Take the MHz channel value and set the Channel value 76 * 77 * ASSUMES: Writes enabled to analog bus 78 */ 79static HAL_BOOL 80ar5413SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) 81{ 82 uint32_t channelSel = 0; 83 uint32_t bModeSynth = 0; 84 uint32_t aModeRefSel = 0; 85 uint32_t reg32 = 0; 86 uint16_t freq; 87 88 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); 89 90 if (chan->channel < 4800) { 91 uint32_t txctl; 92 93 if (((chan->channel - 2192) % 5) == 0) { 94 channelSel = ((chan->channel - 672) * 2 - 3040)/10; 95 bModeSynth = 0; 96 } else if (((chan->channel - 2224) % 5) == 0) { 97 channelSel = ((chan->channel - 704) * 2 - 3040) / 10; 98 bModeSynth = 1; 99 } else { 100 HALDEBUG(ah, HAL_DEBUG_ANY, 101 "%s: invalid channel %u MHz\n", 102 __func__, chan->channel); 103 return AH_FALSE; 104 } 105 106 channelSel = (channelSel << 2) & 0xff; 107 channelSel = ath_hal_reverseBits(channelSel, 8); 108 109 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 110 if (chan->channel == 2484) { 111 /* Enable channel spreading for channel 14 */ 112 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 113 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 114 } else { 115 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 116 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 117 } 118 } else if (((chan->channel % 5) == 2) && (chan->channel <= 5435)) { 119 freq = chan->channel - 2; /* Align to even 5MHz raster */ 120 channelSel = ath_hal_reverseBits( 121 (uint32_t)(((freq - 4800)*10)/25 + 1), 8); 122 aModeRefSel = ath_hal_reverseBits(0, 2); 123 } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { 124 channelSel = ath_hal_reverseBits( 125 ((chan->channel - 4800) / 20 << 2), 8); 126 aModeRefSel = ath_hal_reverseBits(1, 2); 127 } else if ((chan->channel % 10) == 0) { 128 channelSel = ath_hal_reverseBits( 129 ((chan->channel - 4800) / 10 << 1), 8); 130 aModeRefSel = ath_hal_reverseBits(1, 2); 131 } else if ((chan->channel % 5) == 0) { 132 channelSel = ath_hal_reverseBits( 133 (chan->channel - 4800) / 5, 8); 134 aModeRefSel = ath_hal_reverseBits(1, 2); 135 } else { 136 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 137 __func__, chan->channel); 138 return AH_FALSE; 139 } 140 141 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 142 (1 << 12) | 0x1; 143 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 144 145 reg32 >>= 8; 146 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 147 148 AH_PRIVATE(ah)->ah_curchan = chan; 149 return AH_TRUE; 150} 151 152/* 153 * Reads EEPROM header info from device structure and programs 154 * all rf registers 155 * 156 * REQUIRES: Access to the analog rf device 157 */ 158static HAL_BOOL 159ar5413SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) 160{ 161#define RF_BANK_SETUP(_priv, _ix, _col) do { \ 162 int i; \ 163 for (i = 0; i < N(ar5212Bank##_ix##_5413); i++) \ 164 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5413[i][_col];\ 165} while (0) 166 struct ath_hal_5212 *ahp = AH5212(ah); 167 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 168 uint16_t ob5GHz = 0, db5GHz = 0; 169 uint16_t ob2GHz = 0, db2GHz = 0; 170 struct ar5413State *priv = AR5413(ah); 171 int regWrites = 0; 172 173 HALDEBUG(ah, HAL_DEBUG_RFPARAM, 174 "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n", 175 __func__, chan->channel, chan->channelFlags, modesIndex); 176 177 HALASSERT(priv != AH_NULL); 178 179 /* Setup rf parameters */ 180 switch (chan->channelFlags & CHANNEL_ALL) { 181 case CHANNEL_A: 182 case CHANNEL_T: 183 if (chan->channel > 4000 && chan->channel < 5260) { 184 ob5GHz = ee->ee_ob1; 185 db5GHz = ee->ee_db1; 186 } else if (chan->channel >= 5260 && chan->channel < 5500) { 187 ob5GHz = ee->ee_ob2; 188 db5GHz = ee->ee_db2; 189 } else if (chan->channel >= 5500 && chan->channel < 5725) { 190 ob5GHz = ee->ee_ob3; 191 db5GHz = ee->ee_db3; 192 } else if (chan->channel >= 5725) { 193 ob5GHz = ee->ee_ob4; 194 db5GHz = ee->ee_db4; 195 } else { 196 /* XXX else */ 197 } 198 break; 199 case CHANNEL_B: 200 ob2GHz = ee->ee_obFor24; 201 db2GHz = ee->ee_dbFor24; 202 break; 203 case CHANNEL_G: 204 case CHANNEL_108G: 205 ob2GHz = ee->ee_obFor24g; 206 db2GHz = ee->ee_dbFor24g; 207 break; 208 default: 209 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 210 __func__, chan->channelFlags); 211 return AH_FALSE; 212 } 213 214 /* Bank 1 Write */ 215 RF_BANK_SETUP(priv, 1, 1); 216 217 /* Bank 2 Write */ 218 RF_BANK_SETUP(priv, 2, modesIndex); 219 220 /* Bank 3 Write */ 221 RF_BANK_SETUP(priv, 3, modesIndex); 222 223 /* Bank 6 Write */ 224 RF_BANK_SETUP(priv, 6, modesIndex); 225 226 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */ 227 if (IS_CHAN_2GHZ(chan)) { 228 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 241, 0); 229 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 238, 0); 230 231 /* TODO - only for Eagle 1.0 2GHz - remove for production */ 232 /* XXX: but without this bit G doesn't work. */ 233 ar5212ModifyRfBuffer(priv->Bank6Data, 1 , 1, 291, 2); 234 235 /* Optimum value for rf_pwd_iclobuf2G for PCIe chips only */ 236 if (IS_PCIE(ah)) { 237 ar5212ModifyRfBuffer(priv->Bank6Data, ath_hal_reverseBits(6, 3), 238 3, 131, 3); 239 } 240 } else { 241 ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0); 242 ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0); 243 244 } 245 246 /* Bank 7 Setup */ 247 RF_BANK_SETUP(priv, 7, modesIndex); 248 249 /* Write Analog registers */ 250 HAL_INI_WRITE_BANK(ah, ar5212Bank1_5413, priv->Bank1Data, regWrites); 251 HAL_INI_WRITE_BANK(ah, ar5212Bank2_5413, priv->Bank2Data, regWrites); 252 HAL_INI_WRITE_BANK(ah, ar5212Bank3_5413, priv->Bank3Data, regWrites); 253 HAL_INI_WRITE_BANK(ah, ar5212Bank6_5413, priv->Bank6Data, regWrites); 254 HAL_INI_WRITE_BANK(ah, ar5212Bank7_5413, priv->Bank7Data, regWrites); 255 256 /* Now that we have reprogrammed rfgain value, clear the flag. */ 257 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 258 259 return AH_TRUE; 260#undef RF_BANK_SETUP 261} 262 263/* 264 * Return a reference to the requested RF Bank. 265 */ 266static uint32_t * 267ar5413GetRfBank(struct ath_hal *ah, int bank) 268{ 269 struct ar5413State *priv = AR5413(ah); 270 271 HALASSERT(priv != AH_NULL); 272 switch (bank) { 273 case 1: return priv->Bank1Data; 274 case 2: return priv->Bank2Data; 275 case 3: return priv->Bank3Data; 276 case 6: return priv->Bank6Data; 277 case 7: return priv->Bank7Data; 278 } 279 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 280 __func__, bank); 281 return AH_NULL; 282} 283 284/* 285 * Return indices surrounding the value in sorted integer lists. 286 * 287 * NB: the input list is assumed to be sorted in ascending order 288 */ 289static void 290GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 291 uint32_t *vlo, uint32_t *vhi) 292{ 293 int16_t target = v; 294 const uint16_t *ep = lp+listSize; 295 const uint16_t *tp; 296 297 /* 298 * Check first and last elements for out-of-bounds conditions. 299 */ 300 if (target < lp[0]) { 301 *vlo = *vhi = 0; 302 return; 303 } 304 if (target >= ep[-1]) { 305 *vlo = *vhi = listSize - 1; 306 return; 307 } 308 309 /* look for value being near or between 2 values in list */ 310 for (tp = lp; tp < ep; tp++) { 311 /* 312 * If value is close to the current value of the list 313 * then target is not between values, it is one of the values 314 */ 315 if (*tp == target) { 316 *vlo = *vhi = tp - (const uint16_t *) lp; 317 return; 318 } 319 /* 320 * Look for value being between current value and next value 321 * if so return these 2 values 322 */ 323 if (target < tp[1]) { 324 *vlo = tp - (const uint16_t *) lp; 325 *vhi = *vlo + 1; 326 return; 327 } 328 } 329} 330 331/* 332 * Fill the Vpdlist for indices Pmax-Pmin 333 */ 334static HAL_BOOL 335ar5413FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 336 const int16_t *pwrList, const uint16_t *VpdList, 337 uint16_t numIntercepts, 338 uint16_t retVpdList[][64]) 339{ 340 uint16_t ii, jj, kk; 341 int16_t currPwr = (int16_t)(2*Pmin); 342 /* since Pmin is pwr*2 and pwrList is 4*pwr */ 343 uint32_t idxL, idxR; 344 345 ii = 0; 346 jj = 0; 347 348 if (numIntercepts < 2) 349 return AH_FALSE; 350 351 while (ii <= (uint16_t)(Pmax - Pmin)) { 352 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList, 353 numIntercepts, &(idxL), &(idxR)); 354 if (idxR < 1) 355 idxR = 1; /* extrapolate below */ 356 if (idxL == (uint32_t)(numIntercepts - 1)) 357 idxL = numIntercepts - 2; /* extrapolate above */ 358 if (pwrList[idxL] == pwrList[idxR]) 359 kk = VpdList[idxL]; 360 else 361 kk = (uint16_t) 362 (((currPwr - pwrList[idxL])*VpdList[idxR]+ 363 (pwrList[idxR] - currPwr)*VpdList[idxL])/ 364 (pwrList[idxR] - pwrList[idxL])); 365 retVpdList[pdGainIdx][ii] = kk; 366 ii++; 367 currPwr += 2; /* half dB steps */ 368 } 369 370 return AH_TRUE; 371} 372 373/* 374 * Returns interpolated or the scaled up interpolated value 375 */ 376static int16_t 377interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 378 int16_t targetLeft, int16_t targetRight) 379{ 380 int16_t rv; 381 382 if (srcRight != srcLeft) { 383 rv = ((target - srcLeft)*targetRight + 384 (srcRight - target)*targetLeft) / (srcRight - srcLeft); 385 } else { 386 rv = targetLeft; 387 } 388 return rv; 389} 390 391/* 392 * Uses the data points read from EEPROM to reconstruct the pdadc power table 393 * Called by ar5413SetPowerTable() 394 */ 395static int 396ar5413getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 397 const RAW_DATA_STRUCT_2413 *pRawDataset, 398 uint16_t pdGainOverlap_t2, 399 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 400 uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 401{ 402 struct ar5413State *priv = AR5413(ah); 403#define VpdTable_L priv->vpdTable_L 404#define VpdTable_R priv->vpdTable_R 405#define VpdTable_I priv->vpdTable_I 406 uint32_t ii, jj, kk; 407 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 408 uint32_t idxL, idxR; 409 uint32_t numPdGainsUsed = 0; 410 /* 411 * If desired to support -ve power levels in future, just 412 * change pwr_I_0 to signed 5-bits. 413 */ 414 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 415 /* to accomodate -ve power levels later on. */ 416 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 417 /* to accomodate -ve power levels later on */ 418 uint16_t numVpd = 0; 419 uint16_t Vpd_step; 420 int16_t tmpVal ; 421 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 422 423 /* Get upper lower index */ 424 GetLowerUpperIndex(channel, pRawDataset->pChannels, 425 pRawDataset->numChannels, &(idxL), &(idxR)); 426 427 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 428 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 429 /* work backwards 'cause highest pdGain for lowest power */ 430 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 431 if (numVpd > 0) { 432 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 433 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 434 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 435 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 436 } 437 Pmin_t2[numPdGainsUsed] = (int16_t) 438 (Pmin_t2[numPdGainsUsed] / 2); 439 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 440 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 441 Pmax_t2[numPdGainsUsed] = 442 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 443 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 444 ar5413FillVpdTable( 445 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 446 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 447 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 448 ); 449 ar5413FillVpdTable( 450 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 451 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 452 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 453 ); 454 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 455 VpdTable_I[numPdGainsUsed][kk] = 456 interpolate_signed( 457 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 458 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 459 } 460 /* fill VpdTable_I for this pdGain */ 461 numPdGainsUsed++; 462 } 463 /* if this pdGain is used */ 464 } 465 466 *pMinCalPower = Pmin_t2[0]; 467 kk = 0; /* index for the final table */ 468 for (ii = 0; ii < numPdGainsUsed; ii++) { 469 if (ii == (numPdGainsUsed - 1)) 470 pPdGainBoundaries[ii] = Pmax_t2[ii] + 471 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 472 else 473 pPdGainBoundaries[ii] = (uint16_t) 474 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 475 if (pPdGainBoundaries[ii] > 63) { 476 HALDEBUG(ah, HAL_DEBUG_ANY, 477 "%s: clamp pPdGainBoundaries[%d] %d\n", 478 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/ 479 pPdGainBoundaries[ii] = 63; 480 } 481 482 /* Find starting index for this pdGain */ 483 if (ii == 0) 484 ss = 0; /* for the first pdGain, start from index 0 */ 485 else 486 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 487 pdGainOverlap_t2; 488 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 489 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 490 /* 491 *-ve ss indicates need to extrapolate data below for this pdGain 492 */ 493 while (ss < 0) { 494 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 495 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 496 ss++; 497 } 498 499 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 500 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 501 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 502 503 while (ss < (int16_t)maxIndex) 504 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 505 506 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 507 VpdTable_I[ii][sizeCurrVpdTable-2]); 508 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 509 /* 510 * for last gain, pdGainBoundary == Pmax_t2, so will 511 * have to extrapolate 512 */ 513 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 514 while(ss < (int16_t)tgtIndex) { 515 tmpVal = (uint16_t) 516 (VpdTable_I[ii][sizeCurrVpdTable-1] + 517 (ss-maxIndex)*Vpd_step); 518 pPDADCValues[kk++] = (tmpVal > 127) ? 519 127 : tmpVal; 520 ss++; 521 } 522 } /* extrapolated above */ 523 } /* for all pdGainUsed */ 524 525 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 526 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 527 ii++; 528 } 529 while (kk < 128) { 530 pPDADCValues[kk] = pPDADCValues[kk-1]; 531 kk++; 532 } 533 534 return numPdGainsUsed; 535#undef VpdTable_L 536#undef VpdTable_R 537#undef VpdTable_I 538} 539 540static HAL_BOOL 541ar5413SetPowerTable(struct ath_hal *ah, 542 int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, 543 uint16_t *rfXpdGain) 544{ 545 struct ath_hal_5212 *ahp = AH5212(ah); 546 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 547 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 548 uint16_t pdGainOverlap_t2; 549 int16_t minCalPower5413_t2; 550 uint16_t *pdadcValues = ahp->ah_pcdacTable; 551 uint16_t gainBoundaries[4]; 552 uint32_t reg32, regoffset; 553 int i, numPdGainsUsed; 554#ifndef AH_USE_INIPDGAIN 555 uint32_t tpcrg1; 556#endif 557 558 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", 559 __func__, chan->channel,chan->channelFlags); 560 561 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 562 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 563 else if (IS_CHAN_B(chan)) 564 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 565 else { 566 HALASSERT(IS_CHAN_5GHZ(chan)); 567 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A]; 568 } 569 570 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 571 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 572 573 numPdGainsUsed = ar5413getGainBoundariesAndPdadcsForPowers(ah, 574 chan->channel, pRawDataset, pdGainOverlap_t2, 575 &minCalPower5413_t2,gainBoundaries, rfXpdGain, pdadcValues); 576 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3); 577 578#ifdef AH_USE_INIPDGAIN 579 /* 580 * Use pd_gains curve from eeprom; Atheros always uses 581 * the default curve from the ini file but some vendors 582 * (e.g. Zcomax) want to override this curve and not 583 * honoring their settings results in tx power 5dBm low. 584 */ 585 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 586 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 587#else 588 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1); 589 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN) 590 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN); 591 switch (numPdGainsUsed) { 592 case 3: 593 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3; 594 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3); 595 /* fall thru... */ 596 case 2: 597 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2; 598 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2); 599 /* fall thru... */ 600 case 1: 601 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1; 602 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1); 603 break; 604 } 605#ifdef AH_DEBUG 606 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1)) 607 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default " 608 "pd_gains (default 0x%x, calculated 0x%x)\n", 609 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1); 610#endif 611 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1); 612#endif 613 614 /* 615 * Note the pdadc table may not start at 0 dBm power, could be 616 * negative or greater than 0. Need to offset the power 617 * values by the amount of minPower for griffin 618 */ 619 if (minCalPower5413_t2 != 0) 620 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower5413_t2); 621 else 622 ahp->ah_txPowerIndexOffset = 0; 623 624 /* Finally, write the power values into the baseband power table */ 625 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 626 for (i = 0; i < 32; i++) { 627 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 628 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 629 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 630 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 631 OS_REG_WRITE(ah, regoffset, reg32); 632 regoffset += 4; 633 } 634 635 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 636 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 637 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 638 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 639 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 640 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 641 642 return AH_TRUE; 643} 644 645static int16_t 646ar5413GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 647{ 648 uint32_t ii,jj; 649 uint16_t Pmin=0,numVpd; 650 651 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 652 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 653 /* work backwards 'cause highest pdGain for lowest power */ 654 numVpd = data->pDataPerPDGain[jj].numVpd; 655 if (numVpd > 0) { 656 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 657 return(Pmin); 658 } 659 } 660 return(Pmin); 661} 662 663static int16_t 664ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data) 665{ 666 uint32_t ii; 667 uint16_t Pmax=0,numVpd; 668 669 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 670 /* work forwards cuase lowest pdGain for highest power */ 671 numVpd = data->pDataPerPDGain[ii].numVpd; 672 if (numVpd > 0) { 673 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 674 return(Pmax); 675 } 676 } 677 return(Pmax); 678} 679 680static HAL_BOOL 681ar5413GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, 682 int16_t *maxPow, int16_t *minPow) 683{ 684 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 685 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL; 686 const RAW_DATA_PER_CHANNEL_2413 *data=AH_NULL; 687 uint16_t numChannels; 688 int totalD,totalF, totalMin,last, i; 689 690 *maxPow = 0; 691 692 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 693 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 694 else if (IS_CHAN_B(chan)) 695 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 696 else { 697 HALASSERT(IS_CHAN_5GHZ(chan)); 698 pRawDataset = &ee->ee_rawDataset2413[headerInfo11A]; 699 } 700 701 numChannels = pRawDataset->numChannels; 702 data = pRawDataset->pDataPerChannel; 703 704 /* Make sure the channel is in the range of the TP values 705 * (freq piers) 706 */ 707 if (numChannels < 1) 708 return(AH_FALSE); 709 710 if ((chan->channel < data[0].channelValue) || 711 (chan->channel > data[numChannels-1].channelValue)) { 712 if (chan->channel < data[0].channelValue) { 713 *maxPow = ar5413GetMaxPower(ah, &data[0]); 714 *minPow = ar5413GetMinPower(ah, &data[0]); 715 return(AH_TRUE); 716 } else { 717 *maxPow = ar5413GetMaxPower(ah, &data[numChannels - 1]); 718 *minPow = ar5413GetMinPower(ah, &data[numChannels - 1]); 719 return(AH_TRUE); 720 } 721 } 722 723 /* Linearly interpolate the power value now */ 724 for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); 725 last = i++); 726 totalD = data[i].channelValue - data[last].channelValue; 727 if (totalD > 0) { 728 totalF = ar5413GetMaxPower(ah, &data[i]) - ar5413GetMaxPower(ah, &data[last]); 729 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + 730 ar5413GetMaxPower(ah, &data[last])*totalD)/totalD); 731 totalMin = ar5413GetMinPower(ah, &data[i]) - ar5413GetMinPower(ah, &data[last]); 732 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + 733 ar5413GetMinPower(ah, &data[last])*totalD)/totalD); 734 return(AH_TRUE); 735 } else { 736 if (chan->channel == data[i].channelValue) { 737 *maxPow = ar5413GetMaxPower(ah, &data[i]); 738 *minPow = ar5413GetMinPower(ah, &data[i]); 739 return(AH_TRUE); 740 } else 741 return(AH_FALSE); 742 } 743} 744 745/* 746 * Free memory for analog bank scratch buffers 747 */ 748static void 749ar5413RfDetach(struct ath_hal *ah) 750{ 751 struct ath_hal_5212 *ahp = AH5212(ah); 752 753 HALASSERT(ahp->ah_rfHal != AH_NULL); 754 ath_hal_free(ahp->ah_rfHal); 755 ahp->ah_rfHal = AH_NULL; 756} 757 758/* 759 * Allocate memory for analog bank scratch buffers 760 * Scratch Buffer will be reinitialized every reset so no need to zero now 761 */ 762HAL_BOOL 763ar5413RfAttach(struct ath_hal *ah, HAL_STATUS *status) 764{ 765 struct ath_hal_5212 *ahp = AH5212(ah); 766 struct ar5413State *priv; 767 768 HALASSERT(ah->ah_magic == AR5212_MAGIC); 769 770 HALASSERT(ahp->ah_rfHal == AH_NULL); 771 priv = ath_hal_malloc(sizeof(struct ar5413State)); 772 if (priv == AH_NULL) { 773 HALDEBUG(ah, HAL_DEBUG_ANY, 774 "%s: cannot allocate private state\n", __func__); 775 *status = HAL_ENOMEM; /* XXX */ 776 return AH_FALSE; 777 } 778 priv->base.rfDetach = ar5413RfDetach; 779 priv->base.writeRegs = ar5413WriteRegs; 780 priv->base.getRfBank = ar5413GetRfBank; 781 priv->base.setChannel = ar5413SetChannel; 782 priv->base.setRfRegs = ar5413SetRfRegs; 783 priv->base.setPowerTable = ar5413SetPowerTable; 784 priv->base.getChannelMaxMinPower = ar5413GetChannelMaxMinPower; 785 priv->base.getNfAdjust = ar5212GetNfAdjust; 786 787 ahp->ah_pcdacTable = priv->pcdacTable; 788 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 789 ahp->ah_rfHal = &priv->base; 790 791 return AH_TRUE; 792} 793#endif /* AH_SUPPORT_5413 */ 794