ar2316.c revision 185377
11558Srgrimes/* 21558Srgrimes * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 31558Srgrimes * Copyright (c) 2002-2008 Atheros Communications, Inc. 41558Srgrimes * 51558Srgrimes * Permission to use, copy, modify, and/or distribute this software for any 61558Srgrimes * purpose with or without fee is hereby granted, provided that the above 71558Srgrimes * copyright notice and this permission notice appear in all copies. 81558Srgrimes * 91558Srgrimes * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 101558Srgrimes * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 111558Srgrimes * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 121558Srgrimes * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 131558Srgrimes * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 141558Srgrimes * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 151558Srgrimes * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 161558Srgrimes * 171558Srgrimes * $Id: ar2316.c,v 1.8 2008/11/10 04:08:03 sam Exp $ 181558Srgrimes */ 191558Srgrimes#include "opt_ah.h" 201558Srgrimes 211558Srgrimes#ifdef AH_SUPPORT_2316 221558Srgrimes 231558Srgrimes#include "ah.h" 241558Srgrimes#include "ah_internal.h" 251558Srgrimes 261558Srgrimes#include "ar5212/ar5212.h" 271558Srgrimes#include "ar5212/ar5212reg.h" 281558Srgrimes#include "ar5212/ar5212phy.h" 291558Srgrimes 301558Srgrimes#include "ah_eeprom_v3.h" 3137906Scharnier 321558Srgrimes#define AH_5212_2316 331558Srgrimes#include "ar5212/ar5212.ini" 341558Srgrimes 351558Srgrimes#define N(a) (sizeof(a)/sizeof(a[0])) 361558Srgrimes 3737906Scharniertypedef RAW_DATA_STRUCT_2413 RAW_DATA_STRUCT_2316; 3823685Spetertypedef RAW_DATA_PER_CHANNEL_2413 RAW_DATA_PER_CHANNEL_2316; 3937906Scharnier#define PWR_TABLE_SIZE_2316 PWR_TABLE_SIZE_2413 401558Srgrimes 411558Srgrimesstruct ar2316State { 42146754Scharnier RF_HAL_FUNCS base; /* public state, must be first */ 43146754Scharnier uint16_t pcdacTable[PWR_TABLE_SIZE_2316]; 44146754Scharnier 451558Srgrimes uint32_t Bank1Data[N(ar5212Bank1_2316)]; 4637906Scharnier uint32_t Bank2Data[N(ar5212Bank2_2316)]; 471558Srgrimes uint32_t Bank3Data[N(ar5212Bank3_2316)]; 4823685Speter uint32_t Bank6Data[N(ar5212Bank6_2316)]; 491558Srgrimes uint32_t Bank7Data[N(ar5212Bank7_2316)]; 501558Srgrimes 511558Srgrimes /* 52103949Smike * Private state for reduced stack usage. 53118526Sache */ 5473986Sobrien /* filled out Vpd table for all pdGains (chanL) */ 551558Srgrimes uint16_t vpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL] 561558Srgrimes [MAX_PWR_RANGE_IN_HALF_DB]; 5778732Sdd /* filled out Vpd table for all pdGains (chanR) */ 5823685Speter uint16_t vpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL] 591558Srgrimes [MAX_PWR_RANGE_IN_HALF_DB]; 601558Srgrimes /* filled out Vpd table for all pdGains (interpolated) */ 611558Srgrimes uint16_t vpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL] 621558Srgrimes [MAX_PWR_RANGE_IN_HALF_DB]; 63164911Sdwmalone}; 641558Srgrimes#define AR2316(ah) ((struct ar2316State *) AH5212(ah)->ah_rfHal) 6535852Sjkh 66128175Sgreenextern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32, 671558Srgrimes uint32_t numBits, uint32_t firstBit, uint32_t column); 681558Srgrimes 691558Srgrimesstatic void 701558Srgrimesar2316WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex, 711558Srgrimes int regWrites) 7223685Speter{ 731558Srgrimes struct ath_hal_5212 *ahp = AH5212(ah); 741558Srgrimes 751558Srgrimes HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2316, modesIndex, regWrites); 761558Srgrimes HAL_INI_WRITE_ARRAY(ah, ar5212Common_2316, 1, regWrites); 771558Srgrimes HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2316, freqIndex, regWrites); 7892837Simp 7992837Simp /* For AP51 */ 801558Srgrimes if (!ahp->ah_cwCalRequire) { 811558Srgrimes OS_REG_WRITE(ah, 0xa358, (OS_REG_READ(ah, 0xa358) & ~0x2)); 8292837Simp } else { 831558Srgrimes ahp->ah_cwCalRequire = AH_FALSE; 841558Srgrimes } 851558Srgrimes} 8621149Simp 871558Srgrimes/* 881558Srgrimes * Take the MHz channel value and set the Channel value 891558Srgrimes * 9021149Simp * ASSUMES: Writes enabled to analog bus 9121149Simp */ 9221149Simpstatic HAL_BOOL 931558Srgrimesar2316SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan) 941558Srgrimes{ 951558Srgrimes uint32_t channelSel = 0; 96118526Sache uint32_t bModeSynth = 0; 97118526Sache uint32_t aModeRefSel = 0; 98128175Sgreen uint32_t reg32 = 0; 991558Srgrimes 100164911Sdwmalone OS_MARK(ah, AH_MARK_SETCHANNEL, chan->channel); 1011558Srgrimes 1021558Srgrimes if (chan->channel < 4800) { 1031558Srgrimes uint32_t txctl; 1041558Srgrimes 1051558Srgrimes if (((chan->channel - 2192) % 5) == 0) { 1061558Srgrimes channelSel = ((chan->channel - 672) * 2 - 3040)/10; 1071558Srgrimes bModeSynth = 0; 1081558Srgrimes } else if (((chan->channel - 2224) % 5) == 0) { 1091558Srgrimes channelSel = ((chan->channel - 704) * 2 - 3040) / 10; 1101558Srgrimes bModeSynth = 1; 1111558Srgrimes } else { 1121558Srgrimes HALDEBUG(ah, HAL_DEBUG_ANY, 1131558Srgrimes "%s: invalid channel %u MHz\n", 114164911Sdwmalone __func__, chan->channel); 115164911Sdwmalone return AH_FALSE; 116164911Sdwmalone } 1171558Srgrimes 118128175Sgreen channelSel = (channelSel << 2) & 0xff; 119128175Sgreen channelSel = ath_hal_reverseBits(channelSel, 8); 120128175Sgreen 1211558Srgrimes txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL); 1221558Srgrimes if (chan->channel == 2484) { 123128175Sgreen /* Enable channel spreading for channel 14 */ 124128175Sgreen OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 125128175Sgreen txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 126128175Sgreen } else { 127128175Sgreen OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 128128175Sgreen txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN); 129128175Sgreen } 1301558Srgrimes } else if ((chan->channel % 20) == 0 && chan->channel >= 5120) { 1311558Srgrimes channelSel = ath_hal_reverseBits( 1321558Srgrimes ((chan->channel - 4800) / 20 << 2), 8); 1331558Srgrimes aModeRefSel = ath_hal_reverseBits(3, 2); 1341558Srgrimes } else if ((chan->channel % 10) == 0) { 1351558Srgrimes channelSel = ath_hal_reverseBits( 1361558Srgrimes ((chan->channel - 4800) / 10 << 1), 8); 1371558Srgrimes aModeRefSel = ath_hal_reverseBits(2, 2); 1381558Srgrimes } else if ((chan->channel % 5) == 0) { 1391558Srgrimes channelSel = ath_hal_reverseBits( 1401558Srgrimes (chan->channel - 4800) / 5, 8); 1411558Srgrimes aModeRefSel = ath_hal_reverseBits(1, 2); 1421558Srgrimes } else { 1431558Srgrimes HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n", 1441558Srgrimes __func__, chan->channel); 1451558Srgrimes return AH_FALSE; 1461558Srgrimes } 1471558Srgrimes 1481558Srgrimes reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) | 1491558Srgrimes (1 << 12) | 0x1; 1501558Srgrimes OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff); 1511558Srgrimes 1521558Srgrimes reg32 >>= 8; 1531558Srgrimes OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f); 1541558Srgrimes 1551558Srgrimes AH_PRIVATE(ah)->ah_curchan = chan; 1561558Srgrimes return AH_TRUE; 1571558Srgrimes} 15835852Sjkh 15935852Sjkh/* 16035852Sjkh * Reads EEPROM header info from device structure and programs 1611558Srgrimes * all rf registers 1621558Srgrimes * 1631558Srgrimes * REQUIRES: Access to the analog rf device 1641558Srgrimes */ 1651558Srgrimesstatic HAL_BOOL 1661558Srgrimesar2316SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan, uint16_t modesIndex, uint16_t *rfXpdGain) 1671558Srgrimes{ 1681558Srgrimes#define RF_BANK_SETUP(_priv, _ix, _col) do { \ 1691558Srgrimes int i; \ 1701558Srgrimes for (i = 0; i < N(ar5212Bank##_ix##_2316); i++) \ 1711558Srgrimes (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2316[i][_col];\ 1721558Srgrimes} while (0) 1731558Srgrimes struct ath_hal_5212 *ahp = AH5212(ah); 1741558Srgrimes const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 1751558Srgrimes uint16_t ob2GHz = 0, db2GHz = 0; 1761558Srgrimes struct ar2316State *priv = AR2316(ah); 1771558Srgrimes int regWrites = 0; 1781558Srgrimes 1791558Srgrimes HALDEBUG(ah, HAL_DEBUG_RFPARAM, 1801558Srgrimes "%s: chan 0x%x flag 0x%x modesIndex 0x%x\n", 1811558Srgrimes __func__, chan->channel, chan->channelFlags, modesIndex); 182128175Sgreen 183128175Sgreen HALASSERT(priv != AH_NULL); 184128175Sgreen 1851558Srgrimes /* Setup rf parameters */ 1861558Srgrimes switch (chan->channelFlags & CHANNEL_ALL) { 1871558Srgrimes case CHANNEL_B: 1881558Srgrimes ob2GHz = ee->ee_obFor24; 1891558Srgrimes db2GHz = ee->ee_dbFor24; 1901558Srgrimes break; 1911558Srgrimes case CHANNEL_G: 1921558Srgrimes case CHANNEL_108G: 1931558Srgrimes ob2GHz = ee->ee_obFor24g; 1941558Srgrimes db2GHz = ee->ee_dbFor24g; 1951558Srgrimes break; 1961558Srgrimes default: 1971558Srgrimes HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n", 1981558Srgrimes __func__, chan->channelFlags); 1991558Srgrimes return AH_FALSE; 2001558Srgrimes } 2011558Srgrimes 202102231Strhodes /* Bank 1 Write */ 2031558Srgrimes RF_BANK_SETUP(priv, 1, 1); 2041558Srgrimes 2051558Srgrimes /* Bank 2 Write */ 2061558Srgrimes RF_BANK_SETUP(priv, 2, modesIndex); 2071558Srgrimes 2081558Srgrimes /* Bank 3 Write */ 2091558Srgrimes RF_BANK_SETUP(priv, 3, modesIndex); 2101558Srgrimes 2111558Srgrimes /* Bank 6 Write */ 2121558Srgrimes RF_BANK_SETUP(priv, 6, modesIndex); 2131558Srgrimes 2141558Srgrimes ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 178, 0); 2151558Srgrimes ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 175, 0); 2161558Srgrimes 2171558Srgrimes /* Bank 7 Setup */ 2181558Srgrimes RF_BANK_SETUP(priv, 7, modesIndex); 2191558Srgrimes 2201558Srgrimes /* Write Analog registers */ 2211558Srgrimes HAL_INI_WRITE_BANK(ah, ar5212Bank1_2316, priv->Bank1Data, regWrites); 2221558Srgrimes HAL_INI_WRITE_BANK(ah, ar5212Bank2_2316, priv->Bank2Data, regWrites); 2231558Srgrimes HAL_INI_WRITE_BANK(ah, ar5212Bank3_2316, priv->Bank3Data, regWrites); 2241558Srgrimes HAL_INI_WRITE_BANK(ah, ar5212Bank6_2316, priv->Bank6Data, regWrites); 2251558Srgrimes HAL_INI_WRITE_BANK(ah, ar5212Bank7_2316, priv->Bank7Data, regWrites); 2261558Srgrimes 2271558Srgrimes /* Now that we have reprogrammed rfgain value, clear the flag. */ 2281558Srgrimes ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE; 2291558Srgrimes 2301558Srgrimes return AH_TRUE; 2311558Srgrimes#undef RF_BANK_SETUP 2321558Srgrimes} 2331558Srgrimes 2341558Srgrimes/* 2351558Srgrimes * Return a reference to the requested RF Bank. 2361558Srgrimes */ 2371558Srgrimesstatic uint32_t * 2381558Srgrimesar2316GetRfBank(struct ath_hal *ah, int bank) 239102231Strhodes{ 2401558Srgrimes struct ar2316State *priv = AR2316(ah); 2411558Srgrimes 2421558Srgrimes HALASSERT(priv != AH_NULL); 2431558Srgrimes switch (bank) { 2441558Srgrimes case 1: return priv->Bank1Data; 2451558Srgrimes case 2: return priv->Bank2Data; 2461558Srgrimes case 3: return priv->Bank3Data; 2471558Srgrimes case 6: return priv->Bank6Data; 2481558Srgrimes case 7: return priv->Bank7Data; 2491558Srgrimes } 2501558Srgrimes HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n", 2511558Srgrimes __func__, bank); 2521558Srgrimes return AH_NULL; 2531558Srgrimes} 2541558Srgrimes 2551558Srgrimes/* 2561558Srgrimes * Return indices surrounding the value in sorted integer lists. 2571558Srgrimes * 2581558Srgrimes * NB: the input list is assumed to be sorted in ascending order 25921174Sguido */ 2601558Srgrimesstatic void 2611558SrgrimesGetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize, 2621558Srgrimes uint32_t *vlo, uint32_t *vhi) 2631558Srgrimes{ 2641558Srgrimes int16_t target = v; 2651558Srgrimes const int16_t *ep = lp+listSize; 2661558Srgrimes const int16_t *tp; 2671558Srgrimes 2681558Srgrimes /* 2691558Srgrimes * Check first and last elements for out-of-bounds conditions. 2701558Srgrimes */ 2711558Srgrimes if (target < lp[0]) { 2721558Srgrimes *vlo = *vhi = 0; 2731558Srgrimes return; 27421174Sguido } 2751558Srgrimes if (target >= ep[-1]) { 2761558Srgrimes *vlo = *vhi = listSize - 1; 2771558Srgrimes return; 2781558Srgrimes } 2791558Srgrimes 2801558Srgrimes /* look for value being near or between 2 values in list */ 2811558Srgrimes for (tp = lp; tp < ep; tp++) { 2821558Srgrimes /* 2831558Srgrimes * If value is close to the current value of the list 2841558Srgrimes * then target is not between values, it is one of the values 2851558Srgrimes */ 2861558Srgrimes if (*tp == target) { 2871558Srgrimes *vlo = *vhi = tp - (const int16_t *) lp; 2881558Srgrimes return; 2891558Srgrimes } 2901558Srgrimes /* 2911558Srgrimes * Look for value being between current value and next value 2921558Srgrimes * if so return these 2 values 2931558Srgrimes */ 2941558Srgrimes if (target < tp[1]) { 2951558Srgrimes *vlo = tp - (const int16_t *) lp; 296128175Sgreen *vhi = *vlo + 1; 297141611Sru return; 298128175Sgreen } 299128175Sgreen } 300128175Sgreen} 301128175Sgreen 302143817Simp/* 303143817Simp * Fill the Vpdlist for indices Pmax-Pmin 304143817Simp */ 305143817Simpstatic HAL_BOOL 306143817Simpar2316FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax, 3071558Srgrimes const int16_t *pwrList, const int16_t *VpdList, 3081558Srgrimes uint16_t numIntercepts, uint16_t retVpdList[][64]) 3091558Srgrimes{ 3101558Srgrimes uint16_t ii, jj, kk; 3111558Srgrimes int16_t currPwr = (int16_t)(2*Pmin); 3121558Srgrimes /* since Pmin is pwr*2 and pwrList is 4*pwr */ 3131558Srgrimes uint32_t idxL, idxR; 3141558Srgrimes 3151558Srgrimes ii = 0; 31692837Simp jj = 0; 3171558Srgrimes 3181558Srgrimes if (numIntercepts < 2) 3191558Srgrimes return AH_FALSE; 3201558Srgrimes 3211558Srgrimes while (ii <= (uint16_t)(Pmax - Pmin)) { 3221558Srgrimes GetLowerUpperIndex(currPwr, pwrList, numIntercepts, 3231558Srgrimes &(idxL), &(idxR)); 3241558Srgrimes if (idxR < 1) 3251558Srgrimes idxR = 1; /* extrapolate below */ 3261558Srgrimes if (idxL == (uint32_t)(numIntercepts - 1)) 3271558Srgrimes idxL = numIntercepts - 2; /* extrapolate above */ 3281558Srgrimes if (pwrList[idxL] == pwrList[idxR]) 3291558Srgrimes kk = VpdList[idxL]; 3301558Srgrimes else 3311558Srgrimes kk = (uint16_t) 3321558Srgrimes (((currPwr - pwrList[idxL])*VpdList[idxR]+ 3331558Srgrimes (pwrList[idxR] - currPwr)*VpdList[idxL])/ 3341558Srgrimes (pwrList[idxR] - pwrList[idxL])); 3351558Srgrimes retVpdList[pdGainIdx][ii] = kk; 33617261Sjkh ii++; 3371558Srgrimes currPwr += 2; /* half dB steps */ 3381558Srgrimes } 33923685Speter 3401558Srgrimes return AH_TRUE; 3411558Srgrimes} 3421558Srgrimes 34323685Speter/* 34423685Speter * Returns interpolated or the scaled up interpolated value 34523685Speter */ 34623685Speterstatic int16_t 3471558Srgrimesinterpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight, 3481558Srgrimes int16_t targetLeft, int16_t targetRight) 3491558Srgrimes{ 3501558Srgrimes int16_t rv; 3511558Srgrimes 35223685Speter if (srcRight != srcLeft) { 3531558Srgrimes rv = ((target - srcLeft)*targetRight + 3541558Srgrimes (srcRight - target)*targetLeft) / (srcRight - srcLeft); 3551558Srgrimes } else { 3561558Srgrimes rv = targetLeft; 3571558Srgrimes } 3581558Srgrimes return rv; 3591558Srgrimes} 3601558Srgrimes 3611558Srgrimes/* 3621558Srgrimes * Uses the data points read from EEPROM to reconstruct the pdadc power table 3631558Srgrimes * Called by ar2316SetPowerTable() 3641558Srgrimes */ 3651558Srgrimesstatic int 3661558Srgrimesar2316getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel, 3671558Srgrimes const RAW_DATA_STRUCT_2316 *pRawDataset, 3681558Srgrimes uint16_t pdGainOverlap_t2, 3691558Srgrimes int16_t *pMinCalPower, uint16_t pPdGainBoundaries[], 3701558Srgrimes uint16_t pPdGainValues[], uint16_t pPDADCValues[]) 3711558Srgrimes{ 37237906Scharnier struct ar2316State *priv = AR2316(ah); 37323685Speter#define VpdTable_L priv->vpdTable_L 37423685Speter#define VpdTable_R priv->vpdTable_R 37523685Speter#define VpdTable_I priv->vpdTable_I 3761558Srgrimes uint32_t ii, jj, kk; 377 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */ 378 uint32_t idxL, idxR; 379 uint32_t numPdGainsUsed = 0; 380 /* 381 * If desired to support -ve power levels in future, just 382 * change pwr_I_0 to signed 5-bits. 383 */ 384 int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 385 /* to accomodate -ve power levels later on. */ 386 int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL]; 387 /* to accomodate -ve power levels later on */ 388 uint16_t numVpd = 0; 389 uint16_t Vpd_step; 390 int16_t tmpVal ; 391 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex; 392 393 /* Get upper lower index */ 394 GetLowerUpperIndex(channel, pRawDataset->pChannels, 395 pRawDataset->numChannels, &(idxL), &(idxR)); 396 397 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 398 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 399 /* work backwards 'cause highest pdGain for lowest power */ 400 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd; 401 if (numVpd > 0) { 402 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain; 403 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]; 404 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) { 405 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]; 406 } 407 Pmin_t2[numPdGainsUsed] = (int16_t) 408 (Pmin_t2[numPdGainsUsed] / 2); 409 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 410 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]) 411 Pmax_t2[numPdGainsUsed] = 412 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1]; 413 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2); 414 ar2316FillVpdTable( 415 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 416 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]), 417 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L 418 ); 419 ar2316FillVpdTable( 420 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed], 421 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]), 422 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R 423 ); 424 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) { 425 VpdTable_I[numPdGainsUsed][kk] = 426 interpolate_signed( 427 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR], 428 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]); 429 } 430 /* fill VpdTable_I for this pdGain */ 431 numPdGainsUsed++; 432 } 433 /* if this pdGain is used */ 434 } 435 436 *pMinCalPower = Pmin_t2[0]; 437 kk = 0; /* index for the final table */ 438 for (ii = 0; ii < numPdGainsUsed; ii++) { 439 if (ii == (numPdGainsUsed - 1)) 440 pPdGainBoundaries[ii] = Pmax_t2[ii] + 441 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB; 442 else 443 pPdGainBoundaries[ii] = (uint16_t) 444 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 ); 445 if (pPdGainBoundaries[ii] > 63) { 446 HALDEBUG(ah, HAL_DEBUG_ANY, 447 "%s: clamp pPdGainBoundaries[%d] %d\n", 448 __func__, ii, pPdGainBoundaries[ii]);/*XXX*/ 449 pPdGainBoundaries[ii] = 63; 450 } 451 452 /* Find starting index for this pdGain */ 453 if (ii == 0) 454 ss = 0; /* for the first pdGain, start from index 0 */ 455 else 456 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) - 457 pdGainOverlap_t2; 458 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]); 459 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 460 /* 461 *-ve ss indicates need to extrapolate data below for this pdGain 462 */ 463 while (ss < 0) { 464 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step); 465 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal); 466 ss++; 467 } 468 469 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii]; 470 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii]; 471 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable; 472 473 while (ss < (int16_t)maxIndex) 474 pPDADCValues[kk++] = VpdTable_I[ii][ss++]; 475 476 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] - 477 VpdTable_I[ii][sizeCurrVpdTable-2]); 478 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step); 479 /* 480 * for last gain, pdGainBoundary == Pmax_t2, so will 481 * have to extrapolate 482 */ 483 if (tgtIndex > maxIndex) { /* need to extrapolate above */ 484 while(ss < (int16_t)tgtIndex) { 485 tmpVal = (uint16_t) 486 (VpdTable_I[ii][sizeCurrVpdTable-1] + 487 (ss-maxIndex)*Vpd_step); 488 pPDADCValues[kk++] = (tmpVal > 127) ? 489 127 : tmpVal; 490 ss++; 491 } 492 } /* extrapolated above */ 493 } /* for all pdGainUsed */ 494 495 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) { 496 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1]; 497 ii++; 498 } 499 while (kk < 128) { 500 pPDADCValues[kk] = pPDADCValues[kk-1]; 501 kk++; 502 } 503 504 return numPdGainsUsed; 505#undef VpdTable_L 506#undef VpdTable_R 507#undef VpdTable_I 508} 509 510static HAL_BOOL 511ar2316SetPowerTable(struct ath_hal *ah, 512 int16_t *minPower, int16_t *maxPower, HAL_CHANNEL_INTERNAL *chan, 513 uint16_t *rfXpdGain) 514{ 515 struct ath_hal_5212 *ahp = AH5212(ah); 516 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 517 const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL; 518 uint16_t pdGainOverlap_t2; 519 int16_t minCalPower2316_t2; 520 uint16_t *pdadcValues = ahp->ah_pcdacTable; 521 uint16_t gainBoundaries[4]; 522 uint32_t i, reg32, regoffset, tpcrg1; 523 int numPdGainsUsed; 524 525 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan 0x%x flag 0x%x\n", 526 __func__, chan->channel,chan->channelFlags); 527 528 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 529 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 530 else if (IS_CHAN_B(chan)) 531 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 532 else { 533 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: illegal mode\n", __func__); 534 return AH_FALSE; 535 } 536 537 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5), 538 AR_PHY_TPCRG5_PD_GAIN_OVERLAP); 539 540 numPdGainsUsed = ar2316getGainBoundariesAndPdadcsForPowers(ah, 541 chan->channel, pRawDataset, pdGainOverlap_t2, 542 &minCalPower2316_t2,gainBoundaries, rfXpdGain, pdadcValues); 543 HALASSERT(1 <= numPdGainsUsed && numPdGainsUsed <= 3); 544 545#if 0 546 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN, 547 (pRawDataset->pDataPerChannel[0].numPdGains - 1)); 548#endif 549 tpcrg1 = OS_REG_READ(ah, AR_PHY_TPCRG1); 550 tpcrg1 = (tpcrg1 &~ AR_PHY_TPCRG1_NUM_PD_GAIN) 551 | SM(numPdGainsUsed-1, AR_PHY_TPCRG1_NUM_PD_GAIN); 552 switch (numPdGainsUsed) { 553 case 3: 554 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING3; 555 tpcrg1 |= SM(rfXpdGain[2], AR_PHY_TPCRG1_PDGAIN_SETTING3); 556 /* fall thru... */ 557 case 2: 558 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING2; 559 tpcrg1 |= SM(rfXpdGain[1], AR_PHY_TPCRG1_PDGAIN_SETTING2); 560 /* fall thru... */ 561 case 1: 562 tpcrg1 &= ~AR_PHY_TPCRG1_PDGAIN_SETTING1; 563 tpcrg1 |= SM(rfXpdGain[0], AR_PHY_TPCRG1_PDGAIN_SETTING1); 564 break; 565 } 566#ifdef AH_DEBUG 567 if (tpcrg1 != OS_REG_READ(ah, AR_PHY_TPCRG1)) 568 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: using non-default " 569 "pd_gains (default 0x%x, calculated 0x%x)\n", 570 __func__, OS_REG_READ(ah, AR_PHY_TPCRG1), tpcrg1); 571#endif 572 OS_REG_WRITE(ah, AR_PHY_TPCRG1, tpcrg1); 573 574 /* 575 * Note the pdadc table may not start at 0 dBm power, could be 576 * negative or greater than 0. Need to offset the power 577 * values by the amount of minPower for griffin 578 */ 579 if (minCalPower2316_t2 != 0) 580 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2316_t2); 581 else 582 ahp->ah_txPowerIndexOffset = 0; 583 584 /* Finally, write the power values into the baseband power table */ 585 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */ 586 for (i = 0; i < 32; i++) { 587 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) | 588 ((pdadcValues[4*i + 1] & 0xFF) << 8) | 589 ((pdadcValues[4*i + 2] & 0xFF) << 16) | 590 ((pdadcValues[4*i + 3] & 0xFF) << 24) ; 591 OS_REG_WRITE(ah, regoffset, reg32); 592 regoffset += 4; 593 } 594 595 OS_REG_WRITE(ah, AR_PHY_TPCRG5, 596 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) | 597 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) | 598 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) | 599 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) | 600 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4)); 601 602 return AH_TRUE; 603} 604 605static int16_t 606ar2316GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data) 607{ 608 uint32_t ii,jj; 609 uint16_t Pmin=0,numVpd; 610 611 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 612 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1; 613 /* work backwards 'cause highest pdGain for lowest power */ 614 numVpd = data->pDataPerPDGain[jj].numVpd; 615 if (numVpd > 0) { 616 Pmin = data->pDataPerPDGain[jj].pwr_t4[0]; 617 return(Pmin); 618 } 619 } 620 return(Pmin); 621} 622 623static int16_t 624ar2316GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data) 625{ 626 uint32_t ii; 627 uint16_t Pmax=0,numVpd; 628 629 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) { 630 /* work forwards cuase lowest pdGain for highest power */ 631 numVpd = data->pDataPerPDGain[ii].numVpd; 632 if (numVpd > 0) { 633 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1]; 634 return(Pmax); 635 } 636 } 637 return(Pmax); 638} 639 640static HAL_BOOL 641ar2316GetChannelMaxMinPower(struct ath_hal *ah, HAL_CHANNEL *chan, 642 int16_t *maxPow, int16_t *minPow) 643{ 644 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom; 645 const RAW_DATA_STRUCT_2316 *pRawDataset = AH_NULL; 646 const RAW_DATA_PER_CHANNEL_2316 *data=AH_NULL; 647 uint16_t numChannels; 648 int totalD,totalF, totalMin,last, i; 649 650 *maxPow = 0; 651 652 if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) 653 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G]; 654 else if (IS_CHAN_B(chan)) 655 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B]; 656 else 657 return(AH_FALSE); 658 659 numChannels = pRawDataset->numChannels; 660 data = pRawDataset->pDataPerChannel; 661 662 /* Make sure the channel is in the range of the TP values 663 * (freq piers) 664 */ 665 if (numChannels < 1) 666 return(AH_FALSE); 667 668 if ((chan->channel < data[0].channelValue) || 669 (chan->channel > data[numChannels-1].channelValue)) { 670 if (chan->channel < data[0].channelValue) { 671 *maxPow = ar2316GetMaxPower(ah, &data[0]); 672 *minPow = ar2316GetMinPower(ah, &data[0]); 673 return(AH_TRUE); 674 } else { 675 *maxPow = ar2316GetMaxPower(ah, &data[numChannels - 1]); 676 *minPow = ar2316GetMinPower(ah, &data[numChannels - 1]); 677 return(AH_TRUE); 678 } 679 } 680 681 /* Linearly interpolate the power value now */ 682 for (last=0,i=0; (i<numChannels) && (chan->channel > data[i].channelValue); 683 last = i++); 684 totalD = data[i].channelValue - data[last].channelValue; 685 if (totalD > 0) { 686 totalF = ar2316GetMaxPower(ah, &data[i]) - ar2316GetMaxPower(ah, &data[last]); 687 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + 688 ar2316GetMaxPower(ah, &data[last])*totalD)/totalD); 689 totalMin = ar2316GetMinPower(ah, &data[i]) - ar2316GetMinPower(ah, &data[last]); 690 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + 691 ar2316GetMinPower(ah, &data[last])*totalD)/totalD); 692 return(AH_TRUE); 693 } else { 694 if (chan->channel == data[i].channelValue) { 695 *maxPow = ar2316GetMaxPower(ah, &data[i]); 696 *minPow = ar2316GetMinPower(ah, &data[i]); 697 return(AH_TRUE); 698 } else 699 return(AH_FALSE); 700 } 701} 702 703/* 704 * Free memory for analog bank scratch buffers 705 */ 706static void 707ar2316RfDetach(struct ath_hal *ah) 708{ 709 struct ath_hal_5212 *ahp = AH5212(ah); 710 711 HALASSERT(ahp->ah_rfHal != AH_NULL); 712 ath_hal_free(ahp->ah_rfHal); 713 ahp->ah_rfHal = AH_NULL; 714} 715 716/* 717 * Allocate memory for private state. 718 * Scratch Buffer will be reinitialized every reset so no need to zero now 719 */ 720HAL_BOOL 721ar2316RfAttach(struct ath_hal *ah, HAL_STATUS *status) 722{ 723 struct ath_hal_5212 *ahp = AH5212(ah); 724 struct ar2316State *priv; 725 726 HALASSERT(ah->ah_magic == AR5212_MAGIC); 727 728 HALASSERT(ahp->ah_rfHal == AH_NULL); 729 priv = ath_hal_malloc(sizeof(struct ar2316State)); 730 if (priv == AH_NULL) { 731 HALDEBUG(ah, HAL_DEBUG_ANY, 732 "%s: cannot allocate private state\n", __func__); 733 *status = HAL_ENOMEM; /* XXX */ 734 return AH_FALSE; 735 } 736 priv->base.rfDetach = ar2316RfDetach; 737 priv->base.writeRegs = ar2316WriteRegs; 738 priv->base.getRfBank = ar2316GetRfBank; 739 priv->base.setChannel = ar2316SetChannel; 740 priv->base.setRfRegs = ar2316SetRfRegs; 741 priv->base.setPowerTable = ar2316SetPowerTable; 742 priv->base.getChannelMaxMinPower = ar2316GetChannelMaxMinPower; 743 priv->base.getNfAdjust = ar5212GetNfAdjust; 744 745 ahp->ah_pcdacTable = priv->pcdacTable; 746 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable); 747 ahp->ah_rfHal = &priv->base; 748 749 ahp->ah_cwCalRequire = AH_TRUE; /* force initial cal */ 750 751 return AH_TRUE; 752} 753#endif /* AH_SUPPORT_2316 */ 754