1185377Ssam/* 2185377Ssam * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3185377Ssam * Copyright (c) 2002-2004 Atheros Communications, Inc. 4185377Ssam * 5185377Ssam * Permission to use, copy, modify, and/or distribute this software for any 6185377Ssam * purpose with or without fee is hereby granted, provided that the above 7185377Ssam * copyright notice and this permission notice appear in all copies. 8185377Ssam * 9185377Ssam * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10185377Ssam * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11185377Ssam * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12185377Ssam * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13185377Ssam * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14185377Ssam * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15185377Ssam * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16185377Ssam * 17204644Srpaulo * $FreeBSD: releng/10.3/sys/dev/ath/ath_hal/ar5210/ar5210_keycache.c 204644 2010-03-03 17:32:32Z rpaulo $ 18185377Ssam */ 19185377Ssam#include "opt_ah.h" 20185377Ssam 21185377Ssam#include "ah.h" 22185377Ssam#include "ah_internal.h" 23185377Ssam 24185377Ssam#include "ar5210/ar5210.h" 25185377Ssam#include "ar5210/ar5210reg.h" 26185377Ssam 27185377Ssam#define AR_KEYTABLE_SIZE 64 28185377Ssam#define KEY_XOR 0xaa 29185377Ssam 30185377Ssam/* 31185377Ssam * Return the size of the hardware key cache. 32185377Ssam */ 33185377Ssamu_int 34185377Ssamar5210GetKeyCacheSize(struct ath_hal *ah) 35185377Ssam{ 36185377Ssam return AR_KEYTABLE_SIZE; 37185377Ssam} 38185377Ssam 39185377Ssam/* 40185377Ssam * Return the size of the hardware key cache. 41185377Ssam */ 42185377SsamHAL_BOOL 43185377Ssamar5210IsKeyCacheEntryValid(struct ath_hal *ah, uint16_t entry) 44185377Ssam{ 45185377Ssam if (entry < AR_KEYTABLE_SIZE) { 46185377Ssam uint32_t val = OS_REG_READ(ah, AR_KEYTABLE_MAC1(entry)); 47185377Ssam if (val & AR_KEYTABLE_VALID) 48185377Ssam return AH_TRUE; 49185377Ssam } 50185377Ssam return AH_FALSE; 51185377Ssam} 52185377Ssam 53185377Ssam/* 54185377Ssam * Clear the specified key cache entry. 55185377Ssam */ 56185377SsamHAL_BOOL 57185377Ssamar5210ResetKeyCacheEntry(struct ath_hal *ah, uint16_t entry) 58185377Ssam{ 59185377Ssam if (entry < AR_KEYTABLE_SIZE) { 60185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), 0); 61185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), 0); 62185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), 0); 63185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), 0); 64185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), 0); 65185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), 0); 66185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), 0); 67185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 0); 68185377Ssam return AH_TRUE; 69185377Ssam } 70185377Ssam return AH_FALSE; 71185377Ssam} 72185377Ssam 73185377Ssam/* 74185377Ssam * Sets the mac part of the specified key cache entry and mark it valid. 75185377Ssam */ 76185377SsamHAL_BOOL 77185377Ssamar5210SetKeyCacheEntryMac(struct ath_hal *ah, uint16_t entry, const uint8_t *mac) 78185377Ssam{ 79185377Ssam uint32_t macHi, macLo; 80185377Ssam 81185377Ssam if (entry < AR_KEYTABLE_SIZE) { 82185377Ssam /* 83185377Ssam * Set MAC address -- shifted right by 1. MacLo is 84185377Ssam * the 4 MSBs, and MacHi is the 2 LSBs. 85185377Ssam */ 86185377Ssam if (mac != AH_NULL) { 87185377Ssam macHi = (mac[5] << 8) | mac[4]; 88185377Ssam macLo = (mac[3] << 24)| (mac[2] << 16) 89185377Ssam | (mac[1] << 8) | mac[0]; 90185377Ssam macLo >>= 1; 91185377Ssam macLo |= (macHi & 1) << 31; /* carry */ 92185377Ssam macHi >>= 1; 93185377Ssam } else { 94185377Ssam macLo = macHi = 0; 95185377Ssam } 96185377Ssam 97185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_MAC0(entry), macLo); 98185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_MAC1(entry), 99185377Ssam macHi | AR_KEYTABLE_VALID); 100185377Ssam return AH_TRUE; 101185377Ssam } 102185377Ssam return AH_FALSE; 103185377Ssam} 104185377Ssam 105185377Ssam/* 106185377Ssam * Sets the contents of the specified key cache entry. 107185377Ssam */ 108185377SsamHAL_BOOL 109185377Ssamar5210SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry, 110185377Ssam const HAL_KEYVAL *k, const uint8_t *mac, int xorKey) 111185377Ssam{ 112185377Ssam uint32_t key0, key1, key2, key3, key4; 113185377Ssam uint32_t keyType; 114185377Ssam uint32_t xorMask= xorKey ? 115185377Ssam (KEY_XOR << 24 | KEY_XOR << 16 | KEY_XOR << 8 | KEY_XOR) : 0; 116185377Ssam 117185377Ssam if (entry >= AR_KEYTABLE_SIZE) 118185377Ssam return AH_FALSE; 119185377Ssam if (k->kv_type != HAL_CIPHER_WEP) { 120185377Ssam HALDEBUG(ah, HAL_DEBUG_ANY, "%s: cipher %u not supported\n", 121185377Ssam __func__, k->kv_type); 122185377Ssam return AH_FALSE; 123185377Ssam } 124185377Ssam 125185377Ssam /* NB: only WEP supported */ 126185377Ssam if (k->kv_len < 40 / NBBY) 127185377Ssam return AH_FALSE; 128185377Ssam if (k->kv_len <= 40 / NBBY) 129185377Ssam keyType = AR_KEYTABLE_TYPE_40; 130185377Ssam else if (k->kv_len <= 104 / NBBY) 131185377Ssam keyType = AR_KEYTABLE_TYPE_104; 132185377Ssam else 133185377Ssam keyType = AR_KEYTABLE_TYPE_128; 134185377Ssam 135185377Ssam key0 = LE_READ_4(k->kv_val+0) ^ xorMask; 136185377Ssam key1 = (LE_READ_2(k->kv_val+4) ^ xorMask) & 0xffff; 137185377Ssam key2 = LE_READ_4(k->kv_val+6) ^ xorMask; 138185377Ssam key3 = (LE_READ_2(k->kv_val+10) ^ xorMask) & 0xffff; 139185377Ssam key4 = LE_READ_4(k->kv_val+12) ^ xorMask; 140185377Ssam if (k->kv_len <= 104 / NBBY) 141185377Ssam key4 &= 0xff; 142185377Ssam 143185377Ssam /* 144185377Ssam * Note: WEP key cache hardware requires that each double-word 145185377Ssam * pair be written in even/odd order (since the destination is 146185377Ssam * a 64-bit register). Don't reorder these writes w/o 147185377Ssam * understanding this! 148185377Ssam */ 149185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY0(entry), key0); 150185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY1(entry), key1); 151185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY2(entry), key2); 152185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY3(entry), key3); 153185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_KEY4(entry), key4); 154185377Ssam OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType); 155185377Ssam return ar5210SetKeyCacheEntryMac(ah, entry, mac); 156185377Ssam} 157