1183724Ssos/*-
2230132Suqs * Copyright (c) 1998 - 2008 S��ren Schmidt <sos@FreeBSD.org>
3183724Ssos * All rights reserved.
4183724Ssos *
5183724Ssos * Redistribution and use in source and binary forms, with or without
6183724Ssos * modification, are permitted provided that the following conditions
7183724Ssos * are met:
8183724Ssos * 1. Redistributions of source code must retain the above copyright
9183724Ssos *    notice, this list of conditions and the following disclaimer,
10183724Ssos *    without modification, immediately at the beginning of the file.
11183724Ssos * 2. Redistributions in binary form must reproduce the above copyright
12183724Ssos *    notice, this list of conditions and the following disclaimer in the
13183724Ssos *    documentation and/or other materials provided with the distribution.
14183724Ssos *
15183724Ssos * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16183724Ssos * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17183724Ssos * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18183724Ssos * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19183724Ssos * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20183724Ssos * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21183724Ssos * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22183724Ssos * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23183724Ssos * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24183724Ssos * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25183724Ssos */
26183724Ssos
27183724Ssos#include <sys/cdefs.h>
28183724Ssos__FBSDID("$FreeBSD: releng/10.3/sys/dev/ata/chipsets/ata-marvell.c 287016 2015-08-22 07:32:47Z mav $");
29183724Ssos
30183724Ssos#include <sys/param.h>
31183724Ssos#include <sys/module.h>
32183724Ssos#include <sys/systm.h>
33183724Ssos#include <sys/kernel.h>
34183724Ssos#include <sys/ata.h>
35183724Ssos#include <sys/bus.h>
36183724Ssos#include <sys/endian.h>
37183724Ssos#include <sys/malloc.h>
38183724Ssos#include <sys/lock.h>
39183724Ssos#include <sys/mutex.h>
40183724Ssos#include <sys/sema.h>
41183724Ssos#include <sys/taskqueue.h>
42183724Ssos#include <vm/uma.h>
43183724Ssos#include <machine/stdarg.h>
44183724Ssos#include <machine/resource.h>
45183724Ssos#include <machine/bus.h>
46183724Ssos#include <sys/rman.h>
47183724Ssos#include <dev/pci/pcivar.h>
48183724Ssos#include <dev/pci/pcireg.h>
49183724Ssos#include <dev/ata/ata-all.h>
50183724Ssos#include <dev/ata/ata-pci.h>
51183724Ssos#include <ata_if.h>
52183724Ssos
53183724Ssos/* local prototypes */
54199259Smavstatic int ata_marvell_chipinit(device_t dev);
55199259Smavstatic int ata_marvell_ch_attach(device_t dev);
56200171Smavstatic int ata_marvell_setmode(device_t dev, int target, int mode);
57203030Smavstatic int ata_marvell_dummy_chipinit(device_t dev);
58183724Ssos
59183724Ssos/* misc defines */
60183724Ssos#define MV_61XX		61
61203030Smav#define MV_91XX		91
62183724Ssos
63183724Ssos/*
64183724Ssos * Marvell chipset support functions
65183724Ssos */
66183724Ssos#define ATA_MV_HOST_BASE(ch) \
67183724Ssos	((ch->unit & 3) * 0x0100) + (ch->unit > 3 ? 0x30000 : 0x20000)
68183724Ssos#define ATA_MV_EDMA_BASE(ch) \
69183724Ssos	((ch->unit & 3) * 0x2000) + (ch->unit > 3 ? 0x30000 : 0x20000)
70183724Ssos
71183724Ssosstruct ata_marvell_response {
72183724Ssos    u_int16_t   tag;
73183724Ssos    u_int8_t    edma_status;
74183724Ssos    u_int8_t    dev_status;
75183724Ssos    u_int32_t   timestamp;
76183724Ssos};
77183724Ssos
78183724Ssosstruct ata_marvell_dma_prdentry {
79183724Ssos    u_int32_t addrlo;
80183724Ssos    u_int32_t count;
81183724Ssos    u_int32_t addrhi;
82183724Ssos    u_int32_t reserved;
83183724Ssos};
84183724Ssos
85183724Ssosstatic int
86183724Ssosata_marvell_probe(device_t dev)
87183724Ssos{
88183724Ssos    struct ata_pci_controller *ctlr = device_get_softc(dev);
89242625Sdim    static const struct ata_chip_id ids[] =
90287016Smav    {{ ATA_M88SE6101, 0, 0, MV_61XX, ATA_UDMA6, "88SE6101" },
91232380Smav     { ATA_M88SE6102, 0, 0, MV_61XX, ATA_UDMA6, "88SE6102" },
92232380Smav     { ATA_M88SE6111, 0, 1, MV_61XX, ATA_UDMA6, "88SE6111" },
93232380Smav     { ATA_M88SE6121, 0, 2, MV_61XX, ATA_UDMA6, "88SE6121" },
94232380Smav     { ATA_M88SE6141, 0, 4, MV_61XX, ATA_UDMA6, "88SE6141" },
95232380Smav     { ATA_M88SE6145, 0, 4, MV_61XX, ATA_UDMA6, "88SE6145" },
96203030Smav     { 0x91a41b4b,    0, 0, MV_91XX, ATA_UDMA6, "88SE912x" },
97183724Ssos     { 0, 0, 0, 0, 0, 0}};
98183724Ssos
99203030Smav    if (pci_get_vendor(dev) != ATA_MARVELL_ID &&
100203030Smav	pci_get_vendor(dev) != ATA_MARVELL2_ID)
101183724Ssos	return ENXIO;
102183724Ssos
103183724Ssos    if (!(ctlr->chip = ata_match_chip(dev, ids)))
104183724Ssos	return ENXIO;
105183724Ssos
106183724Ssos    ata_set_desc(dev);
107183724Ssos
108183724Ssos    switch (ctlr->chip->cfg2) {
109183724Ssos    case MV_61XX:
110199259Smav	ctlr->chipinit = ata_marvell_chipinit;
111183724Ssos	break;
112203030Smav    case MV_91XX:
113203030Smav	ctlr->chipinit = ata_marvell_dummy_chipinit;
114203030Smav	break;
115183724Ssos    }
116281140Smav    return (BUS_PROBE_LOW_PRIORITY);
117183724Ssos}
118183724Ssos
119183724Ssosstatic int
120199259Smavata_marvell_chipinit(device_t dev)
121183724Ssos{
122199322Smav	struct ata_pci_controller *ctlr = device_get_softc(dev);
123199322Smav	device_t child;
124183724Ssos
125199322Smav	if (ata_setup_interrupt(dev, ata_generic_intr))
126199322Smav		return ENXIO;
127199322Smav	/* Create AHCI subdevice if AHCI part present. */
128199322Smav	if (ctlr->chip->cfg1) {
129199322Smav	    	child = device_add_child(dev, NULL, -1);
130199322Smav		if (child != NULL) {
131199322Smav		    device_set_ivars(child, (void *)(intptr_t)-1);
132199322Smav		    bus_generic_attach(dev);
133199322Smav		}
134199322Smav	}
135199322Smav        ctlr->ch_attach = ata_marvell_ch_attach;
136199322Smav	ctlr->ch_detach = ata_pci_ch_detach;
137199322Smav	ctlr->reset = ata_generic_reset;
138199322Smav        ctlr->setmode = ata_marvell_setmode;
139199322Smav        ctlr->channels = 1;
140199322Smav        return (0);
141183724Ssos}
142183724Ssos
143183724Ssosstatic int
144199259Smavata_marvell_ch_attach(device_t dev)
145183724Ssos{
146199322Smav	struct ata_channel *ch = device_get_softc(dev);
147199322Smav	int error;
148183724Ssos
149199259Smav	error = ata_pci_ch_attach(dev);
150199259Smav    	/* dont use 32 bit PIO transfers */
151196970Sphk	ch->flags |= ATA_USE_16BIT;
152200171Smav	ch->flags |= ATA_CHECKS_CABLE;
153199322Smav	return (error);
154199259Smav}
155183724Ssos
156200171Smavstatic int
157200171Smavata_marvell_setmode(device_t dev, int target, int mode)
158199259Smav{
159200171Smav	struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev));
160200171Smav	struct ata_channel *ch = device_get_softc(dev);
161183724Ssos
162200171Smav	mode = min(mode, ctlr->chip->max_dma);
163200171Smav	/* Check for 80pin cable present. */
164209872Smav	if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
165209872Smav	    ATA_IDX_INB(ch, ATA_BMDEVSPEC_0) & 0x01) {
166200171Smav		ata_print_cable(dev, "controller");
167200171Smav		mode = ATA_UDMA2;
168200171Smav	}
169200171Smav	/* Nothing to do to setup mode, the controller snoop SET_FEATURE cmd. */
170200171Smav	return (mode);
171183724Ssos}
172183724Ssos
173203030Smavstatic int
174203030Smavata_marvell_dummy_chipinit(device_t dev)
175203030Smav{
176203030Smav	struct ata_pci_controller *ctlr = device_get_softc(dev);
177203030Smav
178203030Smav        ctlr->channels = 0;
179203030Smav        return (0);
180203030Smav}
181203030Smav
182183724SsosATA_DECLARE_DRIVER(ata_marvell);
183