if_an_pci.c revision 175445 
1/*-
2 * Copyright (c) 1997, 1998, 1999
3 *	Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 *    must display the following acknowledgement:
15 *	This product includes software developed by Bill Paul.
16 * 4. Neither the name of the author nor the names of any co-contributors
17 *    may be used to endorse or promote products derived from this software
18 *    without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#include <sys/cdefs.h>
34__FBSDID("$FreeBSD: head/sys/dev/an/if_an_pci.c 175445 2008-01-18 16:31:24Z ambrisko $");
35
36/*
37 * This is a PCI shim for the Aironet PC4500/4800 wireless network
38 * driver. Aironet makes PCMCIA, ISA and PCI versions of these devices,
39 * which all have basically the same interface. The ISA and PCI cards
40 * are actually bridge adapters with PCMCIA cards inserted into them,
41 * however they appear as normal PCI or ISA devices to the host.
42 *
43 * All we do here is handle the PCI probe and attach and set up an
44 * interrupt handler entry point. The PCI version of the card uses
45 * a PLX 9050 PCI to "dumb bus" bridge chip, which provides us with
46 * multiple PCI address space mappings. The primary mapping at PCI
47 * register 0x14 is for the PLX chip itself, *NOT* the Aironet card.
48 * The I/O address of the Aironet is actually at register 0x18, which
49 * is the local bus mapping register for bus space 0. There are also
50 * registers for additional register spaces at registers 0x1C and
51 * 0x20, but these are unused in the Aironet devices. To find out
52 * more, you need a datasheet for the 9050 from PLX, but you have
53 * to go through their sales office to get it. Bleh.
54 */
55
56#include "opt_inet.h"
57
58#ifdef INET
59#define ANCACHE
60#endif
61
62#include <sys/param.h>
63#include <sys/systm.h>
64#include <sys/sockio.h>
65#include <sys/mbuf.h>
66#include <sys/kernel.h>
67#include <sys/socket.h>
68
69#include <sys/module.h>
70#include <sys/bus.h>
71#include <machine/bus.h>
72#include <sys/rman.h>
73#include <sys/lock.h>
74#include <sys/mutex.h>
75#include <machine/resource.h>
76
77#include <net/if.h>
78#include <net/if_arp.h>
79#include <net/ethernet.h>
80#include <net/if_dl.h>
81#include <net/if_media.h>
82
83#include <dev/pci/pcireg.h>
84#include <dev/pci/pcivar.h>
85
86#include <dev/an/if_aironet_ieee.h>
87#include <dev/an/if_anreg.h>
88
89struct an_type {
90	u_int16_t		an_vid;
91	u_int16_t		an_did;
92	char			*an_name;
93};
94
95#define AIRONET_VENDORID	0x14B9
96#define AIRONET_DEVICEID_35x	0x0350
97#define AIRONET_DEVICEID_4500	0x4500
98#define AIRONET_DEVICEID_4800	0x4800
99#define AIRONET_DEVICEID_4xxx	0x0001
100#define AIRONET_DEVICEID_MPI350	0xA504
101#define AN_PCI_PLX_LOIO		0x14	/* PLX chip iobase */
102#define AN_PCI_LOIO		0x18	/* Aironet iobase */
103
104static struct an_type an_devs[] = {
105	{ AIRONET_VENDORID, AIRONET_DEVICEID_35x, "Cisco Aironet 350 Series" },
106	{ AIRONET_VENDORID, AIRONET_DEVICEID_4500, "Aironet PCI4500" },
107	{ AIRONET_VENDORID, AIRONET_DEVICEID_4800, "Aironet PCI4800" },
108	{ AIRONET_VENDORID, AIRONET_DEVICEID_4xxx, "Aironet PCI4500/PCI4800" },
109	{ 0, 0, NULL }
110};
111
112static int an_probe_pci		(device_t);
113static int an_attach_pci	(device_t);
114static int an_suspend_pci	(device_t);
115static int an_resume_pci	(device_t);
116
117static int
118an_probe_pci(device_t dev)
119{
120	struct an_type		*t;
121        struct an_softc *sc = device_get_softc(dev);
122
123	bzero(sc, sizeof(struct an_softc));
124	t = an_devs;
125
126	while (t->an_name != NULL) {
127		if (pci_get_vendor(dev) == t->an_vid &&
128		    pci_get_device(dev) == t->an_did) {
129			device_set_desc(dev, t->an_name);
130			an_pci_probe(dev);
131			return(BUS_PROBE_DEFAULT);
132		}
133		t++;
134	}
135
136	if (pci_get_vendor(dev) == AIRONET_VENDORID &&
137	    pci_get_device(dev) == AIRONET_DEVICEID_MPI350) {
138		device_set_desc(dev, "Cisco Aironet MPI350");
139		an_pci_probe(dev);
140		return(BUS_PROBE_DEFAULT);
141	}
142
143	return(ENXIO);
144}
145
146static int
147an_attach_pci(dev)
148	device_t		dev;
149{
150	u_int32_t		command;
151	struct an_softc		*sc;
152	int 			unit, flags, error = 0;
153
154	sc = device_get_softc(dev);
155	unit = device_get_unit(dev);
156	flags = device_get_flags(dev);
157
158	if (pci_get_vendor(dev) == AIRONET_VENDORID &&
159	    pci_get_device(dev) == AIRONET_DEVICEID_MPI350) {
160		sc->mpi350 = 1;
161		sc->port_rid = PCIR_BAR(0);
162	} else {
163		/*
164		 * Map control/status registers.
165	 	 */
166		command = pci_read_config(dev, PCIR_COMMAND, 4);
167		command |= PCIM_CMD_PORTEN;
168		pci_write_config(dev, PCIR_COMMAND, command, 4);
169		command = pci_read_config(dev, PCIR_COMMAND, 4);
170
171		if (!(command & PCIM_CMD_PORTEN)) {
172			printf("an%d: failed to enable I/O ports!\n", unit);
173			error = ENXIO;
174			goto fail;
175		}
176		sc->port_rid = AN_PCI_LOIO;
177	}
178	error = an_alloc_port(dev, sc->port_rid, 1);
179
180	if (error) {
181		printf("an%d: couldn't map ports\n", unit);
182		goto fail;
183	}
184
185	sc->an_btag = rman_get_bustag(sc->port_res);
186	sc->an_bhandle = rman_get_bushandle(sc->port_res);
187
188	/* Allocate memory for MPI350 */
189	if (sc->mpi350) {
190		/* Allocate memory */
191		sc->mem_rid = PCIR_BAR(1);
192		error = an_alloc_memory(dev, sc->mem_rid, 1);
193		if (error) {
194			printf("an%d: couldn't map memory\n", unit);
195			goto fail;
196		}
197		sc->an_mem_btag = rman_get_bustag(sc->mem_res);
198		sc->an_mem_bhandle = rman_get_bushandle(sc->mem_res);
199
200		/* Allocate aux. memory */
201		sc->mem_aux_rid = PCIR_BAR(2);
202		error = an_alloc_aux_memory(dev, sc->mem_aux_rid,
203		    AN_AUX_MEM_SIZE);
204		if (error) {
205			printf("an%d: couldn't map aux memory\n", unit);
206			goto fail;
207		}
208		sc->an_mem_aux_btag = rman_get_bustag(sc->mem_aux_res);
209		sc->an_mem_aux_bhandle = rman_get_bushandle(sc->mem_aux_res);
210
211		/* Allocate DMA region */
212		error = bus_dma_tag_create(NULL,	/* parent */
213			       1, 0,			/* alignment, bounds */
214			       BUS_SPACE_MAXADDR_32BIT,	/* lowaddr */
215			       BUS_SPACE_MAXADDR,	/* highaddr */
216			       NULL, NULL,		/* filter, filterarg */
217			       0x3ffff,			/* maxsize XXX */
218			       1,			/* nsegments */
219			       0xffff,			/* maxsegsize XXX */
220			       BUS_DMA_ALLOCNOW,	/* flags */
221			       NULL,			/* lockfunc */
222			       NULL,			/* lockarg */
223			       &sc->an_dtag);
224		if (error) {
225			printf("an%d: couldn't get DMA region\n", unit);
226			goto fail;
227		}
228	}
229
230	/* Allocate interrupt */
231	error = an_alloc_irq(dev, 0, RF_SHAREABLE);
232	if (error) {
233		goto fail;
234        }
235
236	sc->an_dev = dev;
237	error = an_attach(sc, device_get_unit(dev), flags);
238	if (error) {
239		goto fail;
240	}
241
242	/*
243	 * Must setup the interrupt after the an_attach to prevent racing.
244	 */
245	error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET,
246	    NULL, an_intr, sc, &sc->irq_handle);
247
248fail:
249	if (error)
250		an_release_resources(dev);
251	return(error);
252}
253
254static int
255an_suspend_pci(device_t dev)
256{
257	an_shutdown(dev);
258
259	return (0);
260}
261
262static int
263an_resume_pci(device_t dev)
264{
265	an_resume(dev);
266
267	return (0);
268}
269
270static device_method_t an_pci_methods[] = {
271        /* Device interface */
272        DEVMETHOD(device_probe,         an_probe_pci),
273        DEVMETHOD(device_attach,        an_attach_pci),
274	DEVMETHOD(device_detach,	an_detach),
275	DEVMETHOD(device_shutdown,	an_shutdown),
276	DEVMETHOD(device_suspend,	an_suspend_pci),
277	DEVMETHOD(device_resume,	an_resume_pci),
278        { 0, 0 }
279};
280
281static driver_t an_pci_driver = {
282        "an",
283        an_pci_methods,
284        sizeof(struct an_softc),
285};
286
287static devclass_t an_devclass;
288
289DRIVER_MODULE(an, pci, an_pci_driver, an_devclass, 0, 0);
290MODULE_DEPEND(an, pci, 1, 1, 1);
291MODULE_DEPEND(an, wlan, 1, 1, 1);
292