amr.c revision 143121
1/*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * Copyright (c) 2005 Scott Long 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28/*- 29 * Copyright (c) 2002 Eric Moore 30 * Copyright (c) 2002, 2004 LSI Logic Corporation 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. The party using or redistributing the source code and binary forms 42 * agrees to the disclaimer below and the terms and conditions set forth 43 * herein. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 * SUCH DAMAGE. 56 */ 57 58#include <sys/cdefs.h> 59__FBSDID("$FreeBSD: head/sys/dev/amr/amr.c 143121 2005-03-04 06:11:00Z scottl $"); 60 61/* 62 * Driver for the AMI MegaRaid family of controllers. 63 */ 64 65#include <sys/param.h> 66#include <sys/systm.h> 67#include <sys/malloc.h> 68#include <sys/kernel.h> 69 70#include <dev/amr/amr_compat.h> 71#include <sys/bus.h> 72#include <sys/conf.h> 73#include <sys/stat.h> 74 75#include <machine/bus_memio.h> 76#include <machine/bus_pio.h> 77#include <machine/bus.h> 78#include <machine/resource.h> 79#include <sys/rman.h> 80 81#include <dev/pci/pcireg.h> 82#include <dev/pci/pcivar.h> 83 84#include <dev/amr/amrio.h> 85#include <dev/amr/amrreg.h> 86#include <dev/amr/amrvar.h> 87#define AMR_DEFINE_TABLES 88#include <dev/amr/amr_tables.h> 89 90static d_open_t amr_open; 91static d_close_t amr_close; 92static d_ioctl_t amr_ioctl; 93 94static struct cdevsw amr_cdevsw = { 95 .d_version = D_VERSION, 96 .d_flags = D_NEEDGIANT, 97 .d_open = amr_open, 98 .d_close = amr_close, 99 .d_ioctl = amr_ioctl, 100 .d_name = "amr", 101}; 102 103/* 104 * Initialisation, bus interface. 105 */ 106static void amr_startup(void *arg); 107 108/* 109 * Command wrappers 110 */ 111static int amr_query_controller(struct amr_softc *sc); 112static void *amr_enquiry(struct amr_softc *sc, size_t bufsize, 113 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual); 114static void amr_completeio(struct amr_command *ac); 115static int amr_support_ext_cdb(struct amr_softc *sc); 116 117/* 118 * Command buffer allocation. 119 */ 120static void amr_alloccmd_cluster(struct amr_softc *sc); 121static void amr_freecmd_cluster(struct amr_command_cluster *acc); 122 123/* 124 * Command processing. 125 */ 126static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp); 127static int amr_wait_command(struct amr_command *ac) __unused; 128static int amr_getslot(struct amr_command *ac); 129static int amr_mapcmd(struct amr_command *ac); 130static void amr_unmapcmd(struct amr_command *ac); 131static int amr_start(struct amr_command *ac); 132static int amr_start1(struct amr_softc *sc, struct amr_command *ac); 133static void amr_complete(void *context, int pending); 134static void amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 135static void amr_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 136 137/* 138 * Status monitoring 139 */ 140static void amr_periodic(void *data); 141 142/* 143 * Interface-specific shims 144 */ 145static int amr_quartz_submit_command(struct amr_softc *sc); 146static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 147static int amr_quartz_poll_command(struct amr_command *ac); 148static int amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac); 149 150static int amr_std_submit_command(struct amr_softc *sc); 151static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 152static int amr_std_poll_command(struct amr_command *ac); 153static void amr_std_attach_mailbox(struct amr_softc *sc); 154 155#ifdef AMR_BOARD_INIT 156static int amr_quartz_init(struct amr_softc *sc); 157static int amr_std_init(struct amr_softc *sc); 158#endif 159 160/* 161 * Debugging 162 */ 163static void amr_describe_controller(struct amr_softc *sc); 164#ifdef AMR_DEBUG 165#if 0 166static void amr_printcommand(struct amr_command *ac); 167#endif 168#endif 169 170/******************************************************************************** 171 ******************************************************************************** 172 Inline Glue 173 ******************************************************************************** 174 ********************************************************************************/ 175 176/******************************************************************************** 177 ******************************************************************************** 178 Public Interfaces 179 ******************************************************************************** 180 ********************************************************************************/ 181 182/******************************************************************************** 183 * Initialise the controller and softc. 184 */ 185int 186amr_attach(struct amr_softc *sc) 187{ 188 189 debug_called(1); 190 191 /* 192 * Initialise per-controller queues. 193 */ 194 TAILQ_INIT(&sc->amr_completed); 195 TAILQ_INIT(&sc->amr_freecmds); 196 TAILQ_INIT(&sc->amr_cmd_clusters); 197 TAILQ_INIT(&sc->amr_ready); 198 bioq_init(&sc->amr_bioq); 199 200 debug(2, "queue init done"); 201 202 /* 203 * Configure for this controller type. 204 */ 205 if (AMR_IS_QUARTZ(sc)) { 206 sc->amr_submit_command = amr_quartz_submit_command; 207 sc->amr_get_work = amr_quartz_get_work; 208 sc->amr_poll_command = amr_quartz_poll_command; 209 sc->amr_poll_command1 = amr_quartz_poll_command1; 210 } else { 211 sc->amr_submit_command = amr_std_submit_command; 212 sc->amr_get_work = amr_std_get_work; 213 sc->amr_poll_command = amr_std_poll_command; 214 amr_std_attach_mailbox(sc);; 215 } 216 217#ifdef AMR_BOARD_INIT 218 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc)))) 219 return(ENXIO); 220#endif 221 222 /* 223 * Quiz controller for features and limits. 224 */ 225 if (amr_query_controller(sc)) 226 return(ENXIO); 227 228 debug(2, "controller query complete"); 229 230 /* 231 * Attach our 'real' SCSI channels to CAM. 232 */ 233 if (amr_cam_attach(sc)) 234 return(ENXIO); 235 debug(2, "CAM attach done"); 236 237 /* 238 * Create the control device. 239 */ 240 sc->amr_dev_t = make_dev(&amr_cdevsw, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR, 241 S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev)); 242 sc->amr_dev_t->si_drv1 = sc; 243 244 /* 245 * Schedule ourselves to bring the controller up once interrupts are 246 * available. 247 */ 248 bzero(&sc->amr_ich, sizeof(struct intr_config_hook)); 249 sc->amr_ich.ich_func = amr_startup; 250 sc->amr_ich.ich_arg = sc; 251 if (config_intrhook_establish(&sc->amr_ich) != 0) { 252 device_printf(sc->amr_dev, "can't establish configuration hook\n"); 253 return(ENOMEM); 254 } 255 256 /* 257 * Print a little information about the controller. 258 */ 259 amr_describe_controller(sc); 260 261 debug(2, "attach complete"); 262 return(0); 263} 264 265/******************************************************************************** 266 * Locate disk resources and attach children to them. 267 */ 268static void 269amr_startup(void *arg) 270{ 271 struct amr_softc *sc = (struct amr_softc *)arg; 272 struct amr_logdrive *dr; 273 int i, error; 274 275 debug_called(1); 276 277 /* pull ourselves off the intrhook chain */ 278 config_intrhook_disestablish(&sc->amr_ich); 279 280 /* get up-to-date drive information */ 281 if (amr_query_controller(sc)) { 282 device_printf(sc->amr_dev, "can't scan controller for drives\n"); 283 return; 284 } 285 286 /* iterate over available drives */ 287 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) { 288 /* are we already attached to this drive? */ 289 if (dr->al_disk == 0) { 290 /* generate geometry information */ 291 if (dr->al_size > 0x200000) { /* extended translation? */ 292 dr->al_heads = 255; 293 dr->al_sectors = 63; 294 } else { 295 dr->al_heads = 64; 296 dr->al_sectors = 32; 297 } 298 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors); 299 300 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1); 301 if (dr->al_disk == 0) 302 device_printf(sc->amr_dev, "device_add_child failed\n"); 303 device_set_ivars(dr->al_disk, dr); 304 } 305 } 306 307 if ((error = bus_generic_attach(sc->amr_dev)) != 0) 308 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error); 309 310 /* mark controller back up */ 311 sc->amr_state &= ~AMR_STATE_SHUTDOWN; 312 313 /* interrupts will be enabled before we do anything more */ 314 sc->amr_state |= AMR_STATE_INTEN; 315 316 /* 317 * Start the timeout routine. 318 */ 319/* sc->amr_timeout = timeout(amr_periodic, sc, hz);*/ 320 321 return; 322} 323 324/******************************************************************************* 325 * Free resources associated with a controller instance 326 */ 327void 328amr_free(struct amr_softc *sc) 329{ 330 struct amr_command_cluster *acc; 331 332 /* detach from CAM */ 333 amr_cam_detach(sc); 334 335 /* cancel status timeout */ 336 untimeout(amr_periodic, sc, sc->amr_timeout); 337 338 /* throw away any command buffers */ 339 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) { 340 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link); 341 amr_freecmd_cluster(acc); 342 } 343 344 /* destroy control device */ 345 if( sc->amr_dev_t != (struct cdev *)NULL) 346 destroy_dev(sc->amr_dev_t); 347 348 if (mtx_initialized(&sc->amr_io_lock)) 349 mtx_destroy(&sc->amr_io_lock); 350} 351 352/******************************************************************************* 353 * Receive a bio structure from a child device and queue it on a particular 354 * disk resource, then poke the disk resource to start as much work as it can. 355 */ 356int 357amr_submit_bio(struct amr_softc *sc, struct bio *bio) 358{ 359 debug_called(2); 360 361 mtx_lock(&sc->amr_io_lock); 362 amr_enqueue_bio(sc, bio); 363 amr_startio(sc); 364 mtx_unlock(&sc->amr_io_lock); 365 return(0); 366} 367 368/******************************************************************************** 369 * Accept an open operation on the control device. 370 */ 371static int 372amr_open(struct cdev *dev, int flags, int fmt, d_thread_t *td) 373{ 374 int unit = minor(dev); 375 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 376 377 debug_called(1); 378 379 sc->amr_state |= AMR_STATE_OPEN; 380 return(0); 381} 382 383/******************************************************************************** 384 * Accept the last close on the control device. 385 */ 386static int 387amr_close(struct cdev *dev, int flags, int fmt, d_thread_t *td) 388{ 389 int unit = minor(dev); 390 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 391 392 debug_called(1); 393 394 sc->amr_state &= ~AMR_STATE_OPEN; 395 return (0); 396} 397 398/******************************************************************************** 399 * Handle controller-specific control operations. 400 */ 401static int 402amr_ioctl(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, d_thread_t *td) 403{ 404 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 405 union { 406 void *_p; 407 struct amr_user_ioctl *au; 408#ifdef AMR_IO_COMMAND32 409 struct amr_user_ioctl32 *au32; 410#endif 411 int *result; 412 } arg; 413 struct amr_command *ac; 414 struct amr_mailbox_ioctl *mbi; 415 void *dp, *au_buffer; 416 unsigned long au_length; 417 unsigned char *au_cmd; 418 int *au_statusp, au_direction; 419 int error; 420 struct amr_passthrough *ap; /* 60 bytes */ 421 422 debug_called(1); 423 424 arg._p = (void *)addr; 425 426 switch(cmd) { 427 428 case AMR_IO_VERSION: 429 debug(1, "AMR_IO_VERSION"); 430 *arg.result = AMR_IO_VERSION_NUMBER; 431 return(0); 432 433#ifdef AMR_IO_COMMAND32 434 /* 435 * Accept ioctl-s from 32-bit binaries on non-32-bit 436 * platforms, such as AMD. LSI's MEGAMGR utility is 437 * the only example known today... -mi 438 */ 439 case AMR_IO_COMMAND32: 440 debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]); 441 au_cmd = arg.au32->au_cmd; 442 au_buffer = (void *)(u_int64_t)arg.au32->au_buffer; 443 au_length = arg.au32->au_length; 444 au_direction = arg.au32->au_direction; 445 au_statusp = &arg.au32->au_status; 446 break; 447#endif 448 449 case AMR_IO_COMMAND: 450 debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]); 451 au_cmd = arg.au->au_cmd; 452 au_buffer = (void *)arg.au->au_buffer; 453 au_length = arg.au->au_length; 454 au_direction = arg.au->au_direction; 455 au_statusp = &arg.au->au_status; 456 break; 457 458 default: 459 debug(1, "unknown ioctl 0x%lx", cmd); 460 return(ENOIOCTL); 461 } 462 463 error = 0; 464 dp = NULL; 465 ac = NULL; 466 ap = NULL; 467 468 /* Logical Drive not supported by the driver */ 469 if (au_cmd[0] == 0xa4 && au_cmd[1] == 0x1c) 470 return (ENOIOCTL); 471 472 /* handle inbound data buffer */ 473 if (au_length != 0 && au_cmd[0] != 0x06) { 474 if ((dp = malloc(au_length, M_DEVBUF, M_WAITOK)) == NULL) 475 return(ENOMEM); 476 477 if ((ap = malloc(sizeof(struct amr_passthrough ), M_DEVBUF, M_WAITOK)) == NULL) 478 return(ENOMEM); 479 480 if ((error = copyin(au_buffer, dp, au_length)) != 0) { 481 free(dp, M_DEVBUF); 482 return (error); 483 } 484 debug(2, "copyin %ld bytes from %p -> %p", au_length, au_buffer, dp); 485 } 486 487 mtx_lock(&sc->amr_io_lock); 488 if ((ac = amr_alloccmd(sc)) == NULL) { 489 error = ENOMEM; 490 goto out; 491 } 492 493 /* handle SCSI passthrough command */ 494 if (au_cmd[0] == AMR_CMD_PASS) { 495 int len; 496 497 /* copy cdb */ 498 len = au_cmd[2]; 499 ap->ap_cdb_length = len; 500 bcopy(au_cmd + 3, ap->ap_cdb, len); 501 502 /* build passthrough */ 503 ap->ap_timeout = au_cmd[len + 3] & 0x07; 504 ap->ap_ars = (au_cmd[len + 3] & 0x08) ? 1 : 0; 505 ap->ap_islogical = (au_cmd[len + 3] & 0x80) ? 1 : 0; 506 ap->ap_logical_drive_no = au_cmd[len + 4]; 507 ap->ap_channel = au_cmd[len + 5]; 508 ap->ap_scsi_id = au_cmd[len + 6]; 509 ap->ap_request_sense_length = 14; 510 ap->ap_data_transfer_length = au_length; 511 /* XXX what about the request-sense area? does the caller want it? */ 512 513 /* build command */ 514 ac->ac_data = ap; 515 ac->ac_length = sizeof(struct amr_passthrough); 516 ac->ac_flags |= AMR_CMD_DATAOUT; 517 ac->ac_ccb_data = dp; 518 ac->ac_ccb_length = au_length; 519 if (au_direction & AMR_IO_READ) 520 ac->ac_flags |= AMR_CMD_CCB_DATAIN; 521 if (au_direction & AMR_IO_WRITE) 522 ac->ac_flags |= AMR_CMD_CCB_DATAOUT; 523 524 ac->ac_mailbox.mb_command = AMR_CMD_PASS; 525 526 } else { 527 /* direct command to controller */ 528 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox; 529 530 /* copy pertinent mailbox items */ 531 mbi->mb_command = au_cmd[0]; 532 mbi->mb_channel = au_cmd[1]; 533 mbi->mb_param = au_cmd[2]; 534 mbi->mb_pad[0] = au_cmd[3]; 535 mbi->mb_drive = au_cmd[4]; 536 537 /* build the command */ 538 ac->ac_data = dp; 539 ac->ac_length = au_length; 540 if (au_direction & AMR_IO_READ) 541 ac->ac_flags |= AMR_CMD_DATAIN; 542 if (au_direction & AMR_IO_WRITE) 543 ac->ac_flags |= AMR_CMD_DATAOUT; 544 } 545 546 /* run the command */ 547 if ((error = amr_wait_command(ac)) != 0) 548 goto out; 549 550 /* copy out data and set status */ 551 if (au_length != 0) { 552 mtx_unlock(&sc->amr_io_lock); 553 error = copyout(dp, au_buffer, au_length); 554 mtx_lock(&sc->amr_io_lock); 555 } 556 debug(2, "copyout %ld bytes from %p -> %p", au_length, dp, au_buffer); 557 if (dp != NULL) 558 debug(2, "%16d", (int)dp); 559 *au_statusp = ac->ac_status; 560 561out: 562 /* 563 * At this point, we know that there is a lock held and that these 564 * objects have been allocated. 565 */ 566 free(dp, M_DEVBUF); 567 free(ap, M_DEVBUF); 568 amr_releasecmd(ac); 569 mtx_unlock(&sc->amr_io_lock); 570 return(error); 571} 572 573/******************************************************************************** 574 ******************************************************************************** 575 Status Monitoring 576 ******************************************************************************** 577 ********************************************************************************/ 578 579/******************************************************************************** 580 * Perform a periodic check of the controller status 581 */ 582static void 583amr_periodic(void *data) 584{ 585 struct amr_softc *sc = (struct amr_softc *)data; 586 587 debug_called(2); 588 589 /* XXX perform periodic status checks here */ 590 591 /* compensate for missed interrupts */ 592 amr_done(sc); 593 594 /* reschedule */ 595 sc->amr_timeout = timeout(amr_periodic, sc, hz); 596} 597 598/******************************************************************************** 599 ******************************************************************************** 600 Command Wrappers 601 ******************************************************************************** 602 ********************************************************************************/ 603 604/******************************************************************************** 605 * Interrogate the controller for the operational parameters we require. 606 */ 607static int 608amr_query_controller(struct amr_softc *sc) 609{ 610 struct amr_enquiry3 *aex; 611 struct amr_prodinfo *ap; 612 struct amr_enquiry *ae; 613 int ldrv; 614 615 mtx_lock(&sc->amr_io_lock); 616 617 /* 618 * If we haven't found the real limit yet, let us have a couple of commands in 619 * order to be able to probe. 620 */ 621 if (sc->amr_maxio == 0) 622 sc->amr_maxio = 2; 623 624 /* 625 * Greater than 10 byte cdb support 626 */ 627 sc->support_ext_cdb = amr_support_ext_cdb(sc); 628 629 if(sc->support_ext_cdb) { 630 debug(2,"supports extended CDBs."); 631 } 632 633 /* 634 * Try to issue an ENQUIRY3 command 635 */ 636 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3, 637 AMR_CONFIG_ENQ3_SOLICITED_FULL)) != NULL) { 638 639 /* 640 * Fetch current state of logical drives. 641 */ 642 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) { 643 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv]; 644 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv]; 645 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv]; 646 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 647 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 648 } 649 free(aex, M_DEVBUF); 650 651 /* 652 * Get product info for channel count. 653 */ 654 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) == NULL) { 655 device_printf(sc->amr_dev, "can't obtain product data from controller\n"); 656 mtx_unlock(&sc->amr_io_lock); 657 return(1); 658 } 659 sc->amr_maxdrives = 40; 660 sc->amr_maxchan = ap->ap_nschan; 661 sc->amr_maxio = ap->ap_maxio; 662 sc->amr_type |= AMR_TYPE_40LD; 663 free(ap, M_DEVBUF); 664 665 } else { 666 667 /* failed, try the 8LD ENQUIRY commands */ 668 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) == NULL) { 669 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) == NULL) { 670 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n"); 671 mtx_unlock(&sc->amr_io_lock); 672 return(1); 673 } 674 ae->ae_signature = 0; 675 } 676 677 /* 678 * Fetch current state of logical drives. 679 */ 680 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) { 681 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv]; 682 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv]; 683 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv]; 684 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 685 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 686 } 687 688 sc->amr_maxdrives = 8; 689 sc->amr_maxchan = ae->ae_adapter.aa_channels; 690 sc->amr_maxio = ae->ae_adapter.aa_maxio; 691 free(ae, M_DEVBUF); 692 } 693 694 /* 695 * Mark remaining drives as unused. 696 */ 697 for (; ldrv < AMR_MAXLD; ldrv++) 698 sc->amr_drive[ldrv].al_size = 0xffffffff; 699 700 /* 701 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust 702 * the controller's reported value, and lockups have been seen when we do. 703 */ 704 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD); 705 706 mtx_unlock(&sc->amr_io_lock); 707 return(0); 708} 709 710/******************************************************************************** 711 * Run a generic enquiry-style command. 712 */ 713static void * 714amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual) 715{ 716 struct amr_command *ac; 717 void *result; 718 u_int8_t *mbox; 719 int error; 720 721 debug_called(1); 722 723 error = 1; 724 result = NULL; 725 726 /* get ourselves a command buffer */ 727 if ((ac = amr_alloccmd(sc)) == NULL) 728 goto out; 729 /* allocate the response structure */ 730 if ((result = malloc(bufsize, M_DEVBUF, M_ZERO|M_NOWAIT)) == NULL) 731 goto out; 732 /* set command flags */ 733 734 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAIN; 735 736 /* point the command at our data */ 737 ac->ac_data = result; 738 ac->ac_length = bufsize; 739 740 /* build the command proper */ 741 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 742 mbox[0] = cmd; 743 mbox[2] = cmdsub; 744 mbox[3] = cmdqual; 745 746 /* can't assume that interrupts are going to work here, so play it safe */ 747 if (sc->amr_poll_command(ac)) 748 goto out; 749 error = ac->ac_status; 750 751 out: 752 if (ac != NULL) 753 amr_releasecmd(ac); 754 if ((error != 0) && (result != NULL)) { 755 free(result, M_DEVBUF); 756 result = NULL; 757 } 758 return(result); 759} 760 761/******************************************************************************** 762 * Flush the controller's internal cache, return status. 763 */ 764int 765amr_flush(struct amr_softc *sc) 766{ 767 struct amr_command *ac; 768 int error; 769 770 /* get ourselves a command buffer */ 771 error = 1; 772 mtx_lock(&sc->amr_io_lock); 773 if ((ac = amr_alloccmd(sc)) == NULL) 774 goto out; 775 /* set command flags */ 776 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 777 778 /* build the command proper */ 779 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH; 780 781 /* we have to poll, as the system may be going down or otherwise damaged */ 782 if (sc->amr_poll_command(ac)) 783 goto out; 784 error = ac->ac_status; 785 786 out: 787 if (ac != NULL) 788 amr_releasecmd(ac); 789 mtx_unlock(&sc->amr_io_lock); 790 return(error); 791} 792 793/******************************************************************************** 794 * Detect extented cdb >> greater than 10 byte cdb support 795 * returns '1' means this support exist 796 * returns '0' means this support doesn't exist 797 */ 798static int 799amr_support_ext_cdb(struct amr_softc *sc) 800{ 801 struct amr_command *ac; 802 u_int8_t *mbox; 803 int error; 804 805 /* get ourselves a command buffer */ 806 error = 0; 807 if ((ac = amr_alloccmd(sc)) == NULL) 808 goto out; 809 /* set command flags */ 810 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 811 812 /* build the command proper */ 813 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 814 mbox[0] = 0xA4; 815 mbox[2] = 0x16; 816 817 818 /* we have to poll, as the system may be going down or otherwise damaged */ 819 if (sc->amr_poll_command(ac)) 820 goto out; 821 if( ac->ac_status == AMR_STATUS_SUCCESS ) { 822 error = 1; 823 } 824 825out: 826 if (ac != NULL) 827 amr_releasecmd(ac); 828 return(error); 829} 830 831/******************************************************************************** 832 * Try to find I/O work for the controller from one or more of the work queues. 833 * 834 * We make the assumption that if the controller is not ready to take a command 835 * at some given time, it will generate an interrupt at some later time when 836 * it is. 837 */ 838void 839amr_startio(struct amr_softc *sc) 840{ 841 struct amr_command *ac; 842 843 /* spin until something prevents us from doing any work */ 844 for (;;) { 845 846 /* Don't bother to queue commands no bounce buffers are available. */ 847 if (sc->amr_state & AMR_STATE_QUEUE_FRZN) 848 break; 849 850 /* try to get a ready command */ 851 ac = amr_dequeue_ready(sc); 852 853 /* if that failed, build a command from a bio */ 854 if (ac == NULL) 855 (void)amr_bio_command(sc, &ac); 856 857 /* if that failed, build a command from a ccb */ 858 if (ac == NULL) 859 (void)amr_cam_command(sc, &ac); 860 861 /* if we don't have anything to do, give up */ 862 if (ac == NULL) 863 break; 864 865 /* try to give the command to the controller; if this fails save it for later and give up */ 866 if (amr_start(ac)) { 867 debug(2, "controller busy, command deferred"); 868 amr_requeue_ready(ac); /* XXX schedule retry very soon? */ 869 break; 870 } 871 } 872} 873 874/******************************************************************************** 875 * Handle completion of an I/O command. 876 */ 877static void 878amr_completeio(struct amr_command *ac) 879{ 880 struct amr_softc *sc = ac->ac_sc; 881 882 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */ 883 ac->ac_bio->bio_error = EIO; 884 ac->ac_bio->bio_flags |= BIO_ERROR; 885 886 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status); 887/* amr_printcommand(ac);*/ 888 } 889 amrd_intr(ac->ac_bio); 890 amr_releasecmd(ac); 891} 892 893/******************************************************************************** 894 ******************************************************************************** 895 Command Processing 896 ******************************************************************************** 897 ********************************************************************************/ 898 899/******************************************************************************** 900 * Convert a bio off the top of the bio queue into a command. 901 */ 902static int 903amr_bio_command(struct amr_softc *sc, struct amr_command **acp) 904{ 905 struct amr_command *ac; 906 struct amrd_softc *amrd; 907 struct bio *bio; 908 int error; 909 int blkcount; 910 int driveno; 911 int cmd; 912 913 ac = NULL; 914 error = 0; 915 916 /* get a command */ 917 if ((ac = amr_alloccmd(sc)) == NULL) 918 return (ENOMEM); 919 920 /* get a bio to work on */ 921 if ((bio = amr_dequeue_bio(sc)) == NULL) { 922 amr_releasecmd(ac); 923 return (0); 924 } 925 926 /* connect the bio to the command */ 927 ac->ac_complete = amr_completeio; 928 ac->ac_bio = bio; 929 ac->ac_data = bio->bio_data; 930 ac->ac_length = bio->bio_bcount; 931 if (BIO_IS_READ(bio)) { 932 ac->ac_flags |= AMR_CMD_DATAIN; 933 cmd = AMR_CMD_LREAD; 934 } else { 935 ac->ac_flags |= AMR_CMD_DATAOUT; 936 cmd = AMR_CMD_LWRITE; 937 } 938 amrd = (struct amrd_softc *)bio->bio_disk->d_drv1; 939 driveno = amrd->amrd_drive - sc->amr_drive; 940 blkcount = (bio->bio_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE; 941 942 ac->ac_mailbox.mb_command = cmd; 943 ac->ac_mailbox.mb_blkcount = blkcount; 944 ac->ac_mailbox.mb_lba = bio->bio_pblkno; 945 ac->ac_mailbox.mb_drive = driveno; 946 /* we fill in the s/g related data when the command is mapped */ 947 948 if ((bio->bio_pblkno + blkcount) > sc->amr_drive[driveno].al_size) 949 device_printf(sc->amr_dev, "I/O beyond end of unit (%lld,%d > %lu)\n", 950 (long long)bio->bio_pblkno, blkcount, 951 (u_long)sc->amr_drive[driveno].al_size); 952 953 *acp = ac; 954 return(error); 955} 956 957/******************************************************************************** 958 * Take a command, submit it to the controller and sleep until it completes 959 * or fails. Interrupts must be enabled, returns nonzero on error. 960 */ 961static int 962amr_wait_command(struct amr_command *ac) 963{ 964 int error, count; 965 966 debug_called(1); 967 968 ac->ac_complete = NULL; 969 ac->ac_flags |= AMR_CMD_SLEEP; 970 if ((error = amr_start(ac)) != 0) 971 return(error); 972 973 count = 0; 974 /* XXX better timeout? */ 975 while ((ac->ac_flags & AMR_CMD_BUSY) && (count < 30)) { 976 msleep(ac, &ac->ac_sc->amr_io_lock, PRIBIO | PCATCH, "amrwcmd", hz); 977 } 978 return(0); 979} 980 981/******************************************************************************** 982 * Take a command, submit it to the controller and busy-wait for it to return. 983 * Returns nonzero on error. Can be safely called with interrupts enabled. 984 */ 985static int 986amr_std_poll_command(struct amr_command *ac) 987{ 988 struct amr_softc *sc = ac->ac_sc; 989 int error, count; 990 991 debug_called(2); 992 993 ac->ac_complete = NULL; 994 if ((error = amr_start(ac)) != 0) 995 return(error); 996 997 count = 0; 998 do { 999 /* 1000 * Poll for completion, although the interrupt handler may beat us to it. 1001 * Note that the timeout here is somewhat arbitrary. 1002 */ 1003 amr_done(sc); 1004 DELAY(1000); 1005 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000)); 1006 if (!(ac->ac_flags & AMR_CMD_BUSY)) { 1007 error = 0; 1008 } else { 1009 /* XXX the slot is now marked permanently busy */ 1010 error = EIO; 1011 device_printf(sc->amr_dev, "polled command timeout\n"); 1012 } 1013 return(error); 1014} 1015 1016static void 1017amr_setup_polled_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1018{ 1019 struct amr_command *ac = arg; 1020 struct amr_softc *sc = ac->ac_sc; 1021 1022 amr_setup_dmamap(arg, segs, nsegs, err); 1023 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREREAD); 1024 sc->amr_poll_command1(sc, ac); 1025} 1026 1027/******************************************************************************** 1028 * Take a command, submit it to the controller and busy-wait for it to return. 1029 * Returns nonzero on error. Can be safely called with interrupts enabled. 1030 */ 1031static int 1032amr_quartz_poll_command(struct amr_command *ac) 1033{ 1034 struct amr_softc *sc = ac->ac_sc; 1035 int s, error; 1036 1037 debug_called(2); 1038 1039 s = splbio(); 1040 error = 0; 1041 1042 /* now we have a slot, we can map the command (unmapped in amr_complete) */ 1043 if (ac->ac_data != 0) { 1044 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, 1045 ac->ac_length, amr_setup_polled_dmamap, ac, BUS_DMA_NOWAIT) != 0) { 1046 error = 1; 1047 } 1048 } else { 1049 error = amr_quartz_poll_command1(sc, ac); 1050 } 1051 1052 splx(s); 1053 return (error); 1054} 1055 1056static int 1057amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac) 1058{ 1059 int count, error; 1060 1061 if ((sc->amr_state & AMR_STATE_INTEN) == 0) { 1062 count=0; 1063 while (sc->amr_busyslots) { 1064 msleep(sc, &sc->amr_io_lock, PRIBIO | PCATCH, "amrpoll", hz); 1065 if(count++>10) { 1066 break; 1067 } 1068 } 1069 1070 if(sc->amr_busyslots) { 1071 device_printf(sc->amr_dev, "adapter is busy\n"); 1072 if (ac->ac_data != NULL) 1073 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap); 1074 ac->ac_status=0; 1075 return(1); 1076 } 1077 } 1078 1079 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE); 1080 1081 /* clear the poll/ack fields in the mailbox */ 1082 sc->amr_mailbox->mb_ident = 0xFE; 1083 sc->amr_mailbox->mb_nstatus = 0xFF; 1084 sc->amr_mailbox->mb_status = 0xFF; 1085 sc->amr_mailbox->mb_poll = 0; 1086 sc->amr_mailbox->mb_ack = 0; 1087 sc->amr_mailbox->mb_busy = 1; 1088 1089 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 1090 1091 while(sc->amr_mailbox->mb_nstatus == 0xFF); 1092 while(sc->amr_mailbox->mb_status == 0xFF); 1093 ac->ac_status=sc->amr_mailbox->mb_status; 1094 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0; 1095 while(sc->amr_mailbox->mb_poll != 0x77); 1096 sc->amr_mailbox->mb_poll = 0; 1097 sc->amr_mailbox->mb_ack = 0x77; 1098 1099 /* acknowledge that we have the commands */ 1100 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK); 1101 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK); 1102 1103 /* unmap the command's data buffer */ 1104 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTREAD); 1105 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap); 1106 1107 return(error); 1108} 1109 1110/******************************************************************************** 1111 * Get a free command slot for a command if it doesn't already have one. 1112 * 1113 * May be safely called multiple times for a given command. 1114 */ 1115static int 1116amr_getslot(struct amr_command *ac) 1117{ 1118 struct amr_softc *sc = ac->ac_sc; 1119 int slot; 1120 1121 debug_called(3); 1122 1123 slot = ac->ac_slot; 1124 if (sc->amr_busycmd[slot] != NULL) 1125 panic("amr: slot %d busy?\n", slot); 1126 1127 sc->amr_busycmd[slot] = ac; 1128 sc->amr_busyslots++; 1129 1130 return (0); 1131} 1132 1133/******************************************************************************** 1134 * Map/unmap (ac)'s data in the controller's addressable space as required. 1135 * 1136 * These functions may be safely called multiple times on a given command. 1137 */ 1138static void 1139amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1140{ 1141 struct amr_command *ac = (struct amr_command *)arg; 1142 struct amr_softc *sc = ac->ac_sc; 1143 struct amr_sgentry *sg; 1144 int i; 1145 u_int8_t *sgc; 1146 1147 debug_called(3); 1148 1149 /* get base address of s/g table */ 1150 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 1151 1152 /* save data physical address */ 1153 ac->ac_dataphys = segs[0].ds_addr; 1154 1155 /* for AMR_CMD_CONFIG the s/g count goes elsewhere */ 1156 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG) { 1157 sgc = &(((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param); 1158 } else { 1159 sgc = &ac->ac_mailbox.mb_nsgelem; 1160 } 1161 1162 /* decide whether we need to populate the s/g table */ 1163 if (nsegments < 2) { 1164 *sgc = 0; 1165 ac->ac_mailbox.mb_nsgelem = 0; 1166 ac->ac_mailbox.mb_physaddr = ac->ac_dataphys; 1167 } else { 1168 ac->ac_mailbox.mb_nsgelem = nsegments; 1169 *sgc = nsegments; 1170 ac->ac_mailbox.mb_physaddr = sc->amr_sgbusaddr + 1171 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 1172 for (i = 0; i < nsegments; i++, sg++) { 1173 sg->sg_addr = segs[i].ds_addr; 1174 sg->sg_count = segs[i].ds_len; 1175 } 1176 } 1177 1178} 1179 1180static void 1181amr_setup_ccbmap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1182{ 1183 struct amr_command *ac = (struct amr_command *)arg; 1184 struct amr_softc *sc = ac->ac_sc; 1185 struct amr_sgentry *sg; 1186 struct amr_passthrough *ap = (struct amr_passthrough *)ac->ac_data; 1187 struct amr_ext_passthrough *aep = (struct amr_ext_passthrough *)ac->ac_data; 1188 int i; 1189 1190 /* get base address of s/g table */ 1191 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 1192 1193 /* decide whether we need to populate the s/g table */ 1194 if( ac->ac_mailbox.mb_command == AMR_CMD_EXTPASS ) { 1195 if (nsegments < 2) { 1196 aep->ap_no_sg_elements = 0; 1197 aep->ap_data_transfer_address = segs[0].ds_addr; 1198 } else { 1199 /* save s/g table information in passthrough */ 1200 aep->ap_no_sg_elements = nsegments; 1201 aep->ap_data_transfer_address = sc->amr_sgbusaddr + 1202 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 1203 /* 1204 * populate s/g table (overwrites previous call which mapped the 1205 * passthrough) 1206 */ 1207 for (i = 0; i < nsegments; i++, sg++) { 1208 sg->sg_addr = segs[i].ds_addr; 1209 sg->sg_count = segs[i].ds_len; 1210 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count); 1211 } 1212 } 1213 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x\n", 1214 ac->ac_slot, aep->ap_no_sg_elements, aep->ap_data_transfer_address, 1215 ac->ac_dataphys); 1216 } else { 1217 if (nsegments < 2) { 1218 ap->ap_no_sg_elements = 0; 1219 ap->ap_data_transfer_address = segs[0].ds_addr; 1220 } else { 1221 /* save s/g table information in passthrough */ 1222 ap->ap_no_sg_elements = nsegments; 1223 ap->ap_data_transfer_address = sc->amr_sgbusaddr + 1224 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 1225 /* 1226 * populate s/g table (overwrites previous call which mapped the 1227 * passthrough) 1228 */ 1229 for (i = 0; i < nsegments; i++, sg++) { 1230 sg->sg_addr = segs[i].ds_addr; 1231 sg->sg_count = segs[i].ds_len; 1232 debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count); 1233 } 1234 } 1235 debug(3, "slot %d %d segments at 0x%x, passthrough at 0x%x", 1236 ac->ac_slot, ap->ap_no_sg_elements, ap->ap_data_transfer_address, 1237 ac->ac_dataphys); 1238 } 1239 if (ac->ac_flags & AMR_CMD_CCB_DATAIN) 1240 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1241 BUS_DMASYNC_PREREAD); 1242 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT) 1243 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1244 BUS_DMASYNC_PREWRITE); 1245 if ((ac->ac_flags & (AMR_CMD_CCB_DATAIN | AMR_CMD_CCB_DATAOUT)) == 0) 1246 panic("no direction for ccb?\n"); 1247 1248 if (ac->ac_flags & AMR_CMD_DATAIN) 1249 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREREAD); 1250 if (ac->ac_flags & AMR_CMD_DATAOUT) 1251 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREWRITE); 1252 1253 ac->ac_flags |= AMR_CMD_MAPPED; 1254 1255 amr_start1(sc, ac); 1256} 1257 1258static int 1259amr_mapcmd(struct amr_command *ac) 1260{ 1261 struct amr_softc *sc = ac->ac_sc; 1262 1263 debug_called(3); 1264 1265 /* if the command involves data at all, and hasn't been mapped */ 1266 if ((ac->ac_flags & AMR_CMD_MAPPED) == 0 && (ac->ac_data != NULL)) { 1267 if (ac->ac_ccb_data == NULL) { 1268 /* map the data buffers into bus space and build the s/g list */ 1269 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, 1270 ac->ac_length, amr_setup_data_dmamap, ac, 0) == EINPROGRESS) { 1271 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1272 } 1273 } else { 1274 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, 1275 ac->ac_length, amr_setup_dmamap, ac, BUS_DMA_NOWAIT) != 0){ 1276 return (ENOMEM); 1277 } 1278 if (bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1279 ac->ac_ccb_data, ac->ac_ccb_length, amr_setup_ccbmap, ac, 1280 0) == EINPROGRESS) { 1281 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1282 } 1283 } 1284 } else if ((ac->ac_flags & AMR_CMD_MAPPED) == 0) { 1285 amr_start1(sc, ac); 1286 } 1287 1288 return (0); 1289} 1290 1291static void 1292amr_unmapcmd(struct amr_command *ac) 1293{ 1294 struct amr_softc *sc = ac->ac_sc; 1295 1296 debug_called(3); 1297 1298 /* if the command involved data at all and was mapped */ 1299 if (ac->ac_flags & AMR_CMD_MAPPED) { 1300 1301 if (ac->ac_data != NULL) { 1302 if (ac->ac_flags & AMR_CMD_DATAIN) 1303 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, 1304 BUS_DMASYNC_POSTREAD); 1305 if (ac->ac_flags & AMR_CMD_DATAOUT) 1306 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, 1307 BUS_DMASYNC_POSTWRITE); 1308 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap); 1309 } 1310 1311 if (ac->ac_ccb_data != NULL) { 1312 if (ac->ac_flags & AMR_CMD_CCB_DATAIN) 1313 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1314 BUS_DMASYNC_POSTREAD); 1315 if (ac->ac_flags & AMR_CMD_CCB_DATAOUT) 1316 bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, 1317 BUS_DMASYNC_POSTWRITE); 1318 bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_ccb_dmamap); 1319 } 1320 ac->ac_flags &= ~AMR_CMD_MAPPED; 1321 } 1322} 1323 1324static void 1325amr_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1326{ 1327 struct amr_command *ac = arg; 1328 struct amr_softc *sc = ac->ac_sc; 1329 1330 amr_setup_dmamap(arg, segs, nsegs, err); 1331 1332 if (ac->ac_flags & AMR_CMD_DATAIN) 1333 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREREAD); 1334 if (ac->ac_flags & AMR_CMD_DATAOUT) 1335 bus_dmamap_sync(sc->amr_buffer_dmat,ac->ac_dmamap,BUS_DMASYNC_PREWRITE); 1336 ac->ac_flags |= AMR_CMD_MAPPED; 1337 1338 amr_start1(sc, ac); 1339} 1340 1341/******************************************************************************** 1342 * Take a command and give it to the controller, returns 0 if successful, or 1343 * EBUSY if the command should be retried later. 1344 */ 1345static int 1346amr_start(struct amr_command *ac) 1347{ 1348 struct amr_softc *sc; 1349 int error = 0; 1350 1351 debug_called(3); 1352 1353 /* mark command as busy so that polling consumer can tell */ 1354 sc = ac->ac_sc; 1355 ac->ac_flags |= AMR_CMD_BUSY; 1356 1357 /* get a command slot (freed in amr_done) */ 1358 if (amr_getslot(ac)) { 1359 return(EBUSY); 1360 } 1361 1362 /* Now we have a slot, we can map the command (unmapped in amr_complete). */ 1363 if ((error = amr_mapcmd(ac)) == ENOMEM) { 1364 /* 1365 * Memroy resources are short, so free the slot and let this be tried 1366 * later. 1367 */ 1368 sc->amr_busycmd[ac->ac_slot] = NULL; 1369 sc->amr_busyslots--; 1370 } 1371 1372 return (error); 1373} 1374 1375 1376static int 1377amr_start1(struct amr_softc *sc, struct amr_command *ac) 1378{ 1379 int done, s, i; 1380 1381 /* mark the new mailbox we are going to copy in as busy */ 1382 ac->ac_mailbox.mb_busy = 1; 1383 1384 /* clear the poll/ack fields in the mailbox */ 1385 sc->amr_mailbox->mb_poll = 0; 1386 sc->amr_mailbox->mb_ack = 0; 1387 1388 /* 1389 * Save the slot number so that we can locate this command when complete. 1390 * Note that ident = 0 seems to be special, so we don't use it. 1391 */ 1392 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; 1393 1394 /* 1395 * Spin waiting for the mailbox, give up after ~1 second. We expect the 1396 * controller to be able to handle our I/O. 1397 * 1398 * XXX perhaps we should wait for less time, and count on the deferred command 1399 * handling to deal with retries? 1400 */ 1401 debug(4, "wait for mailbox"); 1402 for (i = 10000, done = 0; (i > 0) && !done; i--) { 1403 s = splbio(); 1404 1405 /* is the mailbox free? */ 1406 if (sc->amr_mailbox->mb_busy == 0) { 1407 debug(4, "got mailbox"); 1408 sc->amr_mailbox64->mb64_segment = 0; 1409 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE); 1410 done = 1; 1411 1412 /* not free, spin waiting */ 1413 } else { 1414 debug(4, "busy flag %x\n", sc->amr_mailbox->mb_busy); 1415 /* this is somewhat ugly */ 1416 DELAY(100); 1417 } 1418 splx(s); /* drop spl to allow completion interrupts */ 1419 } 1420 1421 /* 1422 * Now give the command to the controller 1423 */ 1424 if (done) { 1425 if (sc->amr_submit_command(sc)) { 1426 /* the controller wasn't ready to take the command, forget that we tried to post it */ 1427 sc->amr_mailbox->mb_busy = 0; 1428 return(EBUSY); 1429 } 1430 debug(3, "posted command"); 1431 return(0); 1432 } 1433 1434 /* 1435 * The controller wouldn't take the command. Return the command as busy 1436 * so that it is retried later. 1437 */ 1438 return(EBUSY); 1439} 1440 1441/******************************************************************************** 1442 * Extract one or more completed commands from the controller (sc) 1443 * 1444 * Returns nonzero if any commands on the work queue were marked as completed. 1445 */ 1446 1447int 1448amr_done(struct amr_softc *sc) 1449{ 1450 struct amr_command *ac; 1451 struct amr_mailbox mbox; 1452 int i, idx, result; 1453 1454 debug_called(3); 1455 1456 /* See if there's anything for us to do */ 1457 result = 0; 1458 1459 /* loop collecting completed commands */ 1460 for (;;) { 1461 /* poll for a completed command's identifier and status */ 1462 if (sc->amr_get_work(sc, &mbox)) { 1463 result = 1; 1464 1465 /* iterate over completed commands in this result */ 1466 for (i = 0; i < mbox.mb_nstatus; i++) { 1467 /* get pointer to busy command */ 1468 idx = mbox.mb_completed[i] - 1; 1469 ac = sc->amr_busycmd[idx]; 1470 1471 /* really a busy command? */ 1472 if (ac != NULL) { 1473 1474 /* pull the command from the busy index */ 1475 sc->amr_busycmd[idx] = NULL; 1476 sc->amr_busyslots--; 1477 1478 /* save status for later use */ 1479 ac->ac_status = mbox.mb_status; 1480 amr_enqueue_completed(ac); 1481 debug(3, "completed command with status %x", mbox.mb_status); 1482 } else { 1483 device_printf(sc->amr_dev, "bad slot %d completed\n", idx); 1484 } 1485 } 1486 } else { 1487 break; /* no work */ 1488 } 1489 } 1490 1491 /* handle completion and timeouts */ 1492 amr_complete(sc, 0); 1493 1494 return(result); 1495} 1496 1497/******************************************************************************** 1498 * Do completion processing on done commands on (sc) 1499 */ 1500 1501static void 1502amr_complete(void *context, int pending) 1503{ 1504 struct amr_softc *sc = (struct amr_softc *)context; 1505 struct amr_command *ac; 1506 1507 debug_called(3); 1508 1509 /* pull completed commands off the queue */ 1510 for (;;) { 1511 ac = amr_dequeue_completed(sc); 1512 if (ac == NULL) 1513 break; 1514 1515 /* unmap the command's data buffer */ 1516 amr_unmapcmd(ac); 1517 1518 /* unbusy the command */ 1519 ac->ac_flags &= ~AMR_CMD_BUSY; 1520 1521 /* 1522 * Is there a completion handler? 1523 */ 1524 if (ac->ac_complete != NULL) { 1525 ac->ac_complete(ac); 1526 1527 /* 1528 * Is someone sleeping on this one? 1529 */ 1530 } else if (ac->ac_flags & AMR_CMD_SLEEP) { 1531 wakeup(ac); 1532 } 1533 1534 if(!sc->amr_busyslots) { 1535 wakeup(sc); 1536 } 1537 } 1538 1539 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN; 1540 amr_startio(sc); 1541} 1542 1543/******************************************************************************** 1544 ******************************************************************************** 1545 Command Buffer Management 1546 ******************************************************************************** 1547 ********************************************************************************/ 1548 1549/******************************************************************************** 1550 * Get a new command buffer. 1551 * 1552 * This may return NULL in low-memory cases. 1553 * 1554 * If possible, we recycle a command buffer that's been used before. 1555 */ 1556struct amr_command * 1557amr_alloccmd(struct amr_softc *sc) 1558{ 1559 struct amr_command *ac; 1560 1561 debug_called(3); 1562 1563 ac = amr_dequeue_free(sc); 1564 if (ac == NULL) { 1565 amr_alloccmd_cluster(sc); 1566 ac = amr_dequeue_free(sc); 1567 } 1568 if (ac == NULL) { 1569 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1570 return(NULL); 1571 } 1572 1573 /* clear out significant fields */ 1574 ac->ac_status = 0; 1575 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox)); 1576 ac->ac_flags = 0; 1577 ac->ac_bio = NULL; 1578 ac->ac_data = NULL; 1579 ac->ac_ccb_data = NULL; 1580 ac->ac_complete = NULL; 1581 return(ac); 1582} 1583 1584/******************************************************************************** 1585 * Release a command buffer for recycling. 1586 */ 1587void 1588amr_releasecmd(struct amr_command *ac) 1589{ 1590 debug_called(3); 1591 1592 amr_enqueue_free(ac); 1593} 1594 1595/******************************************************************************** 1596 * Allocate a new command cluster and initialise it. 1597 */ 1598static void 1599amr_alloccmd_cluster(struct amr_softc *sc) 1600{ 1601 struct amr_command_cluster *acc; 1602 struct amr_command *ac; 1603 int s, i, nextslot; 1604 1605 if (sc->amr_nextslot > sc->amr_maxio) 1606 return; 1607 acc = malloc(AMR_CMD_CLUSTERSIZE, M_DEVBUF, M_NOWAIT | M_ZERO); 1608 if (acc != NULL) { 1609 s = splbio(); 1610 nextslot = sc->amr_nextslot; 1611 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link); 1612 splx(s); 1613 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 1614 ac = &acc->acc_command[i]; 1615 ac->ac_sc = sc; 1616 ac->ac_slot = nextslot; 1617 if (!bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap) && 1618 !bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_ccb_dmamap)) 1619 amr_releasecmd(ac); 1620 if (++nextslot > sc->amr_maxio) 1621 break; 1622 } 1623 sc->amr_nextslot = nextslot; 1624 } 1625} 1626 1627/******************************************************************************** 1628 * Free a command cluster 1629 */ 1630static void 1631amr_freecmd_cluster(struct amr_command_cluster *acc) 1632{ 1633 struct amr_softc *sc = acc->acc_command[0].ac_sc; 1634 int i; 1635 1636 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) 1637 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap); 1638 free(acc, M_DEVBUF); 1639} 1640 1641/******************************************************************************** 1642 ******************************************************************************** 1643 Interface-specific Shims 1644 ******************************************************************************** 1645 ********************************************************************************/ 1646 1647/******************************************************************************** 1648 * Tell the controller that the mailbox contains a valid command 1649 */ 1650static int 1651amr_quartz_submit_command(struct amr_softc *sc) 1652{ 1653 debug_called(3); 1654 1655 if (AMR_QGET_IDB(sc) & AMR_QIDB_SUBMIT) 1656 return(EBUSY); 1657 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 1658 return(0); 1659} 1660 1661static int 1662amr_std_submit_command(struct amr_softc *sc) 1663{ 1664 debug_called(3); 1665 1666 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG) 1667 return(EBUSY); 1668 AMR_SPOST_COMMAND(sc); 1669 return(0); 1670} 1671 1672/******************************************************************************** 1673 * Claim any work that the controller has completed; acknowledge completion, 1674 * save details of the completion in (mbsave) 1675 */ 1676static int 1677amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 1678{ 1679 int s, worked; 1680 u_int32_t outd; 1681 u_int8_t nstatus; 1682 1683 debug_called(3); 1684 1685 worked = 0; 1686 s = splbio(); 1687 1688 /* work waiting for us? */ 1689 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) { 1690 1691 /* acknowledge interrupt */ 1692 AMR_QPUT_ODB(sc, AMR_QODB_READY); 1693 1694 while ((nstatus = sc->amr_mailbox->mb_nstatus) == 0xff) 1695 ; 1696 sc->amr_mailbox->mb_nstatus = 0xff; 1697 1698 /* save mailbox, which contains a list of completed commands */ 1699 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave)); 1700 mbsave->mb_nstatus = nstatus; 1701 1702 /* acknowledge that we have the commands */ 1703 AMR_QPUT_IDB(sc, AMR_QIDB_ACK); 1704 1705#ifndef AMR_QUARTZ_GOFASTER 1706 /* 1707 * This waits for the controller to notice that we've taken the 1708 * command from it. It's very inefficient, and we shouldn't do it, 1709 * but if we remove this code, we stop completing commands under 1710 * load. 1711 * 1712 * Peter J says we shouldn't do this. The documentation says we 1713 * should. Who is right? 1714 */ 1715 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 1716 ; /* XXX aiee! what if it dies? */ 1717#endif 1718 1719 worked = 1; /* got some work */ 1720 } 1721 1722 splx(s); 1723 return(worked); 1724} 1725 1726static int 1727amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 1728{ 1729 int s, worked; 1730 u_int8_t istat; 1731 1732 debug_called(3); 1733 1734 worked = 0; 1735 s = splbio(); 1736 1737 /* check for valid interrupt status */ 1738 istat = AMR_SGET_ISTAT(sc); 1739 if ((istat & AMR_SINTR_VALID) != 0) { 1740 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */ 1741 1742 /* save mailbox, which contains a list of completed commands */ 1743 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave)); 1744 1745 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */ 1746 worked = 1; 1747 } 1748 1749 splx(s); 1750 return(worked); 1751} 1752 1753/******************************************************************************** 1754 * Notify the controller of the mailbox location. 1755 */ 1756static void 1757amr_std_attach_mailbox(struct amr_softc *sc) 1758{ 1759 1760 /* program the mailbox physical address */ 1761 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff); 1762 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff); 1763 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff); 1764 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff); 1765 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR); 1766 1767 /* clear any outstanding interrupt and enable interrupts proper */ 1768 AMR_SACK_INTERRUPT(sc); 1769 AMR_SENABLE_INTR(sc); 1770} 1771 1772#ifdef AMR_BOARD_INIT 1773/******************************************************************************** 1774 * Initialise the controller 1775 */ 1776static int 1777amr_quartz_init(struct amr_softc *sc) 1778{ 1779 int status, ostatus; 1780 1781 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc)); 1782 1783 AMR_QRESET(sc); 1784 1785 ostatus = 0xff; 1786 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) { 1787 if (status != ostatus) { 1788 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status)); 1789 ostatus = status; 1790 } 1791 switch (status) { 1792 case AMR_QINIT_NOMEM: 1793 return(ENOMEM); 1794 1795 case AMR_QINIT_SCAN: 1796 /* XXX we could print channel/target here */ 1797 break; 1798 } 1799 } 1800 return(0); 1801} 1802 1803static int 1804amr_std_init(struct amr_softc *sc) 1805{ 1806 int status, ostatus; 1807 1808 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc)); 1809 1810 AMR_SRESET(sc); 1811 1812 ostatus = 0xff; 1813 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) { 1814 if (status != ostatus) { 1815 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status)); 1816 ostatus = status; 1817 } 1818 switch (status) { 1819 case AMR_SINIT_NOMEM: 1820 return(ENOMEM); 1821 1822 case AMR_SINIT_INPROG: 1823 /* XXX we could print channel/target here? */ 1824 break; 1825 } 1826 } 1827 return(0); 1828} 1829#endif 1830 1831/******************************************************************************** 1832 ******************************************************************************** 1833 Debugging 1834 ******************************************************************************** 1835 ********************************************************************************/ 1836 1837/******************************************************************************** 1838 * Identify the controller and print some information about it. 1839 */ 1840static void 1841amr_describe_controller(struct amr_softc *sc) 1842{ 1843 struct amr_prodinfo *ap; 1844 struct amr_enquiry *ae; 1845 char *prod; 1846 1847 mtx_lock(&sc->amr_io_lock); 1848 /* 1849 * Try to get 40LD product info, which tells us what the card is labelled as. 1850 */ 1851 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) != NULL) { 1852 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n", 1853 ap->ap_product, ap->ap_firmware, ap->ap_bios, 1854 ap->ap_memsize); 1855 1856 free(ap, M_DEVBUF); 1857 mtx_unlock(&sc->amr_io_lock); 1858 return; 1859 } 1860 1861 /* 1862 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table. 1863 */ 1864 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) != NULL) { 1865 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature); 1866 1867 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) != NULL) { 1868 1869 /* 1870 * Try to work it out based on the PCI signatures. 1871 */ 1872 switch (pci_get_device(sc->amr_dev)) { 1873 case 0x9010: 1874 prod = "Series 428"; 1875 break; 1876 case 0x9060: 1877 prod = "Series 434"; 1878 break; 1879 default: 1880 prod = "unknown controller"; 1881 break; 1882 } 1883 } else { 1884 prod = "unsupported controller"; 1885 } 1886 1887 /* 1888 * HP NetRaid controllers have a special encoding of the firmware and 1889 * BIOS versions. The AMI version seems to have it as strings whereas 1890 * the HP version does it with a leading uppercase character and two 1891 * binary numbers. 1892 */ 1893 1894 if(ae->ae_adapter.aa_firmware[2] >= 'A' && 1895 ae->ae_adapter.aa_firmware[2] <= 'Z' && 1896 ae->ae_adapter.aa_firmware[1] < ' ' && 1897 ae->ae_adapter.aa_firmware[0] < ' ' && 1898 ae->ae_adapter.aa_bios[2] >= 'A' && 1899 ae->ae_adapter.aa_bios[2] <= 'Z' && 1900 ae->ae_adapter.aa_bios[1] < ' ' && 1901 ae->ae_adapter.aa_bios[0] < ' ') { 1902 1903 /* this looks like we have an HP NetRaid version of the MegaRaid */ 1904 1905 if(ae->ae_signature == AMR_SIG_438) { 1906 /* the AMI 438 is a NetRaid 3si in HP-land */ 1907 prod = "HP NetRaid 3si"; 1908 } 1909 1910 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n", 1911 prod, ae->ae_adapter.aa_firmware[2], 1912 ae->ae_adapter.aa_firmware[1], 1913 ae->ae_adapter.aa_firmware[0], 1914 ae->ae_adapter.aa_bios[2], 1915 ae->ae_adapter.aa_bios[1], 1916 ae->ae_adapter.aa_bios[0], 1917 ae->ae_adapter.aa_memorysize); 1918 } else { 1919 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n", 1920 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios, 1921 ae->ae_adapter.aa_memorysize); 1922 } 1923 free(ae, M_DEVBUF); 1924 mtx_unlock(&sc->amr_io_lock); 1925} 1926 1927int 1928amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks) 1929{ 1930 struct amr_command *ac; 1931 int error = EIO; 1932 1933 debug_called(1); 1934 1935 sc->amr_state |= AMR_STATE_INTEN; 1936 1937 /* get ourselves a command buffer */ 1938 if ((ac = amr_alloccmd(sc)) == NULL) 1939 goto out; 1940 /* set command flags */ 1941 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1942 1943 /* point the command at our data */ 1944 ac->ac_data = data; 1945 ac->ac_length = blks * AMR_BLKSIZE; 1946 1947 /* build the command proper */ 1948 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE; 1949 ac->ac_mailbox.mb_blkcount = blks; 1950 ac->ac_mailbox.mb_lba = lba; 1951 ac->ac_mailbox.mb_drive = unit; 1952 1953 /* can't assume that interrupts are going to work here, so play it safe */ 1954 if (sc->amr_poll_command(ac)) 1955 goto out; 1956 error = ac->ac_status; 1957 1958 out: 1959 if (ac != NULL) 1960 amr_releasecmd(ac); 1961 1962 sc->amr_state &= ~AMR_STATE_INTEN; 1963 return (error); 1964} 1965 1966 1967 1968#ifdef AMR_DEBUG 1969/******************************************************************************** 1970 * Print the command (ac) in human-readable format 1971 */ 1972#if 0 1973static void 1974amr_printcommand(struct amr_command *ac) 1975{ 1976 struct amr_softc *sc = ac->ac_sc; 1977 struct amr_sgentry *sg; 1978 int i; 1979 1980 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n", 1981 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive); 1982 device_printf(sc->amr_dev, "blkcount %d lba %d\n", 1983 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba); 1984 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length); 1985 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n", 1986 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem); 1987 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio); 1988 1989 /* get base address of s/g table */ 1990 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 1991 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++) 1992 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count); 1993} 1994#endif 1995#endif 1996