amr.c revision 119277
1/*-
2 * Copyright (c) 1999,2000 Michael Smith
3 * Copyright (c) 2000 BSDi
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * Copyright (c) 2002 Eric Moore
28 * Copyright (c) 2002 LSI Logic Corporation
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
33 * are met:
34 * 1. Redistributions of source code must retain the above copyright
35 *    notice, this list of conditions and the following disclaimer.
36 * 2. Redistributions in binary form must reproduce the above copyright
37 *    notice, this list of conditions and the following disclaimer in the
38 *    documentation and/or other materials provided with the distribution.
39 * 3. The party using or redistributing the source code and binary forms
40 *    agrees to the disclaimer below and the terms and conditions set forth
41 *    herein.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
44 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
46 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
49 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
50 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
51 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
52 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
53 * SUCH DAMAGE.
54 *
55 *
56 *	$FreeBSD: head/sys/dev/amr/amr.c 119277 2003-08-22 05:54:52Z imp $
57 */
58
59/*
60 * Driver for the AMI MegaRaid family of controllers.
61 */
62
63#include <sys/param.h>
64#include <sys/systm.h>
65#include <sys/malloc.h>
66#include <sys/kernel.h>
67
68#include <dev/amr/amr_compat.h>
69#include <sys/bus.h>
70#include <sys/conf.h>
71#include <sys/stat.h>
72
73#include <machine/bus_memio.h>
74#include <machine/bus_pio.h>
75#include <machine/bus.h>
76#include <machine/resource.h>
77#include <sys/rman.h>
78
79#include <dev/pci/pcireg.h>
80#include <dev/pci/pcivar.h>
81
82#include <dev/amr/amrio.h>
83#include <dev/amr/amrreg.h>
84#include <dev/amr/amrvar.h>
85#define AMR_DEFINE_TABLES
86#include <dev/amr/amr_tables.h>
87
88#define AMR_CDEV_MAJOR	132
89
90static d_open_t         amr_open;
91static d_close_t        amr_close;
92static d_ioctl_t        amr_ioctl;
93
94static struct cdevsw amr_cdevsw = {
95	.d_open =	amr_open,
96	.d_close =	amr_close,
97	.d_ioctl =	amr_ioctl,
98	.d_name =	"amr",
99	.d_maj =	AMR_CDEV_MAJOR,
100};
101
102/*
103 * Initialisation, bus interface.
104 */
105static void	amr_startup(void *arg);
106
107/*
108 * Command wrappers
109 */
110static int	amr_query_controller(struct amr_softc *sc);
111static void	*amr_enquiry(struct amr_softc *sc, size_t bufsize,
112			     u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual);
113static void	amr_completeio(struct amr_command *ac);
114static int	amr_support_ext_cdb(struct amr_softc *sc);
115
116/*
117 * Command buffer allocation.
118 */
119static void	amr_alloccmd_cluster(struct amr_softc *sc);
120static void	amr_freecmd_cluster(struct amr_command_cluster *acc);
121
122/*
123 * Command processing.
124 */
125static int	amr_bio_command(struct amr_softc *sc, struct amr_command **acp);
126static int	amr_wait_command(struct amr_command *ac);
127static int	amr_getslot(struct amr_command *ac);
128static void	amr_mapcmd(struct amr_command *ac);
129static void	amr_unmapcmd(struct amr_command *ac);
130static int	amr_start(struct amr_command *ac);
131static void	amr_complete(void *context, int pending);
132
133/*
134 * Status monitoring
135 */
136static void	amr_periodic(void *data);
137
138/*
139 * Interface-specific shims
140 */
141static int	amr_quartz_submit_command(struct amr_softc *sc);
142static int	amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
143static int	amr_quartz_poll_command(struct amr_command *ac);
144
145static int	amr_std_submit_command(struct amr_softc *sc);
146static int	amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave);
147static int	amr_std_poll_command(struct amr_command *ac);
148static void	amr_std_attach_mailbox(struct amr_softc *sc);
149
150#ifdef AMR_BOARD_INIT
151static int	amr_quartz_init(struct amr_softc *sc);
152static int	amr_std_init(struct amr_softc *sc);
153#endif
154
155/*
156 * Debugging
157 */
158static void	amr_describe_controller(struct amr_softc *sc);
159#ifdef AMR_DEBUG
160#if 0
161static void	amr_printcommand(struct amr_command *ac);
162#endif
163#endif
164
165/********************************************************************************
166 ********************************************************************************
167                                                                      Inline Glue
168 ********************************************************************************
169 ********************************************************************************/
170
171/********************************************************************************
172 ********************************************************************************
173                                                                Public Interfaces
174 ********************************************************************************
175 ********************************************************************************/
176
177/********************************************************************************
178 * Initialise the controller and softc.
179 */
180int
181amr_attach(struct amr_softc *sc)
182{
183
184    debug_called(1);
185
186    /*
187     * Initialise per-controller queues.
188     */
189    TAILQ_INIT(&sc->amr_completed);
190    TAILQ_INIT(&sc->amr_freecmds);
191    TAILQ_INIT(&sc->amr_cmd_clusters);
192    TAILQ_INIT(&sc->amr_ready);
193    bioq_init(&sc->amr_bioq);
194
195#if __FreeBSD_version >= 500005
196    /*
197     * Initialise command-completion task.
198     */
199    TASK_INIT(&sc->amr_task_complete, 0, amr_complete, sc);
200#endif
201
202    debug(2, "queue init done");
203
204    /*
205     * Configure for this controller type.
206     */
207    if (AMR_IS_QUARTZ(sc)) {
208	sc->amr_submit_command = amr_quartz_submit_command;
209	sc->amr_get_work       = amr_quartz_get_work;
210	sc->amr_poll_command   = amr_quartz_poll_command;
211    } else {
212	sc->amr_submit_command = amr_std_submit_command;
213	sc->amr_get_work       = amr_std_get_work;
214	sc->amr_poll_command   = amr_std_poll_command;
215	amr_std_attach_mailbox(sc);;
216    }
217
218#ifdef AMR_BOARD_INIT
219    if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc))))
220	return(ENXIO);
221#endif
222
223    /*
224     * Quiz controller for features and limits.
225     */
226    if (amr_query_controller(sc))
227	return(ENXIO);
228
229    debug(2, "controller query complete");
230
231    /*
232     * Attach our 'real' SCSI channels to CAM.
233     */
234    if (amr_cam_attach(sc))
235	return(ENXIO);
236    debug(2, "CAM attach done");
237
238    /*
239     * Create the control device.
240     */
241    sc->amr_dev_t = make_dev(&amr_cdevsw, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR,
242			     S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev));
243    sc->amr_dev_t->si_drv1 = sc;
244
245    /*
246     * Schedule ourselves to bring the controller up once interrupts are
247     * available.
248     */
249    bzero(&sc->amr_ich, sizeof(struct intr_config_hook));
250    sc->amr_ich.ich_func = amr_startup;
251    sc->amr_ich.ich_arg = sc;
252    if (config_intrhook_establish(&sc->amr_ich) != 0) {
253	device_printf(sc->amr_dev, "can't establish configuration hook\n");
254	return(ENOMEM);
255    }
256
257    /*
258     * Print a little information about the controller.
259     */
260    amr_describe_controller(sc);
261
262    debug(2, "attach complete");
263    return(0);
264}
265
266/********************************************************************************
267 * Locate disk resources and attach children to them.
268 */
269static void
270amr_startup(void *arg)
271{
272    struct amr_softc	*sc = (struct amr_softc *)arg;
273    struct amr_logdrive	*dr;
274    int			i, error;
275
276    debug_called(1);
277
278    /* pull ourselves off the intrhook chain */
279    config_intrhook_disestablish(&sc->amr_ich);
280
281    /* get up-to-date drive information */
282    if (amr_query_controller(sc)) {
283	device_printf(sc->amr_dev, "can't scan controller for drives\n");
284	return;
285    }
286
287    /* iterate over available drives */
288    for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) {
289	/* are we already attached to this drive? */
290	if (dr->al_disk == 0) {
291	    /* generate geometry information */
292	    if (dr->al_size > 0x200000) {	/* extended translation? */
293		dr->al_heads = 255;
294		dr->al_sectors = 63;
295	    } else {
296		dr->al_heads = 64;
297		dr->al_sectors = 32;
298	    }
299	    dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors);
300
301	    dr->al_disk = device_add_child(sc->amr_dev, NULL, -1);
302	    if (dr->al_disk == 0)
303		device_printf(sc->amr_dev, "device_add_child failed\n");
304	    device_set_ivars(dr->al_disk, dr);
305	}
306    }
307
308    if ((error = bus_generic_attach(sc->amr_dev)) != 0)
309	device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error);
310
311    /* mark controller back up */
312    sc->amr_state &= ~AMR_STATE_SHUTDOWN;
313
314    /* interrupts will be enabled before we do anything more */
315    sc->amr_state |= AMR_STATE_INTEN;
316
317    /*
318     * Start the timeout routine.
319     */
320/*    sc->amr_timeout = timeout(amr_periodic, sc, hz);*/
321
322    return;
323}
324
325/*******************************************************************************
326 * Free resources associated with a controller instance
327 */
328void
329amr_free(struct amr_softc *sc)
330{
331    struct amr_command_cluster	*acc;
332
333    /* detach from CAM */
334    amr_cam_detach(sc);
335
336    /* cancel status timeout */
337    untimeout(amr_periodic, sc, sc->amr_timeout);
338
339    /* throw away any command buffers */
340    while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) {
341	TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link);
342	amr_freecmd_cluster(acc);
343    }
344
345    /* destroy control device */
346    if( sc->amr_dev_t != (dev_t)NULL)
347	    destroy_dev(sc->amr_dev_t);
348}
349
350/*******************************************************************************
351 * Receive a bio structure from a child device and queue it on a particular
352 * disk resource, then poke the disk resource to start as much work as it can.
353 */
354int
355amr_submit_bio(struct amr_softc *sc, struct bio *bio)
356{
357    debug_called(2);
358
359    amr_enqueue_bio(sc, bio);
360    amr_startio(sc);
361    return(0);
362}
363
364/********************************************************************************
365 * Accept an open operation on the control device.
366 */
367static int
368amr_open(dev_t dev, int flags, int fmt, d_thread_t *td)
369{
370    int			unit = minor(dev);
371    struct amr_softc	*sc = devclass_get_softc(devclass_find("amr"), unit);
372
373    debug_called(1);
374
375    sc->amr_state |= AMR_STATE_OPEN;
376    return(0);
377}
378
379/********************************************************************************
380 * Accept the last close on the control device.
381 */
382static int
383amr_close(dev_t dev, int flags, int fmt, d_thread_t *td)
384{
385    int			unit = minor(dev);
386    struct amr_softc	*sc = devclass_get_softc(devclass_find("amr"), unit);
387
388    debug_called(1);
389
390    sc->amr_state &= ~AMR_STATE_OPEN;
391    return (0);
392}
393
394/********************************************************************************
395 * Handle controller-specific control operations.
396 */
397static int
398amr_ioctl(dev_t dev, u_long cmd, caddr_t addr, int32_t flag, d_thread_t *td)
399{
400    struct amr_softc		*sc = (struct amr_softc *)dev->si_drv1;
401    int				*arg = (int *)addr;
402    struct amr_user_ioctl	*au = (struct amr_user_ioctl *)addr;
403    struct amr_command		*ac;
404    struct amr_mailbox_ioctl	*mbi;
405    struct amr_passthrough	*ap;
406    void			*dp;
407    int				error;
408
409    debug_called(1);
410
411    error = 0;
412    dp = NULL;
413    ap = NULL;
414    ac = NULL;
415    switch(cmd) {
416
417    case AMR_IO_VERSION:
418	debug(1, "AMR_IO_VERSION");
419	*arg = AMR_IO_VERSION_NUMBER;
420	break;
421
422    case AMR_IO_COMMAND:
423	debug(1, "AMR_IO_COMMAND  0x%x", au->au_cmd[0]);
424	/* handle inbound data buffer */
425	if (au->au_length != 0) {
426	    if ((dp = malloc(au->au_length, M_DEVBUF, M_WAITOK)) == NULL) {
427		error = ENOMEM;
428		break;
429	    }
430	    if ((error = copyin(au->au_buffer, dp, au->au_length)) != 0)
431		break;
432	    debug(2, "copyin %ld bytes from %p -> %p", au->au_length, au->au_buffer, dp);
433	}
434
435	if ((ac = amr_alloccmd(sc)) == NULL) {
436	    error = ENOMEM;
437	    break;
438	}
439
440	/* handle SCSI passthrough command */
441	if (au->au_cmd[0] == AMR_CMD_PASS) {
442	    if ((ap = malloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO)) == NULL) {
443		error = ENOMEM;
444		break;
445	    }
446
447	    /* copy cdb */
448	    ap->ap_cdb_length = au->au_cmd[2];
449	    bcopy(&au->au_cmd[3], &ap->ap_cdb[0], ap->ap_cdb_length);
450
451	    /* build passthrough */
452	    ap->ap_timeout		= au->au_cmd[ap->ap_cdb_length + 3] & 0x07;
453	    ap->ap_ars			= (au->au_cmd[ap->ap_cdb_length + 3] & 0x08) ? 1 : 0;
454	    ap->ap_islogical		= (au->au_cmd[ap->ap_cdb_length + 3] & 0x80) ? 1 : 0;
455	    ap->ap_logical_drive_no	= au->au_cmd[ap->ap_cdb_length + 4];
456	    ap->ap_channel		= au->au_cmd[ap->ap_cdb_length + 5];
457	    ap->ap_scsi_id 		= au->au_cmd[ap->ap_cdb_length + 6];
458	    ap->ap_request_sense_length	= 14;
459	    ap->ap_data_transfer_length = au->au_length;
460	    /* XXX what about the request-sense area? does the caller want it? */
461
462	    /* build command */
463	    ac->ac_data = ap;
464	    ac->ac_length = sizeof(*ap);
465	    ac->ac_flags |= AMR_CMD_DATAOUT;
466	    ac->ac_ccb_data = dp;
467	    ac->ac_ccb_length = au->au_length;
468	    if (au->au_direction & AMR_IO_READ)
469		ac->ac_flags |= AMR_CMD_CCB_DATAIN;
470	    if (au->au_direction & AMR_IO_WRITE)
471		ac->ac_flags |= AMR_CMD_CCB_DATAOUT;
472
473	    ac->ac_mailbox.mb_command = AMR_CMD_PASS;
474
475	} else {
476	    /* direct command to controller */
477	    mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox;
478
479	    /* copy pertinent mailbox items */
480	    mbi->mb_command = au->au_cmd[0];
481	    mbi->mb_channel = au->au_cmd[1];
482	    mbi->mb_param = au->au_cmd[2];
483	    mbi->mb_pad[0] = au->au_cmd[3];
484	    mbi->mb_drive = au->au_cmd[4];
485
486	    /* build the command */
487	    ac->ac_data = dp;
488	    ac->ac_length = au->au_length;
489	    if (au->au_direction & AMR_IO_READ)
490		ac->ac_flags |= AMR_CMD_DATAIN;
491	    if (au->au_direction & AMR_IO_WRITE)
492		ac->ac_flags |= AMR_CMD_DATAOUT;
493	}
494
495	/* run the command */
496	if ((error = amr_wait_command(ac)) != 0)
497	    break;
498
499	/* copy out data and set status */
500	if (au->au_length != 0)
501	    error = copyout(dp, au->au_buffer, au->au_length);
502	debug(2, "copyout %ld bytes from %p -> %p", au->au_length, dp, au->au_buffer);
503	if (dp != NULL)
504	    debug(2, "%16d", (int)dp);
505	au->au_status = ac->ac_status;
506	break;
507
508    default:
509	debug(1, "unknown ioctl 0x%lx", cmd);
510	error = ENOIOCTL;
511	break;
512    }
513
514    if (dp != NULL)
515	free(dp, M_DEVBUF);
516    if (ap != NULL)
517	free(ap, M_DEVBUF);
518    if (ac != NULL)
519	amr_releasecmd(ac);
520    return(error);
521}
522
523/********************************************************************************
524 ********************************************************************************
525                                                                Status Monitoring
526 ********************************************************************************
527 ********************************************************************************/
528
529/********************************************************************************
530 * Perform a periodic check of the controller status
531 */
532static void
533amr_periodic(void *data)
534{
535    struct amr_softc	*sc = (struct amr_softc *)data;
536
537    debug_called(2);
538
539    /* XXX perform periodic status checks here */
540
541    /* compensate for missed interrupts */
542    amr_done(sc);
543
544    /* reschedule */
545    sc->amr_timeout = timeout(amr_periodic, sc, hz);
546}
547
548/********************************************************************************
549 ********************************************************************************
550                                                                 Command Wrappers
551 ********************************************************************************
552 ********************************************************************************/
553
554/********************************************************************************
555 * Interrogate the controller for the operational parameters we require.
556 */
557static int
558amr_query_controller(struct amr_softc *sc)
559{
560    struct amr_enquiry3	*aex;
561    struct amr_prodinfo	*ap;
562    struct amr_enquiry	*ae;
563    int			ldrv;
564
565    /*
566     * If we haven't found the real limit yet, let us have a couple of commands in
567     * order to be able to probe.
568     */
569    if (sc->amr_maxio == 0)
570	sc->amr_maxio = 2;
571
572    /*
573     * Greater than 10 byte cdb support
574     */
575    sc->support_ext_cdb = amr_support_ext_cdb(sc);
576
577    if(sc->support_ext_cdb) {
578	debug(2,"supports extended CDBs.");
579    }
580
581    /*
582     * Try to issue an ENQUIRY3 command
583     */
584    if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3,
585			   AMR_CONFIG_ENQ3_SOLICITED_FULL)) != NULL) {
586
587	/*
588	 * Fetch current state of logical drives.
589	 */
590	for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) {
591	    sc->amr_drive[ldrv].al_size       = aex->ae_drivesize[ldrv];
592	    sc->amr_drive[ldrv].al_state      = aex->ae_drivestate[ldrv];
593	    sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv];
594	    debug(2, "  drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
595		  sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
596	}
597	free(aex, M_DEVBUF);
598
599	/*
600	 * Get product info for channel count.
601	 */
602	if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) == NULL) {
603	    device_printf(sc->amr_dev, "can't obtain product data from controller\n");
604	    return(1);
605	}
606	sc->amr_maxdrives = 40;
607	sc->amr_maxchan = ap->ap_nschan;
608	sc->amr_maxio = ap->ap_maxio;
609	sc->amr_type |= AMR_TYPE_40LD;
610	free(ap, M_DEVBUF);
611
612    } else {
613
614	/* failed, try the 8LD ENQUIRY commands */
615	if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) == NULL) {
616	    if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) == NULL) {
617		device_printf(sc->amr_dev, "can't obtain configuration data from controller\n");
618		return(1);
619	    }
620	    ae->ae_signature = 0;
621	}
622
623	/*
624	 * Fetch current state of logical drives.
625	 */
626	for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) {
627	    sc->amr_drive[ldrv].al_size       = ae->ae_ldrv.al_size[ldrv];
628	    sc->amr_drive[ldrv].al_state      = ae->ae_ldrv.al_state[ldrv];
629	    sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv];
630	    debug(2, "  drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size,
631		  sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties);
632	}
633
634	sc->amr_maxdrives = 8;
635	sc->amr_maxchan = ae->ae_adapter.aa_channels;
636	sc->amr_maxio = ae->ae_adapter.aa_maxio;
637	free(ae, M_DEVBUF);
638    }
639
640    /*
641     * Mark remaining drives as unused.
642     */
643    for (; ldrv < AMR_MAXLD; ldrv++)
644	sc->amr_drive[ldrv].al_size = 0xffffffff;
645
646    /*
647     * Cap the maximum number of outstanding I/Os.  AMI's Linux driver doesn't trust
648     * the controller's reported value, and lockups have been seen when we do.
649     */
650    sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD);
651
652    return(0);
653}
654
655/********************************************************************************
656 * Run a generic enquiry-style command.
657 */
658static void *
659amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual)
660{
661    struct amr_command	*ac;
662    void		*result;
663    u_int8_t		*mbox;
664    int			error;
665
666    debug_called(1);
667
668    error = 1;
669    result = NULL;
670
671    /* get ourselves a command buffer */
672    if ((ac = amr_alloccmd(sc)) == NULL)
673	goto out;
674    /* allocate the response structure */
675    if ((result = malloc(bufsize, M_DEVBUF, M_NOWAIT)) == NULL)
676	goto out;
677    /* set command flags */
678    ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
679
680    /* point the command at our data */
681    ac->ac_data = result;
682    ac->ac_length = bufsize;
683
684    /* build the command proper */
685    mbox = (u_int8_t *)&ac->ac_mailbox;		/* XXX want a real structure for this? */
686    mbox[0] = cmd;
687    mbox[2] = cmdsub;
688    mbox[3] = cmdqual;
689
690    /* can't assume that interrupts are going to work here, so play it safe */
691    if (sc->amr_poll_command(ac))
692	goto out;
693    error = ac->ac_status;
694
695 out:
696    if (ac != NULL)
697	amr_releasecmd(ac);
698    if ((error != 0) && (result != NULL)) {
699	free(result, M_DEVBUF);
700	result = NULL;
701    }
702    return(result);
703}
704
705/********************************************************************************
706 * Flush the controller's internal cache, return status.
707 */
708int
709amr_flush(struct amr_softc *sc)
710{
711    struct amr_command	*ac;
712    int			error;
713
714    /* get ourselves a command buffer */
715    error = 1;
716    if ((ac = amr_alloccmd(sc)) == NULL)
717	goto out;
718    /* set command flags */
719    ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
720
721    /* build the command proper */
722    ac->ac_mailbox.mb_command = AMR_CMD_FLUSH;
723
724    /* we have to poll, as the system may be going down or otherwise damaged */
725    if (sc->amr_poll_command(ac))
726	goto out;
727    error = ac->ac_status;
728
729 out:
730    if (ac != NULL)
731	amr_releasecmd(ac);
732    return(error);
733}
734
735/********************************************************************************
736 * Detect extented cdb >> greater than 10 byte cdb support
737 * returns '1' means this support exist
738 * returns '0' means this support doesn't exist
739 */
740static int
741amr_support_ext_cdb(struct amr_softc *sc)
742{
743    struct amr_command	*ac;
744    u_int8_t		*mbox;
745    int			error;
746
747    /* get ourselves a command buffer */
748    error = 0;
749    if ((ac = amr_alloccmd(sc)) == NULL)
750	goto out;
751    /* set command flags */
752    ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT;
753
754    /* build the command proper */
755    mbox = (u_int8_t *)&ac->ac_mailbox;		/* XXX want a real structure for this? */
756    mbox[0] = 0xA4;
757    mbox[2] = 0x16;
758
759
760    /* we have to poll, as the system may be going down or otherwise damaged */
761    if (sc->amr_poll_command(ac))
762	goto out;
763    if( ac->ac_status == AMR_STATUS_SUCCESS ) {
764	    error = 1;
765    }
766
767out:
768    if (ac != NULL)
769	amr_releasecmd(ac);
770    return(error);
771}
772
773/********************************************************************************
774 * Try to find I/O work for the controller from one or more of the work queues.
775 *
776 * We make the assumption that if the controller is not ready to take a command
777 * at some given time, it will generate an interrupt at some later time when
778 * it is.
779 */
780void
781amr_startio(struct amr_softc *sc)
782{
783    struct amr_command	*ac;
784
785    /* spin until something prevents us from doing any work */
786    for (;;) {
787
788	/* try to get a ready command */
789	ac = amr_dequeue_ready(sc);
790
791	/* if that failed, build a command from a bio */
792	if (ac == NULL)
793	    (void)amr_bio_command(sc, &ac);
794
795	/* if that failed, build a command from a ccb */
796	if (ac == NULL)
797	    (void)amr_cam_command(sc, &ac);
798
799	/* if we don't have anything to do, give up */
800	if (ac == NULL)
801	    break;
802
803	/* try to give the command to the controller; if this fails save it for later and give up */
804	if (amr_start(ac)) {
805	    debug(2, "controller busy, command deferred");
806	    amr_requeue_ready(ac);	/* XXX schedule retry very soon? */
807	    break;
808	}
809    }
810}
811
812/********************************************************************************
813 * Handle completion of an I/O command.
814 */
815static void
816amr_completeio(struct amr_command *ac)
817{
818    struct amr_softc	*sc = ac->ac_sc;
819
820    if (ac->ac_status != AMR_STATUS_SUCCESS) {	/* could be more verbose here? */
821	ac->ac_bio->bio_error = EIO;
822	ac->ac_bio->bio_flags |= BIO_ERROR;
823
824	device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status);
825/*	amr_printcommand(ac);*/
826    }
827    amrd_intr(ac->ac_bio);
828    amr_releasecmd(ac);
829}
830
831/********************************************************************************
832 ********************************************************************************
833                                                               Command Processing
834 ********************************************************************************
835 ********************************************************************************/
836
837/********************************************************************************
838 * Convert a bio off the top of the bio queue into a command.
839 */
840static int
841amr_bio_command(struct amr_softc *sc, struct amr_command **acp)
842{
843    struct amr_command	*ac;
844    struct amrd_softc	*amrd;
845    struct bio		*bio;
846    int			error;
847    int			blkcount;
848    int			driveno;
849    int			cmd;
850
851    ac = NULL;
852    error = 0;
853
854    /* get a bio to work on */
855    if ((bio = amr_dequeue_bio(sc)) == NULL)
856	goto out;
857
858    /* get a command */
859    if ((ac = amr_alloccmd(sc)) == NULL) {
860	error = ENOMEM;
861	goto out;
862    }
863
864    /* connect the bio to the command */
865    ac->ac_complete = amr_completeio;
866    ac->ac_bio = bio;
867    ac->ac_data = bio->bio_data;
868    ac->ac_length = bio->bio_bcount;
869    if (BIO_IS_READ(bio)) {
870	ac->ac_flags |= AMR_CMD_DATAIN;
871	cmd = AMR_CMD_LREAD;
872    } else {
873	ac->ac_flags |= AMR_CMD_DATAOUT;
874	cmd = AMR_CMD_LWRITE;
875    }
876    amrd = (struct amrd_softc *)bio->bio_disk->d_drv1;
877    driveno = amrd->amrd_drive - sc->amr_drive;
878    blkcount = (bio->bio_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE;
879
880    ac->ac_mailbox.mb_command = cmd;
881    ac->ac_mailbox.mb_blkcount = blkcount;
882    ac->ac_mailbox.mb_lba = bio->bio_pblkno;
883    ac->ac_mailbox.mb_drive = driveno;
884    /* we fill in the s/g related data when the command is mapped */
885
886    if ((bio->bio_pblkno + blkcount) > sc->amr_drive[driveno].al_size)
887	device_printf(sc->amr_dev, "I/O beyond end of unit (%lld,%d > %lu)\n",
888		      (long long)bio->bio_pblkno, blkcount,
889		      (u_long)sc->amr_drive[driveno].al_size);
890
891out:
892    if (error != 0) {
893	if (ac != NULL)
894	    amr_releasecmd(ac);
895	if (bio != NULL)			/* this breaks ordering... */
896	    amr_enqueue_bio(sc, bio);
897    }
898    *acp = ac;
899    return(error);
900}
901
902/********************************************************************************
903 * Take a command, submit it to the controller and sleep until it completes
904 * or fails.  Interrupts must be enabled, returns nonzero on error.
905 */
906static int
907amr_wait_command(struct amr_command *ac)
908{
909    int			error, count;
910
911    debug_called(1);
912
913    ac->ac_complete = NULL;
914    ac->ac_flags |= AMR_CMD_SLEEP;
915    if ((error = amr_start(ac)) != 0)
916	return(error);
917
918    count = 0;
919    /* XXX better timeout? */
920    while ((ac->ac_flags & AMR_CMD_BUSY) && (count < 30)) {
921	tsleep(ac, PRIBIO | PCATCH, "amrwcmd", hz);
922    }
923    return(0);
924}
925
926/********************************************************************************
927 * Take a command, submit it to the controller and busy-wait for it to return.
928 * Returns nonzero on error.  Can be safely called with interrupts enabled.
929 */
930static int
931amr_std_poll_command(struct amr_command *ac)
932{
933    struct amr_softc	*sc = ac->ac_sc;
934    int			error, count;
935
936    debug_called(2);
937
938    ac->ac_complete = NULL;
939    if ((error = amr_start(ac)) != 0)
940	return(error);
941
942    count = 0;
943    do {
944	/*
945	 * Poll for completion, although the interrupt handler may beat us to it.
946	 * Note that the timeout here is somewhat arbitrary.
947	 */
948	amr_done(sc);
949	DELAY(1000);
950    } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000));
951    if (!(ac->ac_flags & AMR_CMD_BUSY)) {
952	error = 0;
953    } else {
954	/* XXX the slot is now marked permanently busy */
955	error = EIO;
956	device_printf(sc->amr_dev, "polled command timeout\n");
957    }
958    return(error);
959}
960
961/********************************************************************************
962 * Take a command, submit it to the controller and busy-wait for it to return.
963 * Returns nonzero on error.  Can be safely called with interrupts enabled.
964 */
965static int
966amr_quartz_poll_command(struct amr_command *ac)
967{
968    struct amr_softc	*sc = ac->ac_sc;
969    int			s;
970    int			error,count;
971
972    debug_called(2);
973
974    /* now we have a slot, we can map the command (unmapped in amr_complete) */
975    amr_mapcmd(ac);
976
977    s = splbio();
978
979    count=0;
980    while (sc->amr_busyslots){
981	tsleep(sc, PRIBIO | PCATCH, "amrpoll", hz);
982	if(count++>10) {
983	    break;
984	}
985    }
986
987    if(sc->amr_busyslots) {
988	device_printf(sc->amr_dev, "adapter is busy\n");
989	splx(s);
990	amr_unmapcmd(ac);
991    	ac->ac_status=0;
992	return(1);
993    }
994
995    bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
996
997    /* clear the poll/ack fields in the mailbox */
998    sc->amr_mailbox->mb_ident = 0xFE;
999    sc->amr_mailbox->mb_nstatus = 0xFF;
1000    sc->amr_mailbox->mb_status = 0xFF;
1001    sc->amr_mailbox->mb_poll = 0;
1002    sc->amr_mailbox->mb_ack = 0;
1003    sc->amr_mailbox->mb_busy = 1;
1004
1005    AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1006
1007    while(sc->amr_mailbox->mb_nstatus == 0xFF);
1008    while(sc->amr_mailbox->mb_status == 0xFF);
1009    ac->ac_status=sc->amr_mailbox->mb_status;
1010    error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0;
1011    while(sc->amr_mailbox->mb_poll != 0x77);
1012    sc->amr_mailbox->mb_poll = 0;
1013    sc->amr_mailbox->mb_ack = 0x77;
1014
1015    /* acknowledge that we have the commands */
1016    AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1017    while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK);
1018
1019    splx(s);
1020
1021    /* unmap the command's data buffer */
1022    amr_unmapcmd(ac);
1023
1024    return(error);
1025}
1026
1027/********************************************************************************
1028 * Get a free command slot for a command if it doesn't already have one.
1029 *
1030 * May be safely called multiple times for a given command.
1031 */
1032static int
1033amr_getslot(struct amr_command *ac)
1034{
1035    struct amr_softc	*sc = ac->ac_sc;
1036    int			s, slot, limit, error;
1037
1038    debug_called(3);
1039
1040    /* if the command already has a slot, don't try to give it another one */
1041    if (ac->ac_slot != 0)
1042	return(0);
1043
1044    /* enforce slot usage limit */
1045    limit = (ac->ac_flags & AMR_CMD_PRIORITY) ? sc->amr_maxio : sc->amr_maxio - 4;
1046    if (sc->amr_busyslots > limit)
1047	return(EBUSY);
1048
1049    /*
1050     * Allocate a slot.  XXX linear scan is slow
1051     */
1052    error = EBUSY;
1053    s = splbio();
1054    for (slot = 0; slot < sc->amr_maxio; slot++) {
1055	if (sc->amr_busycmd[slot] == NULL) {
1056	    sc->amr_busycmd[slot] = ac;
1057	    sc->amr_busyslots++;
1058	    ac->ac_slot = slot;
1059	    error = 0;
1060	    break;
1061	}
1062    }
1063    splx(s);
1064
1065    return(error);
1066}
1067
1068/********************************************************************************
1069 * Map/unmap (ac)'s data in the controller's addressable space as required.
1070 *
1071 * These functions may be safely called multiple times on a given command.
1072 */
1073static void
1074amr_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1075{
1076    struct amr_command	*ac = (struct amr_command *)arg;
1077    struct amr_softc	*sc = ac->ac_sc;
1078    struct amr_sgentry	*sg;
1079    int			i;
1080    u_int8_t		*sgc;
1081
1082    debug_called(3);
1083
1084    /* get base address of s/g table */
1085    sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1086
1087    /* save data physical address */
1088    ac->ac_dataphys = segs[0].ds_addr;
1089
1090    /* for AMR_CMD_CONFIG the s/g count goes elsewhere */
1091    if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG) {
1092	sgc = &(((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param);
1093    } else {
1094	sgc = &ac->ac_mailbox.mb_nsgelem;
1095    }
1096
1097    /* decide whether we need to populate the s/g table */
1098    if (nsegments < 2) {
1099	*sgc = 0;
1100	ac->ac_mailbox.mb_nsgelem = 0;
1101	ac->ac_mailbox.mb_physaddr = ac->ac_dataphys;
1102    } else {
1103        ac->ac_mailbox.mb_nsgelem = nsegments;
1104	*sgc = nsegments;
1105	ac->ac_mailbox.mb_physaddr = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1106	for (i = 0; i < nsegments; i++, sg++) {
1107	    sg->sg_addr = segs[i].ds_addr;
1108	    sg->sg_count = segs[i].ds_len;
1109	}
1110    }
1111}
1112
1113static void
1114amr_setup_ccbmap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
1115{
1116    struct amr_command          *ac = (struct amr_command *)arg;
1117    struct amr_softc            *sc = ac->ac_sc;
1118    struct amr_sgentry          *sg;
1119    struct amr_passthrough      *ap = (struct amr_passthrough *)ac->ac_data;
1120    struct amr_ext_passthrough	*aep = (struct amr_ext_passthrough *)ac->ac_data;
1121    int                         i;
1122
1123    /* get base address of s/g table */
1124    sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1125
1126    /* decide whether we need to populate the s/g table */
1127    if( ac->ac_mailbox.mb_command == AMR_CMD_EXTPASS ) {
1128	if (nsegments < 2) {
1129	    aep->ap_no_sg_elements = 0;
1130	    aep->ap_data_transfer_address =  segs[0].ds_addr;
1131	} else {
1132	    /* save s/g table information in passthrough */
1133	    aep->ap_no_sg_elements = nsegments;
1134	    aep->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1135	    /* populate s/g table (overwrites previous call which mapped the passthrough) */
1136	    for (i = 0; i < nsegments; i++, sg++) {
1137		sg->sg_addr = segs[i].ds_addr;
1138		sg->sg_count = segs[i].ds_len;
1139		debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1140	    }
1141	}
1142	debug(3, "slot %d  %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1143	    aep->ap_no_sg_elements, aep->ap_data_transfer_address, ac->ac_dataphys);
1144    } else {
1145	if (nsegments < 2) {
1146	    ap->ap_no_sg_elements = 0;
1147	    ap->ap_data_transfer_address =  segs[0].ds_addr;
1148	} else {
1149	    /* save s/g table information in passthrough */
1150	    ap->ap_no_sg_elements = nsegments;
1151	    ap->ap_data_transfer_address = sc->amr_sgbusaddr + (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry));
1152	    /* populate s/g table (overwrites previous call which mapped the passthrough) */
1153	    for (i = 0; i < nsegments; i++, sg++) {
1154		sg->sg_addr = segs[i].ds_addr;
1155		sg->sg_count = segs[i].ds_len;
1156		debug(3, " %d: 0x%x/%d", i, sg->sg_addr, sg->sg_count);
1157	    }
1158	}
1159	debug(3, "slot %d  %d segments at 0x%x, passthrough at 0x%x", ac->ac_slot,
1160	    ap->ap_no_sg_elements, ap->ap_data_transfer_address, ac->ac_dataphys);
1161    }
1162}
1163
1164static void
1165amr_mapcmd(struct amr_command *ac)
1166{
1167    struct amr_softc	*sc = ac->ac_sc;
1168
1169    debug_called(3);
1170
1171    /* if the command involves data at all, and hasn't been mapped */
1172    if (!(ac->ac_flags & AMR_CMD_MAPPED)) {
1173
1174	if (ac->ac_data != NULL) {
1175	    /* map the data buffers into bus space and build the s/g list */
1176	    bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_dmamap, ac->ac_data, ac->ac_length,
1177			    amr_setup_dmamap, ac, 0);
1178	    if (ac->ac_flags & AMR_CMD_DATAIN)
1179		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREREAD);
1180	    if (ac->ac_flags & AMR_CMD_DATAOUT)
1181		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_PREWRITE);
1182	}
1183
1184	if (ac->ac_ccb_data != NULL) {
1185	    bus_dmamap_load(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, ac->ac_ccb_data, ac->ac_ccb_length,
1186			    amr_setup_ccbmap, ac, 0);
1187	    if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1188		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREREAD);
1189	    if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1190		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_PREWRITE);
1191	}
1192	ac->ac_flags |= AMR_CMD_MAPPED;
1193    }
1194}
1195
1196static void
1197amr_unmapcmd(struct amr_command *ac)
1198{
1199    struct amr_softc	*sc = ac->ac_sc;
1200
1201    debug_called(3);
1202
1203    /* if the command involved data at all and was mapped */
1204    if (ac->ac_flags & AMR_CMD_MAPPED) {
1205
1206	if (ac->ac_data != NULL) {
1207	    if (ac->ac_flags & AMR_CMD_DATAIN)
1208		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTREAD);
1209	    if (ac->ac_flags & AMR_CMD_DATAOUT)
1210		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_dmamap, BUS_DMASYNC_POSTWRITE);
1211	    bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_dmamap);
1212	}
1213
1214	if (ac->ac_ccb_data != NULL) {
1215	    if (ac->ac_flags & AMR_CMD_CCB_DATAIN)
1216		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTREAD);
1217	    if (ac->ac_flags & AMR_CMD_CCB_DATAOUT)
1218		bus_dmamap_sync(sc->amr_buffer_dmat, ac->ac_ccb_dmamap, BUS_DMASYNC_POSTWRITE);
1219	    bus_dmamap_unload(sc->amr_buffer_dmat, ac->ac_ccb_dmamap);
1220	}
1221	ac->ac_flags &= ~AMR_CMD_MAPPED;
1222    }
1223}
1224
1225/********************************************************************************
1226 * Take a command and give it to the controller, returns 0 if successful, or
1227 * EBUSY if the command should be retried later.
1228 */
1229static int
1230amr_start(struct amr_command *ac)
1231{
1232    struct amr_softc	*sc = ac->ac_sc;
1233    int			done, s, i;
1234
1235    debug_called(3);
1236
1237    /* mark command as busy so that polling consumer can tell */
1238    ac->ac_flags |= AMR_CMD_BUSY;
1239
1240    /* get a command slot (freed in amr_done) */
1241    if (amr_getslot(ac))
1242	return(EBUSY);
1243
1244    /* now we have a slot, we can map the command (unmapped in amr_complete) */
1245    amr_mapcmd(ac);
1246
1247    /* mark the new mailbox we are going to copy in as busy */
1248    ac->ac_mailbox.mb_busy = 1;
1249
1250    /* clear the poll/ack fields in the mailbox */
1251    sc->amr_mailbox->mb_poll = 0;
1252    sc->amr_mailbox->mb_ack = 0;
1253
1254    /*
1255     * Save the slot number so that we can locate this command when complete.
1256     * Note that ident = 0 seems to be special, so we don't use it.
1257     */
1258    ac->ac_mailbox.mb_ident = ac->ac_slot + 1;
1259
1260    /*
1261     * Spin waiting for the mailbox, give up after ~1 second.  We expect the
1262     * controller to be able to handle our I/O.
1263     *
1264     * XXX perhaps we should wait for less time, and count on the deferred command
1265     * handling to deal with retries?
1266     */
1267    debug(4, "wait for mailbox");
1268    for (i = 10000, done = 0; (i > 0) && !done; i--) {
1269	s = splbio();
1270
1271	/* is the mailbox free? */
1272	if (sc->amr_mailbox->mb_busy == 0) {
1273	    debug(4, "got mailbox");
1274	    sc->amr_mailbox64->mb64_segment = 0;
1275	    bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE);
1276	    done = 1;
1277
1278	    /* not free, spin waiting */
1279	} else {
1280	    debug(4, "busy flag %x\n", sc->amr_mailbox->mb_busy);
1281	    /* this is somewhat ugly */
1282	    DELAY(100);
1283	}
1284	splx(s);	/* drop spl to allow completion interrupts */
1285    }
1286
1287    /*
1288     * Now give the command to the controller
1289     */
1290    if (done) {
1291	if (sc->amr_submit_command(sc)) {
1292	    /* the controller wasn't ready to take the command, forget that we tried to post it */
1293	    sc->amr_mailbox->mb_busy = 0;
1294	    return(EBUSY);
1295	}
1296	debug(3, "posted command");
1297	return(0);
1298    }
1299
1300    /*
1301     * The controller wouldn't take the command.  Return the command as busy
1302     * so that it is retried later.
1303     */
1304    return(EBUSY);
1305}
1306
1307/********************************************************************************
1308 * Extract one or more completed commands from the controller (sc)
1309 *
1310 * Returns nonzero if any commands on the work queue were marked as completed.
1311 */
1312int
1313amr_done(struct amr_softc *sc)
1314{
1315    struct amr_command	*ac;
1316    struct amr_mailbox	mbox;
1317    int			i, idx, result;
1318
1319    debug_called(3);
1320
1321    /* See if there's anything for us to do */
1322    result = 0;
1323
1324    /* loop collecting completed commands */
1325    for (;;) {
1326	/* poll for a completed command's identifier and status */
1327	if (sc->amr_get_work(sc, &mbox)) {
1328	    result = 1;
1329
1330	    /* iterate over completed commands in this result */
1331	    for (i = 0; i < mbox.mb_nstatus; i++) {
1332		/* get pointer to busy command */
1333		idx = mbox.mb_completed[i] - 1;
1334		ac = sc->amr_busycmd[idx];
1335
1336		/* really a busy command? */
1337		if (ac != NULL) {
1338
1339		    /* pull the command from the busy index */
1340		    sc->amr_busycmd[idx] = NULL;
1341		    sc->amr_busyslots--;
1342
1343		    /* save status for later use */
1344		    ac->ac_status = mbox.mb_status;
1345		    amr_enqueue_completed(ac);
1346		    debug(3, "completed command with status %x", mbox.mb_status);
1347		} else {
1348		    device_printf(sc->amr_dev, "bad slot %d completed\n", idx);
1349		}
1350	    }
1351	} else {
1352	    break;	/* no work */
1353	}
1354    }
1355
1356    /* if we've completed any commands, try posting some more */
1357    if (result)
1358	amr_startio(sc);
1359
1360    /* handle completion and timeouts */
1361#if __FreeBSD_version >= 500005
1362    if (sc->amr_state & AMR_STATE_INTEN)
1363	taskqueue_enqueue(taskqueue_swi_giant, &sc->amr_task_complete);
1364    else
1365#endif
1366	amr_complete(sc, 0);
1367
1368    return(result);
1369}
1370
1371/********************************************************************************
1372 * Do completion processing on done commands on (sc)
1373 */
1374static void
1375amr_complete(void *context, int pending)
1376{
1377    struct amr_softc	*sc = (struct amr_softc *)context;
1378    struct amr_command	*ac;
1379
1380    debug_called(3);
1381
1382    /* pull completed commands off the queue */
1383    for (;;) {
1384	ac = amr_dequeue_completed(sc);
1385	if (ac == NULL)
1386	    break;
1387
1388	/* unmap the command's data buffer */
1389	amr_unmapcmd(ac);
1390
1391	/* unbusy the command */
1392	ac->ac_flags &= ~AMR_CMD_BUSY;
1393
1394	/*
1395	 * Is there a completion handler?
1396	 */
1397	if (ac->ac_complete != NULL) {
1398	    ac->ac_complete(ac);
1399
1400	    /*
1401	     * Is someone sleeping on this one?
1402	     */
1403	} else if (ac->ac_flags & AMR_CMD_SLEEP) {
1404	    wakeup(ac);
1405	}
1406
1407	if(!sc->amr_busyslots) {
1408	    wakeup(sc);
1409	}
1410    }
1411}
1412
1413/********************************************************************************
1414 ********************************************************************************
1415                                                        Command Buffer Management
1416 ********************************************************************************
1417 ********************************************************************************/
1418
1419/********************************************************************************
1420 * Get a new command buffer.
1421 *
1422 * This may return NULL in low-memory cases.
1423 *
1424 * If possible, we recycle a command buffer that's been used before.
1425 */
1426struct amr_command *
1427amr_alloccmd(struct amr_softc *sc)
1428{
1429    struct amr_command	*ac;
1430
1431    debug_called(3);
1432
1433    ac = amr_dequeue_free(sc);
1434    if (ac == NULL) {
1435	amr_alloccmd_cluster(sc);
1436	ac = amr_dequeue_free(sc);
1437    }
1438    if (ac == NULL)
1439	return(NULL);
1440
1441    /* clear out significant fields */
1442    ac->ac_slot = 0;
1443    ac->ac_status = 0;
1444    bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox));
1445    ac->ac_flags = 0;
1446    ac->ac_bio = NULL;
1447    ac->ac_data = NULL;
1448    ac->ac_ccb_data = NULL;
1449    ac->ac_complete = NULL;
1450    return(ac);
1451}
1452
1453/********************************************************************************
1454 * Release a command buffer for recycling.
1455 */
1456void
1457amr_releasecmd(struct amr_command *ac)
1458{
1459    debug_called(3);
1460
1461    amr_enqueue_free(ac);
1462}
1463
1464/********************************************************************************
1465 * Allocate a new command cluster and initialise it.
1466 */
1467static void
1468amr_alloccmd_cluster(struct amr_softc *sc)
1469{
1470    struct amr_command_cluster	*acc;
1471    struct amr_command		*ac;
1472    int				s, i;
1473
1474    acc = malloc(AMR_CMD_CLUSTERSIZE, M_DEVBUF, M_NOWAIT);
1475    if (acc != NULL) {
1476	s = splbio();
1477	TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link);
1478	splx(s);
1479	for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) {
1480	    ac = &acc->acc_command[i];
1481	    bzero(ac, sizeof(*ac));
1482	    ac->ac_sc = sc;
1483	    if (!bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap) &&
1484		!bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_ccb_dmamap))
1485		amr_releasecmd(ac);
1486	}
1487    }
1488}
1489
1490/********************************************************************************
1491 * Free a command cluster
1492 */
1493static void
1494amr_freecmd_cluster(struct amr_command_cluster *acc)
1495{
1496    struct amr_softc	*sc = acc->acc_command[0].ac_sc;
1497    int			i;
1498
1499    for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++)
1500	bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap);
1501    free(acc, M_DEVBUF);
1502}
1503
1504/********************************************************************************
1505 ********************************************************************************
1506                                                         Interface-specific Shims
1507 ********************************************************************************
1508 ********************************************************************************/
1509
1510/********************************************************************************
1511 * Tell the controller that the mailbox contains a valid command
1512 */
1513static int
1514amr_quartz_submit_command(struct amr_softc *sc)
1515{
1516    debug_called(3);
1517
1518    if (AMR_QGET_IDB(sc) & AMR_QIDB_SUBMIT)
1519	return(EBUSY);
1520    AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT);
1521    return(0);
1522}
1523
1524static int
1525amr_std_submit_command(struct amr_softc *sc)
1526{
1527    debug_called(3);
1528
1529    if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG)
1530	return(EBUSY);
1531    AMR_SPOST_COMMAND(sc);
1532    return(0);
1533}
1534
1535/********************************************************************************
1536 * Claim any work that the controller has completed; acknowledge completion,
1537 * save details of the completion in (mbsave)
1538 */
1539static int
1540amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1541{
1542    int		s, worked;
1543    u_int32_t	outd;
1544
1545    debug_called(3);
1546
1547    worked = 0;
1548    s = splbio();
1549
1550    /* work waiting for us? */
1551    if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) {
1552
1553	/* save mailbox, which contains a list of completed commands */
1554	bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1555
1556	/* acknowledge interrupt */
1557	AMR_QPUT_ODB(sc, AMR_QODB_READY);
1558
1559	/* acknowledge that we have the commands */
1560	AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK);
1561
1562#ifndef AMR_QUARTZ_GOFASTER
1563	/*
1564	 * This waits for the controller to notice that we've taken the
1565	 * command from it.  It's very inefficient, and we shouldn't do it,
1566	 * but if we remove this code, we stop completing commands under
1567	 * load.
1568	 *
1569	 * Peter J says we shouldn't do this.  The documentation says we
1570	 * should.  Who is right?
1571	 */
1572	while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK)
1573	    ;				/* XXX aiee! what if it dies? */
1574#endif
1575
1576	worked = 1;			/* got some work */
1577    }
1578
1579    splx(s);
1580    return(worked);
1581}
1582
1583static int
1584amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave)
1585{
1586    int		s, worked;
1587    u_int8_t	istat;
1588
1589    debug_called(3);
1590
1591    worked = 0;
1592    s = splbio();
1593
1594    /* check for valid interrupt status */
1595    istat = AMR_SGET_ISTAT(sc);
1596    if ((istat & AMR_SINTR_VALID) != 0) {
1597	AMR_SPUT_ISTAT(sc, istat);	/* ack interrupt status */
1598
1599	/* save mailbox, which contains a list of completed commands */
1600	bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave));
1601
1602	AMR_SACK_INTERRUPT(sc);		/* acknowledge we have the mailbox */
1603	worked = 1;
1604    }
1605
1606    splx(s);
1607    return(worked);
1608}
1609
1610/********************************************************************************
1611 * Notify the controller of the mailbox location.
1612 */
1613static void
1614amr_std_attach_mailbox(struct amr_softc *sc)
1615{
1616
1617    /* program the mailbox physical address */
1618    AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys         & 0xff);
1619    AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >>  8) & 0xff);
1620    AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff);
1621    AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff);
1622    AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR);
1623
1624    /* clear any outstanding interrupt and enable interrupts proper */
1625    AMR_SACK_INTERRUPT(sc);
1626    AMR_SENABLE_INTR(sc);
1627}
1628
1629#ifdef AMR_BOARD_INIT
1630/********************************************************************************
1631 * Initialise the controller
1632 */
1633static int
1634amr_quartz_init(struct amr_softc *sc)
1635{
1636    int		status, ostatus;
1637
1638    device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc));
1639
1640    AMR_QRESET(sc);
1641
1642    ostatus = 0xff;
1643    while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) {
1644	if (status != ostatus) {
1645	    device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status));
1646	    ostatus = status;
1647	}
1648	switch (status) {
1649	case AMR_QINIT_NOMEM:
1650	    return(ENOMEM);
1651
1652	case AMR_QINIT_SCAN:
1653	    /* XXX we could print channel/target here */
1654	    break;
1655	}
1656    }
1657    return(0);
1658}
1659
1660static int
1661amr_std_init(struct amr_softc *sc)
1662{
1663    int		status, ostatus;
1664
1665    device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc));
1666
1667    AMR_SRESET(sc);
1668
1669    ostatus = 0xff;
1670    while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) {
1671	if (status != ostatus) {
1672	    device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status));
1673	    ostatus = status;
1674	}
1675	switch (status) {
1676	case AMR_SINIT_NOMEM:
1677	    return(ENOMEM);
1678
1679	case AMR_SINIT_INPROG:
1680	    /* XXX we could print channel/target here? */
1681	    break;
1682	}
1683    }
1684    return(0);
1685}
1686#endif
1687
1688/********************************************************************************
1689 ********************************************************************************
1690                                                                        Debugging
1691 ********************************************************************************
1692 ********************************************************************************/
1693
1694/********************************************************************************
1695 * Identify the controller and print some information about it.
1696 */
1697static void
1698amr_describe_controller(struct amr_softc *sc)
1699{
1700    struct amr_prodinfo	*ap;
1701    struct amr_enquiry	*ae;
1702    char		*prod;
1703
1704    /*
1705     * Try to get 40LD product info, which tells us what the card is labelled as.
1706     */
1707    if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0)) != NULL) {
1708	device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n",
1709		      ap->ap_product, ap->ap_firmware, ap->ap_bios,
1710		      ap->ap_memsize);
1711
1712	free(ap, M_DEVBUF);
1713	return;
1714    }
1715
1716    /*
1717     * Try 8LD extended ENQUIRY to get controller signature, and use lookup table.
1718     */
1719    if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0)) != NULL) {
1720	prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature);
1721
1722    } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0)) != NULL) {
1723
1724	/*
1725	 * Try to work it out based on the PCI signatures.
1726	 */
1727	switch (pci_get_device(sc->amr_dev)) {
1728	case 0x9010:
1729	    prod = "Series 428";
1730	    break;
1731	case 0x9060:
1732	    prod = "Series 434";
1733	    break;
1734	default:
1735	    prod = "unknown controller";
1736	    break;
1737	}
1738    } else {
1739	prod = "unsupported controller";
1740    }
1741
1742    /*
1743     * HP NetRaid controllers have a special encoding of the firmware and
1744     * BIOS versions. The AMI version seems to have it as strings whereas
1745     * the HP version does it with a leading uppercase character and two
1746     * binary numbers.
1747     */
1748
1749    if(ae->ae_adapter.aa_firmware[2] >= 'A' &&
1750       ae->ae_adapter.aa_firmware[2] <= 'Z' &&
1751       ae->ae_adapter.aa_firmware[1] <  ' ' &&
1752       ae->ae_adapter.aa_firmware[0] <  ' ' &&
1753       ae->ae_adapter.aa_bios[2] >= 'A'     &&
1754       ae->ae_adapter.aa_bios[2] <= 'Z'     &&
1755       ae->ae_adapter.aa_bios[1] <  ' '     &&
1756       ae->ae_adapter.aa_bios[0] <  ' ') {
1757
1758	/* this looks like we have an HP NetRaid version of the MegaRaid */
1759
1760    	if(ae->ae_signature == AMR_SIG_438) {
1761    		/* the AMI 438 is a NetRaid 3si in HP-land */
1762    		prod = "HP NetRaid 3si";
1763    	}
1764
1765	device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n",
1766		      prod, ae->ae_adapter.aa_firmware[2],
1767		      ae->ae_adapter.aa_firmware[1],
1768		      ae->ae_adapter.aa_firmware[0],
1769		      ae->ae_adapter.aa_bios[2],
1770		      ae->ae_adapter.aa_bios[1],
1771		      ae->ae_adapter.aa_bios[0],
1772		      ae->ae_adapter.aa_memorysize);
1773    } else {
1774	device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n",
1775		      prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios,
1776		      ae->ae_adapter.aa_memorysize);
1777    }
1778    free(ae, M_DEVBUF);
1779}
1780
1781#ifdef AMR_DEBUG
1782/********************************************************************************
1783 * Print the command (ac) in human-readable format
1784 */
1785#if 0
1786static void
1787amr_printcommand(struct amr_command *ac)
1788{
1789    struct amr_softc	*sc = ac->ac_sc;
1790    struct amr_sgentry	*sg;
1791    int			i;
1792
1793    device_printf(sc->amr_dev, "cmd %x  ident %d  drive %d\n",
1794		  ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive);
1795    device_printf(sc->amr_dev, "blkcount %d  lba %d\n",
1796		  ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba);
1797    device_printf(sc->amr_dev, "virtaddr %p  length %lu\n", ac->ac_data, (unsigned long)ac->ac_length);
1798    device_printf(sc->amr_dev, "sg physaddr %08x  nsg %d\n",
1799		  ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem);
1800    device_printf(sc->amr_dev, "ccb %p  bio %p\n", ac->ac_ccb_data, ac->ac_bio);
1801
1802    /* get base address of s/g table */
1803    sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG);
1804    for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++)
1805	device_printf(sc->amr_dev, "  %x/%d\n", sg->sg_addr, sg->sg_count);
1806}
1807#endif
1808#endif
1809