agpreg.h revision 87479
1323136Sdes/*- 257429Smarkm * Copyright (c) 2000 Doug Rabson 357429Smarkm * All rights reserved. 457429Smarkm * 557429Smarkm * Redistribution and use in source and binary forms, with or without 657429Smarkm * modification, are permitted provided that the following conditions 757429Smarkm * are met: 865674Skris * 1. Redistributions of source code must retain the above copyright 965674Skris * notice, this list of conditions and the following disclaimer. 1065674Skris * 2. Redistributions in binary form must reproduce the above copyright 1165674Skris * notice, this list of conditions and the following disclaimer in the 1265674Skris * documentation and/or other materials provided with the distribution. 1365674Skris * 1457429Smarkm * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1557429Smarkm * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1657429Smarkm * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17263691Sdes * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1857429Smarkm * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19162856Sdes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20162856Sdes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21162856Sdes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22162856Sdes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23162856Sdes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24162856Sdes * SUCH DAMAGE. 25162856Sdes * 2660576Skris * $FreeBSD: head/sys/dev/agp/agpreg.h 87479 2001-12-07 05:41:26Z cokane $ 27162856Sdes */ 28162856Sdes 29261320Sdes#ifndef _PCI_AGPREG_H_ 30162856Sdes#define _PCI_AGPREG_H_ 31162856Sdes 32162856Sdes/* 33204917Sdes * Offsets for various AGP configuration registers. 34162856Sdes */ 35162856Sdes#define AGP_APBASE 0x10 36162856Sdes#define AGP_CAPPTR 0x34 37162856Sdes 38162856Sdes/* 39221420Sdes * Offsets from the AGP Capability pointer. 40162856Sdes */ 41162856Sdes#define AGP_CAPID 0x0 42162856Sdes#define AGP_CAPID_GET_MAJOR(x) (((x) & 0x00f00000U) >> 20) 43162856Sdes#define AGP_CAPID_GET_MINOR(x) (((x) & 0x000f0000U) >> 16) 44162856Sdes#define AGP_CAPID_GET_NEXT_PTR(x) (((x) & 0x0000ff00U) >> 8) 45162856Sdes#define AGP_CAPID_GET_CAP_ID(x) (((x) & 0x000000ffU) >> 0) 46162856Sdes 47162856Sdes#define AGP_STATUS 0x4 48162856Sdes#define AGP_COMMAND 0x8 4976262Sgreen 5057429Smarkm/* 5160576Skris * Config offsets for Intel AGP chipsets. 5257429Smarkm */ 5357429Smarkm#define AGP_INTEL_NBXCFG 0x50 5457429Smarkm#define AGP_INTEL_ERRSTS 0x91 5558585Skris#define AGP_INTEL_AGPCTRL 0xb0 5660576Skris#define AGP_INTEL_APSIZE 0xb4 5758585Skris#define AGP_INTEL_ATTBASE 0xb8 5876262Sgreen 59294328Sdes/* 6076262Sgreen * Config offsets for Intel i820/i840/i845/i850/i860 AGP chipsets. 6176262Sgreen */ 62124211Sdes#define AGP_INTEL_MCHCFG 0x50 63261320Sdes#define AGP_INTEL_I820_RDCR 0x51 64204917Sdes#define AGP_INTEL_I845_MCHCFG 0x51 65162856Sdes#define AGP_INTEL_I8XX_ERRSTS 0xc8 66294332Sdes 67294332Sdes/* 68296633Sdes * Config offsets for VIA AGP chipsets. 69124211Sdes */ 7060576Skris#define AGP_VIA_GARTCTRL 0x80 7160576Skris#define AGP_VIA_APSIZE 0x84 72294328Sdes#define AGP_VIA_ATTBASE 0x88 7357429Smarkm 74157019Sdes/* 75124211Sdes * Config offsets for SiS AGP chipsets. 76221420Sdes */ 77221420Sdes#define AGP_SIS_ATTBASE 0x90 7898684Sdes#define AGP_SIS_WINCTRL 0x94 7957429Smarkm#define AGP_SIS_TLBCTRL 0x97 8057429Smarkm#define AGP_SIS_TLBFLUSH 0x98 8198684Sdes 8298684Sdes/* 8357429Smarkm * Config offsets for Ali AGP chipsets. 84221420Sdes */ 85126277Sdes#define AGP_ALI_AGPCTRL 0xb8 8676262Sgreen#define AGP_ALI_ATTBASE 0xbc 87261320Sdes#define AGP_ALI_TLBCTRL 0xc0 88261320Sdes 89261320Sdes/* 90261320Sdes * Config offsets for the AMD 751 chipset. 91261320Sdes */ 92261320Sdes#define AGP_AMD751_APBASE 0x10 93261320Sdes#define AGP_AMD751_REGISTERS 0x14 94261320Sdes#define AGP_AMD751_APCTRL 0xac 95261320Sdes#define AGP_AMD751_MODECTRL 0xb0 96261320Sdes#define AGP_AMD751_MODECTRL_SYNEN 0x80 97261320Sdes#define AGP_AMD751_MODECTRL2 0xb2 98261320Sdes#define AGP_AMD751_MODECTRL2_G1LM 0x01 99261320Sdes#define AGP_AMD751_MODECTRL2_GPDCE 0x02 100261320Sdes#define AGP_AMD751_MODECTRL2_NGSE 0x08 101261320Sdes 10257429Smarkm/* 103261320Sdes * Memory mapped register offsets for AMD 751 chipset. 104261320Sdes */ 105261320Sdes#define AGP_AMD751_CAPS 0x00 106261320Sdes#define AGP_AMD751_CAPS_EHI 0x0800 107261320Sdes#define AGP_AMD751_CAPS_P2P 0x0400 108261320Sdes#define AGP_AMD751_CAPS_MPC 0x0200 109261320Sdes#define AGP_AMD751_CAPS_VBE 0x0100 110261320Sdes#define AGP_AMD751_CAPS_REV 0x00ff 111261320Sdes#define AGP_AMD751_STATUS 0x02 112261320Sdes#define AGP_AMD751_STATUS_P2PS 0x0800 113261320Sdes#define AGP_AMD751_STATUS_GCS 0x0400 114261320Sdes#define AGP_AMD751_STATUS_MPS 0x0200 115261320Sdes#define AGP_AMD751_STATUS_VBES 0x0100 116261320Sdes#define AGP_AMD751_STATUS_P2PE 0x0008 117261320Sdes#define AGP_AMD751_STATUS_GCE 0x0004 118261320Sdes#define AGP_AMD751_STATUS_VBEE 0x0001 119261320Sdes#define AGP_AMD751_ATTBASE 0x04 120261320Sdes#define AGP_AMD751_TLBCTRL 0x0c 121261320Sdes 122261320Sdes/* 123261320Sdes * Config registers for i810 device 0 124261320Sdes */ 125261320Sdes#define AGP_I810_SMRAM 0x70 126261320Sdes#define AGP_I810_SMRAM_GMS 0xc0 127261320Sdes#define AGP_I810_SMRAM_GMS_DISABLED 0x00 128261320Sdes#define AGP_I810_SMRAM_GMS_ENABLED_0 0x40 129261320Sdes#define AGP_I810_SMRAM_GMS_ENABLED_512 0x80 130261320Sdes#define AGP_I810_SMRAM_GMS_ENABLED_1024 0xc0 131261320Sdes#define AGP_I810_MISCC 0x72 132261320Sdes#define AGP_I810_MISCC_WINSIZE 0x0001 133261320Sdes#define AGP_I810_MISCC_WINSIZE_64 0x0000 134261320Sdes#define AGP_I810_MISCC_WINSIZE_32 0x0001 135261320Sdes#define AGP_I810_MISCC_PLCK 0x0008 136261320Sdes#define AGP_I810_MISCC_PLCK_UNLOCKED 0x0000 137261320Sdes#define AGP_I810_MISCC_PLCK_LOCKED 0x0008 138261320Sdes#define AGP_I810_MISCC_WPTC 0x0030 139261320Sdes#define AGP_I810_MISCC_WPTC_NOLIMIT 0x0000 140261320Sdes#define AGP_I810_MISCC_WPTC_62 0x0010 141261320Sdes#define AGP_I810_MISCC_WPTC_50 0x0020 142261320Sdes#define AGP_I810_MISCC_WPTC_37 0x0030 143261320Sdes#define AGP_I810_MISCC_RPTC 0x00c0 144261320Sdes#define AGP_I810_MISCC_RPTC_NOLIMIT 0x0000 145261320Sdes#define AGP_I810_MISCC_RPTC_62 0x0040 146261320Sdes#define AGP_I810_MISCC_RPTC_50 0x0080 147261320Sdes#define AGP_I810_MISCC_RPTC_37 0x00c0 148261320Sdes 149261320Sdes/* 150261320Sdes * Config registers for i810 device 1 151261320Sdes */ 152261320Sdes#define AGP_I810_GMADR 0x10 153261320Sdes#define AGP_I810_MMADR 0x14 154261320Sdes 155261320Sdes/* 156261320Sdes * Memory mapped register offsets for i810 chipset. 157261320Sdes */ 158261320Sdes#define AGP_I810_PGTBL_CTL 0x2020 159261320Sdes#define AGP_I810_DRT 0x3000 160261320Sdes#define AGP_I810_DRT_UNPOPULATED 0x00 161261320Sdes#define AGP_I810_DRT_POPULATED 0x01 162261320Sdes#define AGP_I810_GTT 0x10000 163261320Sdes 164261320Sdes#endif /* !_PCI_AGPREG_H_ */ 165261320Sdes