adwcam.c revision 165102
1139749Simp/*- 240024Sgibbs * CAM SCSI interface for the the Advanced Systems Inc. 340024Sgibbs * Second Generation SCSI controllers. 440024Sgibbs * 540024Sgibbs * Product specific probe and attach routines can be found in: 640024Sgibbs * 756979Sgibbs * adw_pci.c ABP[3]940UW, ABP950UW, ABP3940U2W 840024Sgibbs * 956979Sgibbs * Copyright (c) 1998, 1999, 2000 Justin Gibbs. 1040024Sgibbs * All rights reserved. 1140024Sgibbs * 1240024Sgibbs * Redistribution and use in source and binary forms, with or without 1340024Sgibbs * modification, are permitted provided that the following conditions 1440024Sgibbs * are met: 1540024Sgibbs * 1. Redistributions of source code must retain the above copyright 1640024Sgibbs * notice, this list of conditions, and the following disclaimer, 1756979Sgibbs * without modification. 1840024Sgibbs * 2. The name of the author may not be used to endorse or promote products 1940024Sgibbs * derived from this software without specific prior written permission. 2040024Sgibbs * 2140024Sgibbs * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 2240024Sgibbs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2340024Sgibbs * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2440024Sgibbs * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 2540024Sgibbs * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2640024Sgibbs * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2740024Sgibbs * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2840024Sgibbs * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2940024Sgibbs * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 3040024Sgibbs * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 3140024Sgibbs * SUCH DAMAGE. 3240024Sgibbs */ 3340024Sgibbs/* 3440024Sgibbs * Ported from: 3540024Sgibbs * advansys.c - Linux Host Driver for AdvanSys SCSI Adapters 3640024Sgibbs * 3740024Sgibbs * Copyright (c) 1995-1998 Advanced System Products, Inc. 3840024Sgibbs * All Rights Reserved. 3940024Sgibbs * 4040024Sgibbs * Redistribution and use in source and binary forms, with or without 4140024Sgibbs * modification, are permitted provided that redistributions of source 4240024Sgibbs * code retain the above copyright notice and this comment without 4340024Sgibbs * modification. 4440024Sgibbs */ 4540024Sgibbs 46119418Sobrien#include <sys/cdefs.h> 47119418Sobrien__FBSDID("$FreeBSD: head/sys/dev/advansys/adwcam.c 165102 2006-12-11 18:28:31Z mjacob $"); 48119418Sobrien 4940024Sgibbs#include <sys/param.h> 5040024Sgibbs#include <sys/systm.h> 5140024Sgibbs#include <sys/kernel.h> 5240024Sgibbs#include <sys/malloc.h> 53117126Sscottl#include <sys/lock.h> 54165102Smjacob#include <sys/module.h> 55117126Sscottl#include <sys/mutex.h> 5656979Sgibbs#include <sys/bus.h> 5740024Sgibbs 5840024Sgibbs#include <machine/bus.h> 5956979Sgibbs#include <machine/resource.h> 6040024Sgibbs 6156979Sgibbs#include <sys/rman.h> 6256979Sgibbs 6340024Sgibbs#include <cam/cam.h> 6440024Sgibbs#include <cam/cam_ccb.h> 6540024Sgibbs#include <cam/cam_sim.h> 6640024Sgibbs#include <cam/cam_xpt_sim.h> 6740024Sgibbs#include <cam/cam_debug.h> 6840024Sgibbs 6940024Sgibbs#include <cam/scsi/scsi_message.h> 7040024Sgibbs 7140024Sgibbs#include <dev/advansys/adwvar.h> 7240024Sgibbs 7340024Sgibbs/* Definitions for our use of the SIM private CCB area */ 7440024Sgibbs#define ccb_acb_ptr spriv_ptr0 7540024Sgibbs#define ccb_adw_ptr spriv_ptr1 7640024Sgibbs 7740024Sgibbsu_long adw_unit; 7840024Sgibbs 7957679Sgibbsstatic __inline cam_status adwccbstatus(union ccb*); 8040024Sgibbsstatic __inline struct acb* adwgetacb(struct adw_softc *adw); 8140024Sgibbsstatic __inline void adwfreeacb(struct adw_softc *adw, 8240024Sgibbs struct acb *acb); 8340024Sgibbs 8440024Sgibbsstatic void adwmapmem(void *arg, bus_dma_segment_t *segs, 8540024Sgibbs int nseg, int error); 8640024Sgibbsstatic struct sg_map_node* 8740024Sgibbs adwallocsgmap(struct adw_softc *adw); 8840024Sgibbsstatic int adwallocacbs(struct adw_softc *adw); 8940024Sgibbs 9040024Sgibbsstatic void adwexecuteacb(void *arg, bus_dma_segment_t *dm_segs, 9140024Sgibbs int nseg, int error); 9240024Sgibbsstatic void adw_action(struct cam_sim *sim, union ccb *ccb); 9340024Sgibbsstatic void adw_poll(struct cam_sim *sim); 9440024Sgibbsstatic void adw_async(void *callback_arg, u_int32_t code, 9540024Sgibbs struct cam_path *path, void *arg); 9640024Sgibbsstatic void adwprocesserror(struct adw_softc *adw, struct acb *acb); 9740024Sgibbsstatic void adwtimeout(void *arg); 9840024Sgibbsstatic void adw_handle_device_reset(struct adw_softc *adw, 9940024Sgibbs u_int target); 10040024Sgibbsstatic void adw_handle_bus_reset(struct adw_softc *adw, 10140024Sgibbs int initiated); 10240024Sgibbs 10357679Sgibbsstatic __inline cam_status 10457679Sgibbsadwccbstatus(union ccb* ccb) 10557679Sgibbs{ 10657679Sgibbs return (ccb->ccb_h.status & CAM_STATUS_MASK); 10757679Sgibbs} 10857679Sgibbs 10940024Sgibbsstatic __inline struct acb* 11040024Sgibbsadwgetacb(struct adw_softc *adw) 11140024Sgibbs{ 11240024Sgibbs struct acb* acb; 11340024Sgibbs int s; 11440024Sgibbs 11540024Sgibbs s = splcam(); 11640024Sgibbs if ((acb = SLIST_FIRST(&adw->free_acb_list)) != NULL) { 11740024Sgibbs SLIST_REMOVE_HEAD(&adw->free_acb_list, links); 11840024Sgibbs } else if (adw->num_acbs < adw->max_acbs) { 11940024Sgibbs adwallocacbs(adw); 12040024Sgibbs acb = SLIST_FIRST(&adw->free_acb_list); 12140024Sgibbs if (acb == NULL) 12240024Sgibbs printf("%s: Can't malloc ACB\n", adw_name(adw)); 12340024Sgibbs else { 12440024Sgibbs SLIST_REMOVE_HEAD(&adw->free_acb_list, links); 12540024Sgibbs } 12640024Sgibbs } 12740024Sgibbs splx(s); 12840024Sgibbs 12940024Sgibbs return (acb); 13040024Sgibbs} 13140024Sgibbs 13240024Sgibbsstatic __inline void 13340024Sgibbsadwfreeacb(struct adw_softc *adw, struct acb *acb) 13440024Sgibbs{ 13540024Sgibbs int s; 13640024Sgibbs 13740024Sgibbs s = splcam(); 13840024Sgibbs if ((acb->state & ACB_ACTIVE) != 0) 13940024Sgibbs LIST_REMOVE(&acb->ccb->ccb_h, sim_links.le); 14040024Sgibbs if ((acb->state & ACB_RELEASE_SIMQ) != 0) 14140024Sgibbs acb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 14240024Sgibbs else if ((adw->state & ADW_RESOURCE_SHORTAGE) != 0 14340024Sgibbs && (acb->ccb->ccb_h.status & CAM_RELEASE_SIMQ) == 0) { 14440024Sgibbs acb->ccb->ccb_h.status |= CAM_RELEASE_SIMQ; 14540024Sgibbs adw->state &= ~ADW_RESOURCE_SHORTAGE; 14640024Sgibbs } 14740024Sgibbs acb->state = ACB_FREE; 14840024Sgibbs SLIST_INSERT_HEAD(&adw->free_acb_list, acb, links); 14940024Sgibbs splx(s); 15040024Sgibbs} 15140024Sgibbs 15240024Sgibbsstatic void 15340024Sgibbsadwmapmem(void *arg, bus_dma_segment_t *segs, int nseg, int error) 15440024Sgibbs{ 15540024Sgibbs bus_addr_t *busaddrp; 15640024Sgibbs 15740024Sgibbs busaddrp = (bus_addr_t *)arg; 15840024Sgibbs *busaddrp = segs->ds_addr; 15940024Sgibbs} 16040024Sgibbs 16140024Sgibbsstatic struct sg_map_node * 16240024Sgibbsadwallocsgmap(struct adw_softc *adw) 16340024Sgibbs{ 16440024Sgibbs struct sg_map_node *sg_map; 16540024Sgibbs 16640024Sgibbs sg_map = malloc(sizeof(*sg_map), M_DEVBUF, M_NOWAIT); 16740024Sgibbs 16840024Sgibbs if (sg_map == NULL) 16940024Sgibbs return (NULL); 17040024Sgibbs 17140024Sgibbs /* Allocate S/G space for the next batch of ACBS */ 17240024Sgibbs if (bus_dmamem_alloc(adw->sg_dmat, (void **)&sg_map->sg_vaddr, 17340024Sgibbs BUS_DMA_NOWAIT, &sg_map->sg_dmamap) != 0) { 17440024Sgibbs free(sg_map, M_DEVBUF); 17540024Sgibbs return (NULL); 17640024Sgibbs } 17740024Sgibbs 17840024Sgibbs SLIST_INSERT_HEAD(&adw->sg_maps, sg_map, links); 17940024Sgibbs 18040024Sgibbs bus_dmamap_load(adw->sg_dmat, sg_map->sg_dmamap, sg_map->sg_vaddr, 18140024Sgibbs PAGE_SIZE, adwmapmem, &sg_map->sg_physaddr, /*flags*/0); 18240024Sgibbs 18340024Sgibbs bzero(sg_map->sg_vaddr, PAGE_SIZE); 18440024Sgibbs return (sg_map); 18540024Sgibbs} 18640024Sgibbs 18740024Sgibbs/* 18840024Sgibbs * Allocate another chunk of CCB's. Return count of entries added. 18940024Sgibbs * Assumed to be called at splcam(). 19040024Sgibbs */ 19140024Sgibbsstatic int 19240024Sgibbsadwallocacbs(struct adw_softc *adw) 19340024Sgibbs{ 19440024Sgibbs struct acb *next_acb; 19540024Sgibbs struct sg_map_node *sg_map; 19640024Sgibbs bus_addr_t busaddr; 19740024Sgibbs struct adw_sg_block *blocks; 19840024Sgibbs int newcount; 19940024Sgibbs int i; 20040024Sgibbs 20140024Sgibbs next_acb = &adw->acbs[adw->num_acbs]; 20240024Sgibbs sg_map = adwallocsgmap(adw); 20340024Sgibbs 20440024Sgibbs if (sg_map == NULL) 20540024Sgibbs return (0); 20640024Sgibbs 20740024Sgibbs blocks = sg_map->sg_vaddr; 20840024Sgibbs busaddr = sg_map->sg_physaddr; 20940024Sgibbs 21040024Sgibbs newcount = (PAGE_SIZE / (ADW_SG_BLOCKCNT * sizeof(*blocks))); 21140024Sgibbs for (i = 0; adw->num_acbs < adw->max_acbs && i < newcount; i++) { 21240024Sgibbs int error; 21340024Sgibbs 21440024Sgibbs error = bus_dmamap_create(adw->buffer_dmat, /*flags*/0, 21540024Sgibbs &next_acb->dmamap); 21640024Sgibbs if (error != 0) 21740024Sgibbs break; 21856979Sgibbs next_acb->queue.scsi_req_baddr = acbvtob(adw, next_acb); 21956979Sgibbs next_acb->queue.scsi_req_bo = acbvtobo(adw, next_acb); 22056979Sgibbs next_acb->queue.sense_baddr = 22156979Sgibbs acbvtob(adw, next_acb) + offsetof(struct acb, sense_data); 22240024Sgibbs next_acb->sg_blocks = blocks; 22340024Sgibbs next_acb->sg_busaddr = busaddr; 22440024Sgibbs next_acb->state = ACB_FREE; 22540024Sgibbs SLIST_INSERT_HEAD(&adw->free_acb_list, next_acb, links); 22640024Sgibbs blocks += ADW_SG_BLOCKCNT; 22740024Sgibbs busaddr += ADW_SG_BLOCKCNT * sizeof(*blocks); 22840024Sgibbs next_acb++; 22940024Sgibbs adw->num_acbs++; 23040024Sgibbs } 23140024Sgibbs return (i); 23240024Sgibbs} 23340024Sgibbs 23440024Sgibbsstatic void 23540024Sgibbsadwexecuteacb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) 23640024Sgibbs{ 23740024Sgibbs struct acb *acb; 23840024Sgibbs union ccb *ccb; 23940024Sgibbs struct adw_softc *adw; 24040420Sgibbs int s; 24140024Sgibbs 24240024Sgibbs acb = (struct acb *)arg; 24340024Sgibbs ccb = acb->ccb; 24440024Sgibbs adw = (struct adw_softc *)ccb->ccb_h.ccb_adw_ptr; 24540024Sgibbs 24640024Sgibbs if (error != 0) { 24740024Sgibbs if (error != EFBIG) 24840024Sgibbs printf("%s: Unexepected error 0x%x returned from " 24940024Sgibbs "bus_dmamap_load\n", adw_name(adw), error); 25040024Sgibbs if (ccb->ccb_h.status == CAM_REQ_INPROG) { 25140024Sgibbs xpt_freeze_devq(ccb->ccb_h.path, /*count*/1); 25240024Sgibbs ccb->ccb_h.status = CAM_REQ_TOO_BIG|CAM_DEV_QFRZN; 25340024Sgibbs } 25440024Sgibbs adwfreeacb(adw, acb); 25540024Sgibbs xpt_done(ccb); 25640024Sgibbs return; 25740024Sgibbs } 25840024Sgibbs 25940024Sgibbs if (nseg != 0) { 260115343Sscottl bus_dmasync_op_t op; 26140024Sgibbs 26240024Sgibbs acb->queue.data_addr = dm_segs[0].ds_addr; 26340024Sgibbs acb->queue.data_cnt = ccb->csio.dxfer_len; 26440024Sgibbs if (nseg > 1) { 26540024Sgibbs struct adw_sg_block *sg_block; 26640024Sgibbs struct adw_sg_elm *sg; 26740024Sgibbs bus_addr_t sg_busaddr; 26840024Sgibbs u_int sg_index; 26940024Sgibbs bus_dma_segment_t *end_seg; 27040024Sgibbs 27140024Sgibbs end_seg = dm_segs + nseg; 27240024Sgibbs 27340024Sgibbs sg_busaddr = acb->sg_busaddr; 27440024Sgibbs sg_index = 0; 27540024Sgibbs /* Copy the segments into our SG list */ 27640024Sgibbs for (sg_block = acb->sg_blocks;; sg_block++) { 27756979Sgibbs u_int i; 27840024Sgibbs 27940024Sgibbs sg = sg_block->sg_list; 28056979Sgibbs for (i = 0; i < ADW_NO_OF_SG_PER_BLOCK; i++) { 28156979Sgibbs if (dm_segs >= end_seg) 28256979Sgibbs break; 28356979Sgibbs 28440024Sgibbs sg->sg_addr = dm_segs->ds_addr; 28540024Sgibbs sg->sg_count = dm_segs->ds_len; 28640024Sgibbs sg++; 28740024Sgibbs dm_segs++; 28840024Sgibbs } 28956979Sgibbs sg_block->sg_cnt = i; 29056979Sgibbs sg_index += i; 29140024Sgibbs if (dm_segs == end_seg) { 29240024Sgibbs sg_block->sg_busaddr_next = 0; 29340024Sgibbs break; 29440024Sgibbs } else { 29540024Sgibbs sg_busaddr += 29640024Sgibbs sizeof(struct adw_sg_block); 29740024Sgibbs sg_block->sg_busaddr_next = sg_busaddr; 29840024Sgibbs } 29940024Sgibbs } 30040024Sgibbs acb->queue.sg_real_addr = acb->sg_busaddr; 30140024Sgibbs } else { 30240024Sgibbs acb->queue.sg_real_addr = 0; 30340024Sgibbs } 30440024Sgibbs 30540024Sgibbs if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 30640024Sgibbs op = BUS_DMASYNC_PREREAD; 30740024Sgibbs else 30840024Sgibbs op = BUS_DMASYNC_PREWRITE; 30940024Sgibbs 31040024Sgibbs bus_dmamap_sync(adw->buffer_dmat, acb->dmamap, op); 31140024Sgibbs 31240024Sgibbs } else { 31340024Sgibbs acb->queue.data_addr = 0; 31440024Sgibbs acb->queue.data_cnt = 0; 31540024Sgibbs acb->queue.sg_real_addr = 0; 31640024Sgibbs } 31740024Sgibbs 31840024Sgibbs s = splcam(); 31940024Sgibbs 32040024Sgibbs /* 32140024Sgibbs * Last time we need to check if this CCB needs to 32240024Sgibbs * be aborted. 32340024Sgibbs */ 32440024Sgibbs if (ccb->ccb_h.status != CAM_REQ_INPROG) { 32540024Sgibbs if (nseg != 0) 32640024Sgibbs bus_dmamap_unload(adw->buffer_dmat, acb->dmamap); 32740024Sgibbs adwfreeacb(adw, acb); 32840024Sgibbs xpt_done(ccb); 32940024Sgibbs splx(s); 33040024Sgibbs return; 33140024Sgibbs } 33257679Sgibbs 33340024Sgibbs acb->state |= ACB_ACTIVE; 33440024Sgibbs ccb->ccb_h.status |= CAM_SIM_QUEUED; 33540024Sgibbs LIST_INSERT_HEAD(&adw->pending_ccbs, &ccb->ccb_h, sim_links.le); 33640024Sgibbs ccb->ccb_h.timeout_ch = 33740024Sgibbs timeout(adwtimeout, (caddr_t)acb, 33840024Sgibbs (ccb->ccb_h.timeout * hz) / 1000); 33940024Sgibbs 34056979Sgibbs adw_send_acb(adw, acb, acbvtob(adw, acb)); 34140024Sgibbs 34240024Sgibbs splx(s); 34340024Sgibbs} 34440024Sgibbs 34540024Sgibbsstatic void 34640024Sgibbsadw_action(struct cam_sim *sim, union ccb *ccb) 34740024Sgibbs{ 34840024Sgibbs struct adw_softc *adw; 34940024Sgibbs 35040024Sgibbs CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("adw_action\n")); 35140024Sgibbs 35240024Sgibbs adw = (struct adw_softc *)cam_sim_softc(sim); 35340024Sgibbs 35440024Sgibbs switch (ccb->ccb_h.func_code) { 35540024Sgibbs /* Common cases first */ 35640024Sgibbs case XPT_SCSI_IO: /* Execute the requested I/O operation */ 35740024Sgibbs { 35840024Sgibbs struct ccb_scsiio *csio; 35940024Sgibbs struct ccb_hdr *ccbh; 36040024Sgibbs struct acb *acb; 36140024Sgibbs 36240024Sgibbs csio = &ccb->csio; 36340024Sgibbs ccbh = &ccb->ccb_h; 36456979Sgibbs 36540024Sgibbs /* Max supported CDB length is 12 bytes */ 36640024Sgibbs if (csio->cdb_len > 12) { 36740024Sgibbs ccb->ccb_h.status = CAM_REQ_INVALID; 36840024Sgibbs xpt_done(ccb); 36940024Sgibbs return; 37040024Sgibbs } 37140024Sgibbs 37240024Sgibbs if ((acb = adwgetacb(adw)) == NULL) { 37340024Sgibbs int s; 37440024Sgibbs 37540024Sgibbs s = splcam(); 37640024Sgibbs adw->state |= ADW_RESOURCE_SHORTAGE; 37740024Sgibbs splx(s); 37840024Sgibbs xpt_freeze_simq(sim, /*count*/1); 37940024Sgibbs ccb->ccb_h.status = CAM_REQUEUE_REQ; 38040024Sgibbs xpt_done(ccb); 38140024Sgibbs return; 38240024Sgibbs } 38340024Sgibbs 38456979Sgibbs /* Link acb and ccb so we can find one from the other */ 38540024Sgibbs acb->ccb = ccb; 38640024Sgibbs ccb->ccb_h.ccb_acb_ptr = acb; 38740024Sgibbs ccb->ccb_h.ccb_adw_ptr = adw; 38840024Sgibbs 38940024Sgibbs acb->queue.cntl = 0; 39056979Sgibbs acb->queue.target_cmd = 0; 39140024Sgibbs acb->queue.target_id = ccb->ccb_h.target_id; 39240024Sgibbs acb->queue.target_lun = ccb->ccb_h.target_lun; 39340024Sgibbs 39456979Sgibbs acb->queue.mflag = 0; 39540024Sgibbs acb->queue.sense_len = 39640024Sgibbs MIN(csio->sense_len, sizeof(acb->sense_data)); 39740024Sgibbs acb->queue.cdb_len = csio->cdb_len; 39856979Sgibbs if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0) { 39956979Sgibbs switch (csio->tag_action) { 40056979Sgibbs case MSG_SIMPLE_Q_TAG: 40157679Sgibbs acb->queue.scsi_cntl = ADW_QSC_SIMPLE_Q_TAG; 40256979Sgibbs break; 40356979Sgibbs case MSG_HEAD_OF_Q_TAG: 40456979Sgibbs acb->queue.scsi_cntl = ADW_QSC_HEAD_OF_Q_TAG; 40556979Sgibbs break; 40656979Sgibbs case MSG_ORDERED_Q_TAG: 40756979Sgibbs acb->queue.scsi_cntl = ADW_QSC_ORDERED_Q_TAG; 40856979Sgibbs break; 40957679Sgibbs default: 41057679Sgibbs acb->queue.scsi_cntl = ADW_QSC_NO_TAGMSG; 41157679Sgibbs break; 41256979Sgibbs } 41356979Sgibbs } else 41456979Sgibbs acb->queue.scsi_cntl = ADW_QSC_NO_TAGMSG; 41540024Sgibbs 41656979Sgibbs if ((ccb->ccb_h.flags & CAM_DIS_DISCONNECT) != 0) 41756979Sgibbs acb->queue.scsi_cntl |= ADW_QSC_NO_DISC; 41840024Sgibbs 41940024Sgibbs acb->queue.done_status = 0; 42040024Sgibbs acb->queue.scsi_status = 0; 42140024Sgibbs acb->queue.host_status = 0; 42256979Sgibbs acb->queue.sg_wk_ix = 0; 42340024Sgibbs if ((ccb->ccb_h.flags & CAM_CDB_POINTER) != 0) { 42440024Sgibbs if ((ccb->ccb_h.flags & CAM_CDB_PHYS) == 0) { 42540024Sgibbs bcopy(csio->cdb_io.cdb_ptr, 42640024Sgibbs acb->queue.cdb, csio->cdb_len); 42740024Sgibbs } else { 42840024Sgibbs /* I guess I could map it in... */ 42940024Sgibbs ccb->ccb_h.status = CAM_REQ_INVALID; 43040024Sgibbs adwfreeacb(adw, acb); 43140024Sgibbs xpt_done(ccb); 43240024Sgibbs return; 43340024Sgibbs } 43440024Sgibbs } else { 43540024Sgibbs bcopy(csio->cdb_io.cdb_bytes, 43640024Sgibbs acb->queue.cdb, csio->cdb_len); 43740024Sgibbs } 43840024Sgibbs 43940024Sgibbs /* 44040024Sgibbs * If we have any data to send with this command, 44140024Sgibbs * map it into bus space. 44240024Sgibbs */ 44340024Sgibbs if ((ccbh->flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 44440024Sgibbs if ((ccbh->flags & CAM_SCATTER_VALID) == 0) { 44540024Sgibbs /* 44640024Sgibbs * We've been given a pointer 44740024Sgibbs * to a single buffer. 44840024Sgibbs */ 44940024Sgibbs if ((ccbh->flags & CAM_DATA_PHYS) == 0) { 45040024Sgibbs int s; 45140024Sgibbs int error; 45240024Sgibbs 45340024Sgibbs s = splsoftvm(); 45440024Sgibbs error = 45540024Sgibbs bus_dmamap_load(adw->buffer_dmat, 45640024Sgibbs acb->dmamap, 45740024Sgibbs csio->data_ptr, 45840024Sgibbs csio->dxfer_len, 45940024Sgibbs adwexecuteacb, 46040024Sgibbs acb, /*flags*/0); 46140024Sgibbs if (error == EINPROGRESS) { 46240024Sgibbs /* 46340024Sgibbs * So as to maintain ordering, 46440024Sgibbs * freeze the controller queue 46540024Sgibbs * until our mapping is 46640024Sgibbs * returned. 46740024Sgibbs */ 46840024Sgibbs xpt_freeze_simq(sim, 1); 46940024Sgibbs acb->state |= CAM_RELEASE_SIMQ; 47040024Sgibbs } 47140024Sgibbs splx(s); 47240024Sgibbs } else { 47340024Sgibbs struct bus_dma_segment seg; 47440024Sgibbs 47540024Sgibbs /* Pointer to physical buffer */ 47640024Sgibbs seg.ds_addr = 47740024Sgibbs (bus_addr_t)csio->data_ptr; 47840024Sgibbs seg.ds_len = csio->dxfer_len; 47940024Sgibbs adwexecuteacb(acb, &seg, 1, 0); 48040024Sgibbs } 48140024Sgibbs } else { 48240024Sgibbs struct bus_dma_segment *segs; 48340024Sgibbs 48440024Sgibbs if ((ccbh->flags & CAM_DATA_PHYS) != 0) 48540024Sgibbs panic("adw_action - Physical " 48640024Sgibbs "segment pointers " 48740024Sgibbs "unsupported"); 48840024Sgibbs 48940024Sgibbs if ((ccbh->flags&CAM_SG_LIST_PHYS)==0) 49040024Sgibbs panic("adw_action - Virtual " 49140024Sgibbs "segment addresses " 49240024Sgibbs "unsupported"); 49340024Sgibbs 49440024Sgibbs /* Just use the segments provided */ 49540024Sgibbs segs = (struct bus_dma_segment *)csio->data_ptr; 49640024Sgibbs adwexecuteacb(acb, segs, csio->sglist_cnt, 49740024Sgibbs (csio->sglist_cnt < ADW_SGSIZE) 49840024Sgibbs ? 0 : EFBIG); 49940024Sgibbs } 50040024Sgibbs } else { 50140024Sgibbs adwexecuteacb(acb, NULL, 0, 0); 50240024Sgibbs } 50340024Sgibbs break; 50440024Sgibbs } 50540024Sgibbs case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 50640024Sgibbs { 50740024Sgibbs adw_idle_cmd_status_t status; 50840024Sgibbs 50957679Sgibbs status = adw_idle_cmd_send(adw, ADW_IDLE_CMD_DEVICE_RESET, 51057679Sgibbs ccb->ccb_h.target_id); 51140024Sgibbs if (status == ADW_IDLE_CMD_SUCCESS) { 51240024Sgibbs ccb->ccb_h.status = CAM_REQ_CMP; 51340024Sgibbs if (bootverbose) { 51440024Sgibbs xpt_print_path(ccb->ccb_h.path); 51540024Sgibbs printf("BDR Delivered\n"); 51640024Sgibbs } 51740024Sgibbs } else 51840024Sgibbs ccb->ccb_h.status = CAM_REQ_CMP_ERR; 51940024Sgibbs xpt_done(ccb); 52040024Sgibbs break; 52140024Sgibbs } 52240024Sgibbs case XPT_ABORT: /* Abort the specified CCB */ 52340024Sgibbs /* XXX Implement */ 52440024Sgibbs ccb->ccb_h.status = CAM_REQ_INVALID; 52540024Sgibbs xpt_done(ccb); 52640024Sgibbs break; 52740024Sgibbs case XPT_SET_TRAN_SETTINGS: 52840024Sgibbs { 529163816Smjacob struct ccb_trans_settings_scsi *scsi; 530163816Smjacob struct ccb_trans_settings_spi *spi; 53140024Sgibbs struct ccb_trans_settings *cts; 53240024Sgibbs u_int target_mask; 53340024Sgibbs int s; 53440024Sgibbs 53540024Sgibbs cts = &ccb->cts; 53640024Sgibbs target_mask = 0x01 << ccb->ccb_h.target_id; 53740024Sgibbs 53840024Sgibbs s = splcam(); 539163816Smjacob scsi = &cts->proto_specific.scsi; 540163816Smjacob spi = &cts->xport_specific.spi; 541163816Smjacob if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 542163816Smjacob u_int sdtrdone; 543163816Smjacob 544163816Smjacob sdtrdone = adw_lram_read_16(adw, ADW_MC_SDTR_DONE); 545163816Smjacob if ((spi->valid & CTS_SPI_VALID_DISC) != 0) { 546163816Smjacob u_int discenb; 547163816Smjacob 548163816Smjacob discenb = 549163816Smjacob adw_lram_read_16(adw, ADW_MC_DISC_ENABLE); 550163816Smjacob 551163816Smjacob if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0) 552163816Smjacob discenb |= target_mask; 553163816Smjacob else 554163816Smjacob discenb &= ~target_mask; 555163816Smjacob 556163816Smjacob adw_lram_write_16(adw, ADW_MC_DISC_ENABLE, 557163816Smjacob discenb); 558163816Smjacob } 559163816Smjacob 560163816Smjacob if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) { 561163816Smjacob 562163816Smjacob if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0) 563163816Smjacob adw->tagenb |= target_mask; 564163816Smjacob else 565163816Smjacob adw->tagenb &= ~target_mask; 566163816Smjacob } 567163816Smjacob 568163816Smjacob if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) { 569163816Smjacob u_int wdtrenb_orig; 570163816Smjacob u_int wdtrenb; 571163816Smjacob u_int wdtrdone; 572163816Smjacob 573163816Smjacob wdtrenb_orig = 574163816Smjacob adw_lram_read_16(adw, ADW_MC_WDTR_ABLE); 575163816Smjacob wdtrenb = wdtrenb_orig; 576163816Smjacob wdtrdone = adw_lram_read_16(adw, 577163816Smjacob ADW_MC_WDTR_DONE); 578163816Smjacob switch (spi->bus_width) { 579163816Smjacob case MSG_EXT_WDTR_BUS_32_BIT: 580163816Smjacob case MSG_EXT_WDTR_BUS_16_BIT: 581163816Smjacob wdtrenb |= target_mask; 582163816Smjacob break; 583163816Smjacob case MSG_EXT_WDTR_BUS_8_BIT: 584163816Smjacob default: 585163816Smjacob wdtrenb &= ~target_mask; 586163816Smjacob break; 587163816Smjacob } 588163816Smjacob if (wdtrenb != wdtrenb_orig) { 589163816Smjacob adw_lram_write_16(adw, 590163816Smjacob ADW_MC_WDTR_ABLE, 591163816Smjacob wdtrenb); 592163816Smjacob wdtrdone &= ~target_mask; 593163816Smjacob adw_lram_write_16(adw, 594163816Smjacob ADW_MC_WDTR_DONE, 595163816Smjacob wdtrdone); 596163816Smjacob /* Wide negotiation forces async */ 597163816Smjacob sdtrdone &= ~target_mask; 598163816Smjacob adw_lram_write_16(adw, 599163816Smjacob ADW_MC_SDTR_DONE, 600163816Smjacob sdtrdone); 601163816Smjacob } 602163816Smjacob } 603163816Smjacob 604163816Smjacob if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) 605163816Smjacob || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) { 606163816Smjacob u_int sdtr_orig; 607163816Smjacob u_int sdtr; 608163816Smjacob u_int sdtrable_orig; 609163816Smjacob u_int sdtrable; 610163816Smjacob 611163816Smjacob sdtr = adw_get_chip_sdtr(adw, 612163816Smjacob ccb->ccb_h.target_id); 613163816Smjacob sdtr_orig = sdtr; 614163816Smjacob sdtrable = adw_lram_read_16(adw, 615163816Smjacob ADW_MC_SDTR_ABLE); 616163816Smjacob sdtrable_orig = sdtrable; 617163816Smjacob 618163816Smjacob if ((spi->valid 619163816Smjacob & CTS_SPI_VALID_SYNC_RATE) != 0) { 620163816Smjacob 621163816Smjacob sdtr = 622163816Smjacob adw_find_sdtr(adw, 623163816Smjacob spi->sync_period); 624163816Smjacob } 625163816Smjacob 626163816Smjacob if ((spi->valid 627163816Smjacob & CTS_SPI_VALID_SYNC_OFFSET) != 0) { 628163816Smjacob if (spi->sync_offset == 0) 629163816Smjacob sdtr = ADW_MC_SDTR_ASYNC; 630163816Smjacob } 631163816Smjacob 632163816Smjacob if (sdtr == ADW_MC_SDTR_ASYNC) 633163816Smjacob sdtrable &= ~target_mask; 634163816Smjacob else 635163816Smjacob sdtrable |= target_mask; 636163816Smjacob if (sdtr != sdtr_orig 637163816Smjacob || sdtrable != sdtrable_orig) { 638163816Smjacob adw_set_chip_sdtr(adw, 639163816Smjacob ccb->ccb_h.target_id, 640163816Smjacob sdtr); 641163816Smjacob sdtrdone &= ~target_mask; 642163816Smjacob adw_lram_write_16(adw, ADW_MC_SDTR_ABLE, 643163816Smjacob sdtrable); 644163816Smjacob adw_lram_write_16(adw, ADW_MC_SDTR_DONE, 645163816Smjacob sdtrdone); 646163816Smjacob 647163816Smjacob } 648163816Smjacob } 649163816Smjacob } 65040024Sgibbs splx(s); 65140024Sgibbs ccb->ccb_h.status = CAM_REQ_CMP; 65240024Sgibbs xpt_done(ccb); 65340024Sgibbs break; 65440024Sgibbs } 65540024Sgibbs case XPT_GET_TRAN_SETTINGS: 65640024Sgibbs /* Get default/user set transfer settings for the target */ 65740024Sgibbs { 658163816Smjacob struct ccb_trans_settings_scsi *scsi; 659163816Smjacob struct ccb_trans_settings_spi *spi; 66040024Sgibbs struct ccb_trans_settings *cts; 66140024Sgibbs u_int target_mask; 66240024Sgibbs 66340024Sgibbs cts = &ccb->cts; 66440024Sgibbs target_mask = 0x01 << ccb->ccb_h.target_id; 665163816Smjacob cts->protocol = PROTO_SCSI; 666163816Smjacob cts->protocol_version = SCSI_REV_2; 667163816Smjacob cts->transport = XPORT_SPI; 668163816Smjacob cts->transport_version = 2; 669163816Smjacob 670163816Smjacob scsi = &cts->proto_specific.scsi; 671163816Smjacob spi = &cts->xport_specific.spi; 672163816Smjacob if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 67356979Sgibbs u_int mc_sdtr; 67456979Sgibbs 675163816Smjacob spi->flags = 0; 676163816Smjacob if ((adw->user_discenb & target_mask) != 0) 677163816Smjacob spi->flags |= CTS_SPI_FLAGS_DISC_ENB; 678163816Smjacob 679163816Smjacob if ((adw->user_tagenb & target_mask) != 0) 680163816Smjacob scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB; 681163816Smjacob 682163816Smjacob if ((adw->user_wdtr & target_mask) != 0) 683163816Smjacob spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 684163816Smjacob else 685163816Smjacob spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT; 686163816Smjacob 687163816Smjacob mc_sdtr = adw_get_user_sdtr(adw, ccb->ccb_h.target_id); 688163816Smjacob spi->sync_period = adw_find_period(adw, mc_sdtr); 689163816Smjacob if (spi->sync_period != 0) 690163816Smjacob spi->sync_offset = 15; /* XXX ??? */ 691163816Smjacob else 692163816Smjacob spi->sync_offset = 0; 693163816Smjacob 694163816Smjacob 695163816Smjacob } else { 696163816Smjacob u_int targ_tinfo; 697163816Smjacob 698163816Smjacob spi->flags = 0; 699163816Smjacob if ((adw_lram_read_16(adw, ADW_MC_DISC_ENABLE) 700163816Smjacob & target_mask) != 0) 701163816Smjacob spi->flags |= CTS_SPI_FLAGS_DISC_ENB; 702163816Smjacob 703163816Smjacob if ((adw->tagenb & target_mask) != 0) 704163816Smjacob scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB; 705163816Smjacob 706163816Smjacob targ_tinfo = 707163816Smjacob adw_lram_read_16(adw, 708163816Smjacob ADW_MC_DEVICE_HSHK_CFG_TABLE 709163816Smjacob + (2 * ccb->ccb_h.target_id)); 710163816Smjacob 711163816Smjacob if ((targ_tinfo & ADW_HSHK_CFG_WIDE_XFR) != 0) 712163816Smjacob spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 713163816Smjacob else 714163816Smjacob spi->bus_width = MSG_EXT_WDTR_BUS_8_BIT; 715163816Smjacob 716163816Smjacob spi->sync_period = 717163816Smjacob adw_hshk_cfg_period_factor(targ_tinfo); 718163816Smjacob 719163816Smjacob spi->sync_offset = targ_tinfo & ADW_HSHK_CFG_OFFSET; 720163816Smjacob if (spi->sync_period == 0) 721163816Smjacob spi->sync_offset = 0; 722163816Smjacob 723163816Smjacob if (spi->sync_offset == 0) 724163816Smjacob spi->sync_period = 0; 725163816Smjacob } 726163816Smjacob 727163816Smjacob spi->valid = CTS_SPI_VALID_SYNC_RATE 728163816Smjacob | CTS_SPI_VALID_SYNC_OFFSET 729163816Smjacob | CTS_SPI_VALID_BUS_WIDTH 730163816Smjacob | CTS_SPI_VALID_DISC; 731163816Smjacob scsi->valid = CTS_SCSI_VALID_TQ; 73240024Sgibbs ccb->ccb_h.status = CAM_REQ_CMP; 73340024Sgibbs xpt_done(ccb); 73440024Sgibbs break; 73540024Sgibbs } 73640024Sgibbs case XPT_CALC_GEOMETRY: 73740024Sgibbs { 73840024Sgibbs /* 73940024Sgibbs * XXX Use Adaptec translation until I find out how to 74040024Sgibbs * get this information from the card. 74140024Sgibbs */ 742116351Snjl cam_calc_geometry(&ccb->ccg, /*extended*/1); 74340024Sgibbs xpt_done(ccb); 74440024Sgibbs break; 74540024Sgibbs } 74640024Sgibbs case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 74740024Sgibbs { 74857679Sgibbs int failure; 74940024Sgibbs 75057679Sgibbs failure = adw_reset_bus(adw); 75157679Sgibbs if (failure != 0) { 75240024Sgibbs ccb->ccb_h.status = CAM_REQ_CMP_ERR; 75357679Sgibbs } else { 75457679Sgibbs if (bootverbose) { 75557679Sgibbs xpt_print_path(adw->path); 75657679Sgibbs printf("Bus Reset Delivered\n"); 75757679Sgibbs } 75857679Sgibbs ccb->ccb_h.status = CAM_REQ_CMP; 75956979Sgibbs } 76040024Sgibbs xpt_done(ccb); 76140024Sgibbs break; 76240024Sgibbs } 76340024Sgibbs case XPT_TERM_IO: /* Terminate the I/O process */ 76440024Sgibbs /* XXX Implement */ 76540024Sgibbs ccb->ccb_h.status = CAM_REQ_INVALID; 76640024Sgibbs xpt_done(ccb); 76740024Sgibbs break; 76840024Sgibbs case XPT_PATH_INQ: /* Path routing inquiry */ 76940024Sgibbs { 77040024Sgibbs struct ccb_pathinq *cpi = &ccb->cpi; 77140024Sgibbs 77240024Sgibbs cpi->version_num = 1; 77340024Sgibbs cpi->hba_inquiry = PI_WIDE_16|PI_SDTR_ABLE|PI_TAG_ABLE; 77440024Sgibbs cpi->target_sprt = 0; 77540024Sgibbs cpi->hba_misc = 0; 77640024Sgibbs cpi->hba_eng_cnt = 0; 77740024Sgibbs cpi->max_target = ADW_MAX_TID; 77840024Sgibbs cpi->max_lun = ADW_MAX_LUN; 77940024Sgibbs cpi->initiator_id = adw->initiator_id; 78040024Sgibbs cpi->bus_id = cam_sim_bus(sim); 78146581Sken cpi->base_transfer_speed = 3300; 78240024Sgibbs strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 78340024Sgibbs strncpy(cpi->hba_vid, "AdvanSys", HBA_IDLEN); 78440024Sgibbs strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 78540024Sgibbs cpi->unit_number = cam_sim_unit(sim); 786163816Smjacob cpi->transport = XPORT_SPI; 787163816Smjacob cpi->transport_version = 2; 788163816Smjacob cpi->protocol = PROTO_SCSI; 789163816Smjacob cpi->protocol_version = SCSI_REV_2; 79040024Sgibbs cpi->ccb_h.status = CAM_REQ_CMP; 79140024Sgibbs xpt_done(ccb); 79240024Sgibbs break; 79340024Sgibbs } 79440024Sgibbs default: 79540024Sgibbs ccb->ccb_h.status = CAM_REQ_INVALID; 79640024Sgibbs xpt_done(ccb); 79740024Sgibbs break; 79840024Sgibbs } 79940024Sgibbs} 80040024Sgibbs 80140024Sgibbsstatic void 80240024Sgibbsadw_poll(struct cam_sim *sim) 80340024Sgibbs{ 80440024Sgibbs adw_intr(cam_sim_softc(sim)); 80540024Sgibbs} 80640024Sgibbs 80740024Sgibbsstatic void 80840024Sgibbsadw_async(void *callback_arg, u_int32_t code, struct cam_path *path, void *arg) 80940024Sgibbs{ 81040024Sgibbs} 81140024Sgibbs 81240024Sgibbsstruct adw_softc * 81356979Sgibbsadw_alloc(device_t dev, struct resource *regs, int regs_type, int regs_id) 81440024Sgibbs{ 81540024Sgibbs struct adw_softc *adw; 81640024Sgibbs int i; 81740024Sgibbs 81840024Sgibbs /* 81940024Sgibbs * Allocate a storage area for us 82040024Sgibbs */ 82167888Sdwmalone adw = malloc(sizeof(struct adw_softc), M_DEVBUF, M_NOWAIT | M_ZERO); 82240024Sgibbs if (adw == NULL) { 82356979Sgibbs printf("adw%d: cannot malloc!\n", device_get_unit(dev)); 82440024Sgibbs return NULL; 82540024Sgibbs } 82640024Sgibbs LIST_INIT(&adw->pending_ccbs); 82740024Sgibbs SLIST_INIT(&adw->sg_maps); 82856979Sgibbs adw->device = dev; 82956979Sgibbs adw->unit = device_get_unit(dev); 83056979Sgibbs adw->regs_res_type = regs_type; 83156979Sgibbs adw->regs_res_id = regs_id; 83256979Sgibbs adw->regs = regs; 83356979Sgibbs adw->tag = rman_get_bustag(regs); 83456979Sgibbs adw->bsh = rman_get_bushandle(regs); 83540024Sgibbs i = adw->unit / 10; 83640024Sgibbs adw->name = malloc(sizeof("adw") + i + 1, M_DEVBUF, M_NOWAIT); 83740024Sgibbs if (adw->name == NULL) { 83856979Sgibbs printf("adw%d: cannot malloc name!\n", adw->unit); 83940024Sgibbs free(adw, M_DEVBUF); 84040024Sgibbs return NULL; 84140024Sgibbs } 84240024Sgibbs sprintf(adw->name, "adw%d", adw->unit); 84340024Sgibbs return(adw); 84440024Sgibbs} 84540024Sgibbs 84640024Sgibbsvoid 84740024Sgibbsadw_free(struct adw_softc *adw) 84840024Sgibbs{ 84940024Sgibbs switch (adw->init_level) { 85056979Sgibbs case 9: 85140024Sgibbs { 85240024Sgibbs struct sg_map_node *sg_map; 85340024Sgibbs 85440024Sgibbs while ((sg_map = SLIST_FIRST(&adw->sg_maps)) != NULL) { 85540024Sgibbs SLIST_REMOVE_HEAD(&adw->sg_maps, links); 85640024Sgibbs bus_dmamap_unload(adw->sg_dmat, 85740024Sgibbs sg_map->sg_dmamap); 85840024Sgibbs bus_dmamem_free(adw->sg_dmat, sg_map->sg_vaddr, 85940024Sgibbs sg_map->sg_dmamap); 86040024Sgibbs free(sg_map, M_DEVBUF); 86140024Sgibbs } 86240024Sgibbs bus_dma_tag_destroy(adw->sg_dmat); 86340024Sgibbs } 86456979Sgibbs case 8: 86540024Sgibbs bus_dmamap_unload(adw->acb_dmat, adw->acb_dmamap); 86656979Sgibbs case 7: 86740024Sgibbs bus_dmamem_free(adw->acb_dmat, adw->acbs, 86840024Sgibbs adw->acb_dmamap); 86940024Sgibbs bus_dmamap_destroy(adw->acb_dmat, adw->acb_dmamap); 87056979Sgibbs case 6: 87156979Sgibbs bus_dma_tag_destroy(adw->acb_dmat); 87256979Sgibbs case 5: 87356979Sgibbs bus_dmamap_unload(adw->carrier_dmat, adw->carrier_dmamap); 87456979Sgibbs case 4: 87556979Sgibbs bus_dmamem_free(adw->carrier_dmat, adw->carriers, 87656979Sgibbs adw->carrier_dmamap); 87756979Sgibbs bus_dmamap_destroy(adw->carrier_dmat, adw->carrier_dmamap); 87840024Sgibbs case 3: 87956979Sgibbs bus_dma_tag_destroy(adw->carrier_dmat); 88040024Sgibbs case 2: 88140024Sgibbs bus_dma_tag_destroy(adw->buffer_dmat); 88240024Sgibbs case 1: 88340024Sgibbs bus_dma_tag_destroy(adw->parent_dmat); 88440024Sgibbs case 0: 88540024Sgibbs break; 88640024Sgibbs } 887138502Srsm 888138502Srsm if (adw->regs != NULL) 889138502Srsm bus_release_resource(adw->device, 890138502Srsm adw->regs_res_type, 891138502Srsm adw->regs_res_id, 892138502Srsm adw->regs); 893138502Srsm 894138502Srsm if (adw->irq != NULL) 895138502Srsm bus_release_resource(adw->device, 896138502Srsm adw->irq_res_type, 897138502Srsm 0, adw->irq); 898138502Srsm 899138502Srsm if (adw->sim != NULL) { 900138502Srsm if (adw->path != NULL) { 901138502Srsm xpt_async(AC_LOST_DEVICE, adw->path, NULL); 902138502Srsm xpt_free_path(adw->path); 903138502Srsm } 904138502Srsm xpt_bus_deregister(cam_sim_path(adw->sim)); 905138502Srsm cam_sim_free(adw->sim, /*free_devq*/TRUE); 906138502Srsm } 90740024Sgibbs free(adw->name, M_DEVBUF); 90840024Sgibbs free(adw, M_DEVBUF); 90940024Sgibbs} 91040024Sgibbs 91140024Sgibbsint 91240024Sgibbsadw_init(struct adw_softc *adw) 91340024Sgibbs{ 91440024Sgibbs struct adw_eeprom eep_config; 91556979Sgibbs u_int tid; 91656979Sgibbs u_int i; 91740024Sgibbs u_int16_t checksum; 91840024Sgibbs u_int16_t scsicfg1; 91940024Sgibbs 92040024Sgibbs checksum = adw_eeprom_read(adw, &eep_config); 92140024Sgibbs bcopy(eep_config.serial_number, adw->serial_number, 92240024Sgibbs sizeof(adw->serial_number)); 92340024Sgibbs if (checksum != eep_config.checksum) { 92440024Sgibbs u_int16_t serial_number[3]; 92540024Sgibbs 92656979Sgibbs adw->flags |= ADW_EEPROM_FAILED; 92740024Sgibbs printf("%s: EEPROM checksum failed. Restoring Defaults\n", 92840024Sgibbs adw_name(adw)); 92940024Sgibbs 93040024Sgibbs /* 93140024Sgibbs * Restore the default EEPROM settings. 93240024Sgibbs * Assume the 6 byte board serial number that was read 93340024Sgibbs * from EEPROM is correct even if the EEPROM checksum 93440024Sgibbs * failed. 93540024Sgibbs */ 93656979Sgibbs bcopy(adw->default_eeprom, &eep_config, sizeof(eep_config)); 93740024Sgibbs bcopy(adw->serial_number, eep_config.serial_number, 93840024Sgibbs sizeof(serial_number)); 93940024Sgibbs adw_eeprom_write(adw, &eep_config); 94040024Sgibbs } 94140024Sgibbs 94240024Sgibbs /* Pull eeprom information into our softc. */ 94340024Sgibbs adw->bios_ctrl = eep_config.bios_ctrl; 94440024Sgibbs adw->user_wdtr = eep_config.wdtr_able; 94556979Sgibbs for (tid = 0; tid < ADW_MAX_TID; tid++) { 94656979Sgibbs u_int mc_sdtr; 94756979Sgibbs u_int16_t tid_mask; 94856979Sgibbs 94956979Sgibbs tid_mask = 0x1 << tid; 95056979Sgibbs if ((adw->features & ADW_ULTRA) != 0) { 95156979Sgibbs /* 95256979Sgibbs * Ultra chips store sdtr and ultraenb 95356979Sgibbs * bits in their seeprom, so we must 95456979Sgibbs * construct valid mc_sdtr entries for 95556979Sgibbs * indirectly. 95656979Sgibbs */ 95756979Sgibbs if (eep_config.sync1.sync_enable & tid_mask) { 95856979Sgibbs if (eep_config.sync2.ultra_enable & tid_mask) 95956979Sgibbs mc_sdtr = ADW_MC_SDTR_20; 96056979Sgibbs else 96156979Sgibbs mc_sdtr = ADW_MC_SDTR_10; 96256979Sgibbs } else 96356979Sgibbs mc_sdtr = ADW_MC_SDTR_ASYNC; 96456979Sgibbs } else { 96556979Sgibbs switch (ADW_TARGET_GROUP(tid)) { 96656979Sgibbs case 3: 96756979Sgibbs mc_sdtr = eep_config.sync4.sdtr4; 96856979Sgibbs break; 96956979Sgibbs case 2: 97056979Sgibbs mc_sdtr = eep_config.sync3.sdtr3; 97156979Sgibbs break; 97256979Sgibbs case 1: 97356979Sgibbs mc_sdtr = eep_config.sync2.sdtr2; 97456979Sgibbs break; 97556979Sgibbs default: /* Shut up compiler */ 97656979Sgibbs case 0: 97756979Sgibbs mc_sdtr = eep_config.sync1.sdtr1; 97856979Sgibbs break; 97956979Sgibbs } 98056979Sgibbs mc_sdtr >>= ADW_TARGET_GROUP_SHIFT(tid); 98156979Sgibbs mc_sdtr &= 0xFF; 98256979Sgibbs } 98356979Sgibbs adw_set_user_sdtr(adw, tid, mc_sdtr); 98456979Sgibbs } 98540024Sgibbs adw->user_tagenb = eep_config.tagqng_able; 98640024Sgibbs adw->user_discenb = eep_config.disc_enable; 98740024Sgibbs adw->max_acbs = eep_config.max_host_qng; 98840024Sgibbs adw->initiator_id = (eep_config.adapter_scsi_id & ADW_MAX_TID); 98940024Sgibbs 99040024Sgibbs /* 99140024Sgibbs * Sanity check the number of host openings. 99240024Sgibbs */ 99340024Sgibbs if (adw->max_acbs > ADW_DEF_MAX_HOST_QNG) 99440024Sgibbs adw->max_acbs = ADW_DEF_MAX_HOST_QNG; 99540024Sgibbs else if (adw->max_acbs < ADW_DEF_MIN_HOST_QNG) { 99640024Sgibbs /* If the value is zero, assume it is uninitialized. */ 99740024Sgibbs if (adw->max_acbs == 0) 99840024Sgibbs adw->max_acbs = ADW_DEF_MAX_HOST_QNG; 99940024Sgibbs else 100040024Sgibbs adw->max_acbs = ADW_DEF_MIN_HOST_QNG; 100140024Sgibbs } 100240024Sgibbs 100340024Sgibbs scsicfg1 = 0; 100456979Sgibbs if ((adw->features & ADW_ULTRA2) != 0) { 100556979Sgibbs switch (eep_config.termination_lvd) { 100656979Sgibbs default: 100756979Sgibbs printf("%s: Invalid EEPROM LVD Termination Settings.\n", 100856979Sgibbs adw_name(adw)); 100956979Sgibbs printf("%s: Reverting to Automatic LVD Termination\n", 101056979Sgibbs adw_name(adw)); 101156979Sgibbs /* FALLTHROUGH */ 101256979Sgibbs case ADW_EEPROM_TERM_AUTO: 101356979Sgibbs break; 101456979Sgibbs case ADW_EEPROM_TERM_BOTH_ON: 101556979Sgibbs scsicfg1 |= ADW2_SCSI_CFG1_TERM_LVD_LO; 101656979Sgibbs /* FALLTHROUGH */ 101756979Sgibbs case ADW_EEPROM_TERM_HIGH_ON: 101856979Sgibbs scsicfg1 |= ADW2_SCSI_CFG1_TERM_LVD_HI; 101956979Sgibbs /* FALLTHROUGH */ 102056979Sgibbs case ADW_EEPROM_TERM_OFF: 102156979Sgibbs scsicfg1 |= ADW2_SCSI_CFG1_DIS_TERM_DRV; 102256979Sgibbs break; 102356979Sgibbs } 102456979Sgibbs } 102556979Sgibbs 102656979Sgibbs switch (eep_config.termination_se) { 102740024Sgibbs default: 102856979Sgibbs printf("%s: Invalid SE EEPROM Termination Settings.\n", 102940024Sgibbs adw_name(adw)); 103056979Sgibbs printf("%s: Reverting to Automatic SE Termination\n", 103140024Sgibbs adw_name(adw)); 103240024Sgibbs /* FALLTHROUGH */ 103340024Sgibbs case ADW_EEPROM_TERM_AUTO: 103440024Sgibbs break; 103540024Sgibbs case ADW_EEPROM_TERM_BOTH_ON: 103640024Sgibbs scsicfg1 |= ADW_SCSI_CFG1_TERM_CTL_L; 103740024Sgibbs /* FALLTHROUGH */ 103840024Sgibbs case ADW_EEPROM_TERM_HIGH_ON: 103940024Sgibbs scsicfg1 |= ADW_SCSI_CFG1_TERM_CTL_H; 104040024Sgibbs /* FALLTHROUGH */ 104140024Sgibbs case ADW_EEPROM_TERM_OFF: 104240024Sgibbs scsicfg1 |= ADW_SCSI_CFG1_TERM_CTL_MANUAL; 104340024Sgibbs break; 104440024Sgibbs } 104540024Sgibbs printf("%s: SCSI ID %d, ", adw_name(adw), adw->initiator_id); 104640024Sgibbs 104740024Sgibbs /* DMA tag for mapping buffers into device visible space. */ 1048112782Smdodd if (bus_dma_tag_create( 1049112782Smdodd /* parent */ adw->parent_dmat, 1050112782Smdodd /* alignment */ 1, 1051112782Smdodd /* boundary */ 0, 1052112782Smdodd /* lowaddr */ BUS_SPACE_MAXADDR_32BIT, 1053112782Smdodd /* highaddr */ BUS_SPACE_MAXADDR, 1054112782Smdodd /* filter */ NULL, 1055112782Smdodd /* filterarg */ NULL, 1056112782Smdodd /* maxsize */ MAXBSIZE, 1057112782Smdodd /* nsegments */ ADW_SGSIZE, 1058112782Smdodd /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 1059112782Smdodd /* flags */ BUS_DMA_ALLOCNOW, 1060117126Sscottl /* lockfunc */ busdma_lock_mutex, 1061117126Sscottl /* lockarg */ &Giant, 1062112782Smdodd &adw->buffer_dmat) != 0) { 106356979Sgibbs return (ENOMEM); 106440024Sgibbs } 106540024Sgibbs 106640024Sgibbs adw->init_level++; 106740024Sgibbs 106856979Sgibbs /* DMA tag for our ccb carrier structures */ 1069112782Smdodd if (bus_dma_tag_create( 1070112782Smdodd /* parent */ adw->parent_dmat, 1071112782Smdodd /* alignment */ 0x10, 1072112782Smdodd /* boundary */ 0, 1073112782Smdodd /* lowaddr */ BUS_SPACE_MAXADDR_32BIT, 1074112782Smdodd /* highaddr */ BUS_SPACE_MAXADDR, 1075112782Smdodd /* filter */ NULL, 1076112782Smdodd /* filterarg */ NULL, 1077112782Smdodd /* maxsize */ (adw->max_acbs + 1078112782Smdodd ADW_NUM_CARRIER_QUEUES + 1) * 1079112782Smdodd sizeof(struct adw_carrier), 1080112782Smdodd /* nsegments */ 1, 1081112782Smdodd /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 1082112782Smdodd /* flags */ 0, 1083117126Sscottl /* lockfunc */ busdma_lock_mutex, 1084117126Sscottl /* lockarg */ &Giant, 1085112782Smdodd &adw->carrier_dmat) != 0) { 108656979Sgibbs return (ENOMEM); 108756979Sgibbs } 108856979Sgibbs 108956979Sgibbs adw->init_level++; 109056979Sgibbs 109156979Sgibbs /* Allocation for our ccb carrier structures */ 109256979Sgibbs if (bus_dmamem_alloc(adw->carrier_dmat, (void **)&adw->carriers, 109356979Sgibbs BUS_DMA_NOWAIT, &adw->carrier_dmamap) != 0) { 109456979Sgibbs return (ENOMEM); 109556979Sgibbs } 109656979Sgibbs 109756979Sgibbs adw->init_level++; 109856979Sgibbs 109956979Sgibbs /* And permanently map them */ 110056979Sgibbs bus_dmamap_load(adw->carrier_dmat, adw->carrier_dmamap, 110156979Sgibbs adw->carriers, 110256979Sgibbs (adw->max_acbs + ADW_NUM_CARRIER_QUEUES + 1) 110356979Sgibbs * sizeof(struct adw_carrier), 110456979Sgibbs adwmapmem, &adw->carrier_busbase, /*flags*/0); 110556979Sgibbs 110656979Sgibbs /* Clear them out. */ 110756979Sgibbs bzero(adw->carriers, (adw->max_acbs + ADW_NUM_CARRIER_QUEUES + 1) 110856979Sgibbs * sizeof(struct adw_carrier)); 110956979Sgibbs 111056979Sgibbs /* Setup our free carrier list */ 111156979Sgibbs adw->free_carriers = adw->carriers; 111256979Sgibbs for (i = 0; i < adw->max_acbs + ADW_NUM_CARRIER_QUEUES; i++) { 111356979Sgibbs adw->carriers[i].carr_offset = 111456979Sgibbs carriervtobo(adw, &adw->carriers[i]); 111556979Sgibbs adw->carriers[i].carr_ba = 111656979Sgibbs carriervtob(adw, &adw->carriers[i]); 111756979Sgibbs adw->carriers[i].areq_ba = 0; 111856979Sgibbs adw->carriers[i].next_ba = 111956979Sgibbs carriervtobo(adw, &adw->carriers[i+1]); 112056979Sgibbs } 112156979Sgibbs /* Terminal carrier. Never leaves the freelist */ 112256979Sgibbs adw->carriers[i].carr_offset = 112356979Sgibbs carriervtobo(adw, &adw->carriers[i]); 112456979Sgibbs adw->carriers[i].carr_ba = 112556979Sgibbs carriervtob(adw, &adw->carriers[i]); 112656979Sgibbs adw->carriers[i].areq_ba = 0; 112756979Sgibbs adw->carriers[i].next_ba = ~0; 112856979Sgibbs 112956979Sgibbs adw->init_level++; 113056979Sgibbs 113156979Sgibbs /* DMA tag for our acb structures */ 1132112782Smdodd if (bus_dma_tag_create( 1133112782Smdodd /* parent */ adw->parent_dmat, 1134112782Smdodd /* alignment */ 1, 1135112782Smdodd /* boundary */ 0, 1136112782Smdodd /* lowaddr */ BUS_SPACE_MAXADDR, 1137112782Smdodd /* highaddr */ BUS_SPACE_MAXADDR, 1138112782Smdodd /* filter */ NULL, 1139112782Smdodd /* filterarg */ NULL, 1140112782Smdodd /* maxsize */ adw->max_acbs * sizeof(struct acb), 1141112782Smdodd /* nsegments */ 1, 1142112782Smdodd /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 1143112782Smdodd /* flags */ 0, 1144117126Sscottl /* lockfunc */ busdma_lock_mutex, 1145117126Sscottl /* lockarg */ &Giant, 1146112782Smdodd &adw->acb_dmat) != 0) { 114756979Sgibbs return (ENOMEM); 114840024Sgibbs } 114940024Sgibbs 115040024Sgibbs adw->init_level++; 115140024Sgibbs 115240024Sgibbs /* Allocation for our ccbs */ 115340024Sgibbs if (bus_dmamem_alloc(adw->acb_dmat, (void **)&adw->acbs, 115456979Sgibbs BUS_DMA_NOWAIT, &adw->acb_dmamap) != 0) 115556979Sgibbs return (ENOMEM); 115640024Sgibbs 115740024Sgibbs adw->init_level++; 115840024Sgibbs 115940024Sgibbs /* And permanently map them */ 116040024Sgibbs bus_dmamap_load(adw->acb_dmat, adw->acb_dmamap, 116140024Sgibbs adw->acbs, 116240024Sgibbs adw->max_acbs * sizeof(struct acb), 116340024Sgibbs adwmapmem, &adw->acb_busbase, /*flags*/0); 116440024Sgibbs 116540024Sgibbs /* Clear them out. */ 116640024Sgibbs bzero(adw->acbs, adw->max_acbs * sizeof(struct acb)); 116740024Sgibbs 116840024Sgibbs /* DMA tag for our S/G structures. We allocate in page sized chunks */ 1169112782Smdodd if (bus_dma_tag_create( 1170112782Smdodd /* parent */ adw->parent_dmat, 1171112782Smdodd /* alignment */ 1, 1172112782Smdodd /* boundary */ 0, 1173112782Smdodd /* lowaddr */ BUS_SPACE_MAXADDR, 1174112782Smdodd /* highaddr */ BUS_SPACE_MAXADDR, 1175112782Smdodd /* filter */ NULL, 1176112782Smdodd /* filterarg */ NULL, 1177112782Smdodd /* maxsize */ PAGE_SIZE, 1178112782Smdodd /* nsegments */ 1, 1179112782Smdodd /* maxsegsz */ BUS_SPACE_MAXSIZE_32BIT, 1180112782Smdodd /* flags */ 0, 1181117126Sscottl /* lockfunc */ busdma_lock_mutex, 1182117126Sscottl /* lockarg */ &Giant, 1183112782Smdodd &adw->sg_dmat) != 0) { 118456979Sgibbs return (ENOMEM); 118540024Sgibbs } 118640024Sgibbs 118740024Sgibbs adw->init_level++; 118840024Sgibbs 118940024Sgibbs /* Allocate our first batch of ccbs */ 119040024Sgibbs if (adwallocacbs(adw) == 0) 119156979Sgibbs return (ENOMEM); 119240024Sgibbs 119356979Sgibbs if (adw_init_chip(adw, scsicfg1) != 0) 119456979Sgibbs return (ENXIO); 119556979Sgibbs 119656979Sgibbs printf("Queue Depth %d\n", adw->max_acbs); 119756979Sgibbs 119840024Sgibbs return (0); 119940024Sgibbs} 120040024Sgibbs 120140024Sgibbs/* 120240024Sgibbs * Attach all the sub-devices we can find 120340024Sgibbs */ 120440024Sgibbsint 120540024Sgibbsadw_attach(struct adw_softc *adw) 120640024Sgibbs{ 120740024Sgibbs struct ccb_setasync csa; 120840024Sgibbs struct cam_devq *devq; 120956979Sgibbs int s; 121056979Sgibbs int error; 121140024Sgibbs 121256979Sgibbs error = 0; 121356979Sgibbs s = splcam(); 121456979Sgibbs /* Hook up our interrupt handler */ 121573280Smarkm if ((error = bus_setup_intr(adw->device, adw->irq, 121673280Smarkm INTR_TYPE_CAM | INTR_ENTROPY, adw_intr, 121773280Smarkm adw, &adw->ih)) != 0) { 121856979Sgibbs device_printf(adw->device, "bus_setup_intr() failed: %d\n", 121956979Sgibbs error); 122056979Sgibbs goto fail; 122156979Sgibbs } 122256979Sgibbs 122340024Sgibbs /* Start the Risc processor now that we are fully configured. */ 122440024Sgibbs adw_outw(adw, ADW_RISC_CSR, ADW_RISC_CSR_RUN); 122540024Sgibbs 122640024Sgibbs /* 122740024Sgibbs * Create the device queue for our SIM. 122840024Sgibbs */ 122940024Sgibbs devq = cam_simq_alloc(adw->max_acbs); 123040024Sgibbs if (devq == NULL) 123156979Sgibbs return (ENOMEM); 123240024Sgibbs 123340024Sgibbs /* 123440024Sgibbs * Construct our SIM entry. 123540024Sgibbs */ 123640024Sgibbs adw->sim = cam_sim_alloc(adw_action, adw_poll, "adw", adw, adw->unit, 123740024Sgibbs 1, adw->max_acbs, devq); 123856979Sgibbs if (adw->sim == NULL) { 123956979Sgibbs error = ENOMEM; 124056979Sgibbs goto fail; 124156979Sgibbs } 124240024Sgibbs 124340024Sgibbs /* 124440024Sgibbs * Register the bus. 124540024Sgibbs */ 124640024Sgibbs if (xpt_bus_register(adw->sim, 0) != CAM_SUCCESS) { 124740024Sgibbs cam_sim_free(adw->sim, /*free devq*/TRUE); 124856979Sgibbs error = ENOMEM; 124956979Sgibbs goto fail; 125040024Sgibbs } 125140024Sgibbs 125240024Sgibbs if (xpt_create_path(&adw->path, /*periph*/NULL, cam_sim_path(adw->sim), 125340024Sgibbs CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) 125440024Sgibbs == CAM_REQ_CMP) { 125540024Sgibbs xpt_setup_ccb(&csa.ccb_h, adw->path, /*priority*/5); 125640024Sgibbs csa.ccb_h.func_code = XPT_SASYNC_CB; 125740024Sgibbs csa.event_enable = AC_LOST_DEVICE; 125840024Sgibbs csa.callback = adw_async; 125940024Sgibbs csa.callback_arg = adw; 126040024Sgibbs xpt_action((union ccb *)&csa); 126140024Sgibbs } 126240024Sgibbs 126356979Sgibbsfail: 126456979Sgibbs splx(s); 126556979Sgibbs return (error); 126640024Sgibbs} 126740024Sgibbs 126840024Sgibbsvoid 126940024Sgibbsadw_intr(void *arg) 127040024Sgibbs{ 127140024Sgibbs struct adw_softc *adw; 127240024Sgibbs u_int int_stat; 127340024Sgibbs 127440024Sgibbs adw = (struct adw_softc *)arg; 127540024Sgibbs if ((adw_inw(adw, ADW_CTRL_REG) & ADW_CTRL_REG_HOST_INTR) == 0) 127640024Sgibbs return; 127740024Sgibbs 127840024Sgibbs /* Reading the register clears the interrupt. */ 127940024Sgibbs int_stat = adw_inb(adw, ADW_INTR_STATUS_REG); 128040024Sgibbs 128140024Sgibbs if ((int_stat & ADW_INTR_STATUS_INTRB) != 0) { 128256979Sgibbs u_int intrb_code; 128356979Sgibbs 128456979Sgibbs /* Async Microcode Event */ 128556979Sgibbs intrb_code = adw_lram_read_8(adw, ADW_MC_INTRB_CODE); 128656979Sgibbs switch (intrb_code) { 128756979Sgibbs case ADW_ASYNC_CARRIER_READY_FAILURE: 128856979Sgibbs /* 128956979Sgibbs * The RISC missed our update of 129056979Sgibbs * the commandq. 129156979Sgibbs */ 129256979Sgibbs if (LIST_FIRST(&adw->pending_ccbs) != NULL) 129356979Sgibbs adw_tickle_risc(adw, ADW_TICKLE_A); 129440024Sgibbs break; 129556979Sgibbs case ADW_ASYNC_SCSI_BUS_RESET_DET: 129656979Sgibbs /* 129756979Sgibbs * The firmware detected a SCSI Bus reset. 129856979Sgibbs */ 129956979Sgibbs printf("Someone Reset the Bus\n"); 130056979Sgibbs adw_handle_bus_reset(adw, /*initiated*/FALSE); 130156979Sgibbs break; 130256979Sgibbs case ADW_ASYNC_RDMA_FAILURE: 130356979Sgibbs /* 130456979Sgibbs * Handle RDMA failure by resetting the 130556979Sgibbs * SCSI Bus and chip. 130656979Sgibbs */ 1307153072Sru#if 0 /* XXX */ 130856979Sgibbs AdvResetChipAndSB(adv_dvc_varp); 130956979Sgibbs#endif 131056979Sgibbs break; 131156979Sgibbs 131256979Sgibbs case ADW_ASYNC_HOST_SCSI_BUS_RESET: 131356979Sgibbs /* 131456979Sgibbs * Host generated SCSI bus reset occurred. 131556979Sgibbs */ 131640024Sgibbs adw_handle_bus_reset(adw, /*initiated*/TRUE); 131756979Sgibbs break; 131856979Sgibbs default: 131956979Sgibbs printf("adw_intr: unknown async code 0x%x\n", 132056979Sgibbs intrb_code); 132140024Sgibbs break; 132240024Sgibbs } 132340024Sgibbs } 132440024Sgibbs 132540024Sgibbs /* 132656979Sgibbs * Run down the RequestQ. 132740024Sgibbs */ 132856979Sgibbs while ((adw->responseq->next_ba & ADW_RQ_DONE) != 0) { 132956979Sgibbs struct adw_carrier *free_carrier; 133056979Sgibbs struct acb *acb; 133156979Sgibbs union ccb *ccb; 133240024Sgibbs 133356979Sgibbs#if 0 133456979Sgibbs printf("0x%x, 0x%x, 0x%x, 0x%x\n", 133556979Sgibbs adw->responseq->carr_offset, 133656979Sgibbs adw->responseq->carr_ba, 133756979Sgibbs adw->responseq->areq_ba, 133856979Sgibbs adw->responseq->next_ba); 133956979Sgibbs#endif 134056979Sgibbs /* 134156979Sgibbs * The firmware copies the adw_scsi_req_q.acb_baddr 134256979Sgibbs * field into the areq_ba field of the carrier. 134356979Sgibbs */ 134456979Sgibbs acb = acbbotov(adw, adw->responseq->areq_ba); 134540024Sgibbs 134640024Sgibbs /* 134756979Sgibbs * The least significant four bits of the next_ba 134856979Sgibbs * field are used as flags. Mask them out and then 134956979Sgibbs * advance through the list. 135040024Sgibbs */ 135156979Sgibbs free_carrier = adw->responseq; 135256979Sgibbs adw->responseq = 135356979Sgibbs carrierbotov(adw, free_carrier->next_ba & ADW_NEXT_BA_MASK); 135456979Sgibbs free_carrier->next_ba = adw->free_carriers->carr_offset; 135556979Sgibbs adw->free_carriers = free_carrier; 135640024Sgibbs 135740024Sgibbs /* Process CCB */ 135840024Sgibbs ccb = acb->ccb; 135940024Sgibbs untimeout(adwtimeout, acb, ccb->ccb_h.timeout_ch); 136040024Sgibbs if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 1361115343Sscottl bus_dmasync_op_t op; 136240024Sgibbs 136340024Sgibbs if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) 136440024Sgibbs op = BUS_DMASYNC_POSTREAD; 136540024Sgibbs else 136640024Sgibbs op = BUS_DMASYNC_POSTWRITE; 136740024Sgibbs bus_dmamap_sync(adw->buffer_dmat, acb->dmamap, op); 136840024Sgibbs bus_dmamap_unload(adw->buffer_dmat, acb->dmamap); 136940024Sgibbs ccb->csio.resid = acb->queue.data_cnt; 137040024Sgibbs } else 137140024Sgibbs ccb->csio.resid = 0; 137240024Sgibbs 137340024Sgibbs /* Common Cases inline... */ 137440024Sgibbs if (acb->queue.host_status == QHSTA_NO_ERROR 137540024Sgibbs && (acb->queue.done_status == QD_NO_ERROR 137640024Sgibbs || acb->queue.done_status == QD_WITH_ERROR)) { 137740024Sgibbs ccb->csio.scsi_status = acb->queue.scsi_status; 137840024Sgibbs ccb->ccb_h.status = 0; 137940024Sgibbs switch (ccb->csio.scsi_status) { 138040024Sgibbs case SCSI_STATUS_OK: 138140024Sgibbs ccb->ccb_h.status |= CAM_REQ_CMP; 138240024Sgibbs break; 138340024Sgibbs case SCSI_STATUS_CHECK_COND: 138440024Sgibbs case SCSI_STATUS_CMD_TERMINATED: 138540024Sgibbs bcopy(&acb->sense_data, &ccb->csio.sense_data, 138640024Sgibbs ccb->csio.sense_len); 138740024Sgibbs ccb->ccb_h.status |= CAM_AUTOSNS_VALID; 138840024Sgibbs ccb->csio.sense_resid = acb->queue.sense_len; 138940024Sgibbs /* FALLTHROUGH */ 139040024Sgibbs default: 139140024Sgibbs ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR 139240024Sgibbs | CAM_DEV_QFRZN; 139340024Sgibbs xpt_freeze_devq(ccb->ccb_h.path, /*count*/1); 139440024Sgibbs break; 139540024Sgibbs } 139640024Sgibbs adwfreeacb(adw, acb); 139740024Sgibbs xpt_done(ccb); 139840024Sgibbs } else { 139940024Sgibbs adwprocesserror(adw, acb); 140040024Sgibbs } 140140024Sgibbs } 140240024Sgibbs} 140340024Sgibbs 140440024Sgibbsstatic void 140540024Sgibbsadwprocesserror(struct adw_softc *adw, struct acb *acb) 140640024Sgibbs{ 140740024Sgibbs union ccb *ccb; 140840024Sgibbs 140940024Sgibbs ccb = acb->ccb; 141040024Sgibbs if (acb->queue.done_status == QD_ABORTED_BY_HOST) { 141140024Sgibbs ccb->ccb_h.status = CAM_REQ_ABORTED; 141240024Sgibbs } else { 141340024Sgibbs 141440024Sgibbs switch (acb->queue.host_status) { 141540024Sgibbs case QHSTA_M_SEL_TIMEOUT: 141640024Sgibbs ccb->ccb_h.status = CAM_SEL_TIMEOUT; 141740024Sgibbs break; 141840024Sgibbs case QHSTA_M_SXFR_OFF_UFLW: 141940024Sgibbs case QHSTA_M_SXFR_OFF_OFLW: 142040024Sgibbs case QHSTA_M_DATA_OVER_RUN: 142140024Sgibbs ccb->ccb_h.status = CAM_DATA_RUN_ERR; 142240024Sgibbs break; 142340024Sgibbs case QHSTA_M_SXFR_DESELECTED: 142440024Sgibbs case QHSTA_M_UNEXPECTED_BUS_FREE: 142540024Sgibbs ccb->ccb_h.status = CAM_UNEXP_BUSFREE; 142640024Sgibbs break; 142757679Sgibbs case QHSTA_M_SCSI_BUS_RESET: 142857679Sgibbs case QHSTA_M_SCSI_BUS_RESET_UNSOL: 142957679Sgibbs ccb->ccb_h.status = CAM_SCSI_BUS_RESET; 143057679Sgibbs break; 143157679Sgibbs case QHSTA_M_BUS_DEVICE_RESET: 143257679Sgibbs ccb->ccb_h.status = CAM_BDR_SENT; 143357679Sgibbs break; 143440024Sgibbs case QHSTA_M_QUEUE_ABORTED: 143540024Sgibbs /* BDR or Bus Reset */ 143657679Sgibbs printf("Saw Queue Aborted\n"); 143740024Sgibbs ccb->ccb_h.status = adw->last_reset; 143840024Sgibbs break; 143940024Sgibbs case QHSTA_M_SXFR_SDMA_ERR: 144040024Sgibbs case QHSTA_M_SXFR_SXFR_PERR: 144140024Sgibbs case QHSTA_M_RDMA_PERR: 144240024Sgibbs ccb->ccb_h.status = CAM_UNCOR_PARITY; 144340024Sgibbs break; 144440024Sgibbs case QHSTA_M_WTM_TIMEOUT: 144540024Sgibbs case QHSTA_M_SXFR_WD_TMO: 144656979Sgibbs { 144740024Sgibbs /* The SCSI bus hung in a phase */ 144857679Sgibbs xpt_print_path(adw->path); 144957679Sgibbs printf("Watch Dog timer expired. Reseting bus\n"); 145057679Sgibbs adw_reset_bus(adw); 145140024Sgibbs break; 145256979Sgibbs } 145340024Sgibbs case QHSTA_M_SXFR_XFR_PH_ERR: 145440024Sgibbs ccb->ccb_h.status = CAM_SEQUENCE_FAIL; 145540024Sgibbs break; 145640024Sgibbs case QHSTA_M_SXFR_UNKNOWN_ERROR: 145740024Sgibbs break; 145840024Sgibbs case QHSTA_M_BAD_CMPL_STATUS_IN: 145940024Sgibbs /* No command complete after a status message */ 146040024Sgibbs ccb->ccb_h.status = CAM_SEQUENCE_FAIL; 146140024Sgibbs break; 146240024Sgibbs case QHSTA_M_AUTO_REQ_SENSE_FAIL: 146340024Sgibbs ccb->ccb_h.status = CAM_AUTOSENSE_FAIL; 146440024Sgibbs break; 146540024Sgibbs case QHSTA_M_INVALID_DEVICE: 146640024Sgibbs ccb->ccb_h.status = CAM_PATH_INVALID; 146740024Sgibbs break; 146840024Sgibbs case QHSTA_M_NO_AUTO_REQ_SENSE: 146940024Sgibbs /* 147040024Sgibbs * User didn't request sense, but we got a 147140024Sgibbs * check condition. 147240024Sgibbs */ 147340024Sgibbs ccb->csio.scsi_status = acb->queue.scsi_status; 147440024Sgibbs ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 147540024Sgibbs break; 147640024Sgibbs default: 147740024Sgibbs panic("%s: Unhandled Host status error %x", 147840024Sgibbs adw_name(adw), acb->queue.host_status); 147940024Sgibbs /* NOTREACHED */ 148040024Sgibbs } 148140024Sgibbs } 148257679Sgibbs if ((acb->state & ACB_RECOVERY_ACB) != 0) { 148357679Sgibbs if (ccb->ccb_h.status == CAM_SCSI_BUS_RESET 148457679Sgibbs || ccb->ccb_h.status == CAM_BDR_SENT) 148557679Sgibbs ccb->ccb_h.status = CAM_CMD_TIMEOUT; 148657679Sgibbs } 148740024Sgibbs if (ccb->ccb_h.status != CAM_REQ_CMP) { 148840024Sgibbs xpt_freeze_devq(ccb->ccb_h.path, /*count*/1); 148940024Sgibbs ccb->ccb_h.status |= CAM_DEV_QFRZN; 149040024Sgibbs } 149140024Sgibbs adwfreeacb(adw, acb); 149240024Sgibbs xpt_done(ccb); 149340024Sgibbs} 149440024Sgibbs 149540024Sgibbsstatic void 149640024Sgibbsadwtimeout(void *arg) 149740024Sgibbs{ 149840024Sgibbs struct acb *acb; 149940024Sgibbs union ccb *ccb; 150040024Sgibbs struct adw_softc *adw; 150140024Sgibbs adw_idle_cmd_status_t status; 150257679Sgibbs int target_id; 150340024Sgibbs int s; 150440024Sgibbs 150540024Sgibbs acb = (struct acb *)arg; 150640024Sgibbs ccb = acb->ccb; 150740024Sgibbs adw = (struct adw_softc *)ccb->ccb_h.ccb_adw_ptr; 150840024Sgibbs xpt_print_path(ccb->ccb_h.path); 150940024Sgibbs printf("ACB %p - timed out\n", (void *)acb); 151040024Sgibbs 151140024Sgibbs s = splcam(); 151240024Sgibbs 151340024Sgibbs if ((acb->state & ACB_ACTIVE) == 0) { 151440024Sgibbs xpt_print_path(ccb->ccb_h.path); 151540024Sgibbs printf("ACB %p - timed out CCB already completed\n", 151640024Sgibbs (void *)acb); 151740024Sgibbs splx(s); 151840024Sgibbs return; 151940024Sgibbs } 152040024Sgibbs 152157679Sgibbs acb->state |= ACB_RECOVERY_ACB; 152257679Sgibbs target_id = ccb->ccb_h.target_id; 152357679Sgibbs 152440024Sgibbs /* Attempt a BDR first */ 152557679Sgibbs status = adw_idle_cmd_send(adw, ADW_IDLE_CMD_DEVICE_RESET, 152657679Sgibbs ccb->ccb_h.target_id); 152740024Sgibbs splx(s); 152840024Sgibbs if (status == ADW_IDLE_CMD_SUCCESS) { 152940024Sgibbs printf("%s: BDR Delivered. No longer in timeout\n", 153040024Sgibbs adw_name(adw)); 153157679Sgibbs adw_handle_device_reset(adw, target_id); 153240024Sgibbs } else { 153357679Sgibbs adw_reset_bus(adw); 153457679Sgibbs xpt_print_path(adw->path); 153557679Sgibbs printf("Bus Reset Delivered. No longer in timeout\n"); 153640024Sgibbs } 153740024Sgibbs} 153840024Sgibbs 153940024Sgibbsstatic void 154040024Sgibbsadw_handle_device_reset(struct adw_softc *adw, u_int target) 154140024Sgibbs{ 154240024Sgibbs struct cam_path *path; 154340024Sgibbs cam_status error; 154440024Sgibbs 154540024Sgibbs error = xpt_create_path(&path, /*periph*/NULL, cam_sim_path(adw->sim), 154640024Sgibbs target, CAM_LUN_WILDCARD); 154740024Sgibbs 154840024Sgibbs if (error == CAM_REQ_CMP) { 154940024Sgibbs xpt_async(AC_SENT_BDR, path, NULL); 155040024Sgibbs xpt_free_path(path); 155140024Sgibbs } 155240024Sgibbs adw->last_reset = CAM_BDR_SENT; 155340024Sgibbs} 155440024Sgibbs 155540024Sgibbsstatic void 155640024Sgibbsadw_handle_bus_reset(struct adw_softc *adw, int initiated) 155740024Sgibbs{ 155840024Sgibbs if (initiated) { 155940024Sgibbs /* 156040024Sgibbs * The microcode currently sets the SCSI Bus Reset signal 156140024Sgibbs * while handling the AscSendIdleCmd() IDLE_CMD_SCSI_RESET 156240024Sgibbs * command above. But the SCSI Bus Reset Hold Time in the 156340024Sgibbs * microcode is not deterministic (it may in fact be for less 156440024Sgibbs * than the SCSI Spec. minimum of 25 us). Therefore on return 156540024Sgibbs * the Adv Library sets the SCSI Bus Reset signal for 156640024Sgibbs * ADW_SCSI_RESET_HOLD_TIME_US, which is defined to be greater 156740024Sgibbs * than 25 us. 156840024Sgibbs */ 156940024Sgibbs u_int scsi_ctrl; 157040024Sgibbs 157140024Sgibbs scsi_ctrl = adw_inw(adw, ADW_SCSI_CTRL) & ~ADW_SCSI_CTRL_RSTOUT; 157240024Sgibbs adw_outw(adw, ADW_SCSI_CTRL, scsi_ctrl | ADW_SCSI_CTRL_RSTOUT); 157340024Sgibbs DELAY(ADW_SCSI_RESET_HOLD_TIME_US); 157440024Sgibbs adw_outw(adw, ADW_SCSI_CTRL, scsi_ctrl); 157540024Sgibbs 157640024Sgibbs /* 157740024Sgibbs * We will perform the async notification when the 157840024Sgibbs * SCSI Reset interrupt occurs. 157940024Sgibbs */ 158040024Sgibbs } else 158140024Sgibbs xpt_async(AC_BUS_RESET, adw->path, NULL); 158240024Sgibbs adw->last_reset = CAM_SCSI_BUS_RESET; 158340024Sgibbs} 1584165102SmjacobMODULE_DEPEND(adw, cam, 1, 1, 1); 1585165102Smjacob 1586