vybrid.dtsi revision 258057
1/*- 2 * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/sys/boot/fdt/dts/vybrid.dtsi 258057 2013-11-12 18:02:56Z br $ 27 */ 28 29/ { 30 model = "Freescale Vybrid Family"; 31 compatible = "freescale,vybrid", "fsl,vf"; 32 #address-cells = <1>; 33 #size-cells = <1>; 34 35 interrupt-parent = <&GIC>; 36 37 aliases { 38 soc = &SOC; 39 serial0 = &serial0; 40 serial1 = &serial1; 41 src = &SRC; 42 }; 43 44 SOC: vybrid { 45 #address-cells = <1>; 46 #size-cells = <1>; 47 compatible = "simple-bus"; 48 ranges; 49 bus-frequency = <0>; 50 51 SRC: src@4006E000 { 52 compatible = "fsl,mvf600-src"; 53 reg = <0x4006E000 0x100>; 54 }; 55 56 mscm@40001000 { 57 compatible = "fsl,mvf600-mscm"; 58 reg = <0x40001000 0x1000>; 59 }; 60 61 GIC: interrupt-controller@01c81000 { 62 compatible = "arm,gic"; 63 reg = <0x40003000 0x1000>, /* Distributor Registers */ 64 <0x40002100 0x100>; /* CPU Interface Registers */ 65 interrupt-controller; 66 #interrupt-cells = <1>; 67 }; 68 69 anadig@40050000 { 70 compatible = "fsl,mvf600-anadig"; 71 reg = <0x40050000 0x300>; 72 }; 73 74 ccm@4006b000 { 75 compatible = "fsl,mvf600-ccm"; 76 reg = <0x4006b000 0x1000>; 77 }; 78 79 mp_tmr@40002100 { 80 compatible = "arm,mpcore-timers"; 81 clock-frequency = <133000000>; 82 #address-cells = <1>; 83 #size-cells = <0>; 84 reg = < 0x40002200 0x100 >, /* Global Timer Registers */ 85 < 0x40002600 0x100 >; /* Private Timer Registers */ 86 interrupts = < 27 29 >; 87 interrupt-parent = < &GIC >; 88 }; 89 90 pit@40037000 { 91 compatible = "fsl,mvf600-pit"; 92 reg = <0x40037000 0x1000>; 93 interrupts = < 71 >; 94 interrupt-parent = <&GIC>; 95 clock-frequency = < 24000000 >; 96 }; 97 98 lptmr@40040000 { 99 compatible = "fsl,mvf600-lptmr"; 100 reg = <0x40040000 0x1000>; 101 interrupts = < 72 >; 102 interrupt-parent = <&GIC>; 103 clock-frequency = < 24000000 >; 104 }; 105 106 iomuxc@40048000 { 107 compatible = "fsl,mvf600-iomuxc"; 108 reg = <0x40048000 0x1000>; 109 }; 110 111 gpio@400FF000 { 112 compatible = "fsl,mvf600-gpio"; 113 reg = <0x400FF000 0x200>; 114 #gpio-cells = <3>; 115 gpio-controller; 116 interrupts = < 139 140 141 142 143 >; 117 interrupt-parent = <&GIC>; 118 119 }; 120 121 nand@400E0000 { 122 #address-cells = <1>; 123 #size-cells = <1>; 124 compatible = "fsl,mvf600-nand"; 125 reg = <0x400E0000 0x10000>; 126 interrupts = < 115 >; 127 interrupt-parent = <&GIC>; 128 129 partition@40000 { 130 reg = <0x40000 0x200000>; /* 2MB */ 131 label = "u-boot"; 132 read-only; 133 }; 134 135 partition@240000 { 136 reg = <0x240000 0x200000>; /* 2MB */ 137 label = "test"; 138 }; 139 140 partition@440000 { 141 reg = <0x440000 0xa00000>; /* 10MB */ 142 label = "kernel"; 143 }; 144 145 partition@e40000 { 146 reg = <0xe40000 0x1e000000>; /* 480MB */ 147 label = "root"; 148 }; 149 150 }; 151 152 sdhci0: sdhci@400B1000 { 153 compatible = "fsl,mvf600-sdhci"; 154 reg = <0x400B1000 0x1000>; 155 interrupts = < 59 >; 156 interrupt-parent = <&GIC>; 157 clock-frequency = <50000000>; 158 }; 159 160 sdhci1: sdhci@400B2000 { 161 compatible = "fsl,mvf600-sdhci"; 162 reg = <0x400B2000 0x1000>; 163 interrupts = < 60 >; 164 interrupt-parent = <&GIC>; 165 clock-frequency = <50000000>; 166 }; 167 168 serial0: serial@40027000 { 169 compatible = "fsl,mvf600-uart"; 170 reg = <0x40027000 0x1000>; 171 interrupts = <93>; 172 interrupt-parent = <&GIC>; 173 current-speed = <115200>; 174 clock-frequency = < 24000000 >; 175 }; 176 177 serial1: serial@40028000 { 178 compatible = "fsl,mvf600-uart"; 179 reg = <0x40028000 0x1000>; 180 interrupts = <94>; 181 interrupt-parent = <&GIC>; 182 current-speed = <115200>; 183 clock-frequency = < 24000000 >; 184 }; 185 186 usb@40034000 { 187 compatible = "fsl,mvf600-usb-ehci", "usb-ehci"; 188 reg = < 0x40034000 0x1000 >, /* ehci */ 189 < 0x40035000 0x1000 >, /* usbc */ 190 < 0x40050800 0x100 >; /* phy */ 191 interrupts = < 107 >; 192 interrupt-parent = <&GIC>; 193 }; 194 195 usb@400b4000 { 196 compatible = "fsl,mvf600-usb-ehci", "usb-ehci"; 197 reg = < 0x400b4000 0x1000 >, /* ehci */ 198 < 0x400b5000 0x1000 >, /* usbc */ 199 < 0x40050C00 0x100 >; /* phy */ 200 interrupts = < 108 >; 201 interrupt-parent = <&GIC>; 202 }; 203 204 fec0: ethernet@400D0000 { 205 compatible = "fsl,mvf600-fec"; 206 reg = <0x400D0000 0x1000>; 207 interrupts = < 110 >; 208 interrupt-parent = <&GIC>; 209 phy-mode = "rmii"; 210 phy-disable-preamble; 211 }; 212 213 fec1: ethernet@400D1000 { 214 compatible = "fsl,mvf600-fec"; 215 reg = <0x400D1000 0x1000>; 216 interrupts = < 111 >; 217 interrupt-parent = <&GIC>; 218 phy-mode = "rmii"; 219 phy-disable-preamble; 220 }; 221 222 }; 223}; 224