imx6.dtsi revision 261816 
1/*
2 * Copyright (c) 2013 Ian Lepore
3 * Copyright (c) 2012 The FreeBSD Foundation
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * Freescale i.MX6 Common Device Tree Source.
28 * There are enough differences between the Solo, Dual, Quad, and *-lite
29 * flavors of this SoC that eventually we will need a finer-grained breakdown
30 * of some of this stuff.  For now this file works for all of them.  I think.
31 *
32 * $FreeBSD: head/sys/boot/fdt/dts/imx6.dtsi 261816 2014-02-13 03:41:00Z ian $
33 */
34
35/ {
36	cpus {
37		#address-cells = <1>;
38		#size-cells = <0>;
39
40		cpu@0 {
41			device_type = "cpu";
42			compatible = "ARM,MCIMX6";
43			reg = <0x0>;
44			d-cache-line-size = <32>;
45			i-cache-line-size = <32>;
46			d-cache-size = <0x8000>;
47			i-cache-size = <0x8000>;
48			/* TODO: describe L2 cache also */
49			timebase-frequency = <0>;
50			bus-frequency = <0>;
51			clock-frequency = <0>;
52		};
53	};
54
55	aliases {
56		soc = &SOC;
57	};
58
59	SOC: soc@00000000 {
60		compatible = "simple-bus";
61		#address-cells = <1>;
62		#size-cells = <1>;
63		interrupt-parent = <&gic>;
64		ranges = <0x00000000 0x00000000 0x10000000>;
65
66		gic: generic-interrupt-controller@00a00100 {
67			compatible = "arm,gic";
68			interrupt-controller;
69			#interrupt-cells = <1>;
70			reg = <0x00a01000 0x00001000
71			       0x00a00100 0x00000100>;
72		};
73
74		l2-cache@00a02000 {
75			compatible = "arm,pl310-cache", "arm,pl310";
76			reg = <0xa02000 0x1000>;
77			interrupts = <124>;
78			cache-level = <0x2>;
79			interrupt-parent = < &gic >;
80		};
81
82		aips@02000000 { /* AIPS1 */
83			compatible = "fsl,aips-bus", "simple-bus";
84			#address-cells = <1>;
85			#size-cells = <1>;
86			interrupt-parent = <&gic>;
87			reg = <0x02000000 0x00100000>;
88			ranges;
89
90			/* Required by many devices, so better to stay first */
91			clks: ccm@020c4000 {
92				compatible = "fsl,imx6q-ccm";
93				reg = <0x020c4000 0x4000>;
94				interrupts = <119 120>;
95			};
96
97			anatop: anatop@020c8000 {
98				compatible = "fsl,imx6q-anatop";
99				reg = <0x020c8000 0x1000>;
100			}
101
102			gpt: timer@02098000 {
103				compatible = "fsl,imx6q-gpt", "fsl,imx51-gpt";
104				reg = <0x02098000 0x4000>;
105				interrupt-parent = <&gic>; interrupts = <87>;
106			};
107
108//			iomux@73fa8000 {
109//				compatible = "fsl,imx51-iomux";
110//				reg = <0x73fa8000 0x4000>;
111//				interrupt-parent = <&gic>; interrupts = <7>;
112//				status = "disabled";
113//			};
114
115			gpio1: gpio@0209c000 {
116				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
117				reg = <0x0209c000 0x4000>;
118				interrupts = <0 66 0x04 0 67 0x04>;
119				gpio-controller;
120				#gpio-cells = <2>;
121				interrupt-controller;
122				#interrupt-cells = <2>;
123			};
124			
125			gpio2: gpio@020a0000 {
126				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
127				reg = <0x020a0000 0x4000>;
128				interrupts = <0 68 0x04 0 69 0x04>;
129				gpio-controller;
130				#gpio-cells = <2>;
131				interrupt-controller;
132				#interrupt-cells = <2>;
133			};
134			
135			gpio3: gpio@020a4000 {
136				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
137				reg = <0x020a4000 0x4000>;
138				interrupts = <0 70 0x04 0 71 0x04>;
139				gpio-controller;
140				#gpio-cells = <2>;
141				interrupt-controller;
142				#interrupt-cells = <2>;
143			};
144			
145			gpio4: gpio@020a8000 {
146				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
147				reg = <0x020a8000 0x4000>;
148				interrupts = <0 72 0x04 0 73 0x04>;
149				gpio-controller;
150				#gpio-cells = <2>;
151				interrupt-controller;
152				#interrupt-cells = <2>;
153			};
154			
155			gpio5: gpio@020ac000 {
156				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
157				reg = <0x020ac000 0x4000>;
158				interrupts = <0 74 0x04 0 75 0x04>;
159				gpio-controller;
160				#gpio-cells = <2>;
161				interrupt-controller;
162				#interrupt-cells = <2>;
163			};
164			
165			gpio6: gpio@020b0000 {
166				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
167				reg = <0x020b0000 0x4000>;
168				interrupts = <0 76 0x04 0 77 0x04>;
169				gpio-controller;
170				#gpio-cells = <2>;
171				interrupt-controller;
172				#interrupt-cells = <2>;
173			};
174			
175			gpio7: gpio@020b4000 {
176				compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
177				reg = <0x020b4000 0x4000>;
178				interrupts = <0 78 0x04 0 79 0x04>;
179				gpio-controller;
180				#gpio-cells = <2>;
181				interrupt-controller;
182				#interrupt-cells = <2>;
183			};
184
185			uart1: serial@02020000 {
186				compatible = "fsl,imx6q-uart";
187				reg = <0x02020000 0x4000>;
188				interrupt-parent = <&gic>; 
189				interrupts = <58>;
190				clock-frequency = <80000000>;
191				status = "disabled";
192			};
193
194			uart2: serial@021e8000 {
195				compatible = "fsl,imx6q-uart";
196				reg = <0x021e8000 0x4000>;
197				interrupt-parent = <&gic>; 
198				interrupts = <59>;
199				clock-frequency = <80000000>;
200				status = "disabled";
201			};
202
203			uart3: serial@021ec000 {
204				compatible = "fsl,imx6q-uart";
205				reg = <0x021ec000 0x4000>;
206				interrupt-parent = <&gic>; 
207				interrupts = <60>;
208				clock-frequency = <80000000>;
209				status = "disabled";
210			};
211
212			uart4: serial@021f0000 {
213				compatible = "fsl,imx6q-uart";
214				reg = <0x021f0000 0x4000>;
215				interrupt-parent = <&gic>; 
216				interrupts = <61>;
217				clock-frequency = <80000000>;
218				status = "disabled";
219			};
220
221			uart5: serial@021f4000 {
222				compatible = "fsl,imx6q-uart";
223				reg = <0x021f4000 0x4000>;
224				interrupt-parent = <&gic>; 
225				interrupts = <62>;
226				clock-frequency = <80000000>;
227				status = "disabled";
228			};
229
230			usbphy1: usbphy@020c9000 {
231				compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
232				reg = <0x020c9000 0x1000>;
233				interrupts = <44>;
234				status = "disabled";
235			};
236			
237			usbphy2: usbphy@020ca000 {
238				compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
239				reg = <0x020ca000 0x1000>;
240				interrupts = <45>;
241				status = "disabled";
242			};
243			
244		};
245
246		aips@02100000 { /* AIPS2 */
247			compatible = "fsl,aips-bus", "simple-bus";
248			#address-cells = <1>;
249			#size-cells = <1>;
250			interrupt-parent = <&gic>;
251			reg = <0x02100000 0x00100000>;
252			ranges;
253
254			fec1: ethernet@02188000 {
255				compatible = "fsl,imx6q-fec";
256				reg = <0x02188000 0x4000>;
257				interrupts = <150 151>;
258				status = "disabled";
259			};
260			
261			usbotg1: usb@02184000 {
262				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
263				reg = <0x02184000 0x200>;
264				interrupts = <75>;
265				fsl,usbphy = <&usbphy1>;
266				fsl,usbmisc = <&usbmisc 0>;
267				status = "disabled";
268			};
269			
270			usbh1: usb@02184200 {
271				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
272				reg = <0x02184200 0x200>;
273				interrupts = <72>;
274				fsl,usbphy = <&usbphy2>;
275				fsl,usbmisc = <&usbmisc 1>;
276				status = "disabled";
277			};
278			
279			usbh2: usb@02184400 {
280				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
281				reg = <0x02184400 0x200>;
282				interrupts = <73>;
283				fsl,usbmisc = <&usbmisc 2>;
284				status = "disabled";
285			};
286			
287			usbh3: usb@02184600 {
288				compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
289				reg = <0x02184600 0x200>;
290				interrupts = <74>;
291				fsl,usbmisc = <&usbmisc 3>;
292				status = "disabled";
293			};
294			
295			usbmisc: usbmisc@02184800 {
296				#index-cells = <1>;
297				compatible = "fsl,imx6q-usbmisc";
298				reg = <0x02184800 0x200>;
299				// Not disabled on purpose.
300			};
301
302			usdhc1: usdhc@02190000 {
303				compatible = "fsl,imx6q-usdhc";
304				reg = <0x02190000 0x4000>;
305				interrupt-parent = <&gic>;
306				interrupts = <54>;
307				cd-gpios = <&gpio1 2 0>;
308				bus-width = <0x4>;
309				status ="disabled";
310			};
311
312			usdhc2: usdhc@02194000 {
313				compatible = "fsl,imx6q-usdhc";
314				reg = <0x02194000 0x4000>;
315				interrupt-parent = <&gic>;
316				interrupts = <55>;
317				non-removable;
318				bus-width = <0x4>;
319				status ="disabled";
320			};
321
322			usdhc3: usdhc@02198000 {
323				compatible = "fsl,imx6q-usdhc";
324				reg = <0x02198000 0x4000>;
325				interrupt-parent = <&gic>;
326				interrupts = <56>;
327				cd-gpios = <&gpio3 9 0>;
328				bus-width = <0x4>;
329				status ="disabled";
330			};
331
332			usdhc4: usdhc@0219c000 {
333				compatible = "fsl,imx6q-usdhc";
334				reg = <0x0219c000 0x4000>;
335				interrupt-parent = <&gic>;
336				interrupts = <57>;
337				bus-width = <0x4>;
338				status ="disabled";
339			};
340		};
341	};
342};
343