1208561Sraj/* 2208561Sraj * Copyright (c) 2010 The FreeBSD Foundation 3208561Sraj * All rights reserved. 4208561Sraj * 5208561Sraj * This software was developed by Semihalf under sponsorship from 6208561Sraj * the FreeBSD Foundation. 7208561Sraj * 8208561Sraj * Redistribution and use in source and binary forms, with or without 9208561Sraj * modification, are permitted provided that the following conditions 10208561Sraj * are met: 11208561Sraj * 1. Redistributions of source code must retain the above copyright 12208561Sraj * notice, this list of conditions and the following disclaimer. 13208561Sraj * 2. Redistributions in binary form must reproduce the above copyright 14208561Sraj * notice, this list of conditions and the following disclaimer in the 15208561Sraj * documentation and/or other materials provided with the distribution. 16208561Sraj * 17208561Sraj * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18208561Sraj * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19208561Sraj * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20208561Sraj * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21208561Sraj * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22208561Sraj * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23208561Sraj * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24208561Sraj * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25208561Sraj * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26208561Sraj * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27208561Sraj * SUCH DAMAGE. 28208561Sraj * 29208561Sraj * Marvell DB-78100 Device Tree Source. 30208561Sraj * 31208561Sraj * $FreeBSD: releng/10.3/sys/boot/fdt/dts/arm/db78100.dts 262614 2014-02-28 18:29:09Z imp $ 32208561Sraj */ 33208561Sraj 34208561Sraj/dts-v1/; 35208561Sraj 36208561Sraj/ { 37208561Sraj model = "mrvl,DB-78100"; 38208561Sraj compatible = "DB-78100-BP", "DB-78100-BP-A"; 39208561Sraj #address-cells = <1>; 40208561Sraj #size-cells = <1>; 41208561Sraj 42208561Sraj aliases { 43208561Sraj ethernet0 = &enet0; 44208561Sraj serial0 = &serial0; 45208561Sraj serial1 = &serial1; 46208561Sraj mpp = &MPP; 47208561Sraj }; 48208561Sraj 49208561Sraj cpus { 50208561Sraj #address-cells = <1>; 51208561Sraj #size-cells = <0>; 52208561Sraj 53208561Sraj cpu@0 { 54208561Sraj device_type = "cpu"; 55208561Sraj compatible = "ARM,88FR571"; 56208561Sraj reg = <0x0>; 57208561Sraj d-cache-line-size = <32>; // 32 bytes 58208561Sraj i-cache-line-size = <32>; // 32 bytes 59208561Sraj d-cache-size = <0x4000>; // L1, 16K 60208561Sraj i-cache-size = <0x4000>; // L1, 16K 61208561Sraj timebase-frequency = <0>; 62208561Sraj bus-frequency = <0>; 63208561Sraj clock-frequency = <0>; 64208561Sraj }; 65208561Sraj }; 66208561Sraj 67208561Sraj memory { 68208561Sraj device_type = "memory"; 69208561Sraj reg = <0x0 0x20000000>; // 512M at 0x0 70208561Sraj }; 71208561Sraj 72235609Sgber localbus@0 { 73208561Sraj #address-cells = <2>; 74208561Sraj #size-cells = <1>; 75208561Sraj compatible = "mrvl,lbc"; 76235609Sgber bank-count = <5>; 77208561Sraj 78208561Sraj /* This reflects CPU decode windows setup. */ 79235609Sgber ranges = <0x0 0x2f 0xf9300000 0x00100000 80235609Sgber 0x1 0x3e 0xf9400000 0x00100000 81235609Sgber 0x2 0x3d 0xf9500000 0x02000000 82235609Sgber 0x3 0x3b 0xfb500000 0x00100000>; 83208561Sraj 84208561Sraj nor@0,0 { 85208561Sraj #address-cells = <1>; 86208561Sraj #size-cells = <1>; 87208561Sraj compatible = "cfi-flash"; 88208561Sraj reg = <0x0 0x0 0x00100000>; 89208561Sraj }; 90208561Sraj 91208561Sraj led@1,0 { 92208561Sraj #address-cells = <1>; 93208561Sraj #size-cells = <1>; 94208561Sraj compatible = "led"; 95208561Sraj reg = <0x1 0x0 0x00100000>; 96208561Sraj }; 97208561Sraj 98208561Sraj nor@2,0 { 99208561Sraj #address-cells = <1>; 100208561Sraj #size-cells = <1>; 101208561Sraj compatible = "cfi-flash"; 102208561Sraj reg = <0x2 0x0 0x02000000>; 103208561Sraj }; 104208561Sraj 105208561Sraj nand@3,0 { 106208561Sraj #address-cells = <1>; 107208561Sraj #size-cells = <1>; 108235609Sgber compatible = "mrvl,nfc"; 109208561Sraj reg = <0x3 0x0 0x00100000>; 110208561Sraj }; 111208561Sraj }; 112208561Sraj 113208561Sraj soc78100@f1000000 { 114208561Sraj #address-cells = <1>; 115208561Sraj #size-cells = <1>; 116208561Sraj compatible = "simple-bus"; 117208561Sraj ranges = <0x0 0xf1000000 0x00100000>; 118208561Sraj bus-frequency = <0>; 119208561Sraj 120208561Sraj PIC: pic@20200 { 121208561Sraj interrupt-controller; 122208561Sraj #address-cells = <0>; 123208561Sraj #interrupt-cells = <1>; 124208561Sraj reg = <0x20200 0x3c>; 125208561Sraj compatible = "mrvl,pic"; 126208561Sraj }; 127208561Sraj 128208561Sraj timer@20300 { 129208561Sraj compatible = "mrvl,timer"; 130208561Sraj reg = <0x20300 0x30>; 131208561Sraj interrupts = <8>; 132208561Sraj interrupt-parent = <&PIC>; 133208561Sraj mrvl,has-wdt; 134208561Sraj }; 135208561Sraj 136208561Sraj MPP: mpp@10000 { 137208561Sraj #pin-cells = <2>; 138208561Sraj compatible = "mrvl,mpp"; 139208561Sraj reg = <0x10000 0x34>; 140208561Sraj pin-count = <50>; 141208561Sraj pin-map = < 142208561Sraj 0 2 /* MPP[0]: GE1_TXCLK */ 143208561Sraj 1 2 /* MPP[1]: GE1_TXCTL */ 144208561Sraj 2 2 /* MPP[2]: GE1_RXCTL */ 145208561Sraj 3 2 /* MPP[3]: GE1_RXCLK */ 146208561Sraj 4 2 /* MPP[4]: GE1_TXD[0] */ 147208561Sraj 5 2 /* MPP[5]: GE1_TXD[1] */ 148208561Sraj 6 2 /* MPP[6]: GE1_TXD[2] */ 149208561Sraj 7 2 /* MPP[7]: GE1_TXD[3] */ 150208561Sraj 8 2 /* MPP[8]: GE1_RXD[0] */ 151208561Sraj 9 2 /* MPP[9]: GE1_RXD[1] */ 152208561Sraj 10 2 /* MPP[10]: GE1_RXD[2] */ 153208561Sraj 11 2 /* MPP[11]: GE1_RXD[3] */ 154208561Sraj 13 3 /* MPP[13]: SYSRST_OUTn */ 155208561Sraj 14 3 /* MPP[14]: SATA1_ACTn */ 156208561Sraj 15 3 /* MPP[15]: SATA0_ACTn */ 157208561Sraj 16 4 /* MPP[16]: UA2_TXD */ 158208561Sraj 17 4 /* MPP[17]: UA2_RXD */ 159208561Sraj 18 3 /* MPP[18]: <UNKNOWN> */ 160208561Sraj 19 3 /* MPP[19]: <UNKNOWN> */ 161208561Sraj 20 3 /* MPP[20]: <UNKNOWN> */ 162208561Sraj 21 3 /* MPP[21]: <UNKNOWN> */ 163208561Sraj 22 4 /* MPP[22]: UA3_TXD */ 164208561Sraj 23 4 >; /* MPP[21]: UA3_RXD */ 165208561Sraj }; 166208561Sraj 167208561Sraj GPIO: gpio@10100 { 168208561Sraj #gpio-cells = <3>; 169208561Sraj compatible = "mrvl,gpio"; 170208561Sraj reg = <0x10100 0x20>; 171208561Sraj gpio-controller; 172208561Sraj interrupts = <56 57 58 59>; 173208561Sraj interrupt-parent = <&PIC>; 174208561Sraj }; 175208561Sraj 176208561Sraj rtc@10300 { 177208561Sraj compatible = "mrvl,rtc"; 178208561Sraj reg = <0x10300 0x08>; 179208561Sraj }; 180208561Sraj 181208561Sraj twsi@11000 { 182208561Sraj #address-cells = <1>; 183208561Sraj #size-cells = <0>; 184208561Sraj compatible = "mrvl,twsi"; 185208561Sraj reg = <0x11000 0x20>; 186208561Sraj interrupts = <2>; 187208561Sraj interrupt-parent = <&PIC>; 188208561Sraj }; 189208561Sraj 190208561Sraj twsi@11100 { 191208561Sraj #address-cells = <1>; 192208561Sraj #size-cells = <0>; 193208561Sraj compatible = "mrvl,twsi"; 194208561Sraj reg = <0x11100 0x20>; 195208561Sraj interrupts = <3>; 196208561Sraj interrupt-parent = <&PIC>; 197208561Sraj }; 198208561Sraj 199208561Sraj enet0: ethernet@72000 { 200208561Sraj #address-cells = <1>; 201208561Sraj #size-cells = <1>; 202208561Sraj model = "V2"; 203208561Sraj compatible = "mrvl,ge"; 204208561Sraj reg = <0x72000 0x2000>; 205208561Sraj ranges = <0x0 0x72000 0x2000>; 206208561Sraj local-mac-address = [ 00 00 00 00 00 00 ]; 207208561Sraj interrupts = <41 42 43 40 70>; 208208561Sraj interrupt-parent = <&PIC>; 209208561Sraj phy-handle = <&phy0>; 210208561Sraj 211208561Sraj mdio@0 { 212208561Sraj #address-cells = <1>; 213208561Sraj #size-cells = <0>; 214208561Sraj compatible = "mrvl,mdio"; 215208561Sraj 216208561Sraj phy0: ethernet-phy@0 { 217208561Sraj reg = <0x8>; 218208561Sraj }; 219232518Sraj phy1: ethernet-phy@1 { 220232518Sraj reg = <0x9>; 221232518Sraj }; 222208561Sraj }; 223208561Sraj }; 224208561Sraj 225208561Sraj enet1: ethernet@76000 { 226208561Sraj #address-cells = <1>; 227208561Sraj #size-cells = <1>; 228208561Sraj model = "V2"; 229208561Sraj compatible = "mrvl,ge"; 230208561Sraj reg = <0x76000 0x2000>; 231208561Sraj ranges = <0x0 0x76000 0x2000>; 232208561Sraj local-mac-address = [ 00 00 00 00 00 00 ]; 233208561Sraj interrupts = <45 46 47 44 70>; 234208561Sraj interrupt-parent = <&PIC>; 235232518Sraj phy-handle = <&phy1>; 236208561Sraj }; 237208561Sraj 238208561Sraj serial0: serial@12000 { 239208561Sraj compatible = "ns16550"; 240208561Sraj reg = <0x12000 0x20>; 241208561Sraj reg-shift = <2>; 242208561Sraj clock-frequency = <0>; 243208561Sraj interrupts = <12>; 244208561Sraj interrupt-parent = <&PIC>; 245208561Sraj }; 246208561Sraj 247208561Sraj serial1: serial@12100 { 248208561Sraj compatible = "ns16550"; 249208561Sraj reg = <0x12100 0x20>; 250208561Sraj reg-shift = <2>; 251208561Sraj clock-frequency = <0>; 252208561Sraj interrupts = <13>; 253208561Sraj interrupt-parent = <&PIC>; 254208561Sraj }; 255208561Sraj 256208561Sraj usb@50000 { 257208561Sraj compatible = "mrvl,usb-ehci", "usb-ehci"; 258208561Sraj reg = <0x50000 0x1000>; 259208561Sraj interrupts = <72 16>; 260208561Sraj interrupt-parent = <&PIC>; 261208561Sraj }; 262208561Sraj 263208561Sraj usb@51000 { 264208561Sraj compatible = "mrvl,usb-ehci", "usb-ehci"; 265208561Sraj reg = <0x51000 0x1000>; 266208561Sraj interrupts = <72 17>; 267208561Sraj interrupt-parent = <&PIC>; 268208561Sraj }; 269208561Sraj 270208561Sraj usb@52000 { 271208561Sraj compatible = "mrvl,usb-ehci", "usb-ehci"; 272208561Sraj reg = <0x52000 0x1000>; 273208561Sraj interrupts = <72 18>; 274208561Sraj interrupt-parent = <&PIC>; 275208561Sraj }; 276208561Sraj 277208561Sraj xor@60000 { 278208561Sraj compatible = "mrvl,xor"; 279208561Sraj reg = <0x60000 0x1000>; 280208561Sraj interrupts = <22 23>; 281208561Sraj interrupt-parent = <&PIC>; 282208561Sraj }; 283208561Sraj 284208561Sraj crypto@90000 { 285208561Sraj compatible = "mrvl,cesa"; 286208561Sraj reg = <0x90000 0x10000>; 287208561Sraj interrupts = <19>; 288208561Sraj interrupt-parent = <&PIC>; 289208561Sraj }; 290208561Sraj 291208561Sraj sata@a0000 { 292208561Sraj compatible = "mrvl,sata"; 293208561Sraj reg = <0xa0000 0x6000>; 294208561Sraj interrupts = <26>; 295208561Sraj interrupt-parent = <&PIC>; 296208561Sraj }; 297208561Sraj }; 298208561Sraj 299218246Smarcel pci0: pcie@f1040000 { 300218246Smarcel compatible = "mrvl,pcie"; 301218246Smarcel device_type = "pci"; 302218246Smarcel #interrupt-cells = <1>; 303218246Smarcel #size-cells = <2>; 304218246Smarcel #address-cells = <3>; 305218246Smarcel reg = <0xf1040000 0x2000>; 306218246Smarcel bus-range = <0 255>; 307218246Smarcel ranges = <0x02000000 0x0 0xf2000000 0xf2000000 0x0 0x04000000 308218246Smarcel 0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>; 309218246Smarcel clock-frequency = <33333333>; 310218246Smarcel interrupt-parent = <&PIC>; 311218246Smarcel interrupts = <68>; 312218246Smarcel interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 313218246Smarcel interrupt-map = < 314218246Smarcel /* IDSEL 0x1 */ 315218246Smarcel 0x0800 0x0 0x0 0x1 &PIC 0x20 316218246Smarcel 0x0800 0x0 0x0 0x2 &PIC 0x21 317218246Smarcel 0x0800 0x0 0x0 0x3 &PIC 0x22 318218246Smarcel 0x0800 0x0 0x0 0x4 &PIC 0x23 319218246Smarcel >; 320218246Smarcel }; 321218246Smarcel 322208561Sraj sram@fd000000 { 323208561Sraj compatible = "mrvl,cesa-sram"; 324208561Sraj reg = <0xfd000000 0x00100000>; 325208561Sraj }; 326218246Smarcel 327218246Smarcel chosen { 328218246Smarcel stdin = "serial0"; 329218246Smarcel stdout = "serial0"; 330218246Smarcel }; 331208561Sraj}; 332